Aluminum alloy film and semiconductor device using the same

Abstract

An aluminum alloy film includes an Al-Si-Mg alloy film containing at least 0.9 to 1.1 wt% of Si and 0.1 to 2.3 wt% of Mg, and the Al-Si-Mg alloy film contains magnesium silicide crystals in Al crystals. A semiconductor device includes a gate trench structure, an interlayer insulating film (6) covering the trench gate structure, an electrode film (7) covering the interlayer insulating film, an insulating layer (8), and a conductive layer (9) covering the electrode film. The electrode film includes an Al-Si-Mg alloy film.

Description

Technical Field

[0001] This disclosure relates to aluminum alloy films and semiconductor devices using the aluminum alloy films. Background Technology

[0002] Typically, a power semiconductor device is known that uses a semiconductor substrate containing Si (silicon) or SiC (silicon carbide) as the main component and uses an aluminum alloy film as the electrode film. For example, progress has been made in miniaturizing this type of semiconductor device in fields such as automotive applications. However, when the size of the semiconductor device decreases, the size of the semiconductor elements and electrodes that form the components of the semiconductor device also decreases. Therefore, due to the increase in resistance, migration in the electrodes may occur, or heat generation may increase.

[0003] As a method to solve the above problems, for example, JP 2019-102896 A discloses forming electrodes using an Al (aluminum) alloy film. The Al alloy film is mainly made of Al-Cu (copper) and has a structure in which at least one of the group X consisting of Nd (neodymium), Gd (gadolinium), La (lanthanum), and Mg (magnesium) is added. The Al alloy film can have high film hardness while also having low resistivity. Summary of the Invention

[0004] The inventors investigated the size reduction of a semiconductor element comprising an electrode film, an insulating layer partially covering the electrode film, and a conductive layer covering a portion of the electrode film exposed from the insulating layer. As a result, it was found that thermal stress concentrated at points on the electrode film in contact with the insulating and conductive layers (hereinafter referred to as "triple points"), leading to cracking.

[0005] When the inventors fabricated the electrode film using the Al-Cu-X alloy film described in JP 2019-102896 A, cracks at the triple point of the electrode film were suppressed. However, on the other hand, a new problem was discovered, in which cracks appeared in another layer covered by the electrode film. That is, in order to further improve the reliability of the semiconductor device having the above-described structure, it is necessary to achieve both the film hardness used to suppress cracks in the electrode film and the relaxation of the stress applied to the other film covered by the electrode film.

[0006] In view of the above problems, the object of this disclosure is to provide an aluminum alloy film having a film hardness capable of suppressing cracks in the aluminum alloy film and capable of relaxing stress applied to another film covered by the aluminum alloy film; and to provide a semiconductor device that uses the aluminum alloy film as an electrode film and has high reliability.

[0007] According to a first aspect of this disclosure, the aluminum alloy film for electrodes in power semiconductor devices comprises an Al-Si-Mg alloy film containing at least 0.9 wt% to 1.1 wt% Si and 0.1 wt% to 2.3 wt% Mg, and the Al-Si-Mg alloy film contains magnesium silicide crystals in Al crystals.

[0008] The aluminum alloy film containing magnesium silicide crystals in the Al crystal can have a film hardness that can suppress cracks in the aluminum alloy film and relax the stress applied to another film adjacent to the aluminum alloy film.

[0009] According to a second aspect of this disclosure, a semiconductor device includes a vertical semiconductor element comprising a substrate, a gate trench, a gate insulating film, a gate electrode, an interlayer insulating film, an electrode film, an insulating layer, and a conductive layer. The substrate has a first surface and a second surface opposite to each other and is made of silicon or silicon carbide. The gate trenches extend from the first surface to the second surface and are arranged away from each other. The gate insulating film covers the inner wall of each of the gate trenches. The gate electrode is disposed on the gate insulating film and fills each of the gate trenches. The interlayer insulating film is disposed on the first surface, covers the gate trenches, and has contact holes exposing a portion of the region between adjacent gate trenches in the gate trenches on the first surface. The electrode film is disposed on the interlayer insulating film. The insulating layer is disposed on the electrode film and has an opening portion exposing a portion of the electrode film. The conductive layer is disposed on the opening portion and covers a portion of the electrode film exposed from the insulating layer. The electrode film comprises an aluminum alloy layer made of an Al-Si-Mg alloy containing at least 0.9 wt% to 1.1 wt% Si and 0.1 wt% to 2.3 wt% Mg, and the aluminum alloy layer contains magnesium silicide crystals in the Al crystals.

[0010] The semiconductor device has a trench gate structure (where a trench gate extending from a first surface of a substrate to a second surface is covered by an interlayer insulating film), and includes an electrode film disposed on the interlayer insulating film, an insulating layer covering a portion of the electrode film and having an opening, and a conductive layer covering the electrode film at the opening. At least a portion of the electrode film has an aluminum alloy layer having a film hardness capable of suppressing cracks in the aluminum alloy layer and relaxing stress applied to another film adjacent to the aluminum alloy layer. Therefore, the semiconductor device can suppress cracks originating from triple points in the electrode film in contact with the insulating layer and the conductive layer, and relax stress applied to the interlayer insulating film covering the electrode film, thereby suppressing cracks in the interlayer insulating film. Attached Figure Description

[0011] The above and other objects, features, and advantages of this disclosure will become more apparent from the following detailed description with reference to the accompanying drawings. In the drawings:

[0012] Figure 1This is a cross-sectional view showing a semiconductor device according to the first embodiment;

[0013] Figure 2 This is a diagram showing cracks in the electrode film of a comparative semiconductor device;

[0014] Figure 3 This is a diagram showing cracks in the interlayer insulating film of another pair of semiconductor devices;

[0015] Figure 4 This is a graph showing the strain-tensile properties of aluminum alloys with different compositions;

[0016] Figure 5 This is a graph showing the relationship between Mg content and film hardness in Al-Si alloys;

[0017] Figure 6 This is a graph showing the relationship between the Mg content in Al-Si alloys and the strain of the interlayer insulating film;

[0018] Figure 7 The image shows the SEM (scanning electron microscope) observation results of the Al-Si-Mg alloy film, and also shows the presence of magnesium silicide crystals in the Al crystals.

[0019] Figure 8 This is a cross-sectional view showing a semiconductor device according to the second embodiment; and

[0020] Figure 9 This is a cross-sectional view showing a semiconductor device according to a third embodiment. Detailed Implementation

[0021] In the following description, embodiments of the present disclosure will be illustrated with reference to the accompanying drawings. In the embodiments described below, identical or equivalent parts are designated by the same reference numerals.

[0022] (First Implementation Plan)

[0023] Reference Figure 1 A semiconductor device 1 according to a first embodiment is described.

[0024] [Basic Structure]

[0025] The semiconductor device 1 of this embodiment includes, for example, a vertical semiconductor element having a trench gate structure. This disclosure describes the formation of a vertical power semiconductor device with MOSFETs as a typical example, but this disclosure is not limited to this device structure.

[0026] like Figure 1As shown, for example, semiconductor device 1 includes: a substrate 2; a trench gate structure consisting of a gate trench 3, a gate insulating film 4 and a gate electrode 5 formed to the substrate 2; an interlayer insulating film 6; an electrode film 7; an insulating layer 8; and a conductive layer 9.

[0027] Substrate 2 is, for example, a semiconductor substrate made of Si (silicon) or SiC (silicon carbide). Substrate 2 has a plate shape having a first surface 2a and a second surface 2b that are opposite to each other in the thickness direction. For example, in the region where a MOSFET is formed, n + Type layer, n - p-type, n-type, and n-type layers made of SiC + The layers are stacked from the second surface 2b to the first surface 2a. For example, the above layers are stacked on the n-th surface having the second surface 2b by epitaxial growth. + Substrate 2 is obtained by applying a substrate of type 2.

[0028] n on the second surface 2b of substrate 2 + The type layer has, for example, 1.0 × 10 19 / cm 3 The n-type impurity concentration is high, and it has a surface on the (0001)Si plane. Stacked on n... + n on the type layer - The type layer has, for example, 0.5 × 10⁻⁶. 16 / cm 3 Up to 2.0×10 16 / cm 3 The concentration of n-type impurities. Stacked on n - The n-type layer on the n-type layer has, for example, about 8 × 10 16 / cm 3 The concentration of n-type impurities, and has a higher concentration than n-type impurities. - A higher concentration of the n-type layer (i.e., lower resistance). The n-type layer allows current distribution and flow over a wider area, contributing to reduced JFET resistance. The n-type layer has a thickness of, for example, 0.5 μm, and is related to n - The type layer together constitutes the drift layer.

[0029] The p-type layer stacked on the n-type layer in substrate 2 is, for example, the portion forming the channel region. The p-type layer has, for example, about 2.0 × 10⁻⁶. 17 / cm 3 The p-type impurity concentration is [high], and the substrate has a thickness of 300 nm. The n-type impurity on the first surface 2a of substrate 2 is [high]. + The type layer has a ratio of n - Higher impurity concentration in the formation layer. + n of the surface layer of the type layer - The concentration of type impurities is, for example, 2.5 × 10⁻⁶. 18 / cm 3Up to 1.0×10 19 / cm 3 n + The substrate 2 has a thickness of 0.5 μm. The substrate 2 has, for example, an annular protective ring (not shown) surrounding the region where the MOSFET is formed. The substrate 2 has a gate trench 3 that extends from the first surface 2a to the second surface 2b and passes through the n on the first surface 2a. + Type-type and p-type layers to reach n - Grooves in the molding layer.

[0030] For example, a plurality of gate trenches 3 are disposed on the first surface 2a of the substrate 2 and arranged far apart from each other. The gate trenches 3 are arranged with a spacing of, for example, 1.0 μm and have an aspect ratio of 2 or greater. The aspect ratio is the ratio of depth to width. For example, the gate trenches 3 are formed by anisotropic etching such as RIE (reactive ion etching) using a mask. When viewed from the normal direction relative to the first surface 2a, the gate trenches 3 are formed as strips, wherein the linear trenches are arranged parallel to each other at equal intervals. A gate insulating film 4 is formed on the inner wall of each of the gate trenches 3.

[0031] A gate insulating film 4 is disposed along and covers the inner wall surface of each of the gate trenches 3. The gate insulating film 4 is made of, for example, SiO2. For example, a gate insulating film 4 with a thickness of about 100 nm is formed by CVD (chemical vapor deposition) using TEOS (tetraethoxysilane) as the gas material. The surface of the gate insulating film 4 is covered with a gate electrode 5 that fills each of the gate trenches 3.

[0032] The gate electrode 5 is made of, for example, a concentration of about 1.0 × 10⁻⁶. 17 / cm 3 Up to 1.0×1020 / cm 3 It is made of doped polysilicon containing P (phosphorus) as an n-type impurity. For example, the doped polysilicon film is formed by CVD, and then deeply etched to leave polysilicon in at least each of the gate trenches 3 to form the gate electrode 5.

[0033] As described above, a plurality of trench gate structures, including a gate trench 3, a gate insulating film 4, and a gate electrode 5, are disposed on the first surface 2a of the substrate 2 at a predetermined spacing. An interlayer insulating film 6 is formed on the first surface 2a of the substrate 2 to cover the trench gate structures.

[0034] The interlayer insulating film 6 is an insulating film with a predetermined pattern shape, for example, the pattern shape covers the trench gate structure on the first surface 2a of the substrate 2 and has contact holes for exposing the area between adjacent trench gate structures. The interlayer insulating film 6 is formed by CVD to a thickness of 300 nm to 900 nm and is made of an insulating material such as BPSG (borosilicate glass). The interlayer insulating film 6 electrically insulates the gate electrode 5 and the electrode film 7 and is covered by the electrode film 7.

[0035] In this embodiment, the electrode film 7 is entirely made of an Al-Si-Mg alloy layer containing at least 0.9 wt% to 1.1 wt% Si and 0.1 wt% to 2.3 wt% Mg. Because the electrode film 7 is made of an Al-Si-Mg alloy layer having the above composition, the electrode film 7 has a film hardness that can suppress cracking from the triple point in contact with the insulating layer 8 and the conductive layer 9 and can relax the stress applied to the interlayer insulating film 6. Furthermore, the electrode film 7 is an aluminum alloy layer having the above composition and has a structure in which magnesium silicide crystals are present in the Al crystals. Details will be described later. The electrode film 7 is formed to fill contact holes while covering the interlayer insulating film 6 and to make ohmic contact with the first surface 2a of the substrate 2. The electrode film 7 is formed, for example, by preparing a target material made of an Al-Si-Mg alloy having the above composition and forming the film using a sputtering apparatus. In the case of sputtering, the electrode film 7 can be formed, for example, under conditions of DC power of 6.0 kW to 12.0 kW, vacuum of 0.2 Pa, and film formation temperature of 200 °C to 350 °C, but the film formation conditions are not limited to these conditions. The electrode film 7 is partially covered by the insulating layer 8, and a portion of the electrode film 7 exposed from the opening 81 of the insulating layer 8 is covered by the conductive layer 9.

[0036] The insulating layer 8 is made of any insulating resin material (such as polyimide) and has a predetermined patterned shape with openings 81. The insulating layer 8 is formed by forming a film using a wet film formation method (such as spin coating) and then patterning the film using a photolithography method or the like. The insulating layer 8 has a thickness of, for example, 10.0 μm, which is greater than the thickness of the conductive layer 9.

[0037] The conductive layer 9 is made of a conductive metallic material such as Ni (nickel) or an alloy thereof, and is electrically connected to a portion of the electrode film 7 exposed through the opening 81. For example, the conductive layer 9, together with the electrode film 7, serves as the source electrode in the region forming the MOSFET. The conductive layer 9 is a cover layer covering the electrode film 7 and has a thickness of, for example, about 4.5 μm.

[0038] Electrode film 7 is the first electrode. A second electrode, paired with the first electrode, is formed on the second surface 2b of the substrate. When electrode film 7 is the source electrode, the second electrode is the drain electrode.

[0039] The above describes the basic structure of the semiconductor device in this implementation scheme.

[0040] [Electrode film]

[0041] Next, the composition and effect of electrode film 7 will be described by comparing it with a comparative semiconductor device in which the corresponding electrode film 7 is made of a conventional aluminum alloy film.

[0042] In the following text, for ease of explanation, an aluminum alloy film having a structure in which α wt% of element X1 is added to Al is referred to as "Al-α wt% X1", and an aluminum alloy film having a structure in which β wt% of element X2 is added to Al-α wt% X1 is referred to as "Al-α wt% X1-β wt% X2". Furthermore, aluminum alloy films in which 0.9 wt% to 1.1 wt% of Si and 0.1 wt% to 2.3 wt% of Mg are added to Al are collectively referred to as "Al-Si-Mg alloy films".

[0043] like Figure 2 As shown, for example, the comparative semiconductor device 100 has a basic structure similar to that of the semiconductor device 1 of this embodiment, but the film corresponding to the electrode film 7 is an electrode film M1 made of Al-1 wt% Si. In view of the above problems, the object of this disclosure is to provide an aluminum alloy film having a film hardness capable of suppressing cracks in the aluminum alloy film and capable of relaxing stress applied to another film covered by the aluminum alloy film; and to provide a semiconductor device that uses an aluminum alloy film as an electrode film and has high reliability.

[0044] However, when the inventors conducted a reliability assessment test on the comparative semiconductor device 100 using thermal cycling, they discovered a crack originating from the triple point TP, which is part of the electrode film M1 that contacts the insulating layer 8 and the conductive layer 9. This is believed to be due to stress concentration at the triple point TP, and the inability of the electrode film M1 to withstand this stress.

[0045] Therefore, as Figure 3 As shown, for example, the inventors fabricated another comparative semiconductor device 101 (which is provided with an electrode film M2 made of an aluminum alloy film with a film hardness higher than that of the electrode film M1) and performed the same reliability evaluation test. The electrode film M2 is made of, for example, Al-1 wt% Cu. As a result of the reliability evaluation test, in the comparative semiconductor device 101, no cracks appeared in the electrode film M2, but cracks appeared in the interlayer insulating film 6 covering the electrode film M2. It is believed that this is because the high film hardness of the electrode film M2 can suppress cracks in the electrode film M2, but the excessive hardness of the film weakens the stress relaxation effect, and the stress concentrates on the interlayer insulating film 6.

[0046] The above results indicate that the film hardness must be adjusted to be compatible with crack suppression in the electrode film and stress relaxation applied to the interlayer insulating film 6.

[0047] here, Figure 4 The results of evaluating the strain-tensile properties of several aluminum alloy films with different compositions are shown. Figure 4 In the diagram, the horizontal axis represents the actual strain, and the vertical axis represents the actual stress.

[0048] In Al-1 wt% Si, the true stress increases to approximately 50 MPa as the true strain increases from 0 to 0.01, and reaches approximately 60 MPa when the true strain exceeds 0.01. It is assumed that cracks appear in the electrode film M1 because it is a soft and brittle aluminum alloy.

[0049] In Al-1 wt% Si, the true stress increases to approximately 320 MPa as the true strain increases from 0 to 0.01, and reaches approximately 380 MPa when the true strain exceeds 0.01. It is assumed that because the electrode film M2, made of Al-1 wt% Cu, is an aluminum alloy with harder properties than Al-1 wt% Si, no cracks appear in the electrode film M2, but the stress relaxation effect is weakened.

[0050] In Al-5 wt%Mg, as the true strain increases from 0 to 0.01, the true stress increases to approximately 630 MPa, and even when the true strain exceeds 0.01, the true stress gradually increases, reaching approximately 720 MPa, until the true strain reaches 0.05. It is believed that since Al-5 wt%Mg is an aluminum alloy film with harder properties than Al-1 wt%Cu, when the electrode film is made of Al-5 wt%Mg, results similar to those of Al-1 wt%Cu are obtained.

[0051] Therefore, in order to achieve both the suppression of cracks in the electrode film and the relaxation of stress applied to the interlayer insulating film 6, for example, an aluminum alloy film can be formed to have strain-tensile properties between Al-1 wt% Si and Al-1 wt% Cu.

[0052] As a result of diligent research, the inventors have discovered that the aforementioned compatibility is possible by using an Al-Si-Mg alloy film. For example, in Al-1 wt% Si-2 wt% Mg, as the true strain increases from 0 to 0.02, the true stress increases to approximately 150 MPa, and thereafter the true strain remains almost constant. When a reliability evaluation test similar to that of the comparative semiconductor device 100 was performed on a semiconductor device 1 with an electrode film 7 made of an Al-Si-Mg alloy film having the aforementioned properties, no cracks appeared in either the electrode film 7 or the interlayer insulating film 6.

[0053] Subsequently, refer to Figure 5 Describe the relationship between Mg content and the film hardness of Al-Si-Mg alloy films.

[0054] Evaluation samples (in which an Al-Si alloy film or an Al-Si-Mg alloy film with different Mg contents was formed on a silicon substrate at a thickness of 5.0 μm) were prepared and nanoindentation measurements were performed to obtain the desired results. Figure 5 The results are shown in the figure. The aluminum alloy films of the evaluation samples were formed by sputtering using Al-Si target materials with 0.9 wt% to 1.1 wt% Si added to Al, and with different Mg contents.

[0055] The Mg-free Al-Si alloy film has a film hardness of approximately 0.78 GPa. The Al-Si-Mg alloy film has a film hardness of approximately 0.66 GPa when the Mg content is 0.5 wt%, and approximately 0.90 GPa when the Mg content is 2.5 wt%, although these are estimates. Figure 5 The curves shown by the dashed line were obtained by approximating these results using the least squares method. As a result of the inventors' research, the film hardness required to suppress cracks in the aluminum alloy film is 0.6 GPa to 0.8 GPa. The Mg content required to meet this condition is 2.3% by weight or less.

[0056] Next, we will refer to Figure 6 Describe the relationship between the Mg content in the Al-Si-Mg alloy film and the strain in the interlayer insulating film 6.

[0057] Figure 6 The results shown were obtained through simulation calculations using CAE analysis. The CAE analysis used a simulation model in which a 900 nm thick BPSG film (corresponding to interlayer insulating film 6) was formed on a silicon substrate, and an Al-Si film or an Al-Si-Mg alloy film with different Mg contents was formed on the BPSG film. Figure 6 The "strain of the interlayer insulating film" on the vertical axis is the simulation result of the BPSG film in the analytical model described later.

[0058] The strain of the BPSG membrane covered with a Mg-free Al-Si alloy film is approximately 3.5 × 10⁻⁶. -3 When the Mg content of the Al-Si-Mg alloy film is 0.5% by weight, the strain of the BPSG film is approximately 1.7 × 10⁻⁶. -3 When the Mg content of the Al-Si-Mg alloy film is 2.5% by weight, the strain of the BPSG film is approximately 3.4 × 10⁻⁶. -3 . Figure 6The curves shown were obtained by approximating these results using the least squares method. As a result of the inventors' research, it was found that when the dependent variable is 3.0 × 10⁻⁶... -3 At or below this level, cracking of the BPSG film can be suppressed. The Mg content required to meet this condition is 0.1% to 2.3% by weight.

[0059] These results indicate that, in order to obtain an Al-Si-Mg alloy film that can suppress cracks in the electrode film 7 and relax the stress applied to the interlayer insulating film 6, the Mg content needs to be set in the range of 0.1 wt% to 2.3 wt%. That is, when the electrode film 7 is made of an Al-Si-Mg alloy film containing 0.9 wt% to 1.1 wt% Si and 0.1 wt% to 2.3 wt% Mg, the electrode film 7 can suppress cracks in the electrode film 7 and relax the stress applied to the other film.

[0060] For example, such as Figure 7 As shown, when the surface of the sample in which an Al-Si-Mg alloy film is formed on a silicon substrate is observed by SEM, magnesium silicide crystals are present in the Al crystals. Figure 7 The Al-Si-Mg alloy film in the sample shown is Al-1.0 wt% Si-0.5 wt% Mg. Figure 7 In the image, the arrow indicates magnesium silicide crystals.

[0061] In this embodiment, when the Al-Si-Mg alloy film contains at least 0.9% to 1.1% by weight of Si and 0.1% to 2.3% by weight of Mg, the Al-Si-Mg alloy film can suppress cracks in the Al-Si-Mg alloy film and relax the stress applied to another film covered by the Al-Si-Mg alloy film. Furthermore, when the semiconductor device 1 has a structure in which the electrode film 7 is formed of an Al-Si-Mg alloy film and the interlayer insulating film 6 is covered by the electrode film 7, the semiconductor device 1 can have a power semiconductor element with high reliability in which cracks in the electrode film 7 and the interlayer insulating film 6 are suppressed.

[0062] (Second Implementation Plan)

[0063] Reference Figure 8 A semiconductor device 1 according to a second embodiment is described.

[0064] For example, such as Figure 8 As shown, the semiconductor device 1 of this embodiment differs from the semiconductor device 1 of the first embodiment in that the electrode film 7 has a stacked structure in which the first layer 71 and the second layer 72 are stacked on the interlayer insulating film 6 in the aforementioned order. The differences between this embodiment and the first embodiment are described below.

[0065] In this embodiment, the electrode film 7 is formed by laminating two aluminum alloy films with different compositions, and the total thickness is, for example, about 5.0 μm.

[0066] The first layer 71 is made of an Al-Si-Mg alloy film containing at least 0.9 wt% to 1.1 wt% Si and 0.1 wt% to 2.3 wt% Mg. The first layer 71 has a thickness of, for example, 1.0 μm to 2.5 μm, and has a film hardness such that the first layer 71 can suppress cracks in the first layer 71 and relax the stress applied to the interlayer insulating film 6 from the insulating layer 8, the conductive layer 9, and the second layer 72.

[0067] The second layer 72 has a different composition from the first layer 71 and is made of an aluminum alloy film having a film hardness at least higher than that of the first layer 71. The second layer 72 can be made of any aluminum alloy film, such as an Al-1 wt% Si alloy, an Al-1 wt% Cu alloy, an Al-5 wt% Mg alloy, or an alloy containing other metallic elements added thereto. The second layer 72 can have a film hardness at least capable of suppressing cracks originating from the triple point in contact with the insulating layer 8 and the conductive layer 9, and can be made of an aluminum alloy film having another known composition. When the thickness of the electrode film 7 is 5.0 μm, the thickness of the second layer 72 is, for example, 2.5 μm to 4.0 μm.

[0068] The semiconductor device 1 according to the second embodiment provides similar beneficial effects to the first embodiment.

[0069] (Third Implementation Plan)

[0070] Reference Figure 9 A semiconductor device 1 according to a third embodiment is described.

[0071] For example, such as Figure 9 As shown, the semiconductor device 1 of this embodiment differs from the semiconductor device 1 of the first embodiment in that the electrode film 7 has a stacked structure in which the first layer 71, the second layer 72, and the third layer 73 are stacked on the interlayer insulating film 6 in the aforementioned order. The differences between this embodiment and the first embodiment are described below.

[0072] In this embodiment, the electrode film 7 is formed by laminating three aluminum alloy films, and the total thickness is, for example, about 5.0 μm.

[0073] Each of the first layer 71 and the third layer 73 has a composition different from that of the second layer 72, and is made of an aluminum alloy film having a film hardness higher than that of the second layer 72. The first layer 71 and the third layer 73 may have any composition, such as an Al-1 wt% Si alloy, an Al-1 wt% Cu alloy, an Al-5 wt% Mg alloy, or those with other metallic elements added to them. However, the first layer 71 and the third layer 73 may be aluminum alloy films with other known compositions. When the thickness of the electrode film 7 is 5.0 μm, the thickness of each of the first layer 71 and the third layer 73 is, for example, about 2.0 μm. The first layer 71 and the third layer 73 may be aluminum alloy films with the same composition or aluminum alloy films with different compositions.

[0074] The first layer 71 has a film hardness higher than that of the Al-Si-Mg alloy film, and the stress relaxation effect of the first layer 71 is less than that of the Al-Si-Mg alloy film. However, when the first layer 71 has a film thickness equal to or less than a predetermined thickness, such as 2.0 μm, the stress applied to the interlayer insulating film 6 is relaxed.

[0075] Because the hardness of the third layer 73 is higher than that of the Al-Si-Mg alloy film, the third layer 73 can suppress cracks originating from triple points in contact with the insulating layer 8 and the conductive layer 9. The semiconductor device 1 of this embodiment has a structure in which the stress applied to the interlayer insulating film 6 due to the hardness of the third layer 73 is relaxed by the second layer 72 having a predetermined film hardness.

[0076] The first layer 71 is made of an Al-Si-Mg alloy film containing at least 0.9 wt% to 1.1 wt% Si and 0.1 wt% to 2.3 wt% Mg. The second layer 72 has a thickness of, for example, about 1.0 μm and a film hardness such that the second layer 72 can suppress cracks in the second layer 72 and relax the stresses applied to the interlayer insulating film 6 from the insulating layer 8, the conductive layer 9 and the third layer 73.

[0077] The semiconductor device 1 according to the third embodiment provides similar beneficial effects to the first embodiment.

[0078] (Other implementation plans)

[0079] While this disclosure has been described with reference to the above embodiments, it should be understood that this disclosure is not limited to the above embodiments and structures. This disclosure includes various modifications and variations within the scope of equivalents. Furthermore, as preferred combinations and constructions, other combinations and constructions, including those with more, fewer, or only a single element, are also within the spirit and scope of this disclosure.

[0080] For example, the semiconductor device 1 of the second embodiment may have a structure in which the first layer 71 and the second layer 72 are reversed. In this case, the electrode film 7 comprises a first layer 71 made of an aluminum alloy film with a film hardness higher than that of an Al-Si-M alloy film and a second layer 72 made of an Al-Si-Mg alloy film. That is, the second layer 72 serves as a stress relaxation layer, which relaxes the stress applied from the insulating layer 8 to the interlayer insulating film 6. Even in this case, the semiconductor device 1 can achieve effects similar to those of the first embodiment.

Claims

1. An aluminum alloy film for an electrode in a power semiconductor element, comprising: an Al-Si-Mg alloy film containing at least 0.9 to 1.1% by weight of Si and 0.1 to 2.3% by weight of Mg, wherein the Al-Si-Mg alloy film contains magnesium silicide crystals in Al crystals.

2. A semiconductor device comprising a vertical semiconductor element having a trench gate structure, the vertical semiconductor element comprising: a substrate (2) having a first surface (2a) and a second surface (2b) opposite to each other, and made of silicon or silicon carbide; a plurality of gate trenches extending from the first surface toward the second surface and arranged away from each other; a gate insulating film (4) covering inner walls of each of the plurality of gate trenches; a gate electrode (5) provided on the gate insulating film and filling each of the plurality of gate trenches; an interlayer insulating film (6) provided on the first surface, covering the plurality of gate trenches, and having a contact hole exposing a portion of an area between adjacent ones of the plurality of gate trenches in the first surface; an electrode film (7) provided on the interlayer insulating film; an insulating layer (8) provided on the electrode film, and having an opening portion (81) exposing a portion of the electrode film; and a conductive layer (9) provided on the opening portion, and covering the portion of the electrode film exposed from the insulating layer, wherein the electrode film comprises an aluminum alloy layer made of an Al-Si-Mg alloy containing at least 0.9 to 1.1% by weight of Si and 0.1 to 2.3% by weight of Mg, and the aluminum alloy film contains magnesium silicide crystals in Al crystals.

3. The semiconductor device according to claim 2, wherein the electrode film is entirely made of the aluminum alloy layer.

4. The semiconductor device according to claim 2, wherein the electrode film comprises a first layer (71) and a second layer (72) sequentially laminated on the interlayer insulating film, the first layer is made of the aluminum alloy layer, and the second layer is made of an aluminum alloy having a film hardness higher than a film hardness of the first layer.

5. The semiconductor device according to claim 2, wherein the electrode film comprises a first layer (71), a second layer (72), and a third layer (73) sequentially laminated on the interlayer insulating film, the second layer is made of the aluminum alloy layer, and each of the first layer and the third layer is made of an aluminum alloy having a film hardness higher than a film hardness of the second layer.

6. The semiconductor device according to claim 2, wherein the electrode film comprises a first layer (71) and a second layer (72) sequentially laminated on the interlayer insulating film, the second layer is made of the aluminum alloy layer, and the first layer is made of an aluminum alloy having a film hardness higher than a film hardness of the second layer. ​

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