A multi-layer printed circuit board alignment monitoring structure and method of use thereof
By setting alignment monitoring patterns and scales on multilayer printed circuit boards and using X-ray imaging equipment for observation and measurement, the problem of being unable to quickly and quantitatively determine interlayer alignment deviations in existing technologies has been solved, achieving efficient and accurate alignment monitoring.
Patent Information
- Application Number
- CN202211045261.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-30
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2042-08-30
AI Technical Summary
Existing technologies cannot quickly and quantitatively determine the alignment deviation of patterns between layers of multilayer printed circuit boards, and existing methods are inefficient and time-consuming.
Alignment monitoring patterns are set at the edges and inside non-product wiring areas of multilayer printed circuit boards, including independent monitoring pattern blocks, auxiliary monitoring patterns and scale rulers, and observed and measured using X-ray imaging equipment.
It enables rapid, non-destructive, and quantitative monitoring of the alignment accuracy between layers of multilayer printed circuit boards, improving testing efficiency and accuracy.
Smart Images

Figure CN115479562B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit board technology, specifically to a multilayer printed circuit board alignment monitoring structure and its usage method. Background Technology
[0002] As printed circuit boards (PCBs) are developed towards high-frequency and high-speed applications, the design and manufacturing of PCBs are also showing the characteristics of multi-layer wiring, fine lines, and high alignment accuracy.
[0003] To check and confirm the alignment between layers of a multilayer circuit board, existing technologies typically employ two methods: one is to use X-ray imaging to directly image and observe the multilayer substrate; the other is to design a pattern on the edge of the circuit board during the manufacturing process (i.e., the attached test board commonly referred to in the industry) for observing the alignment between layers. After the circuit board is manufactured, the attached test board is removed, a metallographic sample is prepared, and the alignment of the cross-sectional pattern is observed under a microscope.
[0004] While X-ray observation is non-destructive and efficient, it can usually only observe the approximate alignment of a local part of the actual product and cannot perform quantitative measurements. At the same time, when there are many layers, the probability of overlap between the circuits and pads in each layer increases significantly during X-ray observation, affecting the judgment of alignment.
[0005] The biggest advantage of the observation method for testing the attached plate is that quantitative testing can be carried out under a measuring microscope to obtain the accurate value of the interlayer alignment accuracy deviation. The disadvantage of this method is that it requires a large number of samples, has a long manufacturing process, and low observation efficiency. Specifically, it is reflected in the following aspects: (1) The attached plate is usually located at the corner of the printed circuit board. Each piece can only represent the alignment of its surrounding area. Therefore, it is usually necessary to prepare multiple samples to obtain the overall alignment. (2) During microscopic observation and accuracy testing, the alignment in a single direction (i.e., horizontal or vertical) can only be determined each time. Sample preparation and observation testing in two directions are required. After calculation, the overall alignment deviation can be obtained. (3) The preparation process of the observation sample for testing the attached plate includes multiple steps such as cutting, resin mounting, curing, rough grinding, fine grinding, polishing, and micro-etching. It is time-consuming and inefficient.
[0006] Both of the above methods for observing and detecting interlayer pattern alignment have shortcomings, as they cannot quickly and quantitatively determine the magnitude of interlayer pattern alignment deviation in multilayer substrates. Summary of the Invention
[0007] The purpose of this invention is to provide a multilayer printed circuit board alignment monitoring structure and its usage method, solving the technical problem in the prior art that it is impossible to quickly and quantitatively determine the magnitude of the alignment deviation between layers of multilayer substrates.
[0008] This invention discloses a multilayer printed circuit board alignment monitoring structure, including an alignment monitoring pattern. The alignment monitoring pattern is located on the edge and / or inside the non-product wiring area of the multilayer printed circuit board. The alignment monitoring pattern contains an independent monitoring pattern block and an auxiliary monitoring pattern. A scale ruler is also provided inside the alignment monitoring pattern located in the middle wiring layer of the multilayer printed circuit board.
[0009] Working Principle: During operation, the multi-layer core board and prepreg are stacked sequentially according to a predetermined order and then pressed together under high temperature and pressure to form a single unit. X-ray imaging equipment is then used to observe and photograph the alignment monitoring pattern. By setting independent and auxiliary monitoring pattern blocks, qualitative observation of the alignment accuracy can be performed. By setting a scale, quantitative measurement of the alignment accuracy of the independent and auxiliary monitoring pattern blocks can be performed.
[0010] Furthermore, the alignment monitoring pattern is rectangular.
[0011] Furthermore, the alignment monitoring pattern is at least one.
[0012] By setting the number of alignment monitoring patterns, the alignment status of different areas of the circuit board can be determined more accurately.
[0013] Furthermore, the scale is a non-metallic pattern.
[0014] By setting the scale to a non-metallic pattern, the deformation and expansion of the substrate during the substrate lamination process are minimized, ensuring the positional accuracy of the scale.
[0015] Furthermore, the scale is a linear scale.
[0016] Furthermore, the line widths of the scale lines are equal.
[0017] Furthermore, the spacing between adjacent scale lines on the scale is equal. Preferred values are the minimum spacing and line width required for the printed circuit board manufacturing process.
[0018] By setting line width and other parameters, the size of the scale can be standardized, thereby enabling rapid quantitative measurement of alignment.
[0019] Furthermore, the scale includes long scale lines and short scale lines, with four short scale lines arranged between two adjacent long scale lines.
[0020] Furthermore, the length of the long scale line is at least 1.5 times the length of the short scale line.
[0021] By setting the lengths of long and short scale lines, it is easier to distinguish between long and short scale lines, making measurement and reading more convenient.
[0022] Furthermore, the independent monitoring graphic blocks include rectangular graphics and / or sector graphics.
[0023] By setting rectangular and / or sector-shaped graphics, quantitative measurements and qualitative observations of the alignment of graphics at each layer can be performed.
[0024] Furthermore, the rectangular and / or sector patterns on different wiring layers do not overlap.
[0025] By setting the rectangular and / or sector patterns on different wiring layers to be non-overlapping, the alignment can be seen from a top-down view.
[0026] Furthermore, each of the rectangular shapes is of equal size, and each rectangular shape has at least one side aligned with the scale line.
[0027] By ensuring that at least one side of each rectangular graphic is aligned with the ruler's scale line, it becomes easier to identify and measure the alignment of the graphics in that layer.
[0028] Furthermore, each of the sector-shaped patterns is of equal size, and the sector-shaped patterns are arranged in a circular array after being stacked.
[0029] Furthermore, the auxiliary monitoring graphic is a circular graphic.
[0030] Furthermore, after stacking, the circular pattern is located at the center of the annular array of fan-shaped patterns.
[0031] By setting the position of the circular graphic, it can be better used in conjunction with the sector graphic to monitor alignment.
[0032] Furthermore, the rectangular and fan-shaped shapes are located within different insulated enclosed areas, and the area outside the insulated areas is a large area of metal.
[0033] By setting up an insulating and enclosed area, the displacement and deformation of the pattern blocks during the substrate lamination process are reduced, and each independent monitoring pattern block can effectively characterize the accuracy of its respective wiring layer.
[0034] Furthermore, the rectangular pattern in the intermediate wiring layer of the multilayer printed circuit board and the scale ruler are located in the same insulating area.
[0035] The second objective of this invention is to protect a method for manufacturing a multilayer printed circuit alignment monitoring pattern structure having the above-mentioned features, comprising the following steps:
[0036] 1) Provide copper-clad laminate core boards and laminating sheets for manufacturing multilayer circuit boards with n layers. From top to bottom, the circuit layers are labeled as 1, 2, ... n layers.
[0037] 2) Utilizing the common pattern transfer processes for printed circuit boards, namely film lamination, exposure, development, and etching, while creating the wiring patterns for each layer of the product, scale rulers, independent monitoring pattern blocks, and auxiliary monitoring patterns are manufactured on the middle wiring layer (n / 2, where n is an even number; (n+1) / 2, where n is a base number) of the multilayer printed circuit board. Independent monitoring pattern blocks and auxiliary monitoring patterns are manufactured on the remaining (n-1) wiring layers of the multilayer board.
[0038] 3) The multilayer core board and prepreg are stacked sequentially in a predetermined order and pressed together into a whole under high temperature and high pressure.
[0039] The third objective of this invention is to protect a method for monitoring the alignment accuracy of a multilayer printed circuit alignment monitoring pattern structure possessing the above-mentioned features, comprising the following steps:
[0040] 1) Using imaging equipment, perform qualitative observation of the alignment accuracy of the auxiliary monitoring pattern and each independent monitoring pattern block; use a scale ruler and each independent monitoring pattern block to perform quantitative measurement of the alignment accuracy;
[0041] 2) The quantitative measurement of the alignment accuracy is performed in two dimensional directions, X and Y, in the plane;
[0042] 3) The quantitative measurement of the alignment accuracy is obtained by comparing a single independent monitoring graphic block with a scale, and then calculating the theoretical alignment accuracy deviation value of the layer.
[0043] Furthermore, when the number of independent monitoring graphic blocks is greater than 2, the alignment accuracy deviation value between the two layers of graphics is calculated by the distance between the two independent monitoring graphic blocks.
[0044] Compared with the prior art, the beneficial effects of the present invention are:
[0045] 1. The present invention provides a pattern design and manufacturing method for alignment monitoring of multilayer printed circuit boards, which solves the problems of low efficiency and non-quantitative nature in the determination of interlayer alignment accuracy in existing multilayer board design and manufacturing technologies, and realizes rapid, non-destructive, and quantitative monitoring of interlayer alignment accuracy of multilayer printed circuit boards.
[0046] 2. By manufacturing a non-metallic graphic scale on the intermediate wiring layer, the substrate deformation and expansion during the substrate lamination process are minimized, ensuring the positional accuracy of the scale.
[0047] 3. The independent monitoring pattern blocks located in each wiring layer are situated within an insulated and enclosed area. The periphery of the insulated area is a large area of metal, which reduces the displacement and deformation of the pattern blocks during the substrate lamination process and enables each independent monitoring pattern block to provide a good characterization of the accuracy of its respective wiring layer.
[0048] 4. Using X-ray imaging equipment, the auxiliary alignment monitoring pattern and each independent sector monitoring pattern block are observed, enabling rapid, non-destructive, and qualitative observation of the alignment accuracy between layers;
[0049] 5. Using X-ray imaging equipment, the graphic scale and each independent rectangular monitoring graphic block are imaged, realizing the quantitative measurement and calculation of the alignment accuracy between arbitrary wiring layer graphic layers. Attached Figure Description
[0050] Figure 1 This is a schematic diagram showing the distribution of the alignment monitoring pattern on the edge and inside of a multilayer printed circuit board according to the present invention.
[0051] Figure 2 This is a schematic diagram of the overall structure of the alignment monitoring pattern of the present invention;
[0052] Figure 3 This is a schematic diagram of the alignment monitoring pattern of the intermediate wiring layer of the present invention;
[0053] Figure 4 This is a schematic diagram of the alignment monitoring pattern structure for other wiring layers in this invention;
[0054] Figure 5 This is a schematic diagram of the alignment and stacking process in the manufacturing process of a six-layer wiring alignment monitoring pattern according to the present invention;
[0055] Figure 6 This is a schematic diagram of the stacked structure of the monitoring pattern blocks after the manufacturing of the six-layer wiring alignment monitoring pattern according to the present invention.
[0056] Figure 7 This is an X-ray observation image of a six-layer wiring alignment monitoring graphic block according to the present invention.
[0057] In the diagram: 1-Alignment monitoring pattern, 2-Printed circuit board, 3-Independent monitoring pattern block, 4-Auxiliary monitoring pattern, 5-Scale ruler, 6-Long scale line, 7-Short scale line, 8-Rectangular pattern, 9-Fan-shaped pattern, 10-Circular pattern, 11-Copper clad laminate, 12-Laminated adhesive sheet. Detailed Implementation
[0058] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.
[0059] Example 1
[0060] A multilayer printed circuit board alignment monitoring structure, the specific structure of which is as follows: Figures 1-6As shown, it includes alignment monitoring pattern 1, which is located on the edge and / or inside the non-product wiring area of the multilayer printed circuit board 2. The alignment monitoring pattern 1 is provided with independent monitoring pattern block 3 and auxiliary monitoring pattern 4. The alignment monitoring pattern 1 located in the middle wiring layer of the multilayer printed circuit board 2 is also provided with a scale ruler 5.
[0061] Working principle: During use, the multilayer core board and prepreg are stacked sequentially according to a predetermined order and pressed into a whole under high temperature and high pressure. Then, X-ray imaging equipment is used to observe and photograph the alignment monitoring pattern 1. By setting independent monitoring pattern block 3 and auxiliary monitoring pattern 4, the alignment accuracy of independent monitoring pattern block 3 and auxiliary monitoring pattern 4 can be qualitatively observed. By setting the scale 5, the alignment accuracy of independent monitoring pattern block 3 and auxiliary monitoring pattern 4 can be quantitatively measured.
[0062] Example 2
[0063] This embodiment is a preferred embodiment, and its specific structure is as follows: Figures 1-6 As shown, based on embodiment 1, the following improvements are disclosed: the alignment monitoring pattern (1) is rectangular, the planar size of the rectangular area of the alignment monitoring pattern (1) is ≤15mm×15mm, there are 6 alignment monitoring patterns (1), the scale (5) is a non-metallic pattern, the scale (5) is a straight scale, the line width of the scale lines of the scale 5 is equal, the spacing between adjacent scale lines of the scale 5 is equal, the scale 5 includes long scale lines 6 and short scale lines 7, 4 short scale lines 7 are arranged between two adjacent long scale lines 6, and the length of the long scale line 6 is 1.5 times the length of the short scale line 7.
[0064] By setting the number of alignment monitoring graphics (1), the alignment status of different areas of the circuit board can be judged more accurately.
[0065] By setting the scale (5) to a non-metallic pattern, the deformation and expansion of the substrate during the substrate lamination process are minimized, ensuring the positional accuracy of the scale (5).
[0066] By setting the lengths of the long scale line 6 and the short scale line 7, the long and short scale lines 7 can be better distinguished, making measurement and reading easier.
[0067] Example 3
[0068] This embodiment is a preferred embodiment, and its specific structure is as follows: Figures 1-6As shown, based on embodiment 2, the following improvements are disclosed: the independent monitoring graphic block 3 includes a rectangular graphic 8 and a fan-shaped graphic 9. The rectangular graphic 8 and the fan-shaped graphic 9 on different wiring layers do not overlap. Each rectangular graphic 8 is of equal size and one end is aligned with the scale 5. Each fan-shaped graphic 9 is of equal size and, after stacking, the fan-shaped graphics 9 are distributed in a ring array. The auxiliary monitoring graphic 4 is a circular graphic 10. After stacking, the circular graphic 10 is located at the center of the ring array of fan-shaped graphics 9. The rectangular graphic 8 and the fan-shaped graphic 9 are located in different insulating closed areas. Outside the insulating area is a large area of metal. The rectangular graphic 8 of the middle wiring layer of the multilayer printed circuit board 2 and the scale 5 are located in the same insulating area.
[0069] By setting up rectangular graphics 8 and sector graphics 9, respectively, quantitative measurement and qualitative observation of the alignment of graphics in each layer are carried out.
[0070] By setting the rectangular patterns 8 and / or sector patterns 9 on different wiring layers to be non-overlapping, the alignment can be seen from a top-down view.
[0071] By setting a rectangular graphic 8 with one end aligned with one end of the scale 5, it is easier to identify and measure the alignment of the graphic in this layer.
[0072] By setting the position of the circular graphic 10, it can be better used in conjunction with the sector graphic 9 to monitor alignment.
[0073] By setting an insulating and enclosed area, the displacement and deformation of the pattern blocks during the substrate lamination process are reduced, and each independent monitoring pattern block 3 can effectively characterize the accuracy of its respective wiring layer.
[0074] Example 4
[0075] A method for preparing the alignment monitoring structure in Example 3 includes the following steps:
[0076] 1) Provide copper-clad laminate core boards and laminating sheets for manufacturing 6-layer multilayer circuit boards. The circuit layers are labeled 1, 2, ... 6 from top to bottom.
[0077] 2) Using the common pattern transfer process for printed circuit boards, namely film application, exposure, development and etching, while making the wiring patterns of each layer of the product, on the third wiring layer of the multilayer printed circuit board 2, a scale ruler 5, an independent monitoring pattern block 3 and an auxiliary monitoring pattern 4 are manufactured. On the other five wiring layers of the multilayer board, an independent monitoring pattern block 3 and an auxiliary monitoring pattern 4 are manufactured.
[0078] 3) The multilayer core board and prepreg are stacked sequentially in a predetermined order and pressed together into a whole under high temperature and high pressure.
[0079] Example 5
[0080] A method for using a multilayer printed circuit board alignment monitoring structure, based on the alignment monitoring structure of Example 3, includes the following steps:
[0081] 1) Using X-ray imaging equipment, photograph and store the alignment detection pattern structure of the printed circuit. On the X-ray images: perform qualitative observation of the alignment accuracy of the auxiliary monitoring pattern 4 and each independent monitoring pattern block 3; and perform quantitative measurement of the alignment accuracy using a scale 5 and each independent monitoring pattern block 3.
[0082] 2) The quantitative measurement of the alignment accuracy is performed in two dimensional directions, X and Y, in the plane;
[0083] 3) The quantitative measurement of the alignment accuracy is obtained by comparing a single independent monitoring graphic block 3 with a scale 5, and then calculating the theoretical alignment accuracy deviation value of the layer.
[0084] The above are the embodiments listed in this example. However, this example is not limited to the optional embodiments described above. Those skilled in the art can arbitrarily combine the above methods to obtain other various embodiments. Anyone can derive other various forms of embodiments based on the inspiration of this example. The above specific embodiments should not be construed as limiting the scope of protection of this example. The scope of protection of this example should be determined by the claims, and the specification can be used to interpret the claims.
Claims
1. A multilayer printed circuit board alignment monitoring structure, characterized in that: It includes a alignment monitoring pattern (1), which is located on the edge and / or inside the non-product wiring area of the multilayer printed circuit board (2). The alignment monitoring pattern (1) is provided with an independent monitoring pattern block (3) and an auxiliary monitoring pattern (4). The alignment monitoring pattern (1) located in the middle wiring layer of the multilayer printed circuit board (2) is also provided with a scale ruler (5). The alignment monitoring pattern (1) is a rectangle, the scale (5) is a non-metallic pattern, and the independent monitoring pattern block (3) includes a rectangular pattern (8) and / or a fan-shaped pattern (9). Each rectangular pattern (8) is the same size, and each rectangular pattern (8) has at least one side aligned with the scale line of the scale (5). The rectangular patterns (8) and / or sector patterns (9) on different wiring layers do not overlap; The auxiliary monitoring graphic (4) is a circular graphic (10).
2. The alignment monitoring structure for a multilayer printed circuit board according to claim 1, characterized in that: After stacking, the circular pattern (10) is located at the center of the annular array of the sector pattern (9).
3. The alignment monitoring structure for a multilayer printed circuit board according to claim 1, characterized in that: The rectangular pattern (8) of the middle wiring layer of the multilayer printed circuit board (2) and the scale (5) are located in the same insulating area.
4. A method for manufacturing a multilayer printed circuit board alignment monitoring structure according to any one of claims 1-3, characterized in that: It includes the following steps: 1) Provides copper-clad laminate (11) and laminated adhesive sheet (12) for manufacturing multilayer circuit boards with n-layer circuits. From top to bottom, the circuit layers are labeled as 1, 2, ... n layers. 2) Using the common pattern transfer process of printed circuit boards, namely film application, exposure, development and etching, while making the product wiring patterns of each layer, on the middle wiring layer of the multilayer printed circuit board (2), n / 2, n is an even number, (n+1) / 2, n is an odd number, a scale ruler (5), an independent monitoring pattern block (3) and an auxiliary monitoring pattern (4) are made. On the remaining n-1 wiring layers of the multilayer board, an independent monitoring pattern block (3) and an auxiliary monitoring pattern (4) are made. 3) The multilayer core board and prepreg are stacked sequentially in a predetermined order and pressed together into a whole under high temperature and high pressure.
5. A method of using the alignment monitoring structure for a multilayer printed circuit board according to any one of claims 1-3, characterized in that: It includes the following steps: 1) Using imaging equipment, perform qualitative observation of the alignment accuracy of the auxiliary monitoring pattern (4) and each independent monitoring pattern block (3); use a scale (5) and each independent monitoring pattern block (3) to perform quantitative measurement of the alignment accuracy; 2) The quantitative measurement of the alignment accuracy is performed in two dimensional directions, X and Y, in the plane; 3) The quantitative measurement of the alignment accuracy is obtained by comparing a single independent monitoring graphic block (3) with a scale (5) and calculating the theoretical alignment accuracy deviation value of the layer.
Citation Information
Patent Citations
Multilayer printed wiring board interlayer dislocation detection method
CN101865682A
Multilayer circuit board and inner layer core plate thereof
CN103874328A
Film structure for alignment between inner layers of PCB (Printed Circuit Board) multilayer board
CN215268955U