A display panel and a display device

Abstract

The present application discloses a display panel and a display device, which are used to set a capacitor in a peripheral area to improve the utilization rate of the peripheral area. The embodiment of the present application provides a display panel, the display panel includes: a display area and a peripheral area surrounding the display area; the display panel includes: a substrate, a plurality of light-emitting devices and a plurality of capacitors located on one side of the substrate; the light-emitting device is located in the display area, and the capacitor is located in the peripheral area; the light-emitting device includes a plurality of light-emitting functional layers; the capacitor includes: a first electrode, a second electrode located on the side of the first electrode away from the substrate, and a semiconductor layer located between the first electrode and the second electrode; the semiconductor layer is arranged in the same layer as at least one light-emitting functional layer.

Description

Technical Field

[0001] This application relates to the field of display technologies, and in particular, to a display panel and a display device. Background Art

[0002] Electroluminescent diodes such as organic light emitting diodes (OLEDs) have advantages such as self-luminescence and low power consumption, and are one of the hotspots in the field of application research of current electroluminescent display panels.

[0003] Currently, in OLED display products, the OLEDs are disposed in the display area, and there are blank areas in the peripheral area outside the display area, resulting in low utilization rate of the peripheral area. Summary of the Invention

[0004] Embodiments of this application provide a display panel and a display device for setting capacitors in the peripheral area to improve the utilization rate of the peripheral area.

[0005] A display panel provided by an embodiment of this application includes: a display area and a peripheral area surrounding the display area;

[0006] The display panel includes: a substrate, a plurality of light-emitting devices and a plurality of capacitors on one side of the substrate;

[0007] The light-emitting devices are located in the display area, and the capacitors are located in the peripheral area;

[0008] The light-emitting devices include multiple light-emitting functional layers;

[0009] The capacitor includes: a first electrode, a second electrode on a side of the first electrode facing away from the substrate, and a semiconductor layer between the first electrode and the second electrode; the semiconductor layer is disposed in the same layer as at least one light-emitting functional layer.

[0010] In some embodiments, the multiple light-emitting functional layers include: a first hole transport layer and a first electron transport layer on a side of the first hole transport layer facing away from the substrate;

[0011] The semiconductor layer includes: a first sub-layer disposed in the same layer as the first hole transport layer and a second sub-layer disposed in the same layer as the first electron transport layer.

[0012] In some embodiments, the light-emitting device further includes: an anode between the multiple light-emitting functional layers and a signal line, and a cathode on a side of the multiple light-emitting functional layers facing away from the anode;

[0013] The second electrode is disposed in the same layer as the cathode.

[0014] In some embodiments, the display panel further includes: multiple signal lines between the substrate and the light-emitting devices;

[0015] Each capacitor is electrically connected to a signal line, and different capacitors are electrically connected to different signal lines.

[0016] In some embodiments, the first electrode is disposed on the same layer as the anode or the signal line.

[0017] In some embodiments, the plurality of signal lines includes: a plurality of scan lines extending in a first direction and a plurality of data lines extending in a second direction; the first direction intersects the second direction;

[0018] The plurality of capacitors includes: a plurality of first capacitors, and / or a plurality of second capacitors;

[0019] The first capacitors are electrically connected to the scan lines in a one-to-one correspondence; in the first direction, the plurality of first capacitors are located on at least one side of the display area;

[0020] The second capacitors are electrically connected to the data lines in a one-to-one correspondence; in the second direction, the plurality of second capacitors are located on at least one side of the display area.

[0021] In some embodiments, on one side of the display area, the plurality of first electrodes are arranged in sequence along the arrangement direction of the signal lines electrically connected to the plurality of capacitors;

[0022] The second electrodes of the plurality of capacitors are integrally connected, and the semiconductor layers of the plurality of capacitors are integrally connected.

[0023] In some embodiments, the display panel further includes: a first connection lead electrically connected to the first electrode, and a pixel defining layer located between the first electrode and the semiconductor layer;

[0024] In an area where the orthographic projection of the first connection lead on the substrate overlaps with the orthographic projection of the second electrode on the substrate, the first connection lead and the second electrode are insulated by the pixel defining layer.

[0025] In some embodiments, the orthographic projection of the semiconductor layer on the substrate overlaps with the orthographic projection of the pixel defining layer on the substrate.

[0026] A display device provided by an embodiment of the present application, the display device includes the display panel provided by the embodiment of the present application.

[0027] The display panel and the display device provided by the embodiments of the present application can improve the utilization rate of the peripheral area of the display panel by arranging capacitors in the peripheral area. The capacitor includes a semiconductor layer between the first electrode and the second electrode. When a positive voltage is applied to the first electrode and the second electrode, the first electrode and the second electrode are turned on, so that the capacitance value of the capacitor is close to the capacitance value of the wire. When a reverse bias voltage is applied to the first electrode and the second electrode, the capacitance value between the first electrode and the second electrode increases from being close to the capacitance value of the wire. That is, the capacitor of the embodiments of the present application is a variable capacitor whose capacitance value changes greatly by changing the voltage. Therefore, the capacitor can be electrically connected to the driving circuit of the light-emitting device to compensate for the capacitance of the driving circuit. Moreover, since the semiconductor layer of the capacitor multiplexes at least one light-emitting functional layer of the light-emitting device, if cracks or the like occur in the semiconductor layer and the light-emitting functional layer due to aging, the capacitance value of the capacitor will change at a certain driving voltage. Therefore, the aging condition of the light-emitting device can also be judged by detecting the capacitance value of the capacitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0029] Figure 1 It is a schematic structural diagram of a display panel provided by an embodiment of the present application;

[0030] Figure 2 It is a schematic structural diagram of another display panel provided by an embodiment of the present application;

[0031] Figure 3 It is a schematic structural diagram of yet another display panel provided by an embodiment of the present application;

[0032] Figure 4 It is a schematic structural diagram of yet another display panel provided by an embodiment of the present application;

[0033] Figure 5 It is a schematic structural diagram of yet another display panel provided by an embodiment of the present application;

[0034] Figure 6 It is a schematic structural diagram of yet another display panel provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0035] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the following will clearly and completely describe the technical solutions of the embodiments of this application with reference to the accompanying drawings of the embodiments of this application. Obviously, the described embodiments are some, but not all, of the embodiments of this application. And, without conflict, the embodiments in this application and the features in the embodiments may be combined with each other. All other embodiments obtained by those of ordinary skill in the art based on the described embodiments of this application without creative efforts shall fall within the scope of protection of this application.

[0036] Unless otherwise defined, the technical terms or scientific terms used in this application shall have the ordinary meanings as understood by those of ordinary skill in the art to which this application pertains. The "first", "second", and similar terms used in this application do not denote any order, quantity, or importance, but are only used to distinguish different components. The terms such as "include" or "comprise" mean that the elements or items appearing before this word cover the elements or items listed after this word and their equivalents, without excluding other elements or items. The terms such as "connect" or "couple" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0037] It should be noted that the sizes and shapes of the various figures in the drawings do not reflect the true proportions, and the purpose is only to schematically illustrate the content of this application. And, throughout, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions.

[0038] The embodiments of this application provide a display panel, as Figure 1 、 Figure 2 shown, the display panel includes: a display area 1 and a peripheral area 2 surrounding the display area 1;

[0039] The display panel includes: a substrate 3, a plurality of light-emitting devices 4 and a plurality of capacitors 5 located on one side of the substrate 3;

[0040] The light-emitting devices 4 are located in the display area 1, and the capacitors 5 are located in the peripheral area 2;

[0041] The light-emitting devices 4 include multiple light-emitting functional layers 401;

[0042] The capacitor 5 includes: a first electrode 501, a second electrode 502 located on the side of the first electrode 501 away from the substrate 3, and a semiconductor layer 503 located between the first electrode 501 and the second electrode 502; the semiconductor layer 503 is disposed in the same layer as at least one light-emitting functional layer 401.

[0043] The display panel provided by the embodiment of the present application can improve the utilization rate of the peripheral area of the display panel by setting a capacitor in the peripheral area. The capacitor includes a semiconductor layer between the first electrode and the second electrode. When a positive voltage is applied to the first electrode and the second electrode, the first electrode and the second electrode are conducted, so that the capacitance value of the capacitor is close to the capacitance value of the wire. When a reverse bias voltage is applied to the first electrode and the second electrode, the capacitance value between the first electrode and the second electrode increases from the capacitance value close to the wire. That is, the capacitor of the embodiment of the present application is a variable capacitor whose capacitance value changes greatly by changing the voltage. Therefore, the capacitor can be electrically connected to the driving circuit of the light-emitting device to compensate for the capacitance of the driving circuit. Moreover, since the semiconductor layer of the capacitor is arranged on the same layer as at least one light-emitting functional layer of the light-emitting device, not only can the preparation process of the display panel be simplified, but also when cracks or other conditions occur in the semiconductor layer and the light-emitting functional layer due to aging, the capacitance value of the capacitor will change at a certain driving voltage. Therefore, the aging condition of the light-emitting device can also be judged by detecting the capacitance value of the capacitor.

[0044] It should be noted that Figure 1 only simply shows the capacitor setting area. Figure 2 Only part of the display area and the peripheral area are shown.

[0045] In some embodiments, as Figure 2 shown, the multi-layer light-emitting functional layer 401 includes: a first hole transport layer 4011 and a first electron transport layer 4012 located on the side of the first hole transport layer 4011 away from the substrate;

[0046] The semiconductor layer 503 includes: a first sub-layer 5031 arranged on the same layer as the first hole transport layer and a second sub-layer 5032 arranged on the same layer as the first electron transport layer.

[0047] That is, the first sub-layer includes the material of the hole transport layer, and the second sub-layer includes the material of the electron transport layer. When appropriate voltages are provided to the first electrode and the second electrode, electrons and holes are respectively injected into the second sub-layer and the first sub-layer from the second electrode and the first electrode. That is, an organic p-n junction can be fabricated by using the first sub-layer arranged on the same layer as the hole transport layer and the second sub-layer arranged on the same layer as the electron transport layer. Thus, the semiconductor layer includes a p-n junction, and the capacitor including this semiconductor layer is a p-n junction capacitor. When a positive voltage is applied to the first electrode and the second electrode, the first electrode and the second electrode are conducted, so that the capacitance value of the capacitor is close to the capacitance value of the wire. When a reverse bias voltage is applied to the first electrode and the second electrode, the capacitance value between the first electrode and the second electrode increases from the capacitance value close to the wire. Thus, the capacitor can be electrically connected to the driving circuit of the light-emitting device as needed, and a voltage can be applied to the capacitor as needed to compensate for the capacitance of the driving circuit.

[0048] In some embodiments, as Figure 2As shown, the light-emitting functional layer further includes: an organic light-emitting layer 4013 located between the first hole transport layer 4011 and the first electron transport layer 4012.

[0049] Of course, in specific implementation, the light-emitting functional layer may further include a hole injection layer, an electron blocking layer, an electron injection layer, etc.

[0050] In specific implementation, both the light-emitting functional layer and the semiconductor layer are organic materials.

[0051] In specific implementation, the first electrode and the second electrode may include any one of the following materials or a combination thereof: indium tin oxide, silver, aluminum.

[0052] In some embodiments, as Figure 2 shown, the display panel further includes a pixel definition layer 7; the pixel definition layer 7 is located on the side of the anode 402 away from the substrate 1. The pixel definition layer 7 is used to define the light-emitting area of the light-emitting device 4.

[0053] In some embodiments, as Figure 2 shown, the light-emitting device 4 further includes: an anode 402 located between the multi-layer light-emitting functional layer 401 and the signal line 601, and a cathode 403 located on the side of the multi-layer light-emitting functional layer 401 away from the anode 402.

[0054] In some embodiments, as Figure 2 shown, the second electrode 502 and the cathode 403 are arranged in the same layer, and the first electrode 501 and the anode 402 are arranged in the same layer.

[0055] In the display panel provided by the embodiment of the present application, the second electrode and the cathode are arranged in the same layer, the first electrode and the anode are arranged in the same layer, and the semiconductor layer and the light-emitting functional layer are arranged in the same layer, that is, each film layer of the capacitor arranged in the peripheral area does not need to be separately manufactured, which can save the preparation process of the display panel and save costs.

[0056] In some embodiments, as Figure 2 shown, the display panel further includes a driving circuit layer 6 located between the substrate 3 and the light-emitting device 4.

[0057] In some embodiments, the driving circuit layer includes: a plurality of signal lines and a plurality of pixel driving circuits; the signal lines are electrically connected to the driving circuits. In specific implementation, as Figure 3 shown, the pixel driving circuit includes a thin film transistor 602 and a storage capacitor (not shown); the thin film transistor 602 includes: an active layer 6021, a gate G, a source S, and a drain D; Figure 3 Here, the thin film transistor 602 is taken as an example of a top-gate structure for illustration. Of course, the thin film transistor 602 can also be a bottom-gate or other structures. As Figure 3As shown, the driving circuit layer 6 further includes: a first buffer layer 603 located between the first substrate 3 and the active layer 6021, a first gate insulating layer 604 located between the active layer 6021 and the gate G, an interlayer insulating layer 605 located between the first gate insulating layer 604 and the source S and the drain D, and a first planarization layer 606 located between the light-emitting device 4 and the source S and the drain D. The anode 402 is connected to the drain D through a via hole penetrating the first planarization layer 606.

[0058] In some embodiments, as Figure 1 , Figure 4 , Figure 5 shown, a plurality of signal lines 601 extend from the display area 1 to the peripheral area 2;

[0059] Each capacitor 5 is electrically connected to a signal line 601, and different capacitors 5 are electrically connected to different signal lines 601.

[0060] In the display panel provided by the embodiments of the present application, the capacitors provided in the peripheral area are electrically connected to the signal lines, so that the capacitance of the signal lines or the capacitance of the pixel driving circuit can be compensated by using the capacitors.

[0061] In some embodiments, the plurality of signal lines 601 include: a plurality of scan lines 6011 extending along the first direction X and a plurality of data lines 6012 extending along the second direction Y; the first direction X intersects the second direction Y;

[0062] The plurality of capacitors include: a plurality of first capacitors 5-1, and / or a plurality of second capacitors 5-2;

[0063] The first capacitor 5-1 is electrically connected to the scan line 6011 in a one-to-one correspondence; in the first direction X, the plurality of first capacitors 5-1 are located on at least one side of the display area;

[0064] The second capacitor 5-2 is electrically connected to the data line 6012 in a one-to-one correspondence; in the second direction Y, the plurality of second capacitors 5-2 are located on at least one side of the display area.

[0065] In specific implementation, as Figure 1 , Figure 4 , Figure 5 shown, the peripheral area 2 includes: a first peripheral area 201, a second peripheral area 202, a third peripheral area 203, and a fourth peripheral area 204; the first peripheral area 201 and the second peripheral area 202 are located on both sides of the display area 1 in the first direction X, and the third peripheral area 203 and the fourth peripheral area 204 are located on both sides of the display area 1 in the second direction Y.

[0066] In specific implementation, when it is necessary to compensate for the capacitance of the scan line or when it is necessary to compensate for the capacitance of the pixel driving circuit through the scan line, a first capacitor electrically connected to the scan line can be set. When it is necessary to compensate for the capacitance of the data line or when it is necessary to compensate for the capacitance of the pixel driving circuit through the data line, a second capacitor electrically connected to the data line can be set.

[0067] It should be noted that Figure 1 in [reference], multiple capacitors 5 are all first capacitors 5-1, Figure 4 in [reference], multiple capacitors 5 are all second capacitors 5-2, Figure 5 in [reference], multiple capacitors 5 include multiple first capacitors 5-1 and multiple second capacitors 5-2.

[0068] In specific implementation, multiple first capacitors 5-1 are located in the first peripheral area 201 and / or the second peripheral area 202; multiple second capacitors 5-2 are located in the third peripheral area 203 and / or the fourth peripheral area 204.

[0069] It should be noted that Figure 1 、 Figure 5 Taking the example that multiple first capacitors 5-1 are only located in the first peripheral area 201 on one side of the display area for illustration. Figure 4 、 Figure 5 Taking the example that multiple second capacitors 5-2 are only located in the third peripheral area 203 on one side of the display area for illustration. Of course, in specific implementation, multiple first capacitors can also be only located in the second peripheral area, or some of the multiple first capacitors are located in the first peripheral area and the rest are located in the second peripheral area; multiple second capacitors can also be only located in the fourth peripheral area, or some of the multiple second capacitors are located in the third peripheral area and the rest are located in the fourth peripheral area.

[0070] In specific implementation, the scan line is, for example, arranged on the same layer as the gate electrode, and the data line is, for example, arranged on the same layer as the source electrode and the drain electrode.

[0071] In some embodiments, the first electrode can also be arranged on the same layer as the signal line. That is, the first electrode can be arranged on the same layer as any conductive layer between the hole transport layer and the substrate, which can save the manufacturing process of the display panel and reduce costs.

[0072] In specific implementation, the first electrode included in the first capacitor can be arranged on the same layer as the scan line. That is, the first electrode included in the first capacitor, the scan line and the gate electrode are arranged on the same layer. The first electrode included in the second capacitor can be arranged on the same layer as the data line. That is, the first electrode included in the second capacitor, the data line, the source electrode and the drain electrode are arranged on the same layer.

[0073] In specific implementation, when the first electrode included in the capacitor is arranged on the same layer as the anode, the first electrode can be electrically connected to the signal line through a via hole penetrating through each insulating layer.

[0074] In some embodiments, on one side of the display area, a plurality of first electrodes are arranged in sequence along the arrangement direction of the signal lines electrically connected to the plurality of capacitors;

[0075] The second electrodes of the plurality of capacitors are integrally connected, and the semiconductor layers of the plurality of capacitors are integrally connected.

[0076] It should be noted that, as Figure 6 shown, taking the case where the plurality of capacitors are located in the first peripheral area 201 as an example for illustration, that is, the plurality of capacitors are first capacitors, and the signal lines electrically connected to the plurality of capacitors are scan lines, and the scan lines are arranged along the second direction Y, that is, Figure 6 the plurality of first electrodes 501 in

[0077] In some embodiments, as Figure 6 shown, the orthographic projection of the first electrode 501 on the substrate falls within the orthographic projection of the second electrode 502 on the substrate; the display panel further includes a first connection lead 10 electrically connected to the first electrode 501, and the first connection lead 10 is integrally formed with the first electrode 501; the pixel defining layer 7 is also located between the first electrode 501 and the semiconductor layer 503, and in the area where the orthographic projection of the first connection lead 10 on the substrate overlaps with the orthographic projection of the second electrode 502 on the substrate, the first connection lead 10 and the second electrode 502 are insulated by the pixel defining layer 7.

[0078] In specific implementation, the first electrode is electrically connected to the signal line through the first connection lead.

[0079] In some embodiments, as Figure 6 shown, the orthographic projection of the semiconductor layer 503 on the substrate overlaps with the orthographic projection of the pixel defining layer 7 on the substrate. Thereby, it can be ensured that there is no contact between the second electrode and the second connection lead, and between the second electrode and the first electrode.

[0080] In some embodiments, as Figure 6 shown, the display panel further includes: a second connection lead 9 electrically connected to the second electrode 502; the second connection lead 9 is provided on the same layer as the first electrode 501. Thereby, a signal can be provided to the second electrode through the first connection lead.

[0081] In some embodiments, the peripheral area further includes a plurality of switching devices, and the capacitors are electrically connected to the signal lines through the switching devices.

[0082] In a specific implementation, the switching device is, for example, a transistor, and the display panel further includes a switching control signal line; one of the source or drain of the transistor is electrically connected to the capacitor, the other of the source or drain of the transistor is electrically connected to the signal line, and the gate of the transistor is electrically connected to the switching control signal line. The gates of multiple transistors can be electrically connected to the same switching control signal line, or the gates of multiple transistors can also be electrically connected to different switching control signal lines. In this way, when it is necessary to compensate the driving circuit using the capacitor, the transistor is controlled to conduct, and the capacitor is connected to the driving circuit, so that the driving circuit can be compensated. When it is not necessary to compensate the driving circuit using the capacitor, the transistor is controlled to turn off.

[0083] A display device provided by an embodiment of the present application includes the display panel provided by the embodiment of the present application.

[0084] The display device provided by the embodiment of the present application is: any product or component with a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc. Other essential components of the display device should be understood by those of ordinary skill in the art and will not be elaborated here, nor should it be regarded as a limitation to the present application. The implementation of the display device can refer to the embodiment of the above display panel, and the repeated parts will not be elaborated.

[0085] In summary, for the display panel and the display device provided by the embodiment of the present application, setting a capacitor in the peripheral area can improve the utilization rate of the peripheral area of the display panel. The capacitor includes a semiconductor layer between the first electrode and the second electrode. When a positive voltage is applied to the first electrode and the second electrode, the first electrode and the second electrode conduct, and the capacitance value of the capacitor approaches the capacitance value of the wire. When a reverse bias voltage is applied to the first electrode and the second electrode, the capacitance value between the first electrode and the second electrode increases from the capacitance value close to the wire, that is, the capacitor in the embodiment of the present application is a variable capacitor whose capacitance value changes greatly by changing the voltage. Therefore, the capacitor can be electrically connected to the driving circuit of the light-emitting device to compensate the capacitance of the driving circuit. Moreover, since the semiconductor layer of the capacitor multiplexes at least one light-emitting functional layer of the light-emitting device, if cracks or the like occur in the semiconductor layer and the light-emitting functional layer due to aging, the capacitance value of the capacitor will change at a certain driving voltage. Therefore, the aging condition of the light-emitting device can also be judged by detecting the capacitance value of the capacitor.

[0086] Although the preferred embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concept. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications falling within the scope of the present invention.

[0087] Obviously, those skilled in the art can make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalent technologies, this application is also intended to include these modifications and variations.

Claims

1. A display panel, characterized in that, the display panel includes: a display area and a peripheral area surrounding the display area; the display panel includes: a substrate, a plurality of light-emitting devices and a plurality of capacitors located on one side of the substrate; the light-emitting devices are located in the display area, and the capacitors are located in the peripheral area; the light-emitting devices include a multi-layer light-emitting functional layer, and the multi-layer light-emitting functional layer includes a first hole transport layer and a first electron transport layer located on a side of the first hole transport layer away from the substrate; the capacitor is a variable capacitor, and includes: a first electrode, a second electrode located on a side of the first electrode away from the substrate, and a semiconductor layer located between the first electrode and the second electrode; the semiconductor layer includes an organic p-n junction formed by using a first sub-layer disposed in the same layer as the first hole transport layer and a second sub-layer disposed in the same layer as the first electron transport layer.

2. The display panel according to claim 1, characterized in that, the light-emitting device further includes: an anode located between the multi-layer light-emitting functional layer and a signal line, and a cathode located on a side of the multi-layer light-emitting functional layer away from the anode; the second electrode is disposed in the same layer as the cathode.

3. The display panel according to claim 2, characterized in that, the display panel further includes: a plurality of signal lines located between the substrate and the light-emitting devices; each capacitor is electrically connected to one of the signal lines, and different capacitors are electrically connected to different signal lines.

4. The display panel according to claim 3, characterized in that, the first electrode is disposed in the same layer as the anode or the signal line.

5. The display panel according to claim 3, characterized in that, the plurality of signal lines include: a plurality of scan lines extending in a first direction and a plurality of data lines extending in a second direction; the first direction intersects the second direction; the plurality of capacitors include: a plurality of first capacitors, and / or a plurality of second capacitors; the first capacitors are electrically connected to the scan lines one by one; in the first direction, the plurality of first capacitors are located on at least one side of the display area; the second capacitors are electrically connected to the data lines one by one; in the second direction, the plurality of second capacitors are located on at least one side of the display area.

6. The display panel according to any one of claims 1, 4 to 5, characterized in that, on one side of the display area, a plurality of the first electrodes are arranged in sequence along the arrangement direction of the signal lines electrically connected to the plurality of capacitors; the second electrodes of the plurality of capacitors are integrally connected, and the semiconductor layers of the plurality of capacitors are integrally connected.

7. The display panel according to claim 6, characterized in that, the display panel further includes: a first connection lead electrically connected to the first electrode, and a pixel definition layer located between the first electrode and the semiconductor layer; in an area where a positive projection of the first connection lead on the substrate overlaps with a positive projection of the second electrode on the substrate, the first connection lead and the second electrode are insulated by the pixel definition layer.

8. The display panel according to claim 7, wherein, the orthographic projection of the semiconductor layer on the substrate has an overlap with the orthographic projection of the pixel definition layer on the substrate.

9. A display device, wherein, the display device includes the display panel according to any one of claims 1 to 8.

Images