Control method of power converter, corresponding converter and device

Abstract

Disclosed are a control method for a power converter, a corresponding converter, and an apparatus. A converter circuit converts an input signal applied across a first input node and a second input node into a converted output signal across a first output node and a second output node. The converter circuit includes a switching network coupled to the first input node via an inductor through which current flows. In a hysteretic current control mode of the switching network, the current flowing through the inductor has a triangular waveform, wherein rising and falling edges between a first current threshold and a second current threshold alternate with a switching frequency. The switching frequency is controlled by varying the distance between the first current threshold and the second current threshold.

Description

[0001] Priority Declaration

[0002] This application claims the benefit of Italian Patent Application No. 102021000015665, filed on June 15, 2021, the contents of which are incorporated herein by reference in their entirety to the maximum extent permitted by law. Technical Field

[0003] This manual relates to power supply circuits.

[0004] One or more embodiments may be applied, for example, to a power factor correction (PFC) circuit based on a totem pole bridgeless topology.

[0005] One or more embodiments may operate with hysteretic current control.

[0006] One or more embodiments may be applied to various devices such as telecommunication equipment, air conditioners, television units, and chargers. Background Art

[0007] Single-phase power factor correction (PFC) technology is steadily evolving towards high-efficiency solutions. The totem pole bridgeless PFC topology is a representative example of a widely used structure following this trend.

[0008] Various control techniques can be used to improve efficiency. One possible approach may involve implementing zero voltage switching (ZVS) or valley switching (VS) operation, which is effective in combating undesirable "on" switching losses.

[0009] In power converters operating at variable frequency, operating conditions can reach a point where the switching frequency becomes undesirably high. For example, in a PFC circuit, this problem can occur near input voltage zero crossings and / or when light loads are present. The converter's high switching frequency can adversely affect the operation of the control circuitry and increase switching losses in the semiconductor devices included in the converter (and the converter as a whole).

[0010] There is a need in the art for advancements that address the aforementioned issues. Summary of the Invention

[0011] One or more embodiments are directed to a method.

[0012] One or more embodiments relate to corresponding converter circuits.

[0013] One or more embodiments may be directed to respective devices including an electrical load provided via the converter disclosed herein. Various devices such as telecommunication equipment, air conditioners, television units, and chargers may be examples of such devices.

[0014] One or more embodiments may involve using hysteretic current control with a first (high) threshold and a second (low) threshold. For example, the thresholds are controlled in a manner that facilitates improved control of the converter switching frequency and facilitates improved quality of the converter's electrical parameters, such as total harmonic distortion (THD) and power factor correction (PFC) performance.

[0015] One or more embodiments may contemplate applying a controlled current over the entire voltage input range and cycle in order to limit the switching frequency of the converter while combating undesirable current discontinuities.

[0016] One or more embodiments contemplate a drive mode of the power converter in which an electronic switch excites an inductor via a reverse current.

[0017] One or more embodiments may use a high bandwidth isolated current sensor to perform direct control of the inductor current.

[0018] In one or more embodiments, the inductor energy associated with the current flowing through the inductor can be used to charge / discharge the parasitic capacitance of the electronic switch. This facilitates achieving a ZVS condition and reduces the switching frequency. This current is applied for all possible values ​​of the input voltage in order to limit the switching frequency.

[0019] One or more embodiments provide a simple and robust solution to limit the maximum switching frequency in a converter. This results in improved control feasibility and reduced current distortion, thereby providing improved power quality.

[0020] One or more embodiments may be applied to all types of power converters with current / time fractional control.

[0021] In one or more embodiments, controlling the inductor current may involve controlling the associated (equivalent) reverse conduction time, taking into account the reverse current level to compensate for undesirable current distortion. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] One or more embodiments will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0023] Figure 1 is an exemplary circuit diagram of a converter circuit to which embodiments of the present specification may be applied,

[0024] Figure 2 It can be based on Figure 1 An exemplary time diagram of a possible time behavior of a signal occurring in a converter of

[0025] Figure 3 is an example diagram of the possible frequency reduction that can be obtained by reverse inductor current control according to this specification,

[0026] Figures 4 to 8 Yes Figure 1 An exemplary time diagram of a possible time behavior of the voltage and current signals in the converter shown, and

[0027] Figure 9 is a block diagram / circuit diagram showing an exemplary layout of a converter circuit according to an embodiment of the present specification. DETAILED DESCRIPTION

[0028] Unless otherwise indicated, corresponding numbers and symbols in the different figures generally refer to corresponding parts. These figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale. The edges of features drawn in the figures do not necessarily represent the ends of the features' extents.

[0029] In the following description, various specific details are shown to provide a deeper understanding of the examples of the embodiments of this specification. The embodiments can be obtained without one or more of the specific details, or with other methods, components, materials, etc. In other cases, well-known structures, materials, or operations are not described or illustrated in detail so as not to obscure certain aspects of the embodiments.

[0030] References to "one embodiment" or "an embodiment" in the framework of this specification are intended to indicate that a particular configuration, structure, or feature described with respect to that embodiment is included in at least one embodiment. Thus, phrases such as "in one embodiment" or "in an embodiment" that may appear in one or more points of this specification do not necessarily refer to the same embodiment. Furthermore, in one or more embodiments, particular configurations, structures, or features may be combined in any suitable manner. The headings / references used herein are provided for convenience only and do not define the scope of protection or the scope of the embodiments.

[0031] For the sake of brevity, various acronyms are used throughout this description, such as examples of such acronyms include: PFC = Power Factor Correction; ZVS = Zero Voltage Switching; and VS = Valley Switching.

[0032] Furthermore, throughout this specification, for the sake of brevity, the same notation may be used to designate both a particular node / line / component and a signal occurring at that node / line / component: for example, Figure 9 In the embodiment, a current sensor having an output circuit configured to provide a signal indicative of the strength of the current flowing through an inductor referred to as L is referred to for simplicity as I L .

[0033] Figure 1The schematic diagram is an example of a topology of a so-called "totem pole" bridgeless power factor correction circuit 10. Circuit 10 includes input nodes 12A, 12B configured to apply an AC input signal Vin between input nodes 12A, 12B to generate a converted (rectified) voltage Vout between output nodes 14A and 14B to be applied to an electrical load EL.

[0034] Those skilled in the art will appreciate that the topology of the converter 10 shown herein is merely exemplary.

[0035] The underlying operating principles of the examples as discussed herein are actually applicable to different converter topologies such as buck, boost, buck-boost, flyback, single-ended primary inductor converter (SEPIC), etc.

[0036] These examples can be applied mutatis mutandis to various conversion methods (eg, AC / DC, DC / AC, DC / DC, and AC / AC) without limitation.

[0037] This applies primarily to, but is not limited to, switch configurations.

[0038] Furthermore, those skilled in the art will appreciate that the operations as exemplified herein (primarily relating to the zero voltage switching (ZVS) mode of operation) may also be applied to other modes of operation such as, for example, continuous conduction mode (CCM), discontinuous conduction mode (DCM), or transition mode (TM).

[0039] Furthermore, although shown for the sake of understanding, both the source of the input signal Vin and the load EL to which the converted output signal Vout is applied may represent elements different from the embodiment.

[0040] like Figure 1 As shown, circuit 10 includes two nodes A and B.

[0041] Node A is located on the "high side" electronic switch S in a first pair of electronic switches such as MOSFET transistors. H and the "low-side" electronic switch S L in the middle.

[0042] Node B is located at the second pair of electronic switches S DH 、S DL The "high side" electronic switch S DH and the "low-side" electronic switch S DL Middle; again, a MOSFET transistor can be an example of such a switch.

[0043] Note that switch S H 、S L 、S DH 、S LHIt can be implemented with different types of switches (e.g., MOSFET transistors as shown, or IGBTs, SCRs, etc.) and technologies (e.g., Si, SiC, GaN) and / or in any configuration, connection or combination (e.g., series, parallel, cascode, etc.).

[0044] As shown, the input inductor L is coupled between the first input node 12A and the node A so that the current I L may flow (possibly in opposite directions, as described below) through the inductor L. An output capacitor C is arranged intermediate the output nodes 14A, 14B to be charged to the output voltage Vout.

[0045] Node B is coupled to a second input node 12B, wherein the “high side” electronic switch S H and S DH The two terminals are coupled to the first output node 14A on the sides opposite to the nodes A and B, respectively.

[0046] "Low-side" electronic switch S L and S DL On the side opposite to nodes A and B, it is coupled to a second output node 14B.

[0047] One or more embodiments rely on the recognition that the control circuitry (referred to for simplicity in Figure 1 Not visible in and combined below Figure 9 Discussion) may be provided and configured to control an electronic switch S H 、S L (and S DH 、S DL ) switch.

[0048] For example, the control circuitry may be configured to control the electronic switch S for Vin>0 according to the exemplary switching table (Table 1) reproduced below. H 、S L (and S DH 、S DL ) switch.

[0049] In Table I, as is conventional in the art, an electronic switch indicated as “ON” indicates that such switch is in a conducting state, and an electronic switch indicated as “OFF” indicates that such switch is in a non-conducting state.

[0050] Table I - Switch S for Vin>0 H 、S L 、S DH 、S DL Switch mode.

[0051]

[0052]

[0053] As shown below Figure 9 As discussed, the electronic switch S DH 、S DL It can be controlled synchronously with the input voltage Vin which is an AC (50 Hz-60 Hz) signal, in order to control the general rectification action performed by the converter 10 on the (sinusoidal) waveform of the input voltage Vin.

[0054] The electronic switch S is not shown in Table 1. DH 、S DL Switching action: In fact, these switches S DH 、S DL The switch S switches on / off at subsequent half-waves of the input voltage signal Vin. Table I above refers to a single half-wave of the input voltage signal Vin: DH 、S DL is shown to be stably on or off.

[0055] In addition, the control electronic switch S DH 、S DL The operation of the low frequency LF circuit system is conventional in the art, which makes it unnecessary to provide a more detailed description here. The exemplary description herein mainly relates to controlling the electronic switch S in the resonant ZVS operation mode. H 、S L .

[0056] The lines reproduced in continuous and dashed lines represent possible flow paths for the current through the circuit 10 in response to various switching conditions of the electronic switch, which facilitates obtaining the current through the circuit 10. Figure 1 The current I in the inductor L L triangle shape.

[0057] Such possible operation types are Figure 2 , in which different graphs sharing a common time (abscissa) scale are reproduced.

[0058] Specifically: Figure 2 The top diagram shows the cross-switch S L The voltage V HB (See also Figure 1 ), where this voltage varies between zero and the output voltage Vout; Figure 2 The middle diagram in the figure shows the current I through the inductor L L The possible time behavior of F * and -I R *Triangle shape between them; Figure 2 The bottom diagram shows the switch SL and S H The time of conduction (signal "high"), where the switching period is T SW .

[0059] The time intervals Tvout_Vds and Tzero_Vds appearing in Table 1 are also represented by the time (abscissa) scale t. These time intervals represent the switching S L and S H Both are in the non-conducting ("off") state ( Figure 2 The dead time of the signal “low” in the bottom diagram of .

[0060] One or more examples herein may utilize a control switch S H 、S L possibility (in a manner known per se to a person skilled in the art) in order to generate a current I in the ZVS operating mode L triangular waveform, in this way, the current I flowing through the inductor L L At the first current threshold +I F *With the second current threshold -I R * varies between, where the triangular waveform has rising and falling edges alternating at the switching frequency fsw.

[0061] In the example considered herein, the first current threshold +I F * is positive, the second current threshold is -I R * is negative (ie, the first current threshold and the second current threshold have opposite signs), and: for the current I L The positive value of the current I L Flow in a first flow direction from input node 12A to node A (ie, to a direction including switch S H 、S L 、S DH and S DL Switching circuit system); for current I L Negative value, current I L (as reverse current) flows in a second flow direction opposite to the first flow direction, i.e., from node A (i.e., from the switch S H 、S L 、S DH and S DL switching circuit) flows to input node 12A.

[0062] It should also be noted that considering the operating principle and operating mode of the converter (e.g., CCM, DCM, TM, ZVS, etc.), the two reference thresholds of the current through the inductor, namely, I F * and I R* can take positive, negative or zero values ​​independently of each other, so the current through the inductor I L The flow direction does not need to be reversed.

[0063] like Figure 2 The illustrated diagrams are examples of the operation of a circuit, such as circuit 10 , that facilitates achieving zero voltage switching (ZVS) or valley switching (VS) characteristics.

[0064] Such ZVS control can be conceived to be applied only for input voltages Vin above Vout / 2, as the electronic switches may start to conduct at still high voltages, which is detrimental to operating efficiency. This is assuming that when Vin ≤ Vout / 2, the ZVS condition can be automatically achieved.

[0065] As mentioned above, one problem with ZVS control may be related to the current I L The switching frequency of the triangular waveform is related to the current I L Increasing rising edge (from -I R * to +I F *) and current I L Decreasing falling edge (from +I F * to -I R *) Alternation frequency: see Figure 2 The middle diagram in .

[0066] As mentioned above, in the case of power factor control (PFC) with variable frequency, such frequency may become undesirably high at zero crossings of the input voltage and in the presence of light loads.

[0067] Undesirably high switching frequencies may adversely affect control actions and are likely to increase switching losses in semiconductor devices in converter 10 , while also increasing overall losses in the system.

[0068] For this reason, reducing, limiting and / or controlling the switching frequency may represent a desirable option.

[0069] For example, U.S. Patent Application Publication No. 2017 / 0110981 (incorporated herein by reference) discloses a method for reducing the frequency of a converter: if the output load decreases and / or the operating frequency becomes too high, the control system introduces high-frequency burst cycles, in which the off period is modulated. Once the frequency increases, the burst cycle is applied to the drive signal. This reduces the operating frequency and switching losses.

[0070] A disadvantage of this approach is that total harmonic distortion (THD) and power factor (PF) performance may be adversely affected because the burst cycle introduces discontinuities in the inductor current.

[0071] Furthermore, the instantaneous average current during the burst may not be proportional to the input voltage.

[0072] Figure 3 It shows how these issues can be addressed in the examples discussed in this article.

[0073] exist Figure 3 , various graphs sharing a common time (abscissa) scale are reproduced.

[0074] More specifically: Figure 3 The top diagram shows the current I through the inductor L L The possible time behavior of F The first positive threshold +I F * and second negative threshold -I R * There is a triangle shape between them, which shows two possible values ​​- I R1 and-I R2 ;and Figure 3 The bottom diagram shows the switch S L and S H The time of conduction (signal "high") is based on the value -I R1 or value -I R2 Whether to use negative threshold -I R *, may have different switching periods T SW1 and T SW2 (and frequency).

[0075] Figure 3 (For simplicity, Figure 2 The dead time Tvout_Vds and Tzero_Vds in Figure 3 ) highlights the concept underlying the various examples discussed herein: when multiple (e.g., two) different values ​​are applied to the reverse current, i.e., -I R1 and-I R2 (where |I R2 |>|I R1 |), switch S L and S H The on and off instants change.

[0076] This results in a current I through the inductor L The two different switching (alternating) periods T of the triangular waveform SW1 and T SW2 (where, for example, T SW2 >T SW1 ).

[0077] Due to the inverse relationship between the period T and the frequency f (ie, f = 1 / T), this will also result in a current I through the inductor LL The rising and falling edges of the triangular waveform alternate at two different switching frequencies (f SW1 and f SW2 , where, for example, f SW2 <f SW1 ).

[0078] That is, if the absolute value of the reverse current is R1 Increase to I R2 , the switching frequency decreases.

[0079] In fact, such a switching frequency (ie, current I L Increased time and current I L The frequency of alternating time of the reduction) is the first current threshold I F *With the second current threshold -I R *The inverse function of the distance (i.e., difference) between them.

[0080] Therefore, by changing the first current threshold I F *With the second current threshold -I R *The distance between them is used to control the switching frequency.

[0081] For example, by increasing the first current threshold I F *With the second current threshold -I R *The distance between them can reduce the switching frequency.

[0082] As illustrated herein for simplicity, the first current threshold I F *With the second current threshold -I R * The distance between may involve changing (only) the second current threshold -I R *(For example, in Figure 3 Zhongcong-I R1 Change to -I R2 ) and maintain the first current threshold (at Figure 3 Middle I F *=I F1 ).

[0083] For simplicity, some examples not shown here may involve (only) changing the first current threshold I F * and maintain the second current threshold (-I R *) or change the first current threshold I F * and second current threshold -I R *Both.

[0084] This helps maintain the average instantaneous current through the inductor L, as shown below in conjunction with Figure 4This is not feasible in the case of the burst cycle of the aforementioned U.S. Patent Publication No. 2017 / 0110981.

[0085] One or more embodiments may be based on the recognition of the advantages of also targeting Vin < Vout / 2 intervention I R values.

[0086] Figures 4 to 8 The illustration of shows various ways of controlling the current I Figure 1 in a converter (such as, for example, the PFC bridgeless totem-pole converter exemplified L herein).

[0087] Figures 4 to 8 The illustration of is an example of the time behavior of the positive half-wave V L of the input voltage Vin depicted with respect to the possible time behavior of the current I IN through the inductor L if ZVS operation with hysteresis current control is implemented (assuming herein to be substantially sinusoidal).

[0088] In this case, the current I L exhibits a sawtooth pattern at a frequency higher than the frequency of the input voltage Vin, where the (upper) peak of the current has a substantially sinusoidal envelope at the same frequency as the half-wave V IN of the input voltage Vin and is in phase with the half-wave V IN of the input voltage Vin.

[0089] As Figures 4 to 8 ​​​​​​​​​​​​​​​​​​The illustration is an example of a conventional conversion mode, where the current I through the inductor L L has a symbol (or direction of flow) that does not reverse (reverse current I R [%]=0), such that the current I L flows through the inductor L to the input node 12A in a triangular waveform that "switches" between a valley point at a constant reference value (e.g., zero) and a peak distributed along a half-sine envelope indicated by the dashed line.

[0092] As shown, the "instantaneous" average value of the triangular inductor current waveform (designated as I Figure 4 in L_avg ) is substantially at half the distance between the valley point and the peak, and is related to the instantaneous power transferred from the converter input source to the load.

[0093] In a PFC application, the desired shape of I L_avg is a sine shape and is in phase with the AC input voltage source.

[0094] For example, in the presence of a light load, these peaks will have reduced (small) values, such that the triangular current waveform of I L will "spend little time" going from the valley point to the peak and vice versa. This can lead to an undesired increase in the frequency of the switching signals of switches S L and S H , with the disadvantages discussed previously.

[0095] In Figure 4 , the average switching frequency for extended reverse operation (i.e., Vin ≤ Vout / 2) is denoted as f1, and the average switching frequency for standard reverse operation (i.e., Vin > Vout / 2) is denoted as f2.

[0096] These average switching frequencies f1 and f2 are used as a reference in the subsequent figures to compare the change in the average switching frequency caused by the application of reverse current in a portion of the considered input signal range.

[0097] Figure 5 The illustration is an example of the case where, during standard reverse operation (i.e., Vin > Vout / 2), reverse current flows through the inductor L to reach the valley point of the triangular waveform of current I L below the previously considered reference value.

[0098] In this way, the average switching frequency for standard reverse operation becomes a "new" value f3, which is lower than the previous value f2 in this portion of the input signal range (f3 < f2).

[0099] The shape of the envelope of this reverse current (approximately a semi-ellipse), ie the position of the valley below the reference value previously considered, can be obtained (in a manner known per se to a person skilled in the art) from calculations (for example from the differential equations governing the operation of the system).

[0100] exist Figure 5 In the diagram, no reverse current is assumed outside the standard reverse operation (ie, in the case of Vin≤Vout / 2), so that for Vin≤Vout / 2, I L The triangular current waveform has a valley point still set at the reference value considered previously. Therefore, the average switching frequency outside the standard reverse operation is still f1.

[0101] Figure 6 The diagram is an example of a case where the reverse current is caused to flow through the inductor L to reach a valley point along the line at the peak input operating voltage V IN (ie, voltage V IN peak) reaches the lowest point (minimum value – I R,min )’s reverse current envelope distribution.

[0102] Therefore, in standard reverse operation, the average switching frequency will be f4, ie, a lower frequency than in the previous case (f4 < f3), while no frequency variation is observed outside of standard reverse operation.

[0103] therefore, Figure 5 The conditions depicted in can be considered as examples where the "standard" reverse current has reached, for example, 50% of its expected value, while Figure 6 The condition depicted in can be considered an example where the “standard” reverse current has reached 100% of its expected value.

[0104] exist Figure 5 and Figure 6 In both cases, the reverse current is caused to flow through the inductor L only during standard operation (ie, Vin>Vout / 2), so that for Vin≤Vout / 2, no reverse current will flow through the inductor L.

[0105] Therefore, frequency changes are observed only within the standard reverse operating portion of the input signal range.

[0106] Figure 7 The diagram is an example of an operating mode in which: during standard reverse operation (ie Vin>Vout / 2) a combined Figure 6 and further causes a reverse current to flow through the inductor L for Vin≤Vout / 2 to provide an "extended" reverse operation, wherein the reverse current is caused to flow through the inductor L to reach a distribution such as a minimum value -I R,minThe valley point is at 50% of the value.

[0107] That is, in Figure 7 In the embodiment, a reverse inductor current is applied throughout the entire cycle of the AC input signal Vin, wherein the reverse inductor current is applied throughout the entire cycle of the AC input signal Vin applied across the first input node 12A and the second input node 12B. SW On part of the reverse operation (extended), the current I flowing through the inductor L L With 50% or –I R,min The constant valley value at .

[0108] In this case, the average switching frequency variation (compared to Figure 6 ), where the conditions f6 < f4 and f5 < f1 apply to the values ​​f5 (extended reverse operation) and f6 (standard reverse operation).

[0109] at last, Figure 8 The diagram of FIG is an example of operation in which, during standard reverse operation (i.e., Vin>Vout / 2) and during extended reverse operation (i.e., Vin≤Vout / 2), a reverse current is caused to flow through the inductor L to reach valley points, both of which correspond to minimum values ​​of –I R,min .

[0110] That is, in Figure 8 In the embodiment, a reverse inductor current is applied over the entire cycle of the AC input signal Vin, wherein the entire cycle T of the triangular waveform of the current through the inductor L included in the cycle of the AC input signal Vin applied across the first input node 12A and the second input node 12B is SW The current I flowing through the inductor L L With constant valley value –I R,min .

[0111] In addition, Figure 8 In the middle, the current I L The envelope of the peak value has been increased in order to maintain the same desired average inductor current I L_avg , the average inductor current I L_avg is sinusoidal and in phase with the AC input voltage source, as in Figure 4 The case discussed.

[0112] therefore, Figure 7 The conditions depicted in can be considered as examples where the “standard” reverse current reaches 100% of its expected value and the “extended” reverse current reaches 50% of its expected value.

[0113] Figure 8The conditions depicted in can be considered as examples where both the “standard” reverse current and the “extended” reverse current reach 100% of their expected values.

[0114] More generally:

[0115] Figure 7 and Figure 8 The operating conditions depicted in FIG are examples of operating modes in which the reverse inductor current (current I L The negative value of the triangular waveform of the current through the inductor L can be included in the entire period T of the triangular waveform of the current through the inductor L included in the period of the AC input signal Vin applied across the first input node 12A and the second input node 12B. SW occurs during the period; and

[0116] Figure 5 and Figure 6 The operating conditions depicted in FIG are examples of operating modes in which the reverse inductor current (current I L The negative value of the inductor L may be (only) during the standard reverse operation (i.e., only during the period T of the triangular waveform of the current through the inductor L included in the period of the AC input signal Vin applied across the first input node 12A and the second input node 12B). SW occurs during a part of the period.

[0117] and Figure 4 The diagram shows the inductor current control compared to Figures 5 to 8 The operating conditions shown in the diagram of have the effect of (gradually) moving at least a portion of the valley points of the current away from the peak points. This corresponds to increasing the first reference threshold value I for hysteretic current control. F *With the second reference threshold –I R *The distance between them.

[0118] For example, in the presence of a light load, these peaks have reduced values, so I L The triangular current waveform will "take more time" (compared to Figure 4 Compared with the case depicted in FIG) from valley to peak and vice versa, the current I through the inductor L L The switching frequency (fsw) associated with the alternation of rising and falling edges in the triangular waveform will decrease.

[0119] This will tend to counteract the undesirable increase in the frequency of the inductor current waveform.

[0120] Figure 9 The block diagram is basically the same as before Figure 1 As an example of the possibilities of the control circuit 1000 associated with the discussed circuits, the control circuit 1000 may be configured to implement the standard reverse operation / extended reverse operation options discussed previously.

[0121] For simplicity, it is combined with Figure 1 Like components or elements to those discussed are denoted by like reference characters in the drawings; the corresponding detailed description will not be repeated unnecessarily.

[0122] like Figure 9 The control circuit 1000 depicted in FIG is configured for controlling (in a manner known per se to a person skilled in the art - see Figure 1 (Previous discussion related to Table I) Electronic switch S H 、S L and S DH 、S DL .

[0123] For example, this can happen via:

[0124] High frequency (HF) branch hysteresis current control circuit (CCC) 1002, which controls the electronic switch S H 、S L , and thus controls the current I through the inductor L L the frequency of alternation of rising and falling edges in the triangular waveform; and

[0125] Low frequency (LF) branch control circuit (CC) 1004, which controls the electronic switch S DH 、S DL , and therefore primarily controls the general rectification action performed by the converter 10 on the (sinusoidal) waveform of the input voltage Vin (eg, a 50 Hz-60 Hz mains voltage).

[0126] For this reason, Figure 9 In the control circuit 1000 depicted in FIG, the current I is sensed via a sensing line of a type known per se to a person skilled in the art (eg, L For example, the input voltage Vin and the current I through the inductor L are sensed via a current sensor arranged between the node 12A and the inductor L. L .

[0127] As described above, the operation of the low frequency (LF) branch control circuit 1004 is conventional in the art, such that it is not necessary to provide a more detailed description herein.

[0128] In such Figure 9 In the control circuit 1000 depicted in , the input voltage Vin is also applied to a combining node 1006 together with an output signal from a voltage control circuit 1008 that is sensitive to the output voltage Vout, the output current Iout and an associated output voltage reference Vout_ref.

[0129] For this reason, Figure 9 In the control circuit 1000 depicted in FIG. 1 , the output voltage Vout and the output current Iout applied to the load EL are sensed via sense lines of a type known per se to those skilled in the art.

[0130] In such Figure 9 In the control circuit 1000 depicted in FIG. 1 , the combination node 1006 is configured to provide a signal Ipk_ref to the peak / valley current control block 1010, which is substantially indicative of the current I through the inductor L. L The peak value (see Figures 4 to 8 ).

[0131] The high frequency branch hysteresis current control circuit 1002 is configured to generate an indication switch S L and S H The signal fsw of the (switching) frequency of the driving signal determines the current I through the inductor l L The frequency of alternation of rising and falling edges in the triangular waveform.

[0132] For example, circuit block 1002 may perform the following steps: receiving as inputs a high (peak) current threshold IF*, a low (valley) current threshold IR*, and dead time values ​​(Tvout_Vds and Tzero_Vds) from block 1010 (in addition to the circuit block 1002 being connected via inductor I L hysteresis current control (beyond the sensed current value).

[0133] Block 1002 outputs signal S L and S H (eg, according to the sequence of Table 1) and measurements of the frequencies fsw of these signals (eg, obtained via one or more timers), which are returned to block 1010 for frequency control.

[0134] like Figure 9 As shown, the peak / valley current control block 1010 receives (in addition to the switching frequency signal fsw) an input voltage Vin, an output voltage Vout, an output signal Ipk_ref (indicative of the current I through the inductor L) from, for example, a combination node 1006. L The signal is represented by a peak value of the output voltage, and a set of optional parameters OP of the converter (THD, efficiency, etc.) which can optionally be used as input for converter control.

[0135] The circuit 1010 is configured to implement hysteresis current threshold control (peak I F * and valley value I R * current threshold) in order to control / modify the switching frequency fsw, as previously combined with Figures 4 to 8As discussed, an "extended" reverse operation is generated - optionally employed - (ie, independent of the relative values ​​of the input voltage Vi and the output voltage Vout).

[0136] It should also be noted that the examples discussed herein primarily involve changing the first current threshold I F * and second current threshold –I R *, rather than involving the criteria adopted for controlling this frequency as a function of parameters such as the input voltage Vin, the output voltage Vout, the output signal Ipk_ref or any other parameter OP of the converter used as input for the converter control (THD, efficiency, etc.).

[0137] Thus, those skilled in the art will appreciate that the examples discussed herein are largely "transparent" with respect to the standards employed to control the frequency according to various parameters.

[0138] In such Figure 1 and Figure 9 In the (exemplary and non-limiting) architecture shown in FIG. 1 (and Table 1 discussed previously), the first input node 12A is connected to the inductor L (via a resistor such as I SL The inductor current sensor is coupled to the switching network S in the converter circuit 10. H 、S L 、S DH 、S LH The middle node A in .

[0139] As shown in the figure, the first intermediate node A can be connected to the first electronic switch S H is coupled to the first output node 14A (when turned on), and in response to turning on the second electronic switch S L The load current sensor OS is turned on and coupled to the second output node 14B.

[0140] During the converter operation considered here by way of example, the switching network in the converter circuit (mainly the switch S in the case of hysteretic current control operation) H 、S L )The operation is as follows:

[0141] i) During the charging period of the inductor, switch S L The switch S is turned on H Not conducting (until the inductor current reaches the first current threshold I F *), and then make the switch S L Non-conducting, switch S H With switch S L Alternate conduction; dead time TVout_Vds is the switch S L The turn-off time of the switch SH The time delay between the on-time and the off-time, so during this dead time, the switch S L and S H Neither is conducting (for switching sequence see Table 1 and Figure 2 );as well as

[0142] ii) During the inductor discharge period, switch S H The switch S is turned on L Non-conducting (until the inductor current reaches the second current threshold -I R *), and then make the switch S H Non-conducting, switch S H With switch S H Alternate conduction. Dead time Tzero_Vds is the time between switch S H The turn-off time of the switch S L The time delay between the on-time and the off-time, so during this dead time, the switch S L and S H Neither is conducting (again see Table 1 and Figure 2 ).

[0143] To this end, during reverse operation, the switching network in the converter 10 (mainly the switch S H 、S L ) can be controlled from the switching network S as discussed above H 、S L Via the low current threshold I R * Control (via the inductor current sensor) the intensity of the current flowing to the first input node 12A so as to Figure 3 The resulting switching frequency fsw is modified as discussed above.

[0144] Note that for light loads, the benefit of reducing the frequency fsw is dominant: for example, in response to the application-extended reverse operation discussed previously, the maximum value fmax of the frequency fsw may be almost halved.

[0145] Similarly note that in response to a fully applied extended reverse operation (see, for example, Figure 8 ), the value of fmax decreases, and the average value favg of the frequency fsw decreases significantly. In addition, note that the lowest (minimum) frequency value fmin is actually constant.

[0146] It is found that the total system losses are reduced at least until the conduction losses dominate (actually, the total losses are mainly a result of the combined inductor and device losses).

[0147] Once a limit is set on the maximum frequency value fmax, the extended reverse operation illustrated herein also promotes further efficiency improvement compared to the standard reverse operation.

[0148] The use of the embodiments can be revealed by noting that - when the embodiments are applied - the reverse charging current can be different from the lowest (minimum) value associated with a particular operating point, and also by noting that the embodiments involve applying a reverse current for Vin < Vout / 2, particularly for light loads that result in a reduced switching frequency.

[0149] The examples presented above can involve activating the switching frequency control method discussed herein throughout the entire cycle of an AC input signal (e.g., Vin), where the current I flowing through the inductor L L has an envelope with valleys of arbitrary shape: Figures 5 to 8 is an example of such a case.

[0150] The examples presented above can involve activating the switching frequency control method discussed herein throughout the entire cycle of an AC input signal (e.g., Vin), where the current I flowing through the inductor L L has an envelope with peaks of arbitrary shape.

[0151] The examples presented above can involve activating the switching frequency control method discussed herein throughout the entire cycle of an AC input signal (e.g., Vin), where the current I flowing through the inductor L L has an envelope with both valleys and peaks of arbitrary shape.

[0152] The examples presented above can involve activating the switching frequency control method discussed herein also or exclusively based on one or a combination of optional parameters (THD, efficiency, etc.) of the converter.

[0153] Those skilled in the art will understand that the operations mainly illustrated herein in conjunction with the zero voltage switching (ZVS) operation mode can also be applied to other operation modes, such as, for example, continuous conduction mode (CCM), discontinuous conduction mode (DCM), or transition mode (TM).

[0154] Those skilled in the art will similarly understand that the topology of the converter 10 shown herein is merely exemplary. The examples discussed herein are applicable to different converter topologies, such as buck, boost, buck - boost, flyback, single - ended primary inductor converter (SEPIC), etc.

[0155] Therefore, considering the operating principle and mode of the converter (e.g., CCM, DCM, TM, ZVS, etc.), two reference thresholds of the current through the inductor, namely I F * and I R * can independently take positive, negative, or zero values.

[0156] The embodiments are applicable to various conversion methods (eg, AC / DC, DC / AC, DC / DC, and AC / AC) without limitation. This applies primarily, but not exclusively, to switching configurations.

[0157] Note in this regard that the switch S H 、S L 、S DH 、S LH It can be implemented with different types of switches (e.g., MOSFET, IGBT, SCR, etc.) and technologies (e.g., Si, SiC, GaN), and / or in any configuration, connection, or combination (e.g., series, parallel, cascode, etc.).

[0158] The examples shown in this article are applicable to all types of converters, where Figure 9 The control system represented by blocks 1002 and 1010 in FIG. 1 may be configured based on a control system such as an I SL The current intensity value I read by the current sensor (set between node 12A and inductor L) L With two reference thresholds I F * and –I R * to control a switching network (eg, a switching network such as one comprising a switching element operated according to Table 1) Figure 1 and Figure 9 The switch S shown H 、S L 、S DH 、S LH Switching network), where the first (upper) threshold I F * Provides the instantaneous peak value of the current through the inductor L, the second (lower) threshold – I R * Provides the instantaneous valley value of the current through the inductor L.

[0159] Therefore, the associated triangular waveform switches between rising and falling edges at a frequency fsw above the first current threshold I F *With the second current threshold –I R * "switching" between, the frequency fsw is the first current threshold I F *With the second current threshold –I R *The (inverse) function of the distance (difference) between them.

[0160] Therefore, by changing the first current threshold I F *With the second current threshold –I R * to control the switching frequency fsw, for example, by increasing the first current threshold I F *With the second current threshold –I R*The distance between them can reduce the switching frequency.

[0161] As shown in the figure, changing the first current threshold I F *With the second current threshold –I R *The distance between them may include changing (only) the second current threshold –I R * and maintain the first current threshold I F *.

[0162] In certain embodiments, the converter may include two or more individual converters arranged in parallel (eg, with an interleaved architecture).

[0163] Without prejudice to the basic principle, the details and embodiments may vary, by way of example only, with respect to what is described, even significantly, without departing from the scope of protection.

[0164] The claims are an integral part of the technical teaching regarding the embodiments provided herein.

[0165] The scope of protection is determined by the appended claims.

Claims

1. A method comprising: converting an input signal applied across first and second input nodes of a converter circuit into an output signal across first and second output nodes of the converter circuit, wherein the conversion is performed by a switching network of the converter circuit disposed intermediate the first and second input nodes and the first and second output nodes, the switching network being coupled to the first input node via an inductor through which current flows; activating a hysteretic current control mode of the switching network, wherein the current flowing through the inductor varies between a first current threshold and a second current threshold in a triangular waveform having rising and falling edges alternating at a switching frequency; as well as controlling the switching frequency by adjusting one or more of the first current threshold and the second current threshold to change a distance between the first current threshold and the second current threshold; wherein the input signal applied across the first input node and the second input node comprises an AC signal having a half-cycle comprising a plurality of alternations of rising and falling edges of the triangular waveform; and Wherein adjusting one or more of the first current threshold and the second current threshold is applied over the entire half cycle of the AC signal.

2. The method of claim 1 , wherein the switching frequency is an inverse function of a distance between the first current threshold and the second current threshold, and wherein controlling the switching frequency comprises: The switching frequency is reduced by increasing the distance between the first current threshold and the second current threshold.

3. The method of claim 1 , wherein adjusting to change the distance between the first current threshold and the second current threshold comprises: The second current threshold is changed and the first current threshold is maintained.

4. The method of claim 1 , wherein adjusting to change the distance between the first current threshold and the second current threshold is performed according to an entity selected from the group consisting of: an input voltage of the converter circuit; an output voltage of the converter circuit; a reference signal indicative of a peak value of the current through the inductor; and At least one converter control parameter.

5. The method of claim 1 , wherein the first current threshold and the second current threshold have opposite signs, and wherein the current flowing through the inductor during the hysteretic current control mode alternately flows in a first flow direction from the first input node to the switching network and in a second flow direction from the switching network to the first input node.

6. The method of claim 1 , wherein controlling the switching frequency comprises: A duration of at least one dead-time value of the switching network is changed in response to activation of the hysteretic current control mode.

7. The method according to claim 1, further comprising: The hysteretic current control mode of the switching network in the converter circuit is activated regardless of relative values ​​of the input signal and the output signal.

8. The method of claim 1, wherein adjustment is applied over the entire input signal amplitude range of the AC signal during the half cycle.

9. A method comprising: converting an input signal applied across first and second input nodes of a converter circuit into an output signal across first and second output nodes of the converter circuit, wherein the conversion is performed by a switching network of the converter circuit disposed intermediate the first and second input nodes and the first and second output nodes, the switching network being coupled to the first input node via an inductor through which current flows; activating a hysteretic current control mode of the switching network, wherein the current flowing through the inductor varies between a first current threshold and a second current threshold in a triangular waveform having rising and falling edges alternating at a switching frequency; as well as controlling the switching frequency by adjusting one or more of the first current threshold and the second current threshold to change a distance between the first current threshold and the second current threshold; wherein the input signal applied across the first input node and the second input node comprises an AC signal having a period including a plurality of alternations of rising and falling edges of the triangular waveform of the current through the inductor coupling the switching network and the first input node; and The hysteretic current control mode of the switching network in the converter circuit is activated throughout a cycle of an AC input signal, and the current flowing through the inductor has a constant valley value over the multiple alternating portions of the rising and falling edges of the triangular waveform of the current through the inductor.

10. A method comprising: converting an input signal applied across first and second input nodes of a converter circuit into an output signal across first and second output nodes of the converter circuit, wherein the conversion is performed by a switching network of the converter circuit disposed intermediate the first and second input nodes and the first and second output nodes, the switching network being coupled to the first input node via an inductor through which current flows; activating a hysteretic current control mode of the switching network, wherein the current flowing through the inductor varies between a first current threshold and a second current threshold in a triangular waveform having rising and falling edges alternating at a switching frequency; as well as controlling the switching frequency by adjusting one or more of the first current threshold and the second current threshold to change a distance between the first current threshold and the second current threshold; wherein the input signal applied across the first input node and the second input node comprises an AC signal having a period including a plurality of alternations of rising and falling edges of the triangular waveform of the current through the inductor coupling the switching network and the first input node; and The hysteretic current control mode of the switching network in the converter circuit is activated throughout a cycle of the AC input signal, and the current flowing through the inductor has a constant valley value across all of the multiple alternations of rising and falling edges of the triangular waveform of the current through the inductor.

11. A converter circuit comprising: a first input node and a second input node configured to receive an input signal applied between the first input node and the second input node; a first output node and a second output node configured to provide a converted output signal between the first output node and the second output node; a switch network disposed between the first input node and the second input node and the first output node and the second output node, the switch network being coupled to the first input node via an inductor through which current flows; a control circuit system coupled to the switch network in the converter and configured to operate the switch network in a hysteretic switching current control mode, wherein the current flowing through the inductor varies between a first current threshold and a second current threshold in a triangular waveform having rising and falling edges alternating at a switching frequency, and wherein the switching frequency is controlled by adjusting one or more of the first current threshold and the second current threshold to vary a distance between the first current threshold and the second current threshold; wherein the input signal applied across the first input node and the second input node comprises an AC signal having a half-cycle comprising a plurality of alternations of rising and falling edges of the triangular waveform; and Wherein the control circuitry adjusts one or more of the first current threshold and the second current threshold to apply over all of the half cycle of the AC signal.

12. The converter circuit of claim 11 , further comprising a current sensor located intermediate the first input node and the inductor, the current sensor coupled to the control circuitry and configured to provide a signal to the control circuitry indicating a magnitude of the current flowing through the inductor.

13. The converter circuit of claim 11 , wherein the switching frequency is an inverse function of a distance between the first current threshold and the second current threshold, and wherein the control circuitry controls the reduction of the switching frequency by increasing the distance between the first current threshold and the second current threshold. 14 . The converter circuit of claim 11 , wherein the control circuitry adjusts the second current threshold and maintains the first current threshold.

15. The converter circuit of claim 11 , wherein the first current threshold and the second current threshold have opposite signs, and wherein the current flowing through the inductor during the hysteretic current control mode alternately flows in a first flow direction from the first input node to the switching network and in a second flow direction from the switching network to the first input node.

16. The converter circuit of claim 11, wherein regulation is applied over the entire input signal amplitude range of the AC signal during the half cycle.

17. A converter circuit comprising: a first input node and a second input node configured to receive an input signal applied between the first input node and the second input node; a first output node and a second output node configured to provide a converted output signal between the first output node and the second output node; a switch network disposed between the first input node and the second input node and the first output node and the second output node, the switch network being coupled to the first input node via an inductor through which current flows; a control circuit system coupled to the switch network in the converter and configured to operate the switch network in a hysteretic switching current control mode, wherein the current flowing through the inductor varies between a first current threshold and a second current threshold in a triangular waveform having rising and falling edges alternating at a switching frequency, and wherein the switching frequency is controlled by adjusting one or more of the first current threshold and the second current threshold to vary a distance between the first current threshold and the second current threshold; wherein the input signal applied across the first input node and the second input node comprises an AC signal having a period including a plurality of alternations of rising and falling edges of the triangular waveform of the current through the inductor coupling the switching network and the first input node; and Wherein the control circuit system activates the hysteretic current control mode of the switching network in the converter circuit throughout a cycle of the AC input signal, the current flowing through the inductor has a constant valley value over the multiple alternating portions of the rising and falling edges of the triangular waveform of the current through the inductor.

18. A converter circuit comprising: a first input node and a second input node configured to receive an input signal applied between the first input node and the second input node; a first output node and a second output node configured to provide a converted output signal between the first output node and the second output node; a switch network disposed between the first input node and the second input node and the first output node and the second output node, the switch network being coupled to the first input node via an inductor through which current flows; a control circuit system coupled to the switch network in the converter and configured to operate the switch network in a hysteretic switching current control mode, wherein the current flowing through the inductor varies between a first current threshold and a second current threshold in a triangular waveform having rising and falling edges alternating at a switching frequency, and wherein the switching frequency is controlled by adjusting one or more of the first current threshold and the second current threshold to vary a distance between the first current threshold and the second current threshold; wherein the input signal applied across the first input node and the second input node comprises an AC signal having a period including a plurality of alternations of rising and falling edges of the triangular waveform of the current through the inductor coupling the switching network and the first input node; and wherein the control circuit system activates the hysteretic current control mode of the switching network in the converter circuit throughout a cycle of the AC input signal, the current flowing through the inductor having a constant valley value across all of the multiple alternations of rising and falling edges of the triangular waveform of the current through the inductor.

19. An apparatus comprising: The converter circuit according to claim 11; as well as An electrical load is coupled between the first output node and the second output node to be provided with the converted output signals from the first output node and the second output node.

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