Deterioration inspection device and degradation inspection method

Abstract

This embodiment relates to a degradation inspection device and a degradation inspection method. According to one embodiment, the degradation inspection device includes: an inductor connected in series with the main current path of a MOS transistor to be inspected, forming a closed loop with the MOS transistor when the MOS transistor is in the on state; a control circuit for controlling the on / off state of the MOS transistor; a current sensor for detecting the current discharged by the inductor; and a calculation circuit for calculating the on-resistance of the MOS transistor based on the decay characteristics of the current discharged by the inductor when the MOS transistor is in the on state, and calculating the threshold voltage of the MOS transistor based on the decay characteristics of the current discharged by the inductor when the MOS transistor is in the off state.

Description

[0001] This application claims the benefit of priority based on Japanese Patent Application No. 2021-92445 (filing date: June 1, 2021), the entire contents of which are incorporated herein by reference. Technical Field

[0002] This embodiment relates to a degradation inspection device and a degradation inspection method. Background Art

[0003] Conventionally, there has been disclosed a technology for a power supply circuit using a GaN (gallium nitride) transistor as a MOS transistor constituting an output transistor. GaN transistors have high withstand voltage and low loss, and are therefore suitable for use in power supply circuits that output high voltage.

[0004] The on-resistance of the MOS transistor constituting the output transistor increases, resulting in an increase in power consumption of the power supply circuit.

[0005] Furthermore, changes in the threshold voltage of the MOS transistor constituting the output transistor affect the controllability of on / off.

[0006] Furthermore, the on-resistance and threshold voltage of a MOS transistor change with time.

[0007] Therefore, a degradation inspection device and a degradation inspection method that can easily inspect the degradation state of a MOS transistor are desired. Summary of the Invention

[0008] One embodiment provides a degradation inspection device and a degradation inspection method capable of easily inspecting the degradation state of a MOS transistor.

[0009] According to one embodiment, a degradation inspection device includes: an inductor connected in series with a main current path of a MOS transistor being inspected, forming a closed loop together with the MOS transistor when the MOS transistor is in an on-state; a control circuit for controlling the on / off switching of the MOS transistor; a current sensor for detecting the current discharged by the inductor; and a calculation circuit for calculating the on-resistance of the MOS transistor based on the attenuation characteristics of the current discharged by the inductor when the MOS transistor is in an on-state, and calculating the threshold voltage of the MOS transistor based on the attenuation characteristics of the current discharged by the inductor when the MOS transistor is in an off-state. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a diagram showing the configuration of the degradation inspection device according to the first embodiment.

[0011] Figure 2 This is a diagram for explaining the return current when the transistor is in the on state.

[0012] Figure 3 It is a diagram for explaining the attenuation characteristics of the return current.

[0013] Figure 4 This is a diagram for explaining the return current when the transistor is in the off state.

[0014] Figure 5 This is a flowchart showing one embodiment of a degradation inspection method.

[0015] Figure 6 It is a diagram showing the configuration of a degradation inspection device according to a second embodiment.

[0016] Figure 7 This is a diagram for explaining the relationship between the on-state of a GaN transistor and the attenuation characteristics of the return current.

[0017] Figure 8 This is a flowchart showing another embodiment of the degradation inspection method.

[0018] Figure 9 This is a graph for explaining the fitting between the measured value of the return current and the calculated data.

[0019] Figure 10 It is a diagram showing the configuration of a degradation inspection device according to a third embodiment.

[0020] Figure 11 It is a diagram showing the configuration of a degradation inspection device according to a fourth embodiment.

[0021] Figure 12 This is a diagram for explaining the inductor current when determining the degradation state of the low-side GaN transistor.

[0022] Figure 13 This is a diagram for explaining the return current when determining the degradation state of the low-side GaN transistor.

[0023] Figure 14 This is a diagram for explaining the inductor current when determining the degradation state of the high-side GaN transistor.

[0024] Figure 15 This is a diagram for explaining the return current when determining the degradation state of the high-side GaN transistor. DETAILED DESCRIPTION

[0025] Hereinafter, a degradation inspection device and a degradation inspection method according to an embodiment will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to these embodiments.

[0026] (First embodiment)

[0027] Figure 1 1 is a diagram showing the configuration of a degradation inspection device according to the first embodiment. The MOS transistor 10 is an N-channel MOS transistor to be inspected.

[0028] This embodiment includes an inductor 6, one end of which is connected to a node N1 connected to the drain of a MOS transistor 10 to be inspected, and the other end of which is connected to a node N2 connected to the source of the MOS transistor 10. The inductor 6 is connected in series with the source-drain circuit, which is the main current path of the MOS transistor 10, and forms a closed loop together with the MOS transistor 10 when the MOS transistor 10 is in the on state.

[0029] The power supply 7 is connected to the node N1. A switch 12 is provided between the node N2 and the ground.

[0030] This embodiment includes a control circuit 1 that controls the on / off state of a MOS transistor 10. The control circuit 1 supplies a drive signal VG to the gate of the MOS transistor 10 to control the on / off state of the MOS transistor 10. The control circuit 1 supplies a control signal VS to a switch 12. The control circuit 1 controls the on / off state of the switch 12 using the control signal VS. By turning the switch 12 on / off under the control of the control circuit 1, the return current flowing back through the closed loop formed by the MOS transistor 10 and the inductor 6 is controlled. The control of the return current by the control circuit 1 will be described later. The control circuit 1 supplies a timing signal VT to the processing circuit 2 that indicates the timing of outputting the drive signal VG and the control signal VS.

[0031] In the above configuration, the control circuit 1 can also serve as a control circuit for controlling the output transistor when the MOS transistor 10 to be inspected constitutes an output transistor, and can also constitute a degradation inspection device additional to the MOS transistor 10 constituting the output transistor.

[0032] This embodiment includes a current sensor 4. The current sensor 4 detects the current discharged by the inductor 6. The detection signal of the current sensor 4 is supplied to the processing circuit 2.

[0033] The processing circuit 2 functions as a calculation circuit, and calculates the on-resistance R of the MOS transistor 10 based on the attenuation characteristics of the current released by the inductor 6 when the MOS transistor 10 is in the on state. ON The threshold voltage V of the MOS transistor 10 is calculated based on the attenuation characteristics of the current released by the inductor 6 when the MOS transistor 10 is in the off state. thThe processing circuit 2 includes, for example, a CPU (Central Processing Unit) (not shown) that performs calculations and a memory (not shown) that stores calculation results.

[0034] This embodiment includes a temperature sensor 5 for detecting the temperature of the MOS transistor 10 . A detection signal of the temperature sensor 5 is supplied to the degradation determination circuit 3 .

[0035] The degradation determination circuit 3 calculates the on-resistance R of the MOS transistor 10 calculated by the processing circuit 2. ON and the threshold voltage V th , with the preset on-resistance R ON and the threshold voltage V th The degradation state of the MOS transistor 10 is determined by comparing the respective threshold values. The degradation determination circuit 3 is, for example, a circuit with an on-resistance R ON When the resistance value exceeds the allowable range relative to the predetermined threshold, or the threshold voltage V th When the voltage value exceeds the allowable range relative to the predetermined threshold value, it is determined that the MOS transistor 10 has deteriorated.

[0036] The on-resistance R of the MOS transistor 10 ON Or the threshold voltage V th The threshold value used for determining degradation of the MOS transistor 10 varies depending on the temperature of the MOS transistor 10. Therefore, the threshold value used for determining degradation of the MOS transistor 10 is stored in a predetermined table (not shown) of the degradation determination circuit 3 as a value correlated with temperature, for example, and is compared with the calculation result from the processing circuit 2 in the degradation determination circuit 3 based on the detection signal of the temperature sensor 5.

[0037] The determination result obtained by comparing the calculation result from the processing circuit 2 with the threshold value is outputted from the degradation determination circuit 3 as the determination signal CP. For example, the on-resistance R ON and the threshold voltage V th When the value of is within a predetermined range relative to a preset threshold value, it is determined that the MOS transistor 10 has not deteriorated. When it is outside the predetermined range, it is determined that the MOS transistor 10 has deteriorated.

[0038] use Figures 2 to 4 , the on-resistance R of the MOS transistor 10 ON and the threshold voltage V th The detection method is described.

[0039] Figure 2 This is a diagram for explaining the return current when the transistor is in the on state.

[0040] exist Figure 1 In the embodiment, the switch 12 is switched from the on state to the off state according to the control signal VS from the control circuit 1, and when the drive signal VG is supplied to the MOS transistor 10 ON When the MOS transistor 10 is turned on, the inductor 6 continues to flow current in order to maintain the current state. Therefore, a return current i flows in the closed loop formed by the MOS transistor 10 and the inductor 6. ON .

[0041] When the MOS transistor 10 is in the on state, the power P released by the inductor 6 is calculated as P=(the on resistance R ON ×Return current i ON 2 ) indicates the return current i ON The power released by the inductor 6 per unit time is consumed as heat per unit time in the MOS transistor 10. ON is the current released by the inductor 6, which is expressed by equation (1).

[0042]

[0043] Here, Io represents the return current i ON The initial value of L represents the inductance of inductor 6, R LOOP R represents the total resistance of the closed loop formed by the MOS transistor 10 and the inductor 6. LOOP Including the on-resistance R of the MOS transistor 10 ON and the parasitic resistance R of the inductor 6 L . i shown in formula (1) ON Indicates the attenuation characteristics. Return current i ON The initial value I0 of the return current can be measured by the current sensor 4 in accordance with the timing signal VT supplied from the control circuit 1. By adjusting the on-time of the switch 12, the return current i ON The initial value of I0 is adjusted.

[0044] Figure 3 It is a diagram for explaining the attenuation characteristics of the return current.

[0045] The solid line 100 represents the return current i ON When the above equation (1) is differentiated with respect to time t, R is obtained as a coefficient. LOOP / L. The differential of formula (1) is equal to the return current i ON Therefore, by finding Figure 3 The return current i ON The return current i in the time difference Δt between the specified time t1 and t2ON The return current i can be calculated by the change in current value Δi from the current value i1 to i2. ON The coefficient of slope R LOOP / L.

[0046] As the value of L, the known value of the inductor 6 is used, and furthermore, by LOOP The on-resistance R of the MOS transistor 10 can be calculated by subtracting the parasitic resistance of the inductor 6 from the value of ON .

[0047] The return current i measured by the current sensor 4 is ON , and use according to the return current i ON The coefficient R obtained from the attenuation characteristics LOOP / L and the calculated return current i ON The on-resistance R of the MOS transistor 10 can be improved by comparing the simulation data and performing fitting to minimize the errors between the two. ON The calculation accuracy of the error and the fitting can be performed in the processing circuit 2.

[0048] Figure 4 1 is a diagram for explaining the return current when the MOS transistor 10 is in the off state. A return current i flows in the closed loop of the MOS transistor 10 and the inductor 6. ON In the state of OFF When the MOS transistor 10 is turned off, a return current i flows in the closed loop between the MOS transistor 10 and the inductor 6. OFF When the MOS transistor 10 is in the off state, the power P released by the inductor 6 is given by P=(the threshold voltage V th ×Return current i OFF ) is represented. In addition, the return current i when the MOS transistor 10 is in the off state OFF It is expressed by formula (2).

[0049]

[0050] Here, V GS V represents the gate-source voltage of the MOS transistor 10. th represents the threshold voltage of the MOS transistor 10. The return current i shown in equation (2) is OFF In addition, in formula (2), Io represents the return current i OFF The initial value of .

[0051] As a property of the MOS transistor 10, when current is injected from the source side, even if the gate potential is lowered to the threshold voltage V th After that, the drain potential also decreases due to the current supplied from the source side, and the gate potential observed from the drain rises to the threshold voltage V th The current flows as above. That is, it has the following property: the source acts as the drain, and the drain acts as the source symmetrically and reversibly, with the gate as the center. The so-called planar lateral MOS transistor, in which the source and drain are formed on the surface of the semiconductor substrate (not shown), has this reversible property. Using this reversible property, the voltage between the gate and drain of the MOS transistor 10 can be calculated as the threshold voltage V th , and serves as an indicator for determining the degradation state of the MOS transistor 10.

[0052] The return current i flowing in the MOS transistor 10 OFF , the current in the saturation region of the MOS transistor 10 flows according to the formula, and a threshold voltage V is generated between the source and drain of the MOS transistor 10. th The voltage E is the voltage required for the MOS transistor 10 to turn on. OFF During the period of , the MOS transistor 10 can be regarded as a constant voltage source. OFF The power is consumed by the voltage drop caused by the MOS transistor 10. The power released by the inductor 6 per unit time is consumed in the MOS transistor 10 as heat per unit time.

[0053] With the above return current i ON Similarly, when the equation (2) is differentiated with respect to time t, the equations (I0-(V GS -V th ) / R LOOP ) and R LOOP The differential of formula (2) is equivalent to finding the return current i OFF Therefore, with Figure 3 The return current i ON The same is true for the case of OFF The change value Δi is used to calculate the return current i OFF The slope of the return current i OFF The initial value I0 of can be measured by the current sensor 4 in response to the timing signal VT supplied from the control circuit 1.

[0054] By using the known value of inductor 6 as the value of L, and from R LOOPThe on-resistance R of the MOS transistor 10 can be calculated by subtracting the parasitic resistance of the inductor 6 from the value of ON In addition, the on-resistance R of the MOS transistor 10 is ON The value of can be used according to the return current i ON The value obtained from the attenuation characteristics.

[0055] The gate-source voltage V GS The driving signal VG applied to the gate of the MOS transistor 10 OFF The voltage difference between the voltage at node N2 and the voltage at node N2 is represented by the voltage at node N2. The voltage at node N2 is determined by the voltage of power supply 7. By using the calculated return current i OFF The slope, initial value I0, R LOOP , L, V GS The threshold voltage V can be calculated by performing the calculation th In addition, according to the return current i OFF When the degradation state of the MOS transistor 10 is determined based on the attenuation characteristics of the MOS transistor 10, the parameter to be determined as an unknown value is the on-resistance R of the MOS transistor 10. ON and threshold voltage V th , so according to the return current i OFF The attenuation characteristics of the reflux current i are calculated by measuring the values ​​of more than three points. OFF The slope of the attenuation characteristic.

[0056] Even if the return current i OFF The threshold voltage V of the MOS transistor 10 is calculated based on the attenuation characteristics of the MOS transistor 10. th In the case of OFF The value of the return current i OFF The attenuation characteristics of the calculated include (I0-(V GS -V th ) / R LOOP ) and R LOOP The return current i is calculated based on the coefficient of / L OFF The threshold voltage V of the MOS transistor 10 can be increased by comparing the simulation data and performing fitting to minimize the error. th The calculation accuracy of the error and the fitting can be performed in the processing circuit 2.

[0057] Figure 5 This is a flowchart showing one embodiment of a degradation inspection method.

[0058] This flowchart is used in the degradation inspection device of the first embodiment described above by using Figures 2 to 4Execute according to the method described.

[0059] According to the return current i when the MOS transistor 10 is in the on state ON The on-resistance R of the MOS transistor 10 is calculated based on the attenuation characteristics of the ON (S10). According to the return current i ON The attenuation characteristics of the coefficient R LOOP / L and calculate the on-resistance R of the MOS transistor 10 ON The method is as described above.

[0060] According to the return current i when the MOS transistor 10 is in the off state OFF The threshold voltage V of the MOS transistor 10 is calculated based on the attenuation characteristics of the MOS transistor 10. th (S11). According to the return current i OFF The attenuation characteristics of the coefficient R LOOP / L and calculate the threshold voltage V of MOS transistor 10 th The method is as described above.

[0061] Alternatively, the reflux current i when the MOS transistor 10 is in the off state may be used. OFF The threshold voltage V of the MOS transistor 10 is calculated based on the attenuation characteristics of the MOS transistor 10. th Then, according to the return current i when the MOS transistor 10 is in the on state ON The on-resistance R of the MOS transistor 10 is calculated based on the attenuation characteristics of the MOS transistor 10. ON .

[0062] Next, the degradation determination circuit 3 determines the on-resistance R of the MOS transistor 10 calculated by the processing circuit 2. ON , threshold voltage V th Is it within the prescribed range (S12)? That is, the prescribed threshold value is compared with the calculated on-resistance R ON , threshold voltage V th Compare and determine whether it is within the specified range.

[0063] The on-resistance R calculated by the processing circuit 2 ON , threshold voltage V th If the on-resistance R is within the predetermined range (S12: YES), the degradation determination circuit 3 determines that the MOS transistor 10 has not degraded (S13). ON , threshold voltage V th When the value is not within the predetermined range ( S12 : No), the degradation determination circuit 3 determines that the MOS transistor 10 is degraded ( S14 ).

[0064] According to the first embodiment, the return current i flowing in the closed loop formed by the MOS transistor 10 and the inductor 6 ON 、i OFF The on-resistance R of the MOS transistor 10 is calculated based on the attenuation characteristics of the MOS transistor 10. ON and the threshold voltage V th By comparing the measured value with a predetermined threshold, the degradation state of the MOS transistor 10 can be easily determined. Furthermore, the predetermined threshold used in the degradation determination circuit 3 need not be a value correlated with temperature. For example, the threshold may be set to a value within a predetermined allowable range, and the temperature sensor 5 may be omitted.

[0065] (Second embodiment)

[0066] Figure 6 : is a diagram showing the structure of a degradation inspection device according to a second embodiment. Figure 6 In the present invention, the same reference numerals are given to the components corresponding to the above-mentioned embodiments, and repeated descriptions are made only when necessary. The same applies hereinafter.

[0067] This embodiment includes a GaN (gallium nitride) transistor 10G and a silicon switching transistor 10L on the high side. GaN transistor 10G is a normally-on MOS transistor, with GaN serving as the main current path between the drain and source. Switching transistor 10L is a normally-off MOS transistor. GaN transistor 10G and switching transistor 10L are connected in cascade.

[0068] Control circuit 1 supplies a drive signal VG1 to the gate of GaN transistor 10G and a drive signal VG2 to the gate of switching transistor 10L. Drive signal VG1 controls the on / off state of GaN transistor 10G, while drive signal VG2 controls the on / off state of switching transistor 10L. A positive power supply voltage VDC_P is applied to power line 8.

[0069] This embodiment includes a GaN transistor 11G and a silicon switching transistor 11L on the low side. GaN transistor 11G and switching transistor 11L are connected in cascade. Control circuit 1 supplies a drive signal VG3 to the gate of GaN transistor 11G and a drive signal VG4 to the gate of switching transistor 11L. Drive signal VG3 controls the on / off state of GaN transistor 11G, while drive signal VG4 controls the on / off state of switching transistor 11L. A negative power supply voltage VDC__M is applied to power line 9.

[0070] This embodiment shows the following situation: In a DC / DC converter that converts the DC voltage applied to power lines 8 and 9 into a specified DC voltage and outputs it, high-voltage and low-loss GaN transistors 10G and 11G are used as output transistors. The high-side GaN transistor 10G and the switching transistor 10L, and the low-side GaN transistor 11G and the switching transistor 11L form a half-bridge circuit. One end of the inductor 6 connected to the node N1 is connected to the load (not shown) side in the DC / DC converter. In the degradation judgment of the high-side GaN transistor 10G, as shown in the figure, the inductor 6 is connected to form a closed loop together with the GaN transistor 10G and the switching transistor 10L.

[0071] use Figure 7 Explanation of the on-resistance R of the high-side GaN transistor 10G ON , threshold voltage V th Calculation method.

[0072] Figure 7 This is a diagram for explaining the relationship between the on-state of a GaN transistor and the attenuation characteristics of the return current. Figure 7 The upper part shows the return current i flowing when the GaN transistor 10G and the switching transistor 10L are in the on state. ON status.

[0073] Return current i ON is the current released by the inductor 6, which is expressed by equation (3). ON Indicates the attenuation characteristics.

[0074]

[0075] Here, Io represents the return current i ON The initial value of L represents the inductance of inductor 6, R LOOP R represents the resistance value of the closed loop formed by the GaN transistor 10G, the switching transistor 10L, and the inductor 6. LOOP The on-resistance of the GaN transistor 10G and the switching transistor 10L, and the parasitic resistance R of the inductor 6 are included. L .

[0076] When the on-resistance of the switching transistor 10L is ignored, the switching current i ON The on-resistance R of the GaN transistor 10G is calculated based on the attenuation characteristics of the GaN transistor 10G. ON In addition, the return current i measured by the current sensor 4 is ON , and use according to the return current i ON The coefficient R obtained from the attenuation characteristics LOOP / L and the calculated return current iON By comparing the simulation data with the data of the GaN transistor 10G and performing fitting to minimize the error, the on-resistance R ON The calculation accuracy of .

[0077] Figure 7 The lower part shows the return current i flowing when the GaN transistor 10G is off and the switching transistor 10L is on. OFF status.

[0078] Return current i OFF is the current released by the inductor 6, which is expressed by equation (4). OFF Indicates the attenuation characteristics.

[0079]

[0080] Here, VG represents the voltage between the gate of the GaN transistor 10G and the node N2, V th represents the threshold voltage of the GaN transistor 10G. The return current i shown in equation (4) is OFF Indicates the attenuation characteristics.

[0081] As a property of the GaN transistor 10G formed as a lateral MOS transistor, when current is injected from the source side, even if the gate potential is lowered to the threshold voltage V th After that, the drain potential also decreases due to the current supplied from the source side, and the gate potential viewed from the drain rises to the threshold voltage V th The current flows as described above. Due to the reversible nature of the source acting as the drain and the drain acting as the source, the current flows in the GaN transistor 10G. That is, the return current i OFF By utilizing this reversible property, the voltage between the gate and drain of the GaN transistor 10G can be calculated as the threshold voltage V th , and serves as an indicator for determining the degradation state of the GaN transistor 10G.

[0082] The return current i flowing in the GaN transistor 10G OFF , a current flows according to the equation of the saturation region of the GaN transistor 10G, and a threshold voltage V is generated between the source and drain of the GaN transistor 10G. th The voltage E is the voltage required for the GaN transistor 10G to turn on. OFF During the period, the GaN transistor 10G can be regarded as a constant voltage source. OFFThe power is consumed by the voltage drop caused by the GaN transistor 10G. The power released by the inductor 6 per unit time is consumed as heat per unit time in the GaN transistor 10G.

[0083] With the above return current i ON Similarly to the attenuation characteristics of , when differentiating equation (4), we get R as the coefficient LOOP / L. Differentiation of formula (4) is equivalent to finding the return current i OFF Therefore, with Figure 3 The return current i ON The same is true for the case of OFF The change value Δi can be calculated to represent the return current i OFF The slope of R LOOP / L.

[0084] By using the known value of inductor 6 as the value of L, and from R LOOP The on-resistance R of the GaN transistor 10G can be calculated by subtracting the parasitic resistance of the inductor 6 from the value of ON In addition, the on-resistance R of the GaN transistor 10G is ON The value of the return current i can be used as described above. ON The gate-source voltage V of the GaN transistor 10G is obtained by the attenuation characteristics. GS The driving signal VG applied to the gate of the GaN transistor 10G OFF The voltage difference between φ and the node N2 indicates that the voltage at the node N2 is set to, for example, 0 V according to the power supply voltages VDC_P and VDC_M applied to the power supply lines 8 and 9 .

[0085] Figure 8 This is a flowchart showing another embodiment of the degradation inspection method, which can be implemented in the above-mentioned second embodiment.

[0086] The control circuit 1 turns on the high-side and low-side switching transistors 10L and 11L, and turns off the high-side and low-side GaN transistors 10G and 11G ( S20 ).

[0087] The control circuit 1 turns on the low-side GaN transistor 11G, causing current to flow through the inductor 6 (S21). This causes power to accumulate in the inductor 6. By adjusting the on-time of the GaN transistor 11G, the initial value of the return current can be adjusted.

[0088] The control circuit 1 turns off the low-side GaN transistor 11G, and sets the state in which the return current flows through the high-side GaN transistor 10G and the inductor 6 ( S22 ).

[0089] The control circuit 1 turns on the high-side GaN transistor 10G ( S23 ). That is, the control circuit 1 supplies a drive signal VG1 to the gate of the GaN transistor 10G. ON .

[0090] Processing circuit 2 according to the return current i ON The on-resistance R of the high-side GaN transistor 10G is calculated based on the attenuation characteristics of the ON (S24) As described above, by obtaining the return current i ON The slope of the attenuation characteristic can be calculated including the on-resistance R ON R LOOP and the coefficient R of the inductor L LOOP / L.

[0091] The control circuit 1 turns off the high-side GaN transistor 10G ( S25 ).

[0092] The control circuit 1 turns on the low-side GaN transistor 11G, and sets a state where current flows through the inductor 6 ( S26 ). As a result, electric power is stored in the inductor 6 .

[0093] The control circuit 1 turns off the low-side GaN transistor 11G, and sets the state where current flows through the high-side GaN transistor 10G and the inductor 6 (S27). That is, the return current i OFF status.

[0094] Processing circuit 2 according to the return current i OFF The attenuation characteristics are used to calculate the threshold voltage V of the high-side GaN transistor 10G. th (S28).

[0095] The degradation determination circuit 3 determines the on-resistance R of the high-side GaN transistor 10G calculated by the processing circuit 2. ON , threshold voltage V th Is it within the prescribed range (S29)? That is, the prescribed threshold value is compared with the calculated on-resistance R ON , threshold voltage V th Compare and determine whether it is within the specified range.

[0096] The degradation determination circuit 3 is to determine the on-resistance R calculated by the processing circuit 2. ON , threshold voltage V thIf it is within the predetermined range (S29: Yes), it is determined that the high-side GaN transistor 10G has not deteriorated (S30). ON , threshold voltage V th When the value is not within the predetermined range ( S29 : No), it is determined that the high-side GaN transistor 10G is degraded ( S31 ).

[0097] According to the second embodiment, the return current i flowing through the closed loop formed by the high-side GaN transistor 10G and the inductor 6 can be ON 、i OFF The degradation characteristics of the high-side GaN transistor 10G can be easily determined by the on-resistance R of the GaN transistor 10G. ON Or the threshold voltage V th The degradation determination device of this embodiment is configured to determine the degradation state of the GaN transistor 10G using the inductor 6 constituting the DC / DC converter, and can therefore be easily configured.

[0098] Figure 9 This is a diagram for explaining the fitting of the measured value of the return current to the simulation data. This data fitting can be performed in the second embodiment. The horizontal axis represents time, and the vertical axis represents current.

[0099] The solid line 101 represents the return current i when the high-side GaN transistor 10G is turned on. ON The measured data of the attenuation characteristics of the high-side GaN transistor 10G is as follows: the high-side GaN transistor 10G is turned on at a timing delayed by a predetermined time from the time t0 at which the return current flows through the high-side GaN transistor 10G.

[0100] As mentioned above, the return current i ON The attenuation characteristic is shown in equation (3). Therefore, the processing circuit 2 calculates the return current i in the time difference Δt1 between any time t3 and t4. ON The return current i is calculated by calculating the change value Δi (not shown) of ON The slope of the attenuation characteristic can be used to calculate the on-resistance R of the GaN transistor 10G including the high side. ON R LOOP , and the coefficient R of the inductor L LOOP / L.

[0101] Furthermore, in the processing circuit 2, the return current i ON The coefficient R obtained from the attenuation characteristics LOOP / L and the calculated return current i ONBy comparing the simulated data with the measured data and performing fitting to minimize the error, the error between the simulated data represented by the dotted line 111 and the measured data represented by the solid line 101 can be minimized, thereby improving the on-resistance R of the GaN transistor 10G. ON The calculation accuracy of the error and the fitting can be performed in the processing circuit 2.

[0102] The solid line 102 represents the return current i when the high-side GaN transistor 10G is turned off. OFF The measured data of the attenuation characteristics of is as follows: while the high-side GaN transistor 10G is turned off, the low-side GaN transistor 11G is turned off at time t0.

[0103] As mentioned above, the return current i OFF The attenuation characteristic is shown in equation (4). In the processing circuit 2, the return current i OFF The change value Δi of Δt12 and the return current i in the time difference Δt12 between time t12 and time t13 are OFF The return current i is calculated by calculating the change value Δi (not shown) of OFF The slope of the attenuation characteristic can be used to calculate the threshold voltage V of the high-side GaN transistor 10G. th .

[0104] Furthermore, in the processing circuit 2, the return current i OFF The measured data and the return current i OFF The coefficient R obtained from the attenuation characteristics LOOP / L and the calculated return current i OFF By comparing the simulated data with the actual measured data represented by the solid line 102, and performing fitting to minimize the error between the two, the error between the simulated data represented by the dot-dashed line 112 and the actual measured data represented by the solid line 102 can be minimized, thereby improving the threshold voltage V of the GaN transistor 10G. th The calculation accuracy of the error and the fitting can be performed in the processing circuit 2.

[0105] (Third embodiment)

[0106] Figure 10 : is a diagram showing the configuration of a degradation inspection device according to a third embodiment. This embodiment shows a configuration in which the on-resistance R of the low-side GaN transistor 11G is calculated. ON and the threshold voltage V th , checking the degradation state of the low-side GaN transistor 11G.

[0107] In the second embodiment described above, the high-side GaN transistor 10G corresponds to the low-side GaN transistor 11G, and the high-side switching transistor 10L corresponds to the low-side switching transistor 11L. Under the control of the control circuit 1, the on / off states of the GaN transistors 10G and 11G and the switching transistors 10L and 11L are controlled, thereby calculating the on-resistance R of the low-side GaN transistor 11G. ON , threshold voltage V th , and the degradation state of the GaN transistor 11G is determined.

[0108] According to this embodiment, by connecting one end of the load side of the inductor 6 constituting the DC / DC converter to the node N3 , a degradation inspection device for determining the degradation state of the GaN transistor 11G constituting the low side of the DC / DC converter can be easily constructed.

[0109] (Fourth embodiment)

[0110] Figure 11 This diagram shows the configuration of a degradation inspection device according to a fourth embodiment. This embodiment includes a smoothing capacitor 20 for a DC / DC converter. Smoothing capacitor 20 is connected between node N4, to which one end of inductor 6 is connected, and node N3. Smoothing capacitor 20 smoothes the voltage at node N4 and supplies it to output terminal 21. The output voltage from output terminal 21 is supplied to a load (not shown). A power supply 7 is connected between node N1 and node N3.

[0111] use Figure 12 and Figure 13 A case where the degradation state of the low-side GaN transistor 11G is determined will be described. Figure 12 The inductor current i is used to explain the case of determining the degradation state of the low-side GaN transistor 11G. L Picture. Figure 13 This is a diagram for explaining the return current i when determining the degradation state of the low-side GaN transistor 11G.

[0112] When the degradation state of the low-side GaN transistor 11G is determined by the degradation determination circuit 3, as shown in FIG. Figure 12 As shown in FIG. 1 , the low-side GaN transistor 11G and the switching transistor 11L are turned off, and the high-side GaN transistor 10G and the switching transistor 10L are turned on. The inductor current i flowing through the loop formed by the power supply 7, the high-side GaN transistor 10G, the switching transistor 10L, the inductor 6, and the smoothing capacitor 20 is L The inductor 6 is charged.

[0113] Next, the high-side GaN transistor 10G and the switch transistor 10L are turned off by the control circuit 1. Figure 13 As shown, when the low-side GaN transistor 11G and the switching transistor 11L are turned on, the return current i released by the inductor 6 can flow through the closed loop formed by the inductor 6 and the smoothing capacitor 20 .

[0114] As in the above embodiment, in a state where the return current i can flow, under the control of the control circuit 1, the processing circuit 2 calculates the on-resistance R of the low-side GaN transistor 11G based on the attenuation characteristics of the return current i when the low-side GaN transistor 11G is turned on. ON The threshold voltage V of the low-side GaN transistor 11G is calculated based on the attenuation characteristics of the return current i when the low-side GaN transistor 11G is turned off. th The degradation determination circuit 3 determines the degradation state of the low-side GaN transistor 11G.

[0115] Next, use Figure 14 and Figure 15 A case where the degradation state of the high-side GaN transistor 10G is determined will be described. Figure 14 The inductor current i is used to explain the case of determining the degradation state of the high-side GaN transistor 10G. L Picture. Figure 15 This is a diagram for explaining the return current i when determining the degradation state of the high-side GaN transistor 10G.

[0116] When the degradation state of the high-side GaN transistor 10G is determined by the degradation determination circuit 3, as shown in FIG. Figure 14 As shown in FIG. 1 , the high-side GaN transistor 10G and the switching transistor 101 are turned off by the control circuit 1, and the low-side GaN transistor 11G and the switching transistor 11L are turned on. The inductor current i flowing through the loop formed by the low-side GaN transistor 11G, the switching transistor 11L, the inductor 6, and the smoothing capacitor 20 is L The inductor 6 is charged. The charge of the smoothing capacitor 20 is discharged to generate the inductor current i L The smoothing capacitor 20 functions as a power source.

[0117] Next, the low-side GaN transistor 11G and the switch transistor 11L are turned off. Figure 15As shown, when the high-side GaN transistor 10G and the switching transistor 10L are turned on, the return current i released by the inductor 6 can flow through the closed loop formed by the inductor 6, the smoothing capacitor 20, and the power supply 7. As in the above embodiment, under the control of the control circuit 1, the on-resistance R of the high-side GaN transistor 10G is calculated based on the attenuation characteristics of the return current i when the processing circuit 2 turns on the high-side GaN transistor 10G while the return current i can flow. ON The threshold voltage V of the high-side GaN transistor 10G is calculated based on the attenuation characteristics of the return current i when the high-side GaN transistor 10G is turned off. th The degradation determination circuit 3 determines the degradation state of the high-side GaN transistor 10G.

[0118] According to the present embodiment, a degradation inspection device that determines the degradation states of the high-side GaN transistor 10G and the low-side GaN transistor 11G can be easily configured by directly using the configuration of the DC / DC converter including the smoothing capacitor 20 .

[0119] While several embodiments of the present invention have been described, these embodiments are provided as examples and are not intended to limit the scope of the invention. These novel embodiments may be implemented in various other ways, and various omissions, substitutions, and modifications may be made without departing from the spirit of the invention. These embodiments and their variations are included within the scope and spirit of the invention, and are included in the invention recited in the claims and their equivalents.

Claims

1. A degradation inspection device comprising: an inductor connected in series to a main current path of a MOS transistor to be inspected, and forming a closed loop together with the MOS transistor when the MOS transistor is in an on state; A control circuit for controlling the on / off state of the MOS transistor; a current sensor for detecting the current released by the inductor; a calculation circuit for calculating an on-resistance of the MOS transistor based on a slope of a decay characteristic of a current released by the inductor when the MOS transistor is in an on-state, and calculating a threshold voltage of the MOS transistor based on a slope of a decay characteristic of a current released by the inductor when the MOS transistor is in an off-state; as well as The determination circuit compares preset threshold values ​​of on-resistance and threshold voltage with the on-resistance and threshold voltage of the MOS transistor calculated by the calculation circuit to determine a degradation state of the MOS transistor.

2. The degradation inspection device according to claim 1, wherein A temperature sensor for detecting the temperature of the MOS transistor is provided.

3. The degradation inspection device according to claim 1, wherein A temperature sensor is provided to detect the temperature of the MOS transistor. The determination circuit determines a degradation state of the MOS transistor by comparing threshold values ​​of on-resistance and threshold voltage, which are preset in accordance with a temperature of the MOS transistor, with the on-resistance and threshold voltage of the MOS transistor calculated by the calculation circuit.

4. The degradation inspection device according to any one of claims 1 to 3, wherein: The above-mentioned MOS transistor is a lateral MOS transistor.

5. The degradation inspection device according to any one of claims 1 to 3, wherein: The above-mentioned MOS transistor is a GaN transistor.

6. A degradation inspection method comprising: a step of calculating the on-resistance of the MOS transistor as a test object, which forms a closed loop with the inductor, based on the slope of the attenuation characteristic of the current discharged by the inductor when the MOS transistor is in an on state; a step of calculating a threshold voltage of the MOS transistor based on a slope of a decay characteristic of a current released by the inductor when the MOS transistor is in an off state; and A step of comparing preset threshold values ​​of on-resistance and threshold voltage with the calculated on-resistance and threshold voltage of the MOS transistor to determine a degradation state of the MOS transistor.

7. The degradation inspection method according to claim 6, wherein: further comprising the step of detecting the temperature of the MOS transistor, In the step of determining the degradation state of the MOS transistor, the degradation state of the MOS transistor is determined by comparing the calculated on-resistance and threshold voltage of the MOS transistor with threshold values ​​of on-resistance and threshold voltage preset in accordance with the temperature of the MOS transistor.

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