Optimal board splicing method and device of PCB, electronic equipment and storage medium

Abstract

This application discloses an optimal PCB panelization method, apparatus, electronic device, and storage medium, comprising: determining multiple reserved size factors for each PCB to be manufactured based on the number of layers and the presence status of gold fingers on each PCB to be manufactured; inputting the multiple reserved size factors into a preset material calculation model to obtain multiple panelization methods and corresponding utilization rates of the multiple PCBs to be manufactured, so as to select the optimal panelization method that meets preset requirements from the multiple panelization methods and corresponding utilization rates. This solves the problems in related technologies such as the single PCB panelization method, lack of utilization rate comparison, and failure to incorporate the forming dimensions of the PCB material for factor control of PCB panelization utilization. It can cope with the ever-changing PCB material and irregular PCB shapes. Furthermore, as more factors are introduced, PCB cost control can be achieved through software calculation, effectively controlling project development costs.

Description

Technical Field

[0001] This application relates to the field of circuit board manufacturing technology, and in particular to an optimal method, apparatus, electronic device and storage medium for PCB (Printed Circuit Board) panelization. Background Technology

[0002] With the rapid development of the electronics industry, the constantly evolving types and layers of PCBs (Printed Circuit Board Assemblies) that serve as carriers for electronic components inevitably influence the design of every PCBA (Printed Circuit Board Assembly). Furthermore, based on a large board, different panelization methods determine the utilization rate of the entire board. Higher utilization rates result in lower PCB-related costs for the entire project, thus affecting product development investment and ultimately, return on investment. Today, with the growing demand for Industrial ID (Identity Documentation), consumers generally prefer electronic products with diverse styles and unique structures. Therefore, even though PCBs, as rigid carriers, cannot be altered in planar structure, they must adapt to the development of the electronics industry, leading to changes in PCB board shape designs.

[0003] In related technologies, PCB panel design is only applicable to the shape of PCBs and can only be applied to regular PCBA designs such as squares and rectangles. It does not have good universality and does not provide an intuitive panel design option. There is no comparison of utilization rates, and there is no intuitive introduction of information such as the forming size of large PCB materials in the entire PCB industry for factor control of the overall PCB panel utilization rate. These issues urgently need to be addressed. Summary of the Invention

[0004] This application provides an optimal PCB panelization method, apparatus, electronic device, and storage medium, which solves the problems of the single PCB panelization method, lack of utilization comparison, and lack of factor control of PCB material forming size for PCB panelization utilization in related technologies. It can cope with the ever-changing PCB materials and irregular PCB shapes. As more factors are introduced, the PCB cost can be controlled through software calculation, so that the development cost of the project can be effectively controlled.

[0005] The first aspect of this application provides an optimal panelization method for PCB boards, comprising the following steps: determining the number of layers and the presence status of gold fingers on multiple PCB boards to be manufactured; determining multiple reserved size factors for each PCB board to be manufactured based on the number of layers and the presence status of gold fingers on each PCB board to be manufactured; inputting the number of layers, the presence status of gold fingers, and the multiple reserved size factors of each PCB board to be manufactured into a preset board material calculation model to obtain multiple panelization methods and corresponding utilization rates of the multiple PCB boards to be manufactured, so as to select the optimal panelization method that meets preset requirements from the multiple panelization methods and corresponding utilization rates.

[0006] Based on the above technical means, the problems of the single PCB panelization method, lack of utilization rate comparison, and lack of factor control of PCB board forming size for PCB panelization utilization rate in related technologies have been solved. It can cope with the ever-changing PCB board materials and irregular PCB shapes. As more factors are introduced, the PCB cost can be controlled through software calculation, so that the development cost of the project can be effectively controlled.

[0007] Further, determining multiple reserved size factors for each PCB board to be manufactured based on the number of layers and the presence status of the gold fingers on each PCB board to be manufactured includes: determining a reserved gap factor for each PCB board to be manufactured based on the PCB manufacturing process of the PCB manufacturer; determining a reserved width long side factor and a reserved width short side factor for each PCB board to be manufactured based on the PCB manufacturing process of the PCB manufacturer, the number of layers and the presence status of the gold fingers on each PCB board to be manufactured; and obtaining the multiple reserved size factors based on the reserved gap factor, the reserved width long side factor and the reserved width short side factor.

[0008] Based on the above technical means, the mutual constraints of multiple reserved size factors can coordinate the import of specific parameters from multiple PCB manufacturers and multiple SMT (ST Microelectronics) manufacturers, resulting in multiple visualized layout methods.

[0009] Further, determining multiple reserved size factors for each PCB board to be manufactured based on the number of layers and the presence status of the gold fingers of each PCB board to be manufactured includes: determining a reserved breakage factor for each PCB board to be manufactured based on the PCB manufacturing process of the surface mount technology (SMT) board manufacturer; determining a reserved short-side breakage factor and a reserved long-side breakage factor for each PCB board to be manufactured based on the PCB manufacturing process of the SMT board manufacturer, the number of layers and the presence status of the gold fingers of each PCB board to be manufactured; and obtaining the multiple reserved size factors based on the reserved gap factor, the reserved long-side width factor, the reserved short-side width factor, the reserved breakage factor, the reserved short-side breakage factor and the reserved long-side breakage factor.

[0010] Based on the aforementioned technical means and the obtained reserved size factor, the development cost of the PCB board can be determined.

[0011] Furthermore, before inputting the number of layers of each PCB to be manufactured, the gold finger presence status of each PCB to be manufactured, and the multiple reserved size factors of each PCB to be manufactured into the preset board material calculation model, the method further includes: obtaining the number of layers of the target PCB, the gold finger presence status of each target PCB, and the multiple reserved size factors of each target PCB; and training a target neural network model based on the number of layers of the target PCB, the gold finger presence status of each target PCB, and the multiple reserved size factors of each target PCB to obtain the preset board material calculation model.

[0012] Based on the aforementioned technical means, the layout and utilization rate of the boards can be observed through the pre-defined board calculation model, and the board with the highest utilization rate can be selected for use.

[0013] Furthermore, the presence of the gold fingers includes two states: the PCB board to be manufactured contains gold fingers and the PCB board to be manufactured does not contain gold fingers.

[0014] Based on the aforementioned technical means, the gold finger is composed of numerous yellow conductive contacts, which can reduce contact resistance and improve transmission efficiency.

[0015] A second aspect of this application provides an optimal panelization device for PCB boards, comprising: a first determining module for determining the number of layers and the presence status of gold fingers on a plurality of PCB boards to be manufactured; a second determining module for determining a plurality of reserved size factors for each PCB board to be manufactured based on the number of layers and the presence status of gold fingers on each PCB board to be manufactured; and a panelization module for inputting the number of layers, the presence status of gold fingers, and the plurality of reserved size factors of each PCB board to be manufactured into a preset board material calculation model to obtain a plurality of panelization methods and corresponding utilization rates of the plurality of PCB boards to be manufactured, so as to select the optimal panelization method that meets preset requirements from the plurality of panelization methods and corresponding utilization rates.

[0016] Further, the second determining module is specifically used for: determining the reserved gap factor of each PCB board to be manufactured according to the PCB manufacturing process of the PCB manufacturer; determining the reserved width long side factor and reserved width short side factor of each PCB board to be manufactured according to the PCB manufacturing process of the PCB manufacturer, the number of layers of each PCB board to be manufactured and the presence status of gold fingers; and obtaining the plurality of reserved size factors according to the reserved gap factor, the reserved width long side factor and the reserved width short side factor.

[0017] Furthermore, the second determining module is also used to: determine the reserved breakage factor of each PCB board to be manufactured according to the PCB manufacturing process of the surface mount technology (SMT) board manufacturer; determine the reserved short side factor and reserved long side factor of each PCB board to be manufactured according to the PCB manufacturing process of the SMT board manufacturer, the number of layers of each PCB board to be manufactured, and the presence status of gold fingers; and obtain the plurality of reserved size factors according to the reserved gap factor, the reserved long side factor, the reserved short side factor, the reserved breakage factor, the reserved short side factor, and the reserved long side factor.

[0018] Furthermore, before inputting the number of layers of each PCB to be manufactured, the presence status of the gold fingers of each PCB to be manufactured, and the multiple reserved size factors of each PCB to be manufactured into the preset board material calculation model, the panelization module is specifically used to: obtain the number of layers of the target PCB, the presence status of the gold fingers of each target PCB, and the multiple reserved size factors of each target PCB; and train a target neural network model based on the number of layers of the target PCB, the presence status of the gold fingers of each target PCB, and the multiple reserved size factors of each target PCB to obtain the preset board material calculation model.

[0019] Furthermore, the presence of the gold fingers includes two states: the PCB board to be manufactured contains gold fingers and the PCB board to be manufactured does not contain gold fingers.

[0020] A third aspect of this application provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the optimal PCB panelization method as described in the above embodiments.

[0021] A fourth aspect of this application provides a computer-readable storage medium having a computer program stored thereon, which is executed by a processor to implement the optimal PCB panelization method as described in the above embodiments.

[0022] Therefore, this embodiment of the application determines the number of layers and the presence status of gold fingers on multiple PCBs to be manufactured. Based on the number of layers and the presence status of gold fingers on each PCB, multiple reserved size factors are determined for each PCB. The number of layers, the presence status of gold fingers, and the multiple reserved size factors of each PCB are input into a preset material calculation model to obtain multiple panelization methods and corresponding utilization rates for the multiple PCBs. The optimal panelization method that meets the preset requirements is then selected from these methods. This solves the problems in related technologies, such as the single PCB panelization method, the lack of utilization rate comparison, and the absence of factor control based on the forming dimensions of the PCB material for PCB panelization utilization. It can cope with increasingly changing PCB materials and irregular PCB shapes. As more factors are introduced, PCB cost control can be achieved through software calculations, effectively controlling project development costs.

[0023] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0024] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:

[0025] Figure 1 This is a flowchart illustrating an optimal PCB panelization method according to an embodiment of this application.

[0026] Figure 2 This is a schematic diagram of dimensional parameters of a board factory according to an embodiment of this application;

[0027] Figure 3 This is a schematic diagram of the operation interface of an optimal PCB board panelization method according to an embodiment of this application;

[0028] Figure 4This is a schematic diagram illustrating the panel arrangement and utilization rate according to an embodiment of this application;

[0029] Figure 5 This is a block diagram of an optimal panelization device for a PCB board according to an embodiment of this application;

[0030] Figure 6 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application.

[0031] Explanation of reference numerals in the attached drawings: 10-Optimal panelization device for PCB board, 100-First determining module, 200-Second determining module, 300-Paneling module, 601-Memory, 602-Processor, 603-Communication interface. Detailed Implementation

[0032] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0033] The following description, with reference to the accompanying drawings, describes an optimal PCB panelization method, apparatus, electronic device, and storage medium according to embodiments of this application. Addressing the issues mentioned in the background art regarding the limited variety of PCB panelization methods, lack of utilization comparison, and absence of factor control based on the forming dimensions of the PCB material for PCB panelization utilization, this application provides an optimal PCB panelization method. In this method, the number of layers and the presence status of gold fingers on multiple PCBs to be manufactured are determined; based on the number of layers and the presence status of gold fingers on each PCB to be manufactured, multiple reserved size factors for each PCB to be manufactured are determined; the number of layers, the presence status of gold fingers, and the multiple reserved size factors of each PCB to be manufactured are input into a preset material calculation model to obtain multiple panelization methods and corresponding utilization rates for the multiple PCBs to be manufactured, thereby selecting the optimal panelization method that meets preset requirements from the multiple panelization methods and corresponding utilization rates. This solves the problems in related technologies, such as the single PCB panelization method, lack of utilization comparison, and failure to introduce the forming size of PCB materials for factor control of PCB panelization utilization. It can cope with the ever-changing PCB materials and irregular PCB shapes. As more factors are introduced, PCB cost control can be achieved through software calculation, thus effectively controlling the development cost of the project.

[0034] Specifically, Figure 1 This is a flowchart illustrating an optimal PCB panelization method provided in an embodiment of this application.

[0035] like Figure 1 As shown, the optimal panelization method for this PCB board includes the following steps:

[0036] In step S101, the number of layers and the presence status of gold fingers of multiple printed circuit boards (PCBs) to be manufactured are determined.

[0037] Optionally, in some embodiments, the presence of gold fingers includes two states: the PCB board to be manufactured contains gold fingers and the PCB board to be manufactured does not contain gold fingers.

[0038] It is understandable that, such as Figure 2 As shown, the number of layers of multiple printed circuit boards (PCBs) to be manufactured can be 2, 4, 6, or 8. The presence of gold fingers can be either 2 layers of PCBs containing gold fingers or 2 layers of PCBs not containing gold fingers, or 4 layers of PCBs containing gold fingers or 4 layers of PCBs not containing gold fingers, or 6 layers of PCBs containing gold fingers or 6 layers of PCBs not containing gold fingers, or 8 layers of PCBs containing gold fingers or 8 layers of PCBs not containing gold fingers.

[0039] It should be noted that the number of layers of the printed circuit board (PCB) to be manufactured mentioned above is merely exemplary and is not intended to limit this application. Those skilled in the art can set the number of layers and the presence of gold fingers of the PCB to be manufactured according to actual circumstances.

[0040] In step S102, multiple reserved size factors for each PCB to be manufactured are determined based on the number of layers of each PCB to be manufactured and the presence status of the gold fingers of each PCB to be manufactured.

[0041] Optionally, in some embodiments, multiple reserved size factors for each PCB to be manufactured are determined based on the number of layers of each PCB to be manufactured and the presence status of the gold fingers of each PCB to be manufactured, including: determining a reserved gap factor for each PCB to be manufactured based on the PCB manufacturing process of the PCB manufacturer; determining a reserved width long side factor and a reserved width short side factor for each PCB to be manufactured based on the PCB manufacturing process of the PCB manufacturer, the number of layers of each PCB to be manufactured and the presence status of the gold fingers; and obtaining multiple reserved size factors based on the reserved gap factor, the reserved width long side factor and the reserved width short side factor.

[0042] Specifically, regarding the manufacturing of PCB boards, the industry standardizes certain dimensions, denoted as size number: D, which is also the factor D. In our project, the PCBs designed also have specific dimensions for various shapes. The more unusual the shape, the greater the impact on utilization. These PCB dimensions are denoted as size number: E, which is also the factor E. To ensure manufacturability in both production and the SMT (Surface Mount Technology) production of PCBAs, PCB manufacturers need to consider certain reserved dimensional parameters in the software code. These are considered other influencing factors in the software programming. Here, we elaborate on several influencing factors considered by PCB manufacturers: Factor A: This refers to the reserved gap factor for the PCB board separation operation after PCB production. This factor is not fixed and depends on the production process capabilities of different manufacturers. It is obtained from the selected PCB manufacturer when calculating PCB board utilization. Factor B: This refers to the reserved long side width factor for the conveyor belt carrying the PCB during production. Similarly, this factor is not fixed and depends on the production process capabilities of different manufacturers. Factor C: This refers to the reserved short side width factor for the conveyor belt carrying the PCB during production. Again, this factor is not fixed and depends on the production process capabilities of different manufacturers. Thus, factors A, B, and C are the reserved dimensional factors for producing a single panel.

[0043] Optionally, in some embodiments, multiple reserved size factors for each PCB to be manufactured are determined based on the number of layers of each PCB to be manufactured and the presence status of the gold fingers of each PCB to be manufactured, including: determining a reserved breakage factor for each PCB to be manufactured based on the PCB manufacturing process of the surface mount technology (SMT) board manufacturer; determining a reserved short side breakage factor and a reserved long side breakage factor for each PCB to be manufactured based on the PCB manufacturing process of the SMT board manufacturer, the number of layers of each PCB to be manufactured, and the presence status of the gold fingers; and obtaining multiple reserved size factors based on the reserved gap factor, the reserved long side width factor, the reserved short side width factor, the reserved breakage factor, the reserved short side breakage factor, and the reserved long side breakage factor.

[0044] Specifically, within a panel, the influencing factors can be analogous to the following: the reserved gap factor, the reserved long side width factor, and the reserved short side width factor. This relates to the process parameter control of the back-end SMT plant, specifically the size of the break-off edge design. Analogous to the aforementioned A, B, and C influencing factors, these three break-off edge design influencing factors required by the SMT plant can be denoted as reserved break-off factor A', reserved short side break-off factor B', and reserved long side break-off factor C', respectively. The optimal PCB panelization method interface is shown below. Figure 3 As shown.

[0045] In step S103, the number of layers of each PCB to be manufactured, the presence status of the gold fingers of each PCB to be manufactured, and multiple reserved size factors of each PCB to be manufactured are input into the preset board material calculation model to obtain multiple panelization methods and corresponding utilization rates of multiple PCBs to be manufactured, so as to select the optimal panelization method that meets the preset requirements from the multiple panelization methods and corresponding utilization rates.

[0046] Optionally, in some embodiments, before inputting the number of layers of each PCB to be manufactured, the presence status of the gold fingers of each PCB to be manufactured, and the multiple reserved size factors of each PCB to be manufactured into the preset board material calculation model, the method further includes: obtaining the number of layers of the target PCB, the presence status of the gold fingers of each target PCB, and the multiple reserved size factors of each target PCB; and training a target neural network model based on the number of layers of the target PCB, the presence status of the gold fingers of each target PCB, and the multiple reserved size factors of each target PCB to obtain the preset board material calculation model.

[0047] When calculating PCB board utilization, we obtain information from the selected SMT board manufacturers. This involves the interplay of multiple influencing factors, allowing us to coordinate specific parameters from multiple PCB manufacturers and SMT production plants. One such parameter is a specific dimensional parameter from one manufacturer. Figure 3 As shown, parameters are entered into the corresponding fields on the operation interface. The preset board calculation model includes a visual comparison of various layout methods and utilization rates to achieve the optimal solution, thereby determining the key issues affecting product development investment and ultimately deciding on the return on investment in the PCB stage. Among these, panelization methods and utilization rates are shown in the figure. Figure 4 As shown.

[0048] The optimal PCB panelization method proposed in this application determines the number of layers and the presence status of gold fingers on multiple PCBs to be manufactured. Based on the number of layers and the presence status of gold fingers on each PCB, multiple reserved size factors are determined for each PCB. The number of layers, the presence status of gold fingers, and the multiple reserved size factors of each PCB are input into a preset material calculation model to obtain multiple panelization methods and corresponding utilization rates for the multiple PCBs. The optimal panelization method that meets preset requirements is then selected from these methods. This solves the problems in related technologies, such as the lack of a single PCB panelization method, the absence of utilization rate comparison, and the lack of factor control based on the forming dimensions of the PCB material for PCB panelization utilization. It can cope with increasingly varied PCB materials and irregular PCB shapes. As more factors are introduced, PCB cost control can be achieved through software calculations, effectively controlling project development costs.

[0049] Next, referring to the accompanying drawings, an optimal PCB panelization device according to an embodiment of this application is described.

[0050] Figure 5 This is a block diagram of the optimal panelization device for a PCB board according to an embodiment of this application.

[0051] like Figure 5 As shown, the optimal panelization device 10 for the PCB board includes: a first determining module 100, a second determining module 200, and a panelization module 300.

[0052] The first determining module 100 is used to determine the number of layers and the presence status of gold fingers of multiple printed circuit boards (PCBs) to be manufactured; the second determining module 200 is used to determine multiple reserved size factors of each PCB to be manufactured based on the number of layers and the presence status of gold fingers of each PCB to be manufactured; the panelization module 300 is used to input the number of layers, the presence status of gold fingers, and the multiple reserved size factors of each PCB to be manufactured into a preset board material calculation model to obtain multiple panelization methods and corresponding utilization rates of multiple PCBs to be manufactured, so as to select the optimal panelization method that meets the preset requirements from the multiple panelization methods and corresponding utilization rates.

[0053] Optionally, in some embodiments, the second determining module 200 is specifically used for: determining the reserved gap factor of each PCB board to be manufactured according to the PCB board manufacturing process of the PCB board manufacturer; determining the reserved width long side factor and reserved width short side factor of each PCB board to be manufactured according to the PCB board manufacturing process of the PCB board manufacturer, the number of layers of each PCB board to be manufactured and the presence status of gold fingers; and obtaining multiple reserved size factors according to the reserved gap factor, the reserved width long side factor and the reserved width short side factor.

[0054] Optionally, in some embodiments, the second determining module 200 is further configured to: determine the reserved breakage factor for each PCB board to be manufactured based on the PCB manufacturing process of the surface mount technology (SMT) board manufacturer; determine the reserved short side factor and reserved long side factor for each PCB board to be manufactured based on the PCB manufacturing process of the SMT board manufacturer, the number of layers of each PCB board to be manufactured, and the presence status of gold fingers; and obtain multiple reserved size factors based on the reserved gap factor, reserved long side factor, reserved short side factor, reserved breakage factor, reserved short side factor, and reserved long side factor.

[0055] Optionally, in some embodiments, before inputting the number of layers of each PCB to be manufactured, the presence status of the gold fingers of each PCB to be manufactured, and the multiple reserved size factors of each PCB to be manufactured into the preset board material calculation model, the panelization module 300 is specifically used to: obtain the number of layers of the target PCB, the presence status of the gold fingers of each target PCB, and the multiple reserved size factors of each target PCB; and train a target neural network model based on the number of layers of the target PCB, the presence status of the gold fingers of each target PCB, and the multiple reserved size factors of each target PCB to obtain the preset board material calculation model.

[0056] Optionally, in some embodiments, the presence of gold fingers includes two states: the PCB board to be manufactured contains gold fingers and the PCB board to be manufactured does not contain gold fingers.

[0057] It should be noted that the explanation of the above-described embodiment of the optimal PCB panelization method also applies to the optimal PCB panelization device of this embodiment, and will not be repeated here.

[0058] The optimal PCB panelization device proposed in this application determines the number of layers and the presence status of gold fingers on multiple PCBs to be manufactured. Based on the number of layers and the presence status of gold fingers on each PCB, multiple reserved size factors are determined for each PCB. The number of layers, the presence status of gold fingers, and the multiple reserved size factors of each PCB are input into a preset material calculation model to obtain multiple panelization methods and corresponding utilization rates for the multiple PCBs. The optimal panelization method that meets preset requirements is then selected from these methods. This solves the problems in related technologies, such as the single PCB panelization method, lack of utilization rate comparison, and lack of factor control based on the forming dimensions of the PCB material for PCB panelization utilization. It can cope with increasingly varied PCB materials and irregular PCB shapes. As more factors are introduced, PCB cost control can be achieved through software calculations, effectively controlling project development costs.

[0059] Figure 6 A schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device may include:

[0060] The memory 601, the processor 602, and the computer program stored on the memory 601 and capable of running on the processor 602.

[0061] When the processor 602 executes the program, it implements the optimal PCB board panelization method provided in the above embodiments.

[0062] Furthermore, electronic devices also include:

[0063] Communication interface 603 is used for communication between memory 601 and processor 602.

[0064] The memory 601 is used to store computer programs that can run on the processor 602.

[0065] The memory 601 may include high-speed RAM (Random Access Memory) memory, and may also include non-volatile memory, such as at least one disk storage.

[0066] If the memory 601, processor 602, and communication interface 603 are implemented independently, then the communication interface 603, memory 601, and processor 602 can be interconnected via a bus to complete communication between them. The bus can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, or an EISA (Extended Industry Standard Architecture) bus, etc. The bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 6 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0067] Optionally, in a specific implementation, if the memory 601, processor 602, and communication interface 603 are integrated on a single chip, then the memory 601, processor 602, and communication interface 603 can communicate with each other through an internal interface.

[0068] The processor 602 may be a CPU (Central Processing Unit), an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits configured to implement the embodiments of this application.

[0069] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described optimal PCB board panelization method.

[0070] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0071] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0072] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more N executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.

[0073] It should be understood that the various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (FPGAs), field-programmable gate arrays (FPGAs), etc.

[0074] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0075] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

Claims

1. An optimal panelization method for PCB boards, characterized in that, Includes the following steps: Determine the number of layers and the presence status of gold fingers on multiple printed circuit boards (PCBs) to be manufactured; Based on the number of layers of each PCB to be manufactured and the presence status of the gold fingers of each PCB to be manufactured, determine multiple reserved size factors for each PCB to be manufactured. as well as The number of layers of each PCB to be manufactured, the presence status of gold fingers of each PCB to be manufactured, and multiple reserved size factors of each PCB to be manufactured are input into a preset board material calculation model to obtain multiple panelization methods and corresponding utilization rates of the multiple PCBs to be manufactured, so as to select the optimal panelization method that meets the preset requirements from the multiple panelization methods and corresponding utilization rates. The determination of multiple reserved size factors for each PCB board to be manufactured based on the number of layers and the presence status of gold fingers on each PCB board to be manufactured includes: The reserved gap factor for each PCB board to be manufactured is determined according to the PCB manufacturing process of the PCB manufacturer; the reserved width long side factor and reserved width short side factor for each PCB board to be manufactured are determined according to the PCB manufacturing process of the PCB manufacturer, the number of layers of each PCB board to be manufactured and the presence status of gold fingers; the multiple reserved size factors are obtained according to the reserved gap factor, the reserved width long side factor and the reserved width short side factor. The determination of multiple reserved size factors for each PCB board to be manufactured based on the number of layers and the presence status of gold fingers on each PCB board to be manufactured includes: The reserved breakage factor for each PCB to be manufactured is determined based on the PCB manufacturing process of the surface mount technology (SMT) board manufacturer. Based on the SMT board manufacturer's PCB manufacturing process, the number of layers and the presence of gold fingers on each PCB to be manufactured, the reserved short-side breakage factor and reserved long-side breakage factor for each PCB to be manufactured are determined. Multiple reserved size factors are obtained based on the reserved gap factor, the reserved long-side width factor, the reserved short-side width factor, the reserved breakage factor, the reserved short-side breakage factor, and the reserved long-side breakage factor. These multiple reserved size factors are mutually constrained to coordinate the import of specific parameters from multiple PCB manufacturers and multiple SMT production plants, resulting in multiple visual layout methods. Before inputting the number of layers of each PCB to be manufactured, the gold finger presence status of each PCB to be manufactured, and multiple reserved size factors of each PCB to be manufactured into the preset board material calculation model, the method further includes: obtaining the number of layers of the target PCB, the gold finger presence status of each target PCB, and multiple reserved size factors of each target PCB; and training a target neural network model based on the number of layers of the target PCB, the gold finger presence status of each target PCB, and multiple reserved size factors of each target PCB to obtain the preset board material calculation model.

2. The method according to claim 1, characterized in that, The presence of gold fingers includes two states: the PCB board to be manufactured contains gold fingers and the PCB board to be manufactured does not contain gold fingers.

3. An optimal panelization device for PCB boards, characterized in that, For implementing the method as described in any one of claims 1-2, comprising: The first determining module is used to determine the number of layers and the presence status of gold fingers on multiple printed circuit boards (PCBs) to be manufactured. The second determining module is used to determine multiple reserved size factors for each PCB board to be manufactured based on the number of layers of each PCB board to be manufactured and the presence status of the gold fingers of each PCB board to be manufactured; and The panelization module is used to input the number of layers of each PCB to be manufactured, the presence status of the gold fingers of each PCB to be manufactured, and multiple reserved size factors of each PCB to be manufactured into a preset board material calculation model to obtain multiple panelization methods and corresponding utilization rates of the multiple PCBs to be manufactured, so as to select the optimal panelization method that meets the preset requirements from the multiple panelization methods and corresponding utilization rates.

4. The apparatus according to claim 3, characterized in that, The second determining module is specifically used for: The reserved gap factor for each PCB board to be manufactured is determined according to the PCB manufacturing process of the PCB manufacturer. Based on the PCB manufacturing process of the PCB manufacturer, the number of layers of each PCB to be manufactured, and the presence status of the gold fingers, determine the reserved width long side factor and reserved width short side factor of each PCB to be manufactured. The plurality of reserved size factors are obtained based on the reserved gap factor, the reserved width long side factor, and the reserved width short side factor.

5. The apparatus according to claim 3, characterized in that, The second determining module is further configured to: The reserved breakage factor for each PCB to be manufactured is determined based on the PCB manufacturing process of the surface mount technology (SMT) board manufacturer. Based on the SMT board manufacturing process, the number of layers of each PCB board to be manufactured, and the presence of gold fingers, determine the reserved short side factor and reserved long side factor of each PCB board to be manufactured. The plurality of reserved size factors are obtained based on the reserved gap factor, the reserved width long side factor, the reserved width short side factor, the reserved breakage factor, the reserved breakage short side factor, and the reserved breakage long side factor.

6. An electronic device, characterized in that, Including memory and processor; The processor reads executable program code stored in the memory to run a program corresponding to the executable program code, so as to implement the optimal PCB board panelization method as described in any one of claims 1-2.

7. A computer-readable storage medium storing a computer program, characterized in that, When executed by the processor, the program implements the optimal panelization method for the PCB board as described in any one of claims 1-2.

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