Bonding jig and method for manufacturing semiconductor device

Abstract

The present invention provides a joining jig (100), which comprises: a top plate (1); a pressurizing member (2), the upper end of which is mounted on the top plate (1); thin plates (31-34) which surround the pressurizing member (2) when viewed from above; and cylindrical supporting members (41-44). The upper ends of the thin plates (31-34) are respectively mounted on the top plate (1), and the side surfaces of the supporting members (41-44) are respectively mounted on the lower ends of the thin plates (31-34).

Description

Technical Field

[0001] The present invention relates to a bonding jig and a method for manufacturing a semiconductor device, and for example, to a bonding jig for sintering bonding and a method for manufacturing a semiconductor device using the bonding jig. Background Art

[0002] We have developed semiconductor devices such as MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and IGBT (Insulated Gate Bipolar Transistor) using silicon carbide (SiC) substrates. SiC-MOSFETs have lower device resistance than conventional Si-MOSFETs, enabling high-speed switching and contributing significantly to lower losses in electric trains and electric vehicles. Furthermore, SiC-MOSFETs can operate in higher-temperature environments than Si-MOSFETs.

[0003] On the other hand, when semiconductor chips are mounted on wiring substrates, solder bonding has traditionally been used to join the two. However, solder bonding is sometimes unable to cope with the high-temperature environments required of SiC-MOSFETs. Therefore, the use of sintered bonding is being promoted to accommodate high-temperature environments.

[0004] Sintering sometimes requires pressure to expand the sintered material at the bonding surface. However, this can lead to insufficient expansion of the sintered material relative to the bonding surface, resulting in reduced heat dissipation. Alternatively, excessive expansion of the sintered material can cause it to overflow outside the semiconductor chip, leading to a short circuit between the semiconductor chip and the wiring board.

[0005] For example, Patent Document 1 discloses a bonding jig having an opening portion into which a semiconductor chip can be gently inserted and a bonding material release portion having a larger cross-sectional area than the opening portion.

[0006] Prior art literature

[0007] Patent Literature

[0008] Patent Document 1: Japanese Patent Application Laid-Open No. 2011-216772 Summary of the Invention

[0009] Problems to be solved by the invention

[0010] In the pressurizing step during sinter bonding, failures related to the expansion of the sintered material include a decrease in heat dissipation due to insufficient diffusion of the sintered material and a short circuit due to overflow of the sintered material.

[0011] There are two main possible causes of short circuits caused by overflowing sintered material. The first is when the overflowing sintered material climbs onto the top surface of the semiconductor chip, causing a short circuit. The second is when the overflowing sintered material is not adequately pressurized, resulting in a decrease in sintering density and subsequent detachment.

[0012] The bonding jig disclosed in Patent Document 1 can prevent short circuits caused by the spillage of the sintered material, but a gap is formed around the semiconductor chip, and the sintered material may creep onto the upper surface of the semiconductor chip through the gap.

[0013] Therefore, in a semiconductor device comprising a wiring substrate and a semiconductor chip, it is necessary to suppress the above-mentioned short circuit when the semiconductor chip is mounted on the wiring substrate by sinter bonding. In other words, a technology to improve the reliability of the semiconductor device is required, and a bonding jig capable of achieving this technology is required.

[0014] Other issues and novel features will become clear from the description of this specification and the accompanying drawings.

[0015] Solutions to Problems

[0016] The outline of representative embodiments among the embodiments disclosed in this application will be briefly described as follows.

[0017] According to one embodiment, a joining fixture comprises: a top plate; a pressing member, an upper end of which is mounted on the top plate; a first thin plate, a second thin plate, a third thin plate and a fourth thin plate, the upper ends of which are mounted on the top plate in a manner that surrounds the pressing member when viewed from above; a cylindrical first supporting member, a side of which is mounted on the lower end of the first thin plate; a cylindrical second supporting member, a side of which is mounted on the lower end of the second thin plate; a cylindrical third supporting member, a side of which is mounted on the lower end of the third thin plate; and a cylindrical fourth supporting member, a side of which is mounted on the lower end of the fourth thin plate.

[0018] Furthermore, a bonding jig according to one embodiment includes: a top plate; a pressurizing member having an upper end attached to the top plate; and a support member surrounding the pressurizing member in a plan view. During sinter bonding of a semiconductor chip, the pressurizing member can pressurize the upper surface of the semiconductor chip while the four side surfaces of the semiconductor chip are in close contact with the support member.

[0019] In addition, according to one embodiment of a method for manufacturing a semiconductor device, it is implemented using a bonding fixture, which includes: a top plate; a pressure member, whose upper end is mounted on the top plate; a first thin plate, a second thin plate, a third thin plate and a fourth thin plate, whose upper ends are mounted on the top plate in a manner that surrounds the pressure member when viewed from above; a cylindrical first supporting member, whose side is mounted on the lower end of the first thin plate; a cylindrical second supporting member, whose side is mounted on the lower end of the second thin plate; a cylindrical third supporting member, whose side is mounted on the lower end of the third thin plate; and a cylindrical fourth supporting member, whose side is mounted on the lower end of the fourth thin plate. In addition, a method for manufacturing a semiconductor device comprises: (a) a step of preparing a semiconductor chip, the semiconductor chip having an upper surface, a lower surface on a side opposite to the upper surface, a first side surface and a second side surface opposite to each other in a first direction in a plan view, and a third side surface and a fourth side surface opposite to each other in a second direction intersecting the first direction in a plan view; (b) a step of providing a sintering material on a wiring substrate; (c) a step of mounting the semiconductor chip on the sintering material in a manner that the lower surface of the semiconductor chip contacts the sintering material; (d) a step of arranging the bonding jig above the semiconductor chip in a manner that the pressing member overlaps the semiconductor chip in a plan view after step (c); e) process, after the above-mentioned process (d), the joining fixture is brought close to the semiconductor chip, so that the first supporting member is in close contact with the first side surface and the wiring substrate, the second supporting member is in close contact with the second side surface and the wiring substrate, the third supporting member is in close contact with the third side surface and the wiring substrate, and the fourth supporting member is in close contact with the fourth side surface and the wiring substrate; and (f) process, after the above-mentioned process (e), the joining fixture is brought further close to the semiconductor chip, the upper surface of the semiconductor chip is pressurized by the pressing member, and the sintering material is heated, so as to form a sintering layer at least between the lower surface of the semiconductor chip and the wiring substrate.

[0020] Effects of the Invention

[0021] According to one embodiment, the reliability of a semiconductor device can be improved. In addition, a bonding jig capable of achieving improved reliability can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a cross-sectional view showing a bonding jig and a method for manufacturing a semiconductor device in the first embodiment.

[0023] Figure 2 It is a top view showing the bonding jig in the first embodiment.

[0024] Figure 3 It means next Figure 1 A cross-sectional view of a method for manufacturing a semiconductor device.

[0025] Figure 4 It is a plan view showing the method for manufacturing the semiconductor device in the first embodiment.

[0026] Figure 5 It means next Figure 4 A top view of a method for manufacturing a semiconductor device.

[0027] Figure 6 It is a plan view showing the main parts of the bonding jig in the second embodiment.

[0028] Figure 7 It is a cross-sectional view showing a bonding jig and a method for manufacturing a semiconductor device in a third embodiment.

[0029] Figure 8 It means next Figure 7 A cross-sectional view of a method for manufacturing a semiconductor device.

[0030] Figure 9 It is a cross-sectional view showing a bonding jig and a method for manufacturing a semiconductor device in a modification of the third embodiment.

[0031] Figure 10 It is a cross-sectional view showing a bonding jig and a method for manufacturing a semiconductor device in a fourth embodiment.

[0032] Figure 11 It means next Figure 10 A cross-sectional view of a method for manufacturing a semiconductor device. DETAILED DESCRIPTION

[0033] The following embodiments are described in detail based on the accompanying drawings. In all drawings used to illustrate the embodiments, components having the same functions are denoted by the same reference numerals, and their repeated descriptions are omitted. In the following embodiments, descriptions of identical or similar parts are generally not repeated unless otherwise required.

[0034] In addition, in the drawings describing the embodiments, hatching may be included in plan views, and hatching may be omitted in cross-sectional views to facilitate understanding of the structure.

[0035] In addition, the X direction, Y direction and Z direction described in the embodiment intersect (are orthogonal to) each other. In this application, the Z direction is described as the up-down direction, height direction or thickness direction of a certain structure. In addition, the surface formed by the X direction and the Y direction is a plane, which is a plane perpendicular to the Z direction. For example, in this application, when it is expressed as "looking down", it means observing the surface formed by the X direction and the Y direction from the Z direction.

[0036] (Implementation 1)

[0037] <Structure of the Joining Jig 100 >

[0038] use Figure 1 and Figure 2 Next, the bonding jig 100 according to Embodiment 1 is described. The bonding jig 100 is mainly used to suppress short circuits caused by the above-mentioned overflowing sintered material (sintered layer) falling off or climbing up.

[0039] like Figure 1 and Figure 2 As shown, the joining jig 100 includes a top plate 1 , a pressing member 2 , thin plates 31 to 34 , and supporting members 41 to 44 .

[0040] The upper end portion of the pressurizing member 2 and the upper end portions of the thin plates 31 to 34 are attached to the top plate 1. The thin plates 31 to 34 surround the top plate 1 in a plan view and are provided on all sides of the top plate 1.

[0041] Support members 41-44 are each cylindrical, with their respective side surfaces attached to the lower ends of the respective thin plates 31-34. It should be noted that the term "cylindrical" in this application encompasses both a true circular cylinder and an elliptical cylinder. That is, in a cross-sectional view perpendicular to the direction in which support members 41-44 extend, the shape of each support member 41-44 can be either a true circle or an ellipse.

[0042] In addition, if Figure 1 As shown in FIG. 1 , in the embodiment 1, the thin plates 31 to 34 are installed in a direction (Z direction) perpendicular to the top plate 1 in a cross-sectional view. In addition, the support members 41 to 44 are respectively arranged at a position lower than the pressurizing member 2. In other words, Figure 1 As shown by the dotted lines, the distance from the top plate 1 to the center 4a of each of the support members 41 to 44 is greater than the distance from the top plate 1 to the lower end of the press member 2. Therefore, during sinter bonding, the support members 41 to 44 can contact the semiconductor chip 5 before the press member 2.

[0043] like Figure 2As shown, thin plates 31 and 32 face each other in the X direction, and thin plates 33 and 34 face each other in the Y direction. Support members 41 and 42 extend in the Y direction, and support members 43 and 44 extend in the X direction.

[0044] As will be described later, during sinter bonding, the semiconductor chips are pressed by support members 41 and 44 using the deflection of thin plates 31 to 34. Therefore, in the X direction, the width of thin plates 31 and 32 is designed to be smaller than the width of support members 41 and 42, and in the Y direction, the width of thin plates 33 and 34 is designed to be smaller than the width of support members 43 and 44.

[0045] In addition, the top plate 1 and the pressure member 2 are made of, for example, a metal material or carbon. The thin plates 31 to 34 are made of a metal material having elasticity and high heat resistance. The support members 41 to 44 are made of a metal material or carbon having high heat resistance. When the support members 41 to 44 are made of a metal material, the metal material is made of a material that is difficult to react with the metal material contained in the sintered material 6a described later, and is made of a material that does not melt during heating during sintering and bonding, such as a precious metal material such as platinum (Pt). As a result, during sintering and bonding, the sintered material 6a and the support members 41 to 44 are prevented from reacting and bonding to each other.

[0046] <Method of Manufacturing Semiconductor Device 200>

[0047] Below, use Figure 1 、 Figures 3 to 5 The method for manufacturing the semiconductor device 200 in Embodiment 1 will be described. The above-described bonding jig 100 is used in the method for manufacturing the semiconductor device 200. The semiconductor device 200 is, for example, a semiconductor module (power module) mounted on a vehicle body of a railway vehicle or automobile.

[0048] like Figure 1 As shown, semiconductor device 200 includes a semiconductor chip 5 mounted on a wiring substrate 7. Wiring substrate 7 and semiconductor chip 5 are bonded by a sintered layer 6b formed by sintering a sintered material 6a. Furthermore, semiconductor chip 5 includes, for example, a semiconductor element such as a MOSFET or IGBT using a SiC substrate. Furthermore, semiconductor device 200 may also include other semiconductor chips and electronic components mounted on wiring substrate 7.

[0049] like Figure 1 、 Figure 4 and Figure 5As shown, semiconductor chip 5 has a top surface TS, a bottom surface BS opposite to top surface TS, side surfaces SS1 and SS2 opposing each other in the X direction, and side surfaces SS3 and SS4 opposing each other in the Y direction.

[0050] The sintering material 6a is a paste-like bonding material containing a metal material and a solvent. The metal material is nanometer- to micrometer-sized metal particles (metal powder), such as copper (Cu) or silver (Ag). Furthermore, during sintering, the solvent contained in the sintering material 6a disappears due to heating. Thus, after sintering, a sintered layer 6b composed of the metal material is formed between the wiring substrate 7 and the semiconductor chip 5.

[0051] Hereinafter, each step included in the method for manufacturing the semiconductor device 200 will be described.

[0052] First, if Figure 1 As shown, a semiconductor chip 5 is prepared and a sintering material 6a is provided on a wiring substrate 7. Then, the semiconductor chip 5 is mounted on the sintering material 6a so that the lower surface BS of the semiconductor chip 5 contacts the sintering material 6a.

[0053] Next, the bonding jig 100 is placed above the semiconductor chip 5 so that the pressing member 2 overlaps with the semiconductor chip 5 in a plan view.

[0054] In the first embodiment, support members 41 to 44 are positioned so as to overlap with side surfaces SS1 to SS4 of semiconductor chip 5, as viewed from above. In other words, the halves (semi-cylinders) of support members 41 to 44, which are located on the side of pressurizing member 2, are positioned so as to overlap with side surfaces SS1 to SS4 of semiconductor chip 5, as viewed from above. Furthermore, in other words, the curved surfaces of the side surfaces of each of support members 41 to 44, including the first quarter point 4b, which is the lowest end, and the second quarter point 4c, which is located on the side of pressurizing member 2, are positioned directly above side surfaces SS1 to SS4, as viewed from above.

[0055] Then, if Figure 3 As shown, the bonding jig 100 is pressed down and brought close to the semiconductor chip 5 , whereby the supporting members 41 to 44 are brought into close contact with the side surfaces SS1 to SS4 of the semiconductor chip 5 and the wiring substrate 7 , respectively.

[0056] In the first embodiment, the bonding jig 100 is first brought close to the semiconductor chip 5, causing the half (semi-cylinder) of the support members 41-44, which are on the side of the pressurizing member 2, to contact the semiconductor chip 5. Specifically, the curved surfaces of the support members 41-44 (the curved surfaces including the first and second quarter points 4b, 4c) are brought into contact with the semiconductor chip 5. Since the support members 41-44 are positioned lower than the pressurizing member 2, they contact the semiconductor chip 5 before the pressurizing member 2.

[0057] Next, by bringing the bonding jig 100 closer to the semiconductor chip 5, the thin plates 31-34 bend, and the support members 41-44 come into close contact with the side surfaces SS1-SS4, respectively. Specifically, as the bonding jig 100 approaches the semiconductor chip 5, a force is applied to the support members 41-44, pushing them outward from the semiconductor chip 5, along their respective curved surfaces. This deflection of the thin plates 31-34 causes them to act like leaf springs, exerting pressure from the support members 41-44 toward the semiconductor chip 5.

[0058] Next, by bringing the bonding jig 100 closer to the semiconductor chip 5, the thin plates 31 to 34 are bent, and the support members 41 to 44 are brought into close contact with the wiring substrate 7. Here, while the pressure from the support members 41 to 44 due to the bending of the thin plates 31 to 34 is applied to the semiconductor chip 5, the support members 41 to 44 are in close contact with the wiring substrate 7.

[0059] Next, sinter bonding is performed. The bonding jig 100 is brought closer to the semiconductor chip 5, and while the upper surface TS of the semiconductor chip 5 is pressed by the pressurizing member 2, the sintering material 6a is heated. This heating process is performed, for example, at a temperature between 300°C and 400°C. This forms a sintered layer 6b between at least the lower surface BS of the semiconductor chip 5 and the wiring substrate 7. The sintered layer 6b is composed of the metal material contained in the sintering material 6a.

[0060] Thus, according to the first embodiment, during sinter bonding of the semiconductor chip 5, the top surface TS of the semiconductor chip 5 can be pressurized by the pressurizing member 2 while the four side surfaces SS1 to SS4 of the semiconductor chip 5 are in close contact with the supporting members 41 to 44. This forms the sintered layer 6 b over the entire bottom surface BS of the semiconductor chip 5, thereby suppressing a reduction in heat dissipation due to insufficient expansion of the sintered material 6 a.

[0061] The cross-sectional radius of each of the support members 41 to 44 is larger than the thickness T1 of the sintered layer 6b and smaller than the sum of the thickness T1 of the sintered layer 6b and the thickness T2 of the semiconductor chip 5. Therefore, during sinter bonding, the support members 41 to 44 remain in close contact with the side surfaces SS1 to SS4.

[0062] The sintered layer 6b overflows from the bottom surface BS of the semiconductor chip 5 and is also formed on part or all of the side surfaces SS1, SS2, SS3, or SS4. In other words, the sintered layer 6b is formed so as to rise toward the top surface TS of the semiconductor chip 5. However, since the support members 41 to 44 are in close contact with the side surfaces SS1 to SS4, the sintered layer 6b is prevented from reaching the top surface TS by the support members 41 to 44.

[0063] Therefore, by using the bonding jig 100 according to the first embodiment, it is possible to suppress a problem such as a short circuit between the wiring substrate 7 and the upper surface TS of the semiconductor chip, and to improve the reliability of the semiconductor device 200 .

[0064] The cross section of the end of sintered layer 6b is rounded, following the side surfaces of support members 41 to 44. In other words, the cross section of sintered layer 6b extending from bottom surface BS forms a tapered shape with a skirt that widens, with the thickness of sintered layer 6b decreasing as it moves away from side surfaces SS1 to SS4.

[0065] For example, when forming sintered layer 6b, wiring substrate 7 may warp. In this case, if the ends of sintered layer 6b are angled, stress from sintered layer 6b may concentrate at the angled ends, potentially reducing the bonding strength of sintered layer 6b. As described above, the ends of sintered layer 6b are tapered with an expanding skirt, thereby alleviating stress concentration and suppressing this possibility.

[0066] Below, use Figure 4 and Figure 5 Next, a description will be given of a minute positional error when the semiconductor chip 5 is mounted on the sintered material 6a.

[0067] The semiconductor chip 5 is ideally mounted on the sintered material 6 a without positional error. However, the position of the semiconductor chip 5 may deviate slightly. For example, the position of the semiconductor chip 5 may deviate by approximately ±1 mm from the design value.

[0068] However, if such positional error is within the range of overlap with the curved surfaces of the support members 41 to 44 (including the curved surfaces of the first and second quarter points 4b and 4c), the position of the semiconductor chip 5 can be corrected to the normal position by utilizing the deflection of the thin plates 31 to 34. Figure 4As shown, when the position of the semiconductor chip 5 is shifted, initially only a portion of the support members 41 to 44 contacts the side surfaces SS1 to SS4 of the semiconductor chip 5, but eventually Figure 5 As shown by the black arrows in FIG. 5 , pressure is applied from the support members 41 to 44 to the side surfaces SS1 to SS4 , and the positions of the semiconductor chips 5 are corrected to normal positions.

[0069] As described above, by using the bonding jig 100 according to the first embodiment, the semiconductor chip 5 can be sinter-bonded regardless of the presence or absence of positional error of the semiconductor chip 5 .

[0070] Furthermore, support members 41-44 are made of a material that is unlikely to react with the metal material included in sintered material 6a, and are made of a highly heat-resistant metal material or carbon. However, support members 41-44 may also be made of materials other than metal or carbon. For example, support members 41-44 may be made of a highly heat-resistant elastomer. Such an elastomer has a higher melting point than the metal material included in sintered material 6a, and may be, for example, rubber.

[0071] (Implementation Method 2)

[0072] Below, use Figure 6 The bonding jig 100 in the second embodiment will be described. In the following, the differences from the first embodiment will be mainly described.

[0073] In the second embodiment, four supporting members (fifth to eighth supporting members) are provided in regions corresponding to the four corners of the semiconductor chip 5, and thin plates (fifth to eighth thin plates) are attached to the four supporting members, respectively. Figure 6 , a case where the fifth thin plate 35 and the fifth supporting member 45 are provided in a region corresponding to one corner of the semiconductor chip 5 is shown.

[0074] Specifically, joining jig 100 further includes a fifth thin plate 35, the upper end of which is attached to top plate 1 at a location adjacent to thin plate 31 and thin plate 33, and a cylindrical fifth support member 45, the side of which is attached to the lower end of fifth thin plate 35. Furthermore, although not shown here, sixth to eighth thin plates, such as fifth thin plate 35, and sixth to eighth support members, such as fifth support member 45, are also provided at locations adjacent to thin plate 32 and thin plate 33, at locations adjacent to thin plate 33 and thin plate 34, and at locations adjacent to thin plate 31 and thin plate 34.

[0075] The fifth supporting member 45 and the sixth to eighth supporting members are each L-shaped cylindrical bodies, each formed by combining a first cylindrical body extending in the Y direction and a second cylindrical body extending in the X direction. The first and second cylindrical bodies are each beveled cylindrical bodies, and the combination of the two beveled cylindrical bodies forms the fifth supporting member 45 and the sixth to eighth supporting members.

[0076] The orientation of the fifth thin plate 35 is different from the orientation of thin plate 31 and thin plate 33, and is tilted 45 degrees relative to the orientation of thin plate 31 and thin plate 33. Similarly, the orientation of the sixth thin plate is different from the orientation of thin plate 32 and thin plate 33, and is tilted 45 degrees relative to the orientation of thin plate 32 and thin plate 33. The orientation of the seventh thin plate is different from the orientation of thin plate 33 and thin plate 34, and is tilted 45 degrees relative to the orientation of thin plate 33 and thin plate 34. The orientation of the eighth thin plate is different from the orientation of thin plate 31 and thin plate 34, and is tilted 45 degrees relative to the orientation of thin plate 31 and thin plate 34.

[0077] During sintering and bonding, the bonding jig 100 is brought close to the semiconductor chip 5, causing the fifth thin plate 35 and the sixth to eighth thin plates to bend, and the fifth supporting member 45 and the sixth to eighth supporting members to be in close contact with the side surfaces SS1 to SS4, respectively. Then, the bonding jig 100 is brought further close to the semiconductor chip 5, causing the fifth thin plate 35 and the sixth to eighth thin plates to bend, and the fifth supporting member 45 and the sixth to eighth supporting members to be in close contact with the wiring substrate 7, respectively. Figure 6 As shown by the black arrows, pressure is applied to the semiconductor chip 5 from the fifth supporting member 45 and the sixth to eighth supporting members.

[0078] When only support members 41 to 44 are provided as in the first embodiment, there is a possibility that sintered material 6a may overflow from the corners of semiconductor chip 5. In the second embodiment, fifth support member 45, sixth to eighth support members, fifth thin plate 35, and sixth to eighth thin plates are provided in areas corresponding to the corners of semiconductor chip 5. This further reduces the possibility that sintered material 6a may overflow from the corners of semiconductor chip 5 and cause a short circuit between wiring substrate 7 and top surface TS of semiconductor chip 5.

[0079] (Implementation 3)

[0080] Below, use Figure 7 and Figure 8 Next, a method for manufacturing the bonding jig 100 and the semiconductor device 200 in the third embodiment will be described. Hereinafter, differences from the first embodiment will be mainly described.

[0081] In the first embodiment, the thin plates 31 to 34 are installed in a direction (Z direction) perpendicular to the top plate 1 in a cross-sectional view. Figure 7 As shown, in cross-sectional view, the thin plates 31 to 34 are inclined from a direction perpendicular to the top plate 1. That is, the lower end of each thin plate 31 to 34 is located closer to the pressurizing member 2 than the upper end of each thin plate 31 to 34.

[0082] During sinter bonding, the bonding jig 100 is positioned above the semiconductor chip 5 so that the pressurizing member 2 overlaps the semiconductor chip 5 when viewed from above. In the third embodiment, the support members 41 to 44 do not overlap the semiconductor chip 5 when viewed from above. In other words, the support members 41 to 44 are positioned away from directly above the side surfaces SS1 to SS4.

[0083] like Figure 8 As shown, by bringing the bonding jig 100 closer to the semiconductor chip 5, the support members 41-44 first come into close contact with the wiring substrate 7, causing the thin plates 31-34 to bend. Next, by bringing the bonding jig 100 closer to the semiconductor chip 5, the thin plates 31-34 bend, and the support members 41-44 come into close contact with the side surfaces SS1-SS4, respectively. Pressure from the support members 41-44, caused by the deflection of the thin plates 31-34, then acts on the semiconductor chip 5.

[0084] Thus, in the third embodiment, support members 41 to 44 are positioned closer to the outside of semiconductor chip 5. Therefore, in areas where multiple semiconductor chips 5 are densely packed, the bonding jig 100 of the third embodiment is oriented differently from that of the first embodiment. However, the bonding jig 100 of the third embodiment has the advantage of being able to apply stronger pressure to the semiconductor chips 5 than the first embodiment. Therefore, when the spacing between multiple semiconductor chips 5 is sufficiently wide, the use of the bonding jig 100 of the third embodiment can further improve the reliability of the semiconductor device 200.

[0085] Furthermore, the technology disclosed in the second embodiment and the technology disclosed in the third embodiment can also be combined.

[0086] (Variation)

[0087] Figure 9 A joining jig 100 according to a modified example of the third embodiment is shown.

[0088] In the third embodiment, the thin plates 31 to 34 are flat plates, but Figure 9 As in the modified example shown, the thin plates 31 to 34 may be curved plates in a pre-bent state. In other words, the thin plates 31 to 34 may be curved in cross-section.

[0089] The thin plates 31 to 34 in such a modified example can also be used in the same manner as the thin plates 31 to 34 in the third embodiment.

[0090] (Implementation 4)

[0091] Below, use Figure 10 and Figure 11 Next, a method for manufacturing the bonding jig 100 and the semiconductor device 200 in the fourth embodiment will be described. Hereinafter, differences from the third embodiment will be mainly described.

[0092] In embodiment 4, Figure 10 As shown, four elastic bodies are used instead of the four sets of thin plates 31 to 34 and supporting members 41 to 44. Figure 10 The elastic body 81 shown corresponds to the thin plate 31 and the supporting member 41, and the elastic body 82 corresponds to the thin plate 32 and the supporting member 42. Although not shown, the joining jig 100 in the fourth embodiment further includes an elastic body corresponding to the thin plate 33 and the supporting member 43, and an elastic body corresponding to the thin plate 34 and the supporting member 44. Such an elastic body has a higher melting point than the metal material included in the sintered material 6a, and is, for example, rubber.

[0093] In addition, the upper end portion of each of the four elastic bodies is attached to the top plate 1. The lower end portion of each of the four elastic bodies has a semi-cylindrical shape corresponding to the shape of the support members 41 to 44.

[0094] During sinter bonding, the bonding jig 100 is positioned above the semiconductor chip 5 so that the pressurizing member 2 overlaps the semiconductor chip 5 when viewed from above. In the fourth embodiment, the four elastic bodies do not overlap the semiconductor chip 5 when viewed from above. In other words, the four elastic bodies are positioned away from and directly above the side surfaces SS1 to SS4.

[0095] like Figure 11 As shown, by bringing the bonding jig 100 closer to the semiconductor chip 5, the four elastic bodies first come into close contact with the wiring substrate 7, causing the four elastic bodies to bend. Next, by bringing the bonding jig 100 closer to the semiconductor chip 5, the four elastic bodies are bent while coming into close contact with the side surfaces SS1 to SS4, respectively. Furthermore, pressure from the four elastic bodies is applied to the semiconductor chip 5.

[0096] In the fourth embodiment, the use of such an elastic body can simplify the structure of the joining jig 100. However, the use of an elastic body may reduce the reliability under high temperature conditions over a long period of time compared to the metal material constituting the supporting members 41 to 44. Therefore, in such a case, it is preferable to apply the technology of the third embodiment described above.

[0097] As mentioned above, although this invention was demonstrated concretely based on embodiment, this invention is not limited to the said embodiment, Various changes are possible within the range which does not deviate from the summary.

[0098] In addition, part of the contents described in the above-mentioned embodiment is described below.

[0099] Note 1.

[0100] A method for manufacturing a semiconductor device uses a bonding jig having:

[0101] roof;

[0102] a pressurizing member, an upper end portion of which is mounted on the top plate; and

[0103] The first elastic body, the second elastic body, the third elastic body, and the fourth elastic body have their upper ends mounted on the top plate in a manner of surrounding the pressurizing member in a plan view.

[0104] The lower end of each of the first elastic body, the second elastic body, the third elastic body, and the fourth elastic body is located closer to the pressurizing member than the upper end of each of the first elastic body, the second elastic body, the third elastic body, and the fourth elastic body.

[0105] The method for manufacturing a semiconductor device comprises:

[0106] (a) step of preparing a semiconductor chip having: an upper surface; a lower surface opposite to the upper surface; a first side surface and a second side surface opposing each other in a first direction in a plan view; and a third side surface and a fourth side surface opposing each other in a second direction intersecting the first direction in a plan view;

[0107] (b) step of providing a sintering material on a wiring substrate;

[0108] (c) step of mounting the semiconductor chip on the sintered material in such a manner that the lower surface of the semiconductor chip contacts the sintered material;

[0109] (d) a step of, after the step (c), arranging the bonding jig above the semiconductor chip so that the pressing member overlaps the semiconductor chip in a plan view;

[0110] (e) step, after step (d), bringing the bonding jig close to the semiconductor chip so that the first elastic body is in close contact with the first side surface and the wiring substrate, the second elastic body is in close contact with the second side surface and the wiring substrate, the third elastic body is in close contact with the third side surface and the wiring substrate, and the fourth elastic body is in close contact with the fourth side surface and the wiring substrate; and

[0111] (f) process, after the (e) process, the bonding fixture is brought closer to the semiconductor chip, the upper surface of the semiconductor chip is pressurized by the pressurizing member, and the sintered material is heated, thereby forming a sintered layer at least between the lower surface of the semiconductor chip and the wiring substrate.

[0112] Note 2.

[0113] The method for manufacturing a semiconductor device according to Supplementary Note 1, wherein:

[0114] In the step (f), the sintered layer overflows from the lower surface and is also formed on a portion or all of the first side surface, the second side surface, the third side surface, or the fourth side surface.

[0115] The cross section of the sintered layer overflowing from the lower surface has a tapered shape with a skirt expanding such that the thickness of the sintered layer decreases as it moves away from the first side surface, the second side surface, the third side surface, or the fourth side surface.

[0116] Note 3.

[0117] The method for manufacturing a semiconductor device according to Supplementary Note 1, wherein:

[0118] The (e) step comprises:

[0119] (e6) step of bringing the bonding jig close to the semiconductor chip so that the first elastic body is in close contact with the wiring substrate, the second elastic body is in close contact with the wiring substrate, the third elastic body is in close contact with the wiring substrate, and the fourth elastic body is in close contact with the wiring substrate; and

[0120] (e7) process, after the process (e6), the bonding fixture is brought closer to the semiconductor chip, so that the first elastomer is bent while being in close contact with the first side surface, the second elastomer is bent while being in close contact with the second side surface, the third elastomer is bent while being in close contact with the third side surface, and the fourth elastomer is bent while being in close contact with the fourth side surface.

[0121] Note 4.

[0122] The method for manufacturing a semiconductor device according to Supplementary Note 1, wherein:

[0123] The first elastic body, the second elastic body, the third elastic body, and the fourth elastic body are each made of a material having a higher melting point than a metal material included in the sintered material.

[0124] Note 5.

[0125] A joining jig comprising:

[0126] roof;

[0127] a pressurizing member, an upper end portion of which is mounted on the top plate; and

[0128] The first elastic body, the second elastic body, the third elastic body, and the fourth elastic body have their upper ends mounted on the top plate in a manner of surrounding the pressurizing member in a plan view.

[0129] The lower end portion of each of the first elastic body, the second elastic body, the third elastic body, and the fourth elastic body is located closer to the pressurizing member than the upper end portion of each of the first elastic body, the second elastic body, the third elastic body, and the fourth elastic body.

[0130] Explanation of symbols

[0131] 1—top plate; 2—pressing member; 4a—center; 4b, 4c—quarter circle points; 5—semiconductor chip; 6a—sintering material; 6b—sintering layer; 7—wiring substrate; 31 to 35—thin plate; 41 to 45—supporting members; 81, 82—elastomer; 100—joining fixture; 200—semiconductor device; BS—lower surface of semiconductor chip; SS1 to SS4—side surfaces of semiconductor chip; TS—upper surface of semiconductor chip.

Claims

1. A joining jig, characterized in that: have: roof; a pressurizing member, the upper end of which is mounted on the top plate; The first thin plate, the second thin plate, the third thin plate, and the fourth thin plate, the upper ends of which are mounted on the top plate in a manner so as to surround the pressurizing member when viewed from above; a first cylindrical supporting member, the side surface of which is mounted on the lower end portion of the first thin plate; a cylindrical second supporting member, the side surface of which is mounted on the lower end portion of the second thin plate; a cylindrical third supporting member, the side surface of which is mounted on the lower end portion of the third thin plate; as well as A cylindrical fourth supporting member, the side surface of which is mounted on the lower end portion of the fourth thin plate, The first supporting member, the second supporting member, the third supporting member, and the fourth supporting member completely surround the pressurizing member in a plan view. During sinter bonding of the semiconductor chip, the upper surface of the semiconductor chip can be pressurized by the pressurizing member while the four side surfaces of the semiconductor chip are in close contact with the first, second, third, and fourth supporting members.

2. The joining jig according to claim 1, wherein The first thin plate and the second thin plate are opposite to each other in a first direction in a plan view, The third thin plate and the fourth thin plate are opposite to each other in a second direction intersecting the first direction in a plan view. The first supporting member and the second supporting member extend in the second direction, The third supporting member and the fourth supporting member extend in the first direction.

3. The joining jig according to claim 2, wherein: Also features: a fifth thin plate, at a position adjacent to the first thin plate and the third thin plate, with an upper end portion mounted on the top plate; a sixth thin plate, at a position adjacent to the second thin plate and the third thin plate, with an upper end portion mounted on the top plate; a seventh thin plate, at a position adjacent to the third thin plate and the fourth thin plate, with an upper end portion mounted on the top plate; an eighth thin plate, at a position adjacent to the first thin plate and the fourth thin plate, with an upper end portion mounted on the top plate; a cylindrical fifth supporting member, the side surface of which is mounted on the lower end portion of the fifth thin plate; a cylindrical sixth supporting member, the side surface of which is mounted on the lower end portion of the sixth thin plate; a seventh cylindrical supporting member, the side surface of which is mounted on the lower end portion of the seventh thin plate; as well as The eighth cylindrical supporting member has its side surface mounted on the lower end of the eighth thin plate. The orientation of the fifth thin plate is different from the orientation of the first thin plate and the orientation of the third thin plate, The orientation of the sixth thin plate is different from the orientation of the second thin plate and the orientation of the third thin plate, The orientation of the seventh thin plate is different from the orientation of the third thin plate and the orientation of the fourth thin plate, The orientation of the eighth thin plate is different from the orientations of the first thin plate and the fourth thin plate.

4. The joining jig according to claim 3, wherein: The fifth supporting member, the sixth supporting member, the seventh supporting member, and the eighth supporting member are respectively connected cylinders formed by connecting a first cylinder extending in the first direction and a second cylinder extending in the second direction.

5. The joining jig according to claim 1, wherein The lower end portion of each of the first thin plate, the second thin plate, the third thin plate, and the fourth thin plate is located closer to the pressurizing member than the upper end portion of each of the first thin plate, the second thin plate, the third thin plate, and the fourth thin plate.

6. The joining jig according to claim 1, wherein In cross-sectional view, a distance from the top plate to the center of the first, second, third, or fourth supporting member is greater than a distance from the top plate to the lower end of the pressurizing member.

7. A joining jig, characterized in that: have: roof; a pressurizing member, an upper end portion of which is mounted on the top plate; and a supporting member which completely surrounds the pressurizing member in a plan view, During sinter bonding of the semiconductor chip, the upper surface of the semiconductor chip can be pressurized by the pressurizing member in a state where the four side surfaces of the semiconductor chip are in close contact with the supporting member.

8. A method for manufacturing a semiconductor device, comprising using a bonding jig comprising: roof; a pressurizing member, the upper end of which is mounted on the top plate; The first thin plate, the second thin plate, the third thin plate, and the fourth thin plate, the upper ends of which are mounted on the top plate in a manner so as to surround the pressurizing member when viewed from above; a first cylindrical supporting member, the side surface of which is mounted on the lower end portion of the first thin plate; a cylindrical second supporting member, the side surface of which is mounted on the lower end portion of the second thin plate; a cylindrical third supporting member, the side surface of which is mounted on the lower end portion of the third thin plate; as well as A cylindrical fourth supporting member, the side surface of which is mounted on the lower end portion of the fourth thin plate, The first supporting member, the second supporting member, the third supporting member, and the fourth supporting member completely surround the pressurizing member in a plan view. During sinter bonding of the semiconductor chip, the upper surface of the semiconductor chip can be pressurized by the pressurizing member while the four side surfaces of the semiconductor chip are in close contact with the first supporting member, the second supporting member, the third supporting member, and the fourth supporting member. The method for manufacturing a semiconductor device is characterized by comprising: (a) step of preparing a semiconductor chip having an upper surface, a lower surface opposite to the upper surface, a first side surface and a second side surface opposing each other in a first direction in a plan view, and a third side surface and a fourth side surface opposing each other in a second direction intersecting the first direction in a plan view; (b) step of providing a sintering material on a wiring substrate; (c) step of mounting the semiconductor chip on the sintered material in such a manner that the lower surface of the semiconductor chip contacts the sintered material; (d) a step of, after the step (c), arranging the bonding jig above the semiconductor chip so that the pressing member overlaps the semiconductor chip in a plan view; (e) step, after step (d), bringing the bonding jig close to the semiconductor chip so that the first supporting member is in close contact with the first side surface and the wiring substrate, the second supporting member is in close contact with the second side surface and the wiring substrate, the third supporting member is in close contact with the third side surface and the wiring substrate, and the fourth supporting member is in close contact with the fourth side surface and the wiring substrate; and (f) process, after the (e) process, the bonding fixture is brought closer to the semiconductor chip, the upper surface of the semiconductor chip is pressurized by the pressurizing member, and the sintered material is heated, thereby forming a sintered layer at least between the lower surface of the semiconductor chip and the wiring substrate.

9. The method for manufacturing a semiconductor device according to claim 8, wherein: In the step (f), the sintered layer overflows from the lower surface and is also formed on a portion or all of the first side surface, the second side surface, the third side surface, or the fourth side surface. The cross section of the sintered layer overflowing from the lower surface forms a tapered shape with an expanding skirt such that a thickness of the sintered layer decreases as it moves away from the first side surface, the second side surface, the third side surface, or the fourth side surface.

10. The method for manufacturing a semiconductor device according to claim 8, wherein: In the (d) step, the curved surfaces including the first quarter point which becomes the lowest end and the second quarter point located on the side of the pressurizing member in the side surfaces of each of the first supporting member, the second supporting member, the third supporting member and the fourth supporting member are located directly above the first side surface, the second side surface, the third side surface and the fourth side surface, respectively.

11. The method for manufacturing a semiconductor device according to claim 10, wherein: The (e) step comprises: (e1) step of bringing the bonding jig close to the semiconductor chip so that the curved surfaces of the first supporting member, the second supporting member, the third supporting member, and the fourth supporting member come into contact with the semiconductor chip; (e2) step, after step (e1), bringing the bonding jig closer to the semiconductor chip, thereby bending the first thin plate while bringing the first supporting member into close contact with the first side surface, bending the second thin plate while bringing the second supporting member into close contact with the second side surface, bending the third thin plate while bringing the third supporting member into close contact with the third side surface, and bending the fourth thin plate while bringing the fourth supporting member into close contact with the fourth side surface; and (e3) process, after the (e2) process, the bonding fixture is brought closer to the semiconductor chip, so that the first thin plate is bent while the first supporting member is in close contact with the wiring substrate, the second thin plate is bent while the second supporting member is in close contact with the wiring substrate, the third thin plate is bent while the third supporting member is in close contact with the wiring substrate, and the fourth thin plate is bent while the fourth supporting member is in close contact with the wiring substrate.

12. The method for manufacturing a semiconductor device according to claim 8, wherein: The lower end of each of the first thin plate, the second thin plate, the third thin plate, and the fourth thin plate is located closer to the pressurizing member than the upper end of each of the first thin plate, the second thin plate, the third thin plate, and the fourth thin plate. In the step (d), the first supporting member, the second supporting member, the third supporting member, and the fourth supporting member are located away from directly above the first side surface, the second side surface, the third side surface, and the fourth side surface.

13. The method for manufacturing a semiconductor device according to claim 12, wherein: The (e) step comprises: (e4) step of bringing the bonding jig close to the semiconductor chip so that the first supporting member is in close contact with the wiring substrate, the second supporting member is in close contact with the wiring substrate, the third supporting member is in close contact with the wiring substrate, and the fourth supporting member is in close contact with the wiring substrate; and (e5) process, after the (e4) process, the bonding fixture is brought closer to the semiconductor chip, so that the first thin plate is bent while the first supporting member is in close contact with the first side surface, the second thin plate is bent while the second supporting member is in close contact with the second side surface, the third thin plate is bent while the third supporting member is in close contact with the third side surface, and the fourth thin plate is bent while the fourth supporting member is in close contact with the fourth side surface.

14. The method for manufacturing a semiconductor device according to claim 8, wherein: A radius of each of the first, second, third, and fourth supporting members in a cross-sectional view is larger than the thickness of the sintered layer and smaller than the sum of the thickness of the sintered layer and the thickness of the semiconductor chip.

15. The method for manufacturing a semiconductor device according to claim 8, wherein: The first supporting member, the second supporting member, the third supporting member, and the fourth supporting member are each made of a material that is not melted by the heating of the sintered material in the step (f).

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