A method for forming a semiconductor structure and a semiconductor structure

Abstract

The application discloses a semiconductor structure forming method and a semiconductor structure. The method comprises the following steps: providing a substrate, the substrate is provided with a dielectric layer, the dielectric layer has a plurality of holes, and the holes are filled with bottom anti-reflective layers; a first etching gas is provided to etch the bottom anti-reflective layers in the holes, and the etching time is recorded as t1; after the first etching gas is provided, a second etching gas and / or a third etching gas are provided to clean and etch the bottom of the holes; the etching time of the second etching gas for cleaning the holes is recorded as t2; the etching time of the third etching gas for cleaning the holes is recorded as t3; wherein t1, t2 and t3 are adjusted according to the specific hole etching condition, t1>0, t2>=0, t3>=0, and t2 and t3 are not zero at the same time. The application is improved on the basis of the traditional BARC etching process, the BARC hole bottom is etched clean by combining high conductance and using different steps, the upper PR CD is maintained, and the dielectric layer loss is reduced as much as possible.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a forming method of semiconductor structure and semiconductor structure. BACKGROUND

[0002] Under the continuous driving of Moore's law, the technology node of semiconductor is rapidly advancing to the node below 10nm. The plasma etching process is one of the important technical links restricting its development, among which the bottom anti-reflective layer (BARC) under the photoresist and the corresponding plasma etching process is one of the important steps to realize small size, because it is a common way to realize regional selectivity process such as ion implantation. BARC can absorb the light reflected by the photoresist film and the wafer surface during exposure, effectively suppress the standing wave effect and prevent multiple exposure of photoresist. In the etching of increasingly shrinking critical dimension (CD), especially below 3nm technology node, the requirement for small hole etching is getting higher and higher. For example, in the small hole etching of BARC, at the 3nm technology node, the BARC in the small hole (below 10nm) will be easily left at the bottom of the hole (such as Figure 1 the right figure, the small CD hole is not easy to etch clean), which affects the subsequent steps. Therefore, the research on the small hole etching of BARC aims to improve the ability to remove BARC in small CD. At the same time, in the process design, in addition to enhancing the etching ability in small hole, it also needs to consider the reduction of dielectric loss above, sidewall and bottom of the hole, and the requirement that the PR on the top should maintain the original CD after etching, etc. SUMMARY

[0003] The purpose of the present application is to solve the problem of how to balance the BARC etching removal in small hole below 3nm technology node (diameter less than 10nm), hole without residue, less dielectric loss and PR CD as little expansion as possible.

[0004] In order to achieve the above purpose, the present application provides a forming method of semiconductor structure, which is carried out in a vacuum reaction chamber, the method comprises:

[0005] providing a substrate, the substrate is provided with a dielectric layer, the dielectric layer has a plurality of holes, the holes are filled with a bottom anti-reflective layer, and the top of the sidewall of the hole is provided with a photoresist layer;

[0006] providing a first etching gas to etch the bottom anti-reflective layer in the hole to maintain low dielectric loss and inhibit the expansion of the critical dimension of the photoresist layer, and the etching time is t1; the first etching gas comprises: a mixed gas of N2 / O2;

[0007] After the first etching gas is provided, a second etching gas and / or a third etching gas are provided to clean and etch the bottom of the hole, the second etching gas comprising O2, and the third etching gas comprising CO2 / O2 mixed gas.

[0008] The etching time of the second etching gas for cleaning the hole is denoted as t2.

[0009] The etching time of the third etching gas for cleaning the hole is denoted as t3; wherein t1, t2, and t3 are adjusted according to the specific hole etching condition, t1>0, t2≥0, and t3≥0, and t2 and t3 are not zero at the same time.

[0010] Optionally, the hole refers to a small-size hole with a diameter less than 10 nm.

[0011] Optionally, the etching process condition of the first etching gas is that the radio frequency is 2 MHz-60 MHz, the pressure is 10-30 mtorr, and the radio frequency power is 100-250 W.

[0012] Optionally, in the first etching gas, the volume ratio of N2 to O2 is 11:1-15:1.

[0013] Optionally, in the first etching gas, the total flow rate of N2 and O2 is >600 sccm.

[0014] Optionally, in the first etching gas, the flow rate of N2 is >500 sccm, and the flow rate of O2 is 10-90 sccm.

[0015] Optionally, the etching process condition of the second etching gas is that the radio frequency is 2 MHz-60 MHz, the pressure is 10-30 mtorr, the radio frequency power is 20-75 W, and the bias power is 0-25 W.

[0016] Optionally, in the second etching gas, the flow rate of O2 is >600 sccm.

[0017] Optionally, the etching process condition of the third etching gas comprises that the radio frequency is 2 MHz-60 MHz, the pressure is 10-30 mtorr, the radio frequency power is 100-300 W, and the bias power is 0-100 W.

[0018] Optionally, in the third etching gas, the volume ratio of CO2 to O2 is 4:1-8:1.

[0019] Optionally, in the third etching gas, the total flow rate of CO2 / O2 is >400 sccm.

[0020] Optionally, the flow rate of CO2 in the third etching gas is >350sccm; and the flow rate of O2 is 10sccm~90sccm.

[0021] Optionally, the vacuum reaction chamber is a vacuum reaction chamber of an inductively coupled plasma etching device or a capacitively coupled plasma etching device, and the vacuum reaction chamber is a plasma environment.

[0022] Optionally, the plasma etching comprises continuous plasma etching or pulsed plasma etching.

[0023] The application also provides a semiconductor structure formed by the method.

[0024] The application has the following advantages:

[0025] The small hole etching method provided by the application comprises multi-step BARC etching of different gas combinations, the first etching gas is used to etch most of the BARC in the hole, and low dielectric layer loss is maintained, and the expansion of the critical dimension of the photoresist layer is inhibited; and the etching time of the second etching gas or / and the third etching gas is controlled according to the actual situation in the hole, so that the ability of removing the small hole BARC, the effect of reducing the dielectric layer loss and maintaining the PR CD are achieved at the same time. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 It is a schematic diagram of the small hole etching state of the prior art.

[0027] Figure 2a It is a schematic diagram of the etching state in a plasma reaction chamber. Figure 2b It is a schematic diagram of the gas flow pumping in and pumping out of the small hole.

[0028] Figure 3 It is a transmission electron microscope (TEM) diagram of the small hole etching based on the combination of three gases under the condition of high flow conductance.

[0029] Figure 4 It is a curve diagram of the dissociation rate of N2, N2 + , CO2 and O2 gas and temperature.

[0030] Figure 5 It is a flow chart of a semiconductor forming method of the application.

[0031] Figure 6 It is a schematic diagram of the etching state after two routes represented by example 1 and example 2.

[0032] IDENTIFICATION OF DRAWINGS

[0033] Plasma chamber 10, gas inlet 11, gas outlet 12, wafer 20, plasma 31, etching gas product 32, substrate 01, dielectric layer 1, dielectric layer loss 1', PR photoresist layer 2, via 3, BARC layer 3'. Detailed Implementation

[0034] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0035] In the description of this invention, it should be noted that the terms "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0036] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0037] like Figure 2a The diagram shows an etching process within a plasma reaction chamber 10. The plasma chamber 10 has a gas inlet 11 and a gas outlet 12, through which etching gas is pumped in and out via a vacuum pump, along with etching gas products. The pumped-in etching gas dissociates into plasma 31 within the chamber, reacting with the BARC layer within the small holes to be etched on the wafer 20. The resulting etching gas products 32 are then pumped out of the plasma chamber 10.

[0038] In the etching of small hole 3, such as Figure 2b As shown, V in V represents the diffusion rate of the etching gas into the via. react V represents the rate of reaction between the etching gas and BARC. out This represents the diffusion rate of the etching gas out of the orifice. Among these, increasing V... inThe method comprises: 1) increasing the total gas flow rate while reducing the pressure; 2) higher temperature. Increasing V react The method comprises: 1) providing sufficient etching gas; 2) forming less polymer; 3) higher bias voltage; 4) higher temperature. Increasing V out The method comprises: 1) increasing the total gas flow rate while reducing the pressure; 2) higher temperature.

[0039] It is found that the etching rate is reduced at low flow rate, which is probably due to insufficient etching gas; and the etching rate is also reduced at high flow rate, which is probably due to that the active etching gas is pumped out quickly. It is found in this paper that when low pressure and high pumping speed are controlled to accelerate the entry of reactants and the extraction of products, the reaction rate at the hole bottom can be increased to achieve the purpose of high-speed plasma etching of small holes.

[0040] Therefore, the present application provides a new method to meet the various needs of small-hole etching, which is improved on the basis of the traditional BARC etching process, and combines high flow conductance and different steps to achieve the purposes of clean BARC hole bottom etching, maintaining PR CD and minimizing dielectric layer loss.

[0041] The following three gas combinations under high flow conductance: N2 / O2, N2 / O2 (high temperature), O2 and CO2 / O2 are respectively studied for small-hole etching ability, dielectric layer loss and PR CD.

[0042] As shown in Figure 3 , single N2 / O2 as etching gas, N2 / O2 has weak ability to remove BARC in the hole, but it has good ability to maintain PR CD and less dielectric layer loss; when single high-temperature N2 / O2 is used as etching gas, although it can clean the small hole completely, it causes the CD to be enlarged. It can be seen that only using this single gas cannot meet the process requirements.

[0043] On the other hand, single O2 gas and single CO2 / O2 gas as etching gas can achieve good small-hole etching ability, but they respectively cause the problems of PR CD being too large and dielectric layer loss being too much.

[0044] According to the Arrhenius equation

[0045]

[0046] where k is the rate constant; the pre-exponential factor (also known as the frequency factor), also known as the Arrhenius constant, has the same unit as k; is the electron temperature, This refers to the dissociation energy. It is an exponential factor.

[0047]

[0048] To achieve the process conditions for small hole etching, it is necessary to control the proportions of three different gases, such as... Figure 4 As shown, the degree of dissociation varies in the three different gas regimes. The figure reveals that N2 dissociates at a higher rate than CO2 and O2. Therefore, at the same total flow rate, the proportion of O2 can be reduced to ensure a certain BARC etching rate and PR consumption rate. Since the dissociation performance of a single gas varies at the same temperature, the final dielectric layer loss or PR CD may not meet the final requirements for small-hole etching. Therefore, this invention uses a multi-step approach combined with high conductivity (low pressure, high flow rate) to optimize the process flow.

[0049] Therefore, this invention innovatively proposes to perform multi-step BARC etching using different gas combinations to simultaneously achieve the ability to remove small hole BARCs, reduce dielectric layer loss, and maintain PRCD.

[0050] like Figure 5 As shown, the present invention provides a method for forming a semiconductor structure, which is carried out in a vacuum reaction chamber and includes the following steps:

[0051] Step S1: A substrate is provided, on which a dielectric layer is provided, the dielectric layer has a plurality of holes, the holes are filled with a bottom anti-reflective layer, and a photoresist layer is provided on the top of the sidewall of the hole.

[0052] The 3nm technology node is equivalent to a 10nm diameter hole on a wafer. The holes mentioned in this article refer to small holes with a diameter of less than 10nm.

[0053] Step S2: Provide a first etching gas to etch the bottom anti-reflection layer inside the hole to maintain low dielectric layer loss and suppress the expansion of the critical dimensions of the photoresist layer. The etching time is denoted as t1. The first etching gas contains a mixture of N2 and O2.

[0054] The etching process conditions for the first etching gas are: radio frequency of 2MHz~60MHz; pressure of 10mtorr~30mtorr; and radio frequency power of 100W~250W.

[0055] The mixing ratio of N2 and O2 in the first etching gas is 11:1 to 15:1 by volume.

[0056] After the first etching gas is provided, a second etching gas and / or a third etching gas are provided to clean and etch the bottom of the hole, wherein the second etching gas comprises O2, and the third etching gas comprises a mixed gas of CO2 / O2.

[0057] The etching time of the second etching gas for cleaning the hole is denoted as t2.

[0058] The etching time of the third etching gas for cleaning the hole is denoted as t3; wherein t1, t2, and t3 are adjusted according to the specific hole etching condition, t1>0, t2≥0, and t3≥0, and t2 and t3 are not zero at the same time.

[0059] The etching process conditions of the second etching gas are as follows: the radio frequency is 50 MHz to 120 MHz; the pressure is 10 mtorr to 30 mtorr; the radio frequency power is 20 W to 75 W; and the bias power is 0 W to 25 W. The flow rate of O2 in the second etching gas is >600 sccm.

[0060] The etching process conditions of the third etching gas are as follows: the radio frequency is 2 MHz to 60 MHz; the pressure is 10 mtorr to 30 mtorr; the radio frequency power is 100 W to 300 W; and the bias power is 0 W to 100 W.

[0061] The mixing ratio of CO2 and O2 in the third etching gas is 4:1 to 8:1 by volume. The total flow rate of CO2 / O2 in the third etching gas is >400 sccm, the flow rate of CO2 is >350 sccm, and the flow rate of O2 is 10 sccm to 90 sccm.

[0062] The vacuum reaction chamber described herein is a vacuum reaction chamber of an inductively coupled plasma etching device or a capacitively coupled plasma etching device, and the vacuum reaction chamber is a plasma environment.

[0063] The plasma etching described herein includes continuous plasma or pulsed plasma etching.

[0064] The present application can select the corresponding route according to the requirement in etching (whether the CD requirement is higher or the medium layer loss requirement is higher), that is, after the first etching gas, the second etching gas or the third etching gas is selected, or the second etching gas is introduced and then the third etching gas is introduced, or the third etching gas is introduced and then the second etching gas is introduced.

[0065] The OE (Over Etch) step described herein refers to etching a small amount of BARC in the small hole which is not etched completely (most of the BARC is etched) in the main etching ME, to ensure that there is no BARC residue.

[0066] The method of the present application is specifically described below in combination with examples. Example 1

[0067] As shown in Figure 6 , a substrate 01 is provided, the substrate 01 is provided with a medium layer 1, the medium layer 1 has a plurality of small holes 3, the small holes 3 are provided with a BARC layer 3', and the state diagram after main etching is shown in the leftmost diagram of Figure 6 . In the first step (OE1), N2 / O2 gas combination is used to maintain low medium layer loss and reduce the expansion of PR CD. In the second step (OE2), O2 gas with stronger cleaning ability for residual BARC in the hole is used to achieve BARC etching in the small hole. In this method, there is no residual BARC in the small hole 3, the PR CD may be slightly expanded (still meeting the process requirement), and the medium layer loss 1' meets the process requirement. The time ratio of OE1 and OE2 can be adjusted according to actual requirements. For example, in order to make the PR CD slightly expanded smaller, the medium layer loss 1' is less, the time of OE1 can be appropriately prolonged, and the time of OE2 can be shortened. Example 2

[0068] As shown in Figure 6 , a substrate 01 is provided, the substrate 01 is provided with a medium layer 1, the medium layer 1 has a plurality of small holes 3, the small holes 3 are provided with a BARC layer 3', and the state diagram after main etching is shown in the leftmost diagram of Figure 6 . In the first step (OE1), N2 / O2 gas combination is used to maintain low medium layer loss and reduce the expansion of PR CD. In the second step (OE2), O2 gas with stronger cleaning ability for residual BARC in the hole is used to achieve BARC etching in the small hole. In this method, there is no residual BARC in the small hole 3, the PR CD may be slightly expanded (still meeting the process requirement), and the medium layer loss 1' meets the process requirement. The time ratio of OE1 and OE2 can be adjusted according to actual requirements. For example, in order to make the PR CD slightly expanded smaller, the medium layer loss 1' is less, the time of OE1 can be appropriately prolonged, and the time of OE2 can be shortened. Example 3

[0069] The first step (OE1) uses a gas combination of N2 / O2 to maintain a low dielectric layer loss and reduce the expansion of PR CD. In the second step (OE2), O2 gas with stronger cleaning ability for residual BARC in the hole is used to etch and clean the BARC in the small hole for a period of time; then CO2 is introduced at the same time, that is, the CO2 / O2 gas combination with stronger cleaning ability for residual BARC in the hole is used to etch for a period of time to achieve BARC etching in the small hole. This method has no residual BARC in the small hole, and the dielectric layer loss and PR CD meet the process requirements. Example 4

[0070] The first step (OE1) uses a gas combination of N2 / O2 to maintain a low dielectric layer loss and reduce the expansion of PR CD. In the second step (OE2), CO2 / O2 combination gas with stronger cleaning ability for residual BARC in the hole is used to etch for a period of time to achieve BARC etching in the small hole; then only O2 is introduced to etch for a period of time to achieve BARC etching in the small hole. This method has no residual BARC in the small hole, and the dielectric layer loss and PR CD meet the process requirements.

[0071] In summary, the present application solves the problem of incomplete BARC etching at the bottom of the hole in small hole etching below 3nm in size. Combined with a high flow and multi-step etching process, low pressure and high flow rate process conditions are used to achieve clean small hole etching while considering small hole etching efficiency, minimal PR CD expansion, and minimal dielectric layer loss. The method is highly operable and adaptable, and can also select the corresponding route and etching time of different etching gases according to the needs of etching.

[0072] Although the content of the present application has been described in detail through the above preferred embodiments, it should be recognized that the above description should not be considered as limiting the present application. After reading the above content, various modifications and alternatives of the present application will be apparent to those skilled in the art. Therefore, the scope of protection of the present application should be defined by the appended claims.

Claims

1. A method for forming a semiconductor structure, which is performed in a vacuum reaction chamber, the method comprising the steps of: The method comprises: ​ providing a substrate, the substrate being provided with a medium layer, the medium layer having a plurality of holes, the holes being filled with a bottom anti-reflective layer, and the top of the sidewall of the holes being provided with a photoresist layer; providing a first etching gas to etch the bottom anti-reflective layer in the holes, so as to maintain a low loss of the medium layer and inhibit the expansion of the critical dimension of the photoresist layer, the etching time being t1; the first etching gas comprising a mixture of N2 and O2. stopping the provision of the first etching gas, and providing a second etching gas and / or a third etching gas to clean and etch the bottom of the holes, the second etching gas comprising O2, and the third etching gas comprising a mixture of CO2 and O2. the etching time of the second etching gas for cleaning the holes being t2; the etching time of the third etching gas for cleaning the holes being t3; wherein t1, t2 and t3 are adjusted according to the specific etching condition of the holes, t1>0, t2≥0, t3≥0, and t2 and t3 are not simultaneously 0; the holes refer to small-size holes with a diameter less than 10 nm.

2. The method of forming a semiconductor structure of claim 1, wherein, The etching process condition of the first etching gas is: the radio frequency is 2 MHz-60 MHz; the pressure is 10-30 mtorr; and the radio frequency power is 100-250 W.

3. The method of forming a semiconductor structure of claim 1, wherein, In the first etching gas, the volume ratio of N2 to O2 is 11:1-15:

1.

4. The method of forming a semiconductor structure of claim 1, wherein, In the first etching gas, the total flow rate of N2 and O2 is >600 sccm.

5. The method of forming a semiconductor structure of claim 4, wherein, In the first etching gas, the flow rate of N2 is >500 sccm; and the flow rate of O2 is 10-90 sccm.

6. The method of forming a semiconductor structure of claim 1, wherein, The etching process condition of the second etching gas is: the radio frequency is 2 MHz-60 MHz; the pressure is 10-30 mtorr; the radio frequency power is 20-75 W; and the bias power is 0-25 W.

7. The method of forming a semiconductor structure of claim 1, wherein, In the second etching gas, the flow rate of O2 is >600 sccm.

8. The method of forming a semiconductor structure of claim 1, wherein, The etching process condition of the third etching gas comprises: the radio frequency is 2 MHz-60 MHz; the pressure is 10-30 mtorr; the radio frequency power is 100-300 W; and the bias power is 0-100 W.

9. The method of forming a semiconductor structure of claim 1, wherein, In the third etching gas, the volume ratio of CO2 to O2 is 4:1-8:

1.

10. The method of forming a semiconductor structure of claim 1, wherein, In the third etching gas, the total flow rate of CO2 and O2 is >400 sccm.

11. The method of forming a semiconductor structure of claim 10, wherein, In the third etching gas, the flow rate of CO2 is >350 sccm; and the flow rate of O2 is 10-90 sccm.

12. The method of forming a semiconductor structure of claim 1, wherein, The vacuum reaction cavity is a vacuum reaction cavity of an inductively coupled plasma etching device or a capacitively coupled plasma etching device, and the vacuum reaction cavity is a plasma environment.

13. The method of forming a semiconductor structure of claim 12, wherein, The plasma etching comprises continuous plasma or pulsed plasma etching.

14. A semiconductor structure formed by the method of any one of claims 1-13.

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