A MIMCAP capacitor processing technology optimization method

Abstract

The invention discloses a MIMCAP capacitor processing technology optimization method, which can prevent the lower TiN film from being damaged and avoid the loss of the bottom metal layer. The MIMCAP capacitor is distributed on a chip, and the chip includes a substrate, a metal layer, a pre-layer, and a MIMCAP capacitor. The MIMCAP capacitor includes a lower plate, an interlayer dielectric layer, and an upper plate. The upper plate includes a first aluminum layer, a lower TiN film, and an upper TiN film. The lower TiN film and the upper TiN film are respectively located on the lower surface and the upper surface of the first aluminum layer. The process optimization method includes: preparing the lower plate, the interlayer dielectric layer, and the upper plate in sequence above the pre-layer. The method of preparing the upper plate includes: growing the lower TiN film, the first aluminum layer, and the upper TiN film in sequence on the upper surface of the interlayer dielectric layer, wherein the growth temperature of the first aluminum layer is 270° C., the growth temperature of the lower TiN film is 270° C., and the thickness of the finally obtained lower TiN film is greater than or equal to

Description

Technical Field

[0001] The present invention relates to the field of semiconductor processing technology, and in particular to a method for optimizing the processing technology of a MIMCAP capacitor. Background Art

[0002] RF circuits are mainly used for receiving signal demodulation, transmitting information modulation, and have high power. They can transmit or radiate high-frequency electromagnetic waves to the outside world through antennas or RF transmitters. In RF circuits, in order to prevent electromagnetic interference, it is necessary to select suitable capacitors to achieve charge storage, smoothing filtering, power supply decoupling, DC isolation and AC passing. Therefore, for RF circuits, especially high-frequency circuits, the production of capacitors plays a vital role in the stability of their performance.

[0003] As the operating frequency and integration of RF circuits increase, the requirements for the capacitance accuracy of the capacitor structure and the reliability of capacitor devices are getting higher and higher. In traditional integrated circuit chips, the capacitor structure includes mom cap capacitors and mim cap capacitors. Mom cap capacitors refer to the use of oxide layers between different metal layers as capacitor dielectric layers, which is beneficial to reduce the capacitor occupied area; while MIMCAP has a proprietary plate mask, so it has better capacitance accuracy and design flexibility, but the disadvantage is that it occupies a larger area and requires an additional number of masks.

[0004] The commonly used mim cap capacitor is a single-layer upper plate structure (see Figure 1 ) or multi-layer upper plate structure (see Figure 2 ), the multi-layer upper plate structure is generally a TiN-AL-TiN structure, that is, a layer of AL (aluminum) is arranged between two layers of TiN (titanium nitride) films. The thermal expansion coefficient of the TiN (titanium nitride) film is small, while the thermal expansion coefficient of the AL layer is high. During the processing of the multi-layer upper plate, especially when heated at high temperature, it is very easy to cause the thinner lower cold-grown (growth temperature is about 50°C) TiN film to partially break due to the different expansion amounts of the TiN (titanium nitride) film and the AL layer. This not only damages the upper TiN film, but also in the subsequent capacitor plate etching process, the etching gas easily passes through the fracture layer to corrode the underlying metal layer, resulting in the loss of the underlying metal layer, thereby affecting the electrical performance of the entire chip circuit, and even causing the SOI wafer to be scrapped. Summary of the invention

[0005] In view of the above problems existing in the prior art, the present invention provides a MIMCAP capacitor processing technology optimization method, which can prevent the damage of the underlying TiN film and avoid the loss of the underlying metal layer, thereby ensuring the stability of the electrical performance of the entire integrated circuit chip.

[0006] To achieve the above object, the present invention adopts the following technical solution:

[0007] A method for optimizing the processing technology of a MIMCAP capacitor. The MIMCAP capacitor is generally integrated on a metal interconnection layer of a chip back-end manufacturing process. The back-end metal interconnection layer containing the MIMCAP capacitor includes a substrate. A low-dielectric constant dielectric layer, a plurality of metal layers spaced in the low-dielectric constant dielectric layer, a front layer located above the low-dielectric constant dielectric layer and the metal layer, and the MIMCAP capacitor located above the front layer are distributed on the substrate. The MIMCAP capacitor includes a lower plate, an interlayer dielectric layer, and an upper plate, which are sequentially distributed from bottom to top. The upper plate includes a first aluminum layer, a lower TiN film, and an upper TiN film. The lower TiN film and the upper TiN film are arranged on the lower surface and the upper surface of the first aluminum layer respectively. The process optimization method includes: preparing a lower electrode plate, an interlayer dielectric layer, and an upper electrode plate in sequence above the front layer. The method of preparing the upper electrode plate includes: growing a lower TiN film, a first aluminum layer, and an upper TiN film in sequence on the upper surface of the interlayer dielectric layer, wherein the growth temperature of the first aluminum layer is 270°C, and the growth temperature of the lower TiN film matches the growth temperature of the first aluminum layer; the growth temperature of the lower TiN film is 270°C, and the thickness of the lower TiN film finally obtained is greater than or equal to Or the growth temperature of the lower TiN film is 50°C, and the thickness of the lower TiN film finally obtained is greater than or equal to Or the growth temperature of the lower TiN film is 270°C, and the thickness of the lower TiN film finally obtained is less than

[0008] Its further characteristic is that

[0009] Before preparing the MIMCAP capacitor, a low dielectric constant dielectric layer, a metal layer, and a pre-layer are sequentially prepared on the substrate;

[0010] A Damascus process is used to etch a groove in the low dielectric constant dielectric layer, physical vapor deposition and chemical electroplating are performed to grow a copper film, and then a plurality of metal layers are formed by chemical mechanical polishing. The metal layers are evenly spaced and distributed in the low dielectric constant dielectric layer in the substrate, and at least one metal layer is arranged below the front layer;

[0011] The material of the metal layer is copper;

[0012] The deposition of the front layer is achieved by using a chemical vapor deposition process;

[0013] The front layer is an oxide layer, and the material is silicon dioxide;

[0014] The lower electrode plate is a multi-layer structure, and the lower electrode plate includes a second aluminum layer, a Ti layer, and a TiN layer;

[0015] A physical vapor deposition process is used to grow the TiN layer, the Ti layer and the second aluminum layer in the lower electrode plate;

[0016] The lower TiN film, the first aluminum layer, and the upper TiN film are sequentially deposited using a physical vapor deposition process;

[0017] The growth temperature of the upper TiN film is 270°C, and the thickness of the upper TiN film finally obtained is in the range of

[0018] The material of the interlayer dielectric layer is silicon nitride;

[0019] The interlayer dielectric layer is formed by a chemical vapor deposition process.

[0020] The above structure of the present invention can achieve the following beneficial effects. In the process of preparing the MIMCAP capacitor, the present application improves the cold growth of the lower TiN film in the existing upper electrode plate to high-temperature growth, and / or increases the thickness of the lower TiN film. The increase in the growth temperature of the lower TiN film reduces the temperature difference between the lower TiN film and the first aluminum layer, reduces the risk of cracking caused by the temperature difference, and increases the deposition thickness. The tensile strength of the lower TiN film is enhanced, and the increase in tensile strength reduces the risk of cracking of the lower TiN film. Therefore, the use of this technical solution is conducive to avoiding the loss of the underlying metal layer, thereby ensuring the stability of the electrical performance of the entire integrated circuit chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic diagram of the cross-sectional structure of the single-layer upper plate of a traditional MIMCAP capacitor;

[0022] Figure 2 It is a schematic diagram of the cross-sectional structure of the traditional MIMCAP capacitor multilayer upper plate;

[0023] Figure 3 This is an enlarged top view of the damaged multi-layer top plate in a traditional MIMCAP capacitor;

[0024] Figure 4 It is a schematic diagram of the cross-sectional structure of the main view of the traditional MIMCAP capacitor in which the bottom metal layer is lost after the multi-layer upper plate is damaged;

[0025] Figure 5 This is an enlarged top-down rendering of the bottom metal layer being lost after the multi-layer top plate in the traditional MIMCAP capacitor is damaged;

[0026] Figure 6This is a thermal effect diagram of the damage of the lower TiN film in the traditional MIMCAP capacitor when the growth temperature changes from 50°C to 270°C and the thickness is less than 300 angstroms. Figure 6 The growth temperature of the lower TiN film in 6a is 50℃. Figure 6 The growth temperature of the lower TiN film in 6b is 270°C;

[0027] Figure 7 A schematic diagram of the cross-sectional structure of a multilayer upper plate of a MIMCAP capacitor obtained by the method of the present invention;

[0028] Figure 8 This is an enlarged physical effect diagram of the main view of the damage of the multi-layer upper plate in the traditional MIMCAP capacitor;

[0029] Fig. 9 A flow chart of sequentially preparing a low dielectric constant dielectric layer, a metal layer, a pre-layer, and a MIMCAP capacitor on a chip substrate according to the present invention;

[0030] Fig.10 The present invention is a flow chart of preparing MIMCAP capacitors on a chip. DETAILED DESCRIPTION

[0031] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. It should be noted that the terms "including" and "having" and any variations thereof in the specification and claims of the present invention and the above drawings are intended to cover non-exclusive inclusions. For example, a process, method, apparatus, product or equipment comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or equipment.

[0032] MIMCAP capacitors are generally integrated on the metal interconnect layer of the chip back-end manufacturing process and need to be matched with the front layer. Figure 2 In actual processing, the lower TiN film 11 is easily damaged after etching. Figure 3 , the problem of the bottom metal layer 5 being lost occurs, see Figure 4 The reason why the bottom metal layer 5 is lost is that the lower TiN film 11 is damaged, causing the lower metal layer 5 to be etched in advance when the lower electrode 3 is subsequently etched. Figure 5The reason why the lower TiN film 11 is damaged is that the upper plate 1 is a three-layer structure of the lower TiN film 11, the upper TiN film 13, and the first aluminum layer 12 located between the lower TiN film 11 and the upper TiN film 13, but in the MIMCAP capacitor, the materials of each layer are different and the thermal expansion coefficients are different, see Table 1, which lists the thermal expansion coefficients of different materials in the MIMCAP capacitor;

[0033] Table 1 Thermal expansion coefficients of different materials in MIMCAP capacitors

[0034] film Coefficient of thermal expansion TiN 9.4 S N 5 Al 23 Cu 16.3 LK 20

[0035] The thermal expansion coefficient of titanium nitride is small, while the thermal expansion coefficient of the first aluminum layer 12 is large. In the conventional processing technology of the upper electrode 1, the growth of the lower TiN film 11 and the upper TiN film 13 is cold growth. Cold growth means that the growth temperature of titanium nitride is 50°C, while the growth temperature of the first aluminum layer 12 is high temperature: 250°C or 270°C, generally 270°C. Therefore, when the first aluminum layer 12 grows at this high temperature, the lower TiN film 11 is very easy to further expand and deform under high temperature conditions. In addition, the existing lower TiN film 11 is very thin and has insufficient strength, with a thickness of about 1.5mm. This results in local damage to the thinner lower TiN film 11. Figure 6 When dry etching is performed on each layer subsequently, the etching gas can easily enter the bottom layer in advance along the local crack holes 14 of the lower TiN film 11, resulting in the problem of the bottom metal layer 5 being lost and the metal layer 5 being over-etched in area 15.

[0036] In view of the problem that the lower TiN film 11 in the upper plate 1 of the MIMCAP capacitor in the prior art is easily deformed or even damaged due to the large growth temperature difference, resulting in the loss of the bottom metal layer 5 during subsequent dry etching, the present application provides several specific embodiments of the MIMCAP capacitor processing technology optimization method:

[0037] Embodiment 1, a method for optimizing the processing technology of a MIMCAP capacitor, wherein the MIMCAP capacitor is distributed on a chip, and the chip includes a low dielectric constant dielectric layer 10 distributed on a substrate, a metal layer 5 spaced apart in the low dielectric constant dielectric layer, a pre-layer 4 located above the low dielectric constant layer and the metal layer, and a MIMCAP capacitor located above the pre-layer, the MIMCAP capacitor includes a lower plate 3, an interlayer dielectric layer 4, and an upper plate 1 distributed in sequence from bottom to top, the upper plate 1 includes a first aluminum layer 12, a lower TiN film 11, and an upper TiN film 13, and the lower TiN film 13 and the upper TiN film 11 are respectively arranged on the lower surface and the upper surface of the first aluminum layer 12.

[0038] Before preparing the MIMCAP capacitor, a low dielectric constant dielectric layer 10, a metal layer 5, and a pre-layer 4 are first prepared on the substrate in sequence. Fig. 9 , the specific steps include: S1, providing a silicon substrate;

[0039] S2. A low dielectric constant dielectric layer 10 is grown on the substrate using a chemical vapor deposition process; the material of the low dielectric constant dielectric layer is fluorine-doped silicon oxide (i.e. FSG) or carbon-hydrogen-doped silicon oxide (i.e. SiCOH film), but is not limited to fluorine-doped silicon oxide or carbon-hydrogen-doped silicon oxide (i.e. SiCOH film).

[0040] S3. A Damascus process is used to etch grooves in the low dielectric constant dielectric layer, and a copper film is grown by physical vapor deposition and chemical electroplating. Then, a plurality of metal layers are formed by chemical mechanical polishing. The metal layers are evenly spaced in the low dielectric constant dielectric layer on the substrate. At least one metal layer is arranged below the front layer, and the material of the metal layer is copper.

[0041] S4. A chemical vapor deposition process is used to generate a front layer 4, wherein the material of the front layer 4 is silicon dioxide.

[0042] S5 , preparing a MIMCAP capacitor on the front layer 4 .

[0043] See Fig.10 The MIMCAP capacitor processing technology optimization method includes: preparing a lower plate 3, an interlayer dielectric layer 4, and an upper plate 1 from bottom to top on the front layer 4, and the specific steps include: S51, the lower plate is a multi-layer structure, and the lower plate includes a second aluminum layer, a Ti layer, and a TiN layer; in this embodiment, a physical vapor deposition process is used to realize the sequential growth of the TiN layer, the Ti layer, and the second aluminum layer in the lower plate;

[0044] S52, using a chemical vapor deposition process to generate an interlayer dielectric layer, wherein the interlayer dielectric layer is a silicon nitride dielectric layer;

[0045] S53, the method for preparing the upper electrode plate 1 includes: sequentially growing a lower TiN film, a first aluminum layer, and an upper TiN film on the upper surface of the interlayer dielectric layer, and the specific steps include:

[0046] S531, using physical vapor deposition process to achieve the deposition of the lower TiN film. In this embodiment, the growth temperature of the lower TiN film is 270° C., and the thickness of the lower TiN film finally obtained is less than In this embodiment, the thickness a of the lower TiN film is

[0047] S532, using a physical vapor deposition process to achieve deposition of a first aluminum layer. In this embodiment, the growth temperature of the first aluminum layer is 270° C.;

[0048] S533, using physical vapor deposition process to achieve the deposition of the upper TiN film, the growth temperature of the upper TiN film is 270°C, and the thickness of the upper TiN film finally obtained is

[0049] S534, using a dry etching process to etch the upper electrode plate, the interlayer dielectric layer, the lower electrode plate, and the front layer.

[0050] In the present embodiment 1, during the preparation process of the MIMCAP capacitor, the cold growth of the lower TiN film in the existing upper electrode plate is improved to high-temperature growth. The high-temperature growth refers to the growth of the lower TiN film at a temperature of about 270° C., which is close to the growth temperature of the first aluminum layer, so that the temperature difference between the growth temperature of the lower TiN film and the growth temperature of the first aluminum layer is reduced. When the lower TiN film is grown at high temperature, the lower TiN film has been fully expanded. Therefore, when the lower TiN film enters the first aluminum layer for high-temperature growth later, there will be no excessive thermal expansion. The expansion mismatch between the lower TiN film and the first aluminum layer at high temperature is improved, thereby avoiding the problem of deformation and cracking of the lower TiN film due to a sudden temperature rise during the high-temperature growth of the first aluminum layer, and ensuring the integrity of the lower TiN film. The integrity of the lower TiN film avoids the problem of etching and damage of the metal layer below due to the etching solution or etching gas passing through the crack holes of the lower TiN film during subsequent etching, thereby avoiding the loss of the bottom metal layer and ensuring the stability of the electrical performance of the entire integrated circuit chip.

[0051] Embodiment 2, a method for optimizing the processing technology of a MIMCAP capacitor, wherein the MIMCAP capacitor is distributed on a chip, and the chip includes a low dielectric constant dielectric layer 10 distributed on a substrate, a metal layer 5 spaced apart in the low dielectric constant dielectric layer, a pre-layer 4 located above the low dielectric constant layer and the metal layer, and a MIMCAP capacitor located above the pre-layer, the MIMCAP capacitor includes a lower electrode plate 3, an interlayer dielectric layer 4, and an upper electrode plate 1 distributed in sequence from bottom to top, the upper electrode plate 1 includes a first aluminum layer 12, a lower TiN film 11, and an upper TiN film 13, and the lower TiN film 13 and the upper TiN film 11 are respectively arranged on the lower surface and the upper surface of the first aluminum layer 12.

[0052] Before preparing the MIMCAP capacitor, firstly, a low dielectric constant dielectric layer 10, a metal layer 5, and a pre-layer 4 are sequentially prepared on a substrate, and the specific steps include: S1, providing a silicon substrate;

[0053] S2. A low dielectric constant dielectric layer 10 is grown on the substrate using a chemical vapor deposition process; the material of the low dielectric constant dielectric layer is fluorine-doped silicon oxide (i.e. FSG) or carbon-hydrogen-doped silicon oxide (i.e. SiCOH film), but is not limited to fluorine-doped silicon oxide or carbon-hydrogen-doped silicon oxide (i.e. SiCOH film).

[0054] S3. A Damascus process is used to etch grooves in the low dielectric constant dielectric layer, and a copper film is grown by physical vapor deposition and chemical electroplating. Then, a plurality of metal layers are formed by chemical mechanical polishing. The metal layers are evenly spaced in the low dielectric constant dielectric layer on the substrate. At least one metal layer is arranged below the front layer, and the material of the metal layer is copper.

[0055] S4. A chemical vapor deposition process is used to generate a front layer 4, wherein the material of the front layer 4 is silicon dioxide.

[0056] S5 , preparing a MIMCAP capacitor on the front layer 4 .

[0057] The MIMCAP capacitor processing technology optimization method includes: preparing a lower electrode plate 3, an interlayer dielectric layer 4, and an upper electrode plate 1 from bottom to top on a front layer 4, and the specific steps include: S51, the lower electrode plate is a multi-layer structure, and the lower electrode plate includes a second aluminum layer, a Ti layer, and a TiN layer; in this embodiment, a physical vapor deposition process is used to achieve the growth of the TiN layer, the Ti layer, and the second aluminum layer in the lower electrode plate;

[0058] S52, using a chemical vapor deposition process to generate an interlayer dielectric layer, wherein the material of the interlayer dielectric layer is a silicon nitride dielectric layer;

[0059] S53, the method for preparing the upper electrode plate 1 includes: sequentially growing a lower TiN film, a first aluminum layer, and an upper TiN film on the upper surface of the interlayer dielectric layer, and the specific steps include:

[0060] S531, using physical vapor deposition process to achieve lower TiN film deposition, the growth temperature of the lower TiN film is less than 270°C, in this embodiment, 50°C, and the thickness of the lower TiN film finally obtained is greater than or equal to In this embodiment, the thickness a of the lower TiN film is

[0061] S532, using a physical vapor deposition process to achieve deposition of a first aluminum layer. In this embodiment, the growth temperature of the first aluminum layer is 270° C.;

[0062] S533, using physical vapor deposition process to achieve the deposition of the upper TiN film, the growth temperature of the upper TiN film is 270°C, and the thickness of the upper TiN film finally obtained is

[0063] S534, using a dry etching process to etch the upper electrode plate, the interlayer dielectric layer, the lower electrode plate, and the front layer.

[0064] In the preparation of the MIMCAP capacitor processing technology optimization method of this embodiment 2, the thickness of the lower TiN film in the upper plate is greater than or equal to Compared with the existing thickness of The thickness of the lower TiN film is significantly increased, thereby significantly increasing the tensile strength of the lower TiN film. When the first aluminum layer above it grows at high temperature, the temperature of the lower TiN film rises suddenly and expands and deforms. However, due to the increase in thickness and tensile strength of the lower TiN film, even if the lower TiN film expands and deforms, it will not cause cracking and damage, thereby avoiding the problem of etching gas passing through the crack holes of the lower TiN film during subsequent dry etching, causing the lower metal layer to be etched and damaged, thereby avoiding the loss of the bottom metal layer and ensuring the stability of the electrical performance of the entire integrated circuit chip.

[0065] Embodiment three, a method for optimizing the processing technology of a MIMCAP capacitor, a method for optimizing the processing technology of a MIMCAP capacitor, the MIMCAP capacitor is distributed on a chip, the chip includes a low dielectric constant dielectric layer 10 distributed on a substrate, a metal layer 5 spaced apart in the low dielectric constant dielectric layer, a pre-layer 4 located above the low dielectric constant layer and the metal layer, and a MIMCAP capacitor located above the pre-layer, the MIMCAP capacitor includes a lower electrode plate 3, an interlayer dielectric layer 4, and an upper electrode plate 1 distributed in sequence from bottom to top, the upper electrode plate 1 includes a first aluminum layer 12, a lower TiN film 11, and an upper TiN film 13, the lower TiN film 13 and the upper TiN film 11 are respectively arranged on the lower surface and the upper surface of the first aluminum layer 12.

[0066] Before preparing the MIMCAP capacitor, firstly, a low dielectric constant dielectric layer 10, a metal layer 5, and a pre-layer 4 are sequentially prepared on a substrate, and the specific steps include: S1, providing a silicon substrate;

[0067] S2. A low dielectric constant dielectric layer 10 is grown on the substrate using an atomic deposition process; the material of the low dielectric constant dielectric layer is fluorine-doped silicon oxide or carbon-doped silicon oxide (i.e., SiCOH film), but is not limited to fluorine-doped silicon oxide or carbon-hydrogen-doped silicon oxide (i.e., SiCOH film).

[0068] S3. A Damascus process is used to etch grooves in the low dielectric constant dielectric layer, and a copper film is grown by physical vapor deposition and chemical electroplating. Then, a plurality of metal layers are formed by chemical mechanical polishing. The metal layers are evenly spaced in the low dielectric constant dielectric layer on the substrate. At least one metal layer is arranged below the front layer, and the material of the metal layer is copper.

[0069] S4. A chemical vapor deposition process is used to generate a front layer 4, wherein the material of the front layer 4 is silicon dioxide.

[0070] S5 , preparing a MIMCAP capacitor on the front layer 4 .

[0071] The MIMCAP capacitor processing technology optimization method includes: preparing a lower electrode plate 3, an interlayer dielectric layer 4, and an upper electrode plate 1 from bottom to top on a front layer 4, and the specific steps include: S51, the lower electrode plate is a multi-layer structure, and the lower electrode plate includes a second aluminum layer, a Ti layer, and a TiN layer; in this embodiment, a physical vapor deposition process is used to achieve the growth of the TiN layer, the Ti layer, and the second aluminum layer in the lower electrode plate;

[0072] S52, using a chemical vapor deposition process to generate an interlayer dielectric layer, wherein the interlayer dielectric layer is a silicon nitride dielectric layer;

[0073] S53, the method for preparing the upper electrode plate 1 includes: sequentially growing a lower TiN film, a first aluminum layer, and an upper TiN film on the upper surface of the interlayer dielectric layer, and the specific steps include:

[0074] S531, using physical vapor deposition process to achieve the deposition of the lower TiN film. In this embodiment, the growth temperature of the lower TiN film is 270° C., and the thickness of the lower TiN film finally obtained is greater than or equal to In this embodiment, the thickness a of the lower TiN film is See Figure 7 ;

[0075] S532, using a physical vapor deposition process to achieve deposition of a first aluminum layer. In this embodiment, the growth temperature of the first aluminum layer is 270° C.;

[0076] S533, using physical vapor deposition process to achieve the deposition of the upper TiN film, the growth temperature of the upper TiN film is 270°C, and the thickness of the upper TiN film finally obtained is

[0077] S534, using a dry etching process to etch the upper electrode plate, the interlayer dielectric layer, the lower electrode plate, and the front layer.

[0078] In the preparation process of the MIMCAP capacitor, the cold growth of the lower TiN film in the existing upper plate is improved to a high temperature growth of 270°C, and the thickness of the lower TiN film is increased. The increase in the growth temperature of the lower TiN film not only reduces the temperature difference between the lower TiN film and the first aluminum layer, and reduces the risk of cracking caused by the temperature difference, but also increases the deposition thickness, enhances the tensile strength of the lower TiN film, and the increase in tensile strength further reduces the risk of cracking of the lower TiN film. Therefore, the use of this technical solution is conducive to avoiding the loss of the bottom metal layer, thereby ensuring the stability of the electrical performance of the entire integrated circuit chip. The method of this embodiment not only increases the growth temperature of the lower TiN film, but also increases the thickness of the lower TiN film. Therefore, compared with the first and second embodiments, the method of this embodiment is more effective in preventing the lower TiN film from cracking.

[0079] The KLA bright field defect detector is used to detect the defects of the MIMCAP capacitor obtained by the method of the present application. The KLA bright field defect detector mainly uses laser light to scan the chip surface, collects the light signal and image information reflected by the chip surface through visual sensing technology, and identifies the defects on the surface of the MIMCAP capacitor in the chip based on the image information. Using traditional processes, the lower layer TiN in the MIMCAP capacitor has deformation and cracking defects. Figure 8 The lower TiN layer is deformed and cracked, and the first aluminum layer and the upper TiN layer grown subsequently cannot cover the defect. Therefore, the crack hole 14 of the lower TiN layer can be clearly seen on the surface of the MIMCAP capacitor. Figure 3 The KLA bright field defect detector can detect the growth defects of the lower layer TiN in the MIMCAP capacitor.

[0080] Taking Example 3 as an example, the MIMCAP capacitor obtained by the process method of Example 3 of the present application is detected using a KLA bright field defect detector. It can be seen from the detection by the KLA bright field defect detector that the number of cracking defects of the lower TIN film in the multi-layer upper plate of the MIMCAP capacitor obtained by Example 3 of the method of the present invention is zero, and there is no problem of over-etching of the bottom metal layer of the lower TIN film. Therefore, the use of this technical solution is conducive to avoiding the loss of the bottom metal layer, thereby ensuring the stability of the electrical performance of the entire integrated circuit chip.

[0081] The above are only preferred embodiments of the present application, and the present invention is not limited to the above embodiments. It is understood that other improvements and changes directly derived or associated by those skilled in the art without departing from the spirit and concept of the present invention should be considered to be included in the protection scope of the present invention.

Claims

1. A method for optimizing the processing technology of a MIMCAP capacitor, wherein the MIMCAP capacitor is integrated on a metal interconnection layer of a chip back-end manufacturing process, and the back-end metal interconnection layer containing the MIMCAP capacitor comprises a substrate, on which a low-dielectric constant dielectric layer, a plurality of metal layers spaced apart in the low-dielectric constant dielectric layer, a front layer located above the low-dielectric constant dielectric layer and the metal layer, and the MIMCAP capacitor located above the front layer are distributed, wherein the MIMCAP capacitor comprises a lower plate, an interlayer dielectric layer, and an upper plate which are sequentially distributed from bottom to top, wherein the upper plate comprises a first aluminum layer, a lower TiN film, and an upper TiN film, wherein the lower TiN film and the upper TiN film are respectively arranged on the lower surface and the upper surface of the first aluminum layer, and the process optimization method comprises: A lower electrode plate, an interlayer dielectric layer, and an upper electrode plate are sequentially prepared above the front layer. The method for preparing the upper electrode plate includes: sequentially growing a lower TiN film, a first aluminum layer, and an upper TiN film on the upper surface of the interlayer dielectric layer, wherein the growth temperature of the first aluminum layer is 270° C., and the growth temperature of the lower TiN film matches the growth temperature of the first aluminum layer; the growth temperature of the lower TiN film is 270° C., and the thickness of the lower TiN film finally obtained is greater than or equal to Or the growth temperature of the lower TiN film is 50°C, and the thickness of the lower TiN film finally obtained is greater than or equal to Or the growth temperature of the lower TiN film is 270°C, and the thickness of the lower TiN film finally obtained is less than 2. The MIMCAP capacitor processing technology optimization method according to claim 1, characterized in that: Before preparing the MIMCAP capacitor, a low dielectric constant dielectric layer, a metal layer, and a pre-layer are sequentially prepared on the substrate.

3. The MIMCAP capacitor processing technology optimization method according to claim 2, characterized in that: A Damascus process is used to etch a groove in a low dielectric constant dielectric layer, physical vapor deposition and chemical electroplating are performed to grow a copper film, and then chemical mechanical polishing is performed to form a plurality of metal layers, the metal layers are evenly spaced and distributed in the substrate, at least one metal layer is arranged below the front layer, and the material of the metal layer is copper.

4. The MIMCAP capacitor processing technology optimization method according to claim 3 is characterized in that: The front layer is an oxide layer made of silicon dioxide; the deposition of the front layer is achieved by using a chemical vapor deposition process.

5. The MIMCAP capacitor processing technology optimization method according to claim 4, characterized in that: The lower electrode plate is a multi-layer structure, and includes a second aluminum layer, a Ti layer, and a TiN layer; a physical vapor deposition process is used to achieve the growth of the TiN layer, the Ti layer, and the second aluminum layer in the lower electrode plate.

6. The MIMCAP capacitor processing technology optimization method according to claim 5, characterized in that: The physical vapor deposition process is used to realize the sequential deposition of the lower TiN film, the first aluminum layer, and the upper TiN film in the upper electrode plate.

7. The MIMCAP capacitor processing technology optimization method according to claim 6, characterized in that: The growth temperature of the upper TiN film is 270°C, and the thickness of the upper TiN film finally obtained is greater than or equal to 8. The MIMCAP capacitor processing technology optimization method according to claim 7, characterized in that: The material of the interlayer dielectric layer is silicon nitride; the interlayer dielectric layer is formed by a chemical vapor deposition process.

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