Verification Method and Device for Probe Testing, Electronic Device, Storage Medium
By grouping the test results of semiconductor devices, using groups with similar processes to verify the reliability of the test facilities, the problems of low verification efficiency and insufficient accuracy in the prior art are solved, and more efficient and accurate testing facilities are achieved.
Patent Information
- Application Number
- CN202211170022.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-22
- Publication Date
- 2025-08-01
- Estimated Expiration
- 2042-09-22
AI Technical Summary
In the prior art, the reliability of the verification test facility is inefficient and insufficient accuracy, especially when performing aging test, repeated tests lead to changes in the characteristics of the semiconductor device, affecting the accuracy of the verification results.
By obtaining the test results of semiconductor devices, grouping them according to their correlation and weights, using groups with similar processes to perform test results to verify the reliability of the test facilities, and improving verification efficiency and accuracy.
It improves the accuracy and efficiency of verifying the reliability of the test facility, reduces the impact of characteristic changes caused by aging tests, and enhances the comparability of test results.
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Figure CN115575786B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of probe testing, and in particular, to a method and apparatus for verifying probe testing, an electronic device, and a storage medium. Background Art
[0002] After the wafer manufacturing process is completed, probe testing (including burn-in testing and non-burn-in testing) is performed on the unpackaged chips on the wafer, i.e., bare dies, to ensure the yield of the bare dies before packaging. Therefore, it is particularly important that the test facilities (such as test programs and test machines) for probe testing are reliable.
[0003] Generally, to verify the reliability of test facilities, repeated testing (re-probe) is performed on the same batch of chips on the same wafer on different test facilities, and whether the test facilities are reliable is verified based on whether the test results are similar. Since the number of bare dies to be tested is often very large, the verification efficiency is low. Moreover, when repeated burn-in testing is performed on the same batch of chips on different test facilities, since burn-in testing is a destructive test, the accuracy of verifying whether the test facilities are reliable in the above solution is low. Summary of the Invention
[0004] In view of this, embodiments of the present disclosure provide a method and apparatus for verifying probe testing, an electronic device, and a storage medium.
[0005] In a first aspect, embodiments of the present disclosure provide a method for verifying probe testing, including:
[0006] Obtaining a first test result of performing probe testing on a plurality of semiconductor devices on a wafer using a first test facility; grouping the plurality of semiconductor devices according to the first test result; wherein the characteristic differences between the groups after grouping are within a preset difference range; and verifying the reliability of performing probe testing using a second test facility by using the grouped semiconductor devices.
[0007] In some embodiments, the first test result includes a first result set after performing burn-in testing on each of the semiconductor devices and a second result set after performing tests other than the burn-in testing on each of the semiconductor devices;
[0008] The grouping the plurality of semiconductor devices according to the first test result includes: grouping the plurality of semiconductor devices according to the first result set and the second result set;
[0009] The verifying the reliability of performing testing using a second test facility by using the grouped semiconductor devices includes: verifying the reliability of performing the burn-in testing using the second test facility by using the grouped semiconductor devices.
[0010] In some embodiments, the first result set includes results corresponding to a first test item, and the second result set includes results corresponding to at least two second test items; grouping the plurality of semiconductor devices according to the first result set and the second result set includes:
[0011] Determining the correlation between the first test item and each of the at least two second test items according to the results corresponding to the first test item and the results corresponding to the at least two second test items;
[0012] Determining a target test item according to the correlation between each of the second test items and the first test item; wherein, the degree of correlation between the target test item and the first test item is greater than the degree of correlation between the test items other than the target test item and the first test item; grouping the plurality of semiconductor devices according to the results corresponding to the target test item.
[0013] In some embodiments, there are multiple target test items, and the method further includes:
[0014] Determining the weight corresponding to each target test item according to the correlation between each target test item and the first test item; wherein, the weight corresponding to the target test item is positively correlated with the degree of correlation between the target test item and the first test item;
[0015] Grouping the plurality of semiconductor devices according to the results corresponding to the target test item includes: weighting the results corresponding to the target test item by using the weight corresponding to the target test item to obtain a weighted result corresponding to the target test item; grouping the plurality of semiconductor devices according to the weighted results corresponding to each target test item of each semiconductor device.
[0016] In some embodiments, grouping the plurality of semiconductor devices according to the weighted results corresponding to each target test item of each semiconductor device includes:
[0017] For each semiconductor device, adding the weighted results corresponding to each target test item of the semiconductor device to obtain a weighted sum corresponding to the semiconductor device; grouping the plurality of semiconductor devices according to the weighted sums corresponding to each semiconductor device.
[0018] In some embodiments, the semiconductor device is corresponding to a position identifier;
[0019] Grouping the plurality of semiconductor devices according to the weighted sums corresponding to each semiconductor device includes:
[0020] Sort the weighted sums corresponding to each of the semiconductor devices, and group the semiconductor devices indicated by the position identifiers associated with the weighted sums with odd sorting sequence numbers into one group, and group the semiconductor devices indicated by the position identifiers associated with the weighted sums with even sorting sequence numbers into another group.
[0021] In some embodiments, the method further includes:
[0022] According to a preset data processing rule, perform data processing on the results corresponding to the target test item in the second result set to obtain a result after data processing; wherein, the preset data processing rule includes at least one of the following: a data filtering rule, a data normalization rule;
[0023] The step of weighting the result corresponding to the target test item by using the weight corresponding to the target test item to obtain a weighted result corresponding to the target test item includes:
[0024] Use the weight corresponding to the target test item to weight the result after data processing corresponding to the target test item to obtain the weighted result corresponding to the target test item.
[0025] In some embodiments, the step of grouping the plurality of semiconductor devices according to the results corresponding to the target test item includes:
[0026] When the target test item meets a preset test requirement, group the plurality of semiconductor devices according to the results corresponding to the target test item; wherein, the preset test requirement includes the test items included in the second test facility.
[0027] In some embodiments, the first result set includes the results of at least two first test items;
[0028] The step of determining the target test item according to the correlation between each of the second test items and the first test item includes:
[0029] For each second test item, sum the correlation coefficients between the second test item and each first test item; wherein, the correlation coefficient is used to characterize the correlation, and the correlation coefficient is positively correlated with the degree of correlation; determine the target test item according to the sum of the correlation coefficients corresponding to each second test item.
[0030] In some embodiments, the grouped semiconductor devices include two groups of semiconductor devices;
[0031] The step of verifying the reliability of the probe test of the second test facility by using the grouped semiconductor devices includes:
[0032] Obtain a second test result after performing the probe test on a grouped set of semiconductor devices using the first test facility; obtain a third test result after performing the probe test on another grouped set of semiconductor devices using the second test facility; determine the difference between the second test result and the third test result; when the difference meets a preset difference condition, determine that the second test facility is reliable; when the difference does not meet the preset difference condition, determine that the second test facility is unreliable.
[0033] In a second aspect, an embodiment of the present disclosure provides a verification device for probe testing, including:
[0034] An acquisition module, configured to obtain a first test result of performing a probe test on a plurality of semiconductor devices on a wafer using a first test facility; a grouping module, configured to group the plurality of semiconductor devices according to the first test result; wherein, the characteristic differences between the grouped groups of semiconductor devices are within a preset difference range; a verification module, configured to verify the reliability of performing a probe test using a second test facility with the grouped semiconductor devices.
[0035] In some embodiments, the first test result includes a first result set after performing an aging test on each of the semiconductor devices, and a second result set after performing a test other than the aging test on each of the semiconductor devices; the grouping module is configured to group the plurality of semiconductor devices according to the first result set and the second result set; the verification module is configured to verify the reliability of performing the aging test using the second test facility with the grouped semiconductor devices.
[0036] In some embodiments, the first result set includes results corresponding to a first test item, and the second result set includes results corresponding to at least two second test items; the grouping module is configured to determine the correlation between the first test item and each of the second test items according to the results corresponding to the first test item and the results corresponding to the at least two second test items; determine a target test item according to the correlation between each of the second test items and the first test item; wherein, the correlation degree between the target test item and the first test item is greater than the correlation degree between the test items other than the target test item and the first test item; group the plurality of semiconductor devices according to the results corresponding to the target test item.
[0037] In some embodiments, there are multiple target test items, and the device further includes:
[0038] A determination module, configured to determine the weight corresponding to each of the target test items according to the correlation between each of the target test items and the first test item; wherein, the weight corresponding to the target test item is positively correlated with the degree of correlation between the target test item and the first test item; a grouping module, configured to weight the result corresponding to the target test item by using the weight corresponding to the target test item to obtain a weighted result corresponding to the target test item; and group the multiple semiconductor devices according to the weighted results corresponding to the target test items of each semiconductor device.
[0039] In some embodiments, the grouping module is configured to, for each semiconductor device, add up the weighted results corresponding to the target test items of the semiconductor device to obtain a weighted sum corresponding to the semiconductor device; and group the multiple semiconductor devices according to the weighted sums corresponding to the semiconductor devices.
[0040] In some embodiments, the semiconductor device is provided with a position identifier; the grouping module is configured to sort the weighted sums corresponding to the semiconductor devices, and group the semiconductor devices indicated by the position identifiers associated with the weighted sums with odd sorting serial numbers into one group, and group the semiconductor devices indicated by the position identifiers associated with the weighted sums with even sorting serial numbers into another group.
[0041] In some embodiments, the apparatus further includes:
[0042] A processing module, configured to perform data processing on the result corresponding to the target test item in the second result set according to a preset data processing rule to obtain a result after data processing; wherein, the preset data processing rule includes at least one of the following: a data filtering rule, a data normalization rule;
[0043] The grouping module is configured to weight the result after data processing corresponding to the target test item by using the weight corresponding to the target test item to obtain a weighted result corresponding to the target test item.
[0044] In some embodiments, the grouping module is configured to group the multiple semiconductor devices according to the result corresponding to the target test item when the target test item meets a preset test requirement; wherein, the preset test requirement includes the test items included in the second test facility.
[0045] In some embodiments, the first result set includes the results of at least two first test items; the grouping module is configured to sum the correlation coefficients between each second test item and the first test items; wherein the correlation coefficient is used to characterize the correlation, and the correlation coefficient is positively correlated with the degree of correlation; the target test item is determined according to the summed correlation coefficient corresponding to each second test item.
[0046] In some embodiments, the grouped semiconductor devices include two groups of semiconductor devices; the verification module is configured to obtain a second test result after performing the probe test on one group of the grouped semiconductor devices using the first test facility; obtain a third test result after performing the probe test on the other group of the grouped semiconductor devices using the second test facility; determine the difference between the second test result and the third test result; determine that the second test facility is reliable when the difference meets a preset difference condition; and determine that the second test facility is unreliable when the difference does not meet the preset difference condition.
[0047] In a third aspect, an embodiment of the present disclosure provides an electronic device, including:
[0048] a memory for storing computer-executable instructions; a processor connected to the memory for implementing the method described in the first aspect above by executing the computer-executable instructions.
[0049] In a fourth aspect, an embodiment of the present disclosure provides a storage medium storing computer-executable instructions; after the computer-executable instructions are executed by a processor, the method described in the first aspect above can be implemented.
[0050] The technical solutions provided by the embodiments of the present disclosure may include the following beneficial effects:
[0051] In an embodiment of the present disclosure, the verification device divides semiconductor devices into multiple groups with similar processes according to the first test results, and then verifies the reliability of the second test facility based on the differences between the test results of the groups with similar processes. On the basis of taking into account the accuracy of verification, the verification efficiency can be improved. In addition, in the related art, when verifying the reliability of the aging test of the test facility, usually, multiple aging tests are performed on the same batch of semiconductor devices on the same wafer on different test facilities, and whether the test facility is reliable is verified according to whether the aging test results are similar. Since the aging test is a destructive test, each aging test may cause changes in the characteristics of the semiconductor devices. Therefore, the accuracy of verifying whether the test implementation (including aging test and non-aging test) is reliable according to the results of multiple aging tests is relatively low. In contrast, the embodiments of the present disclosure divide the semiconductor devices into multiple groups with similar processes, making the test results of the semiconductor devices between the groups comparable. Therefore, the accuracy of verifying the reliability of the aging test of the second test facility according to the results of the aging test of the grouped semiconductor devices is relatively high.
[0052] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0053] The accompanying drawings herein are incorporated into the specification and constitute a part of this specification. These drawings illustrate embodiments consistent with the present disclosure and, together with the specification, are used to explain the technical solutions of the present disclosure.
[0054] Figure 1 is a flowchart of a verification method for probe testing according to an embodiment of the present disclosure Figure 1 ;
[0055] Figure 2 is a flowchart of a verification method for probe testing according to an embodiment of the present disclosure Figure 2 ;
[0056] Figure 3 is a block diagram of a verification device for probe testing according to an embodiment of the present disclosure;
[0057] Figure 4 is a schematic physical structure diagram of an electronic device according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0058] Exemplary embodiments will be described in detail herein, and examples thereof are shown in the accompanying drawings. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.
[0059] Probe testing refers to inputting a test signal into a semiconductor device through a probe, collecting the output signal of the semiconductor device, and testing the quality of the semiconductor device based on the output signal. A verification method for probe testing provided by an embodiment of the present disclosure may have a verification device as its execution subject, such as a test machine for performing probe testing on a wafer, or a terminal with information processing capabilities; among them, the terminal may be a user equipment (UE), a mobile device, a personal digital assistant (PDA), a handheld device, a computing device, etc. If the verification device is a terminal, the terminal may obtain the test result after the test machine tests the semiconductor device through a wired or wireless method, or the user exports the test result from the test machine that tests the semiconductor device and then imports it into the terminal, so that the terminal verifies the reliability of the test machine or the test program based on the test result. In some possible implementation manners, the verification method for probe testing may be implemented by a processor calling computer-readable instructions stored in a memory.
[0060] Figure 1 The flowchart of a verification method for probe testing according to an embodiment of the present disclosure is shown Figure 1 , as Figure 1 shown, the method includes:
[0061] S11. Obtain a first test result of performing probe testing on multiple semiconductor devices on a wafer using a first test facility;
[0062] S12. Group the multiple semiconductor devices according to the first test result; wherein, the characteristic differences between the groups after grouping are within a preset difference range;
[0063] S13. Use the grouped semiconductor devices to verify the reliability of performing probe testing using a second test facility.
[0064] In the embodiments of the present disclosure, the semiconductor device may be a die on one or more wafers. The test facilities (including the first test facility and the second test facility) include test programs, test machines, etc., and can perform probe tests on multiple semiconductor devices on the wafer. Among them, the semiconductor devices include devices for information storage, such as Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), flash memory, etc.; and may also include devices for information processing, such as Graphics Processing Unit (GPU), Central Processing Unit (CPU), etc. The present disclosure does not limit this.
[0065] In the embodiments of the present disclosure, the verification device obtains the first test result of performing probe tests on multiple semiconductor devices on the wafer using the first test facility, and verifies the reliability of the aging test using the second test facility with the grouped semiconductor devices. Among them, when the first test facility is the first test program, the second test facility is the second test program. The first test program and the second test program can be installed on the same test machine, and the corresponding verification device can be the test machine or the terminal associated with the test machine; or when the first test facility is the first test machine, the second test facility is the second test machine. The first test machine and the second test machine can install the same test program. Correspondingly, the verification device can be the terminal associated with the first test machine and the second test machine.
[0066] In step S11, the first test result obtained by the verification device may include the aging test result after performing the aging test on each semiconductor device and the non-aging test result after performing tests other than the aging test on each semiconductor device. Among them, the aging test is an electrical stress test that accelerates semiconductor device failures using high temperature, high pressure, high current, etc., and is used to verify the service life of semiconductor devices, so as to screen out semiconductor devices with short life and poor performance in advance. Tests other than the aging test include DC test, AC test, function test, etc. Among them, the DC test verifies whether the electrical signals of the semiconductor device meet the requirements, the AC test verifies whether the semiconductor device can complete the logic within the preset time constraint, and the function test verifies whether a series of internal logic functions of the semiconductor device are correct.
[0067] In the embodiments of the present disclosure, the aging test results may include the results corresponding to one or more aging test items. Different aging test items correspond to different sets of aging test parameters (such as test conditions, excitation signals, test duration, etc.). Among them, the aging test conditions are, for example, an environmental temperature of 130°C, a humidity of 85% RH, an atmospheric pressure of 230 KPa, etc.; the non-aging test results may include the results corresponding to one or more non-aging test items. Different non-aging test items correspond to different sets of non-aging test parameters. Each test result (including aging test results and non-aging test results) includes the electrical signals fed back by each semiconductor device during the test, such as voltage values, current values, etc., and may also include an indication of whether the test result meets the requirements corresponding to the test item. For example, if the fed-back voltage value falls within the preset voltage range corresponding to the test item, it indicates that the semiconductor device meets the requirements corresponding to the test item, and it can be represented by the indication "PASS"; if the fed-back voltage value does not fall within the preset voltage range corresponding to the test item, it indicates that the semiconductor device does not meet the requirements corresponding to the test item, and it can be represented by the indication "FAIL".
[0068] In step S12, the verification device groups the multiple semiconductor devices according to the obtained first test results, and obtains multiple groups of semiconductor devices whose characteristic differences between the groups are within a preset difference range. Among them, the characteristics of the semiconductor device include the static current of the semiconductor device, the low-power consumption current, the input voltage of the voltage drop, the power, the electrostatic sensitivity, etc. The characteristics of the semiconductor device can be the inherent attributes of the semiconductor device itself brought by the process manufacturing. The characteristics of the semiconductor device can be characterized based on the electrical signals output by the semiconductor device during operation (such as the first test results). In the embodiments of the present disclosure, the preset difference range can be set manually according to experience. If the characteristic differences between the groups of semiconductor devices are within the preset difference range, it indicates that the processes of the semiconductor devices between the groups are similar.
[0069] In some embodiments, when the first test results include the results corresponding to the aging test items, the verification device may determine whether each electrical signal in the first test results meets the requirements corresponding to the aging test items, and determine whether the aging test of the semiconductor device is qualified according to the determination result; thus, the semiconductor devices that pass the aging test are evenly divided into M groups, and the remaining ungrouped semiconductor devices are evenly divided into the aforementioned M groups. Among them, M is an integer greater than 1, and the semiconductor devices can be divided into two groups, or more than three groups.
[0070] It can be understood that within the grouped groups, based on the results corresponding to the aging test items, it is determined that a part of the semiconductor devices that pass the aging test and a part of the semiconductor devices that fail the aging test are included. The proportion of the semiconductor devices that pass the aging test among the groups as a whole is the same, and the proportion of the semiconductor devices that fail the aging test is also the same, so that the characteristic differences between the groups of semiconductor devices are similar.
[0071] In some embodiments, when the first test result includes the results corresponding to the non-aging test items, the verification device can determine whether each electrical signal in the first test result meets the requirements corresponding to the non-aging test items, and determine whether the non-aging test of the semiconductor device is qualified according to the judgment result; thus, the semiconductor devices that all pass the non-aging test are evenly divided into M groups, and the remaining ungrouped semiconductor devices are evenly divided into the aforementioned M groups.
[0072] It can be understood that within each group after grouping, based on the results corresponding to the non-aging test items, it is determined that the group includes a part of semiconductor devices that pass the non-aging test and a part of semiconductor devices that fail the non-aging test. The proportion of semiconductor devices that pass the non-aging test in each group as a whole is the same, and the proportion of semiconductor devices that fail the non-aging test is also the same, so that the characteristic differences between the groups of semiconductor devices are similar.
[0073] In some embodiments, when the first test result includes the results corresponding to the aging test items and the results corresponding to the non-aging test items, the verification device can combine the judgment results of whether the aging test of the semiconductor device is qualified and whether the non-aging test of the semiconductor device is qualified, and evenly divide the semiconductor devices that pass both the aging test and the non-aging test (overall quality is qualified) into M groups, and evenly divide the remaining ungrouped semiconductor devices into the aforementioned M groups. The present disclosure does not limit this.
[0074] In step S13, after the verification device groups a plurality of semiconductor devices, it can use the grouped semiconductor devices to verify the reliability of the second test facility for probe testing. For probe testing, one of the important purposes of its test result is to monitor the production process level, that is, to a certain extent, the process situation of the semiconductor device can be reflected through the result of the probe test. In this regard, in the embodiments of the present disclosure, the semiconductor devices on the wafer are divided into multiple groups with similar processes according to the first test result, so that the test results of each group are comparable, and then the test results of multiple groups of semiconductor devices with similar processes are used to verify the reliability of the second test facility, which can improve the accuracy of the verification.
[0075] In the embodiments of the present disclosure, verifying the reliability of the second test implementation for probe testing is essentially verifying the reliability of the second test facility, such as verifying the reliability of the test program after maintenance or a new test machine. Among them, verifying the reliability of the second test facility can be to verify the reliability of the second test facility through an aging test, or to verify the reliability of the second test facility through a non-aging test.
[0076] In the embodiments of the present disclosure, the first test facility can be used to test the P groups of semiconductor devices after grouping, the second test facility can be used to test the remaining (M - P) groups of semiconductor devices, and the reliability of the second test facility can be verified according to the differences between the test results of each group; where P is a positive integer less than M.
[0077] In some embodiments, for the verification device to determine the differences between the test results of each group, it can be the difference between the proportion of semiconductor devices whose electrical signals meet the requirements corresponding to the test items in the test results of testing the P groups of semiconductor devices using the first test facility (that is, the proportion of semiconductor devices whose test results corresponding to this test item indicate qualified tests), and the proportion of semiconductor devices whose electrical signals meet the requirements corresponding to the test items in the test results of testing the remaining (M - P) groups of semiconductor devices using the second test facility.
[0078] In some embodiments, the verification device can also be to determine the difference between the mean values of each parameter in the test results of testing the P groups of semiconductor devices using the first test facility and the mean values of each parameter in the test results of testing the remaining (M - P) groups of semiconductor devices using the second test facility. The present disclosure does not limit this.
[0079] In other embodiments, if the semiconductor devices are divided into two groups (that is, M is 2), after the verification device tests the two groups of semiconductor devices respectively, when the difference between the two groups of test results is less than the preset difference threshold, it can be determined that the second test facility is reliable; when the difference is greater than or equal to the preset difference threshold, it can be determined that the second test facility is unreliable.
[0080] In addition, if the number of groups into which the semiconductor devices are divided is greater than 2 (that is, M is greater than or equal to 3), the verification device can also respectively determine whether the difference between the test results after testing the semiconductor devices between any two groups is less than the preset difference threshold, count the proportion of the number of differences less than the preset difference threshold between any two groups, and when this proportion is greater than the preset proportion threshold, determine that the second test facility is reliable; when this proportion is less than or equal to the preset proportion threshold, determine that the second test facility is unreliable.
[0081] The embodiments of the present disclosure do not limit the manner in which the verification device uses the grouped semiconductor devices to verify the reliability of the second test facility.
[0082] As described above, in the related art, by collecting the same batch of semiconductor devices on the same wafer and performing multiple tests on different test facilities, and verifying whether the test facilities are reliable according to whether the test results are similar. Since the number of semiconductor devices to be tested is often very large, the efficiency of repeatedly testing the full amount of semiconductor devices multiple times to verify whether the second test facility is reliable for probe testing is relatively low.
[0083] In contrast, in the embodiments of the present disclosure, the verification device divides the semiconductor devices into multiple groups with similar processes according to the first test result, and then verifies the reliability of the second test facility based on the differences between the test results of each group with similar processes. On the basis of taking into account the accuracy of verification, the verification efficiency can be improved.
[0084] In addition, in the related art, when verifying the reliability of the aging test of the test facility, it is usually to collect the results of multiple aging tests of the same batch of semiconductor devices on the same wafer on different test facilities, and verify whether the test facility is reliable according to whether the aging test results are similar; and since the aging test is a destructive test, each aging test may cause changes in the characteristics of the semiconductor device. Therefore, the accuracy of verifying whether the test implementation (including aging test and non-aging test) is reliable according to the results of multiple aging tests is relatively low. In this regard, the embodiments of the present disclosure divide the semiconductor devices into multiple groups with similar processes, so that the test results of the semiconductor devices between the groups are comparable, and thus the accuracy of verifying the reliability of the aging test of the second test facility according to the results of the aging test of the grouped semiconductor devices is relatively high.
[0085] In some embodiments, the first test result includes a first result set after the aging test of each semiconductor device and a second result set after the test other than the aging test of each semiconductor device;
[0086] Grouping the multiple semiconductor devices according to the first test result includes:
[0087] Grouping the multiple semiconductor devices according to the first result set and the second result set;
[0088] Verifying the reliability of the test using the second test facility by using the grouped semiconductor devices includes:
[0089] Verifying the reliability of the aging test using the second test facility by using the grouped semiconductor devices.
[0090] In the embodiments of the present disclosure, the first result set corresponds to the aforementioned aging test result and includes the results corresponding to one or more aging test items; the second result set corresponds to the aforementioned non-aging test result and includes the results corresponding to one or more non-aging test items.
[0091] After obtaining the first test result, the verification device in the embodiments of the present disclosure groups the multiple semiconductor devices according to the first result set and the second result set in the first test result, and then verifies the reliability of the aging test of the second test facility according to the grouped semiconductor devices.
[0092] In some embodiments, semiconductor devices that have passed both the aging test and the non-aging test (overall quality is qualified) as described above can be evenly divided into M groups, and the remaining ungrouped semiconductor devices can be evenly divided into the aforementioned M groups for grouping. It can be understood that within each group after grouping, based on the aging test and the non-aging test, it is determined that the group includes a part of semiconductor devices with qualified overall quality and a part of unqualified semiconductor devices (including those unqualified in the aging test and / or the non-aging test). The proportion of semiconductor devices with qualified overall quality and the proportion of unqualified semiconductor devices are the same between each group, so that the characteristic differences between the groups of semiconductor devices are similar.
[0093] In some other embodiments, the verification device can also screen the second result set according to the first result set, that is, screen the non-aging test results according to the aging test results, and group the semiconductor devices based on the screened second result set; thereby verifying the reliability of the second test facility for aging tests according to the grouped semiconductor devices.
[0094] It can be understood that in the embodiments of the present disclosure, the semiconductor devices are grouped according to the aging test results and the non-aging test results. Since the combination of the aging test results and the non-aging test results can more comprehensively reflect the characteristics of the semiconductor devices, compared with the grouping method based on the test results of any one of the tests, the solution of the embodiments of the present disclosure can improve the accuracy of dividing the semiconductor devices into multiple groups with similar processes, and further improve the accuracy of verifying the reliability of the second test facility for aging tests.
[0095] In some embodiments, the first result set includes the results corresponding to the first test item, and the second result set includes the results corresponding to at least two second test items;
[0096] Grouping the multiple semiconductor devices according to the first result set and the second result set includes:
[0097] Determine the correlation between the first test item and each of the second test items according to the results corresponding to the first test item and the results corresponding to the at least two second test items;
[0098] Determine the target test item according to the correlation between each of the second test items and the first test item; wherein, the degree of correlation between the target test item and the first test item is greater than the degree of correlation between the test items other than the target test item and the first test item;
[0099] Group the multiple semiconductor devices according to the results corresponding to the target test item.
[0100] In an embodiment of the present disclosure, the first test item corresponds to the aforementioned aging test item and includes an aging test parameter set; the second test item corresponds to the aforementioned non-aging test item and includes a non-aging test parameter set.
[0101] The verification device in the embodiment of the present disclosure can screen the second result set according to the first result set and group semiconductor devices based on the screened second result set. Exemplarily, based on a correlation function, a covariance function, etc., according to the result corresponding to the first test item in the first result set and the results corresponding to at least two second test items in the second result set, the correlation between the first test item and each test item can be determined, where each test item includes the first test item and at least two second test items; and the target test item can be determined according to each correlation. For example, according to the correlation function, the correlation coefficient between the first test item and each test item is determined, and the magnitudes of the correlation coefficients are sorted, and the test items corresponding to a preset number of the top-ranked correlation coefficients are selected as the target test items; or the test items corresponding to the correlation coefficients greater than a preset correlation coefficient threshold are determined as the target test items. Among them, the magnitude of the correlation coefficient is positively correlated with the degree of correlation, so the degree of correlation between the selected target test item and the first test item is greater than the degree of correlation between the test items other than the target test item and the first test item. It can be understood that the target test item includes at least the first test item.
[0102] Exemplarily, the first result set includes one column of test results corresponding to one aging test item, and the second result set includes N1 columns of test results corresponding to N1 DC test items respectively, N2 columns of test results corresponding to N2 AC test items respectively, and N3 columns of results corresponding to N3 function test items respectively; where each DC test item in N1, each AC test item in N2, and each function test item in N3 belong to the second test item. Thus, using a correlation function, the correlation coefficient between the one column of results corresponding to each test item and the one column of results corresponding to the first test item is determined respectively, and this correlation coefficient is used as the correlation coefficient between this test item and the first test item, and the test items corresponding to the correlation coefficients greater than a preset correlation coefficient threshold (such as 0.6) are determined as the target test items; or according to the sorting result of the correlation coefficients from large to small, the top N test items are determined as the target test items, so that the target test items are the test items with a relatively high degree of correlation with the first test item.
[0103] In the embodiment of the present disclosure, after determining the target test item, the verification device groups multiple semiconductor devices according to the result corresponding to the target test item in the first test result. For example, the verification device can determine whether each electrical signal in the result corresponding to the target test item meets the requirements corresponding to the test item, determine whether the test of the semiconductor device is qualified according to the determination result, and thus evenly divide the qualified semiconductor devices into M groups and evenly divide the remaining ungrouped semiconductor devices into the aforementioned M groups.
[0104] It can be understood that the verification device in the embodiments of the present disclosure selects target test items with a relatively high degree of correlation with the first test item according to the correlation between the first test item and each test item, and groups multiple semiconductor devices according to the results corresponding to the target test items; since the first test item corresponds to an aging test, therefore, the target test item is a test item with a relatively high degree of correlation with the aging test. Thus, the verification device groups multiple semiconductor devices based on the results of the target test items with a relatively high degree of correlation with the aging test, which can reduce the interference of grouping semiconductor devices according to the results corresponding to the test items with a relatively low degree of correlation with the aging test, thereby improving the accuracy of grouping, and further improving the accuracy of verifying the reliability of the results of the aging test of the second test facility based on the differences in the results of the aging test of the grouped semiconductor devices.
[0105] In some embodiments, there are multiple target test items, and the method further includes:
[0106] Determine the weights corresponding to each of the target test items according to the correlation between each of the target test items and the first test item; wherein, the weight corresponding to the target test item is positively correlated with the degree of correlation between the target test item and the first test item;
[0107] The grouping of the multiple semiconductor devices according to the results corresponding to the target test items includes:
[0108] Weight the results corresponding to the target test items by using the weights corresponding to the target test items to obtain the weighted results corresponding to the target test items;
[0109] Group the multiple semiconductor devices according to the weighted results corresponding to each of the target test items of each semiconductor device.
[0110] In the embodiments of the present disclosure, there are multiple target test items. For example, at least two test items corresponding to the top-ranked correlation coefficients are selected as the target test items; after the verification device determines the correlation between each target test item and the first test item, it determines the weights corresponding to each target test item according to each correlation.
[0111] Taking the correlation coefficient as an example to represent the correlation, in some embodiments, the verification device can determine the weight corresponding to the target test item as the weight corresponding to the correlation coefficient range into which the correlation coefficient between the target test item and the first test item falls according to the corresponding relationship between the preset correlation coefficient range and the weight.
[0112] In some embodiments, the verification device can also calculate the weights corresponding to each target test item by using a preset weight function, and the preset weight function can be expressed by the following formula (1):
[0113]
[0114] Among them, a(i) represents the weight corresponding to the i-th target test item, b(i) represents the correlation coefficient between the i-th target test item and the first test item, and n represents the total number of target test items; the sum of the weights corresponding to all target test items is 1.
[0115] Based on the above formula (1), it can be seen that the weight corresponding to the target test item is positively correlated with the degree of correlation between the target test item and the first test item.
[0116] It can be understood that the verification device in the embodiments of the present disclosure determines the weight positively correlated with the correlation according to the correlation between the target test item and the first test item, and determines the weighted result corresponding to the target test item, so that the weighted result corresponding to the target test item is positively correlated with the degree of correlation with the aging test, thereby improving the influence of the weighted result corresponding to the target test item with a higher degree of correlation with the aging test on grouping, and further improving the accuracy of verifying the reliability of the second test facility based on the results of the aging test of the grouped semiconductor devices.
[0117] In the embodiments of the present disclosure, after the verification device determines the weights corresponding to each target test item, in some embodiments, for each semiconductor device, the mean value of the weighted results corresponding to the semiconductor device can be calculated, and the semiconductor devices with a mean value greater than the preset mean threshold are evenly divided into M groups, and the semiconductor devices with a mean value less than or equal to the preset mean threshold are averaged into the aforementioned M groups. Thus, the verification device verifies the reliability of the second test facility according to the grouped semiconductor devices.
[0118] In other embodiments, the grouping of the plurality of semiconductor devices according to the weighted results corresponding to each target test item of each semiconductor device includes:
[0119] For each semiconductor device, the weighted results corresponding to each target test item of the semiconductor device are added to obtain the weighted sum corresponding to the semiconductor device;
[0120] The plurality of semiconductor devices are grouped according to the weighted sums corresponding to the semiconductor devices.
[0121] In the embodiments of the present disclosure, after the verification device determines the weighted results corresponding to each target test item of the semiconductor device, for each semiconductor device, the weighted results corresponding to each target test item of the semiconductor device are added to obtain the weighted sum corresponding to the semiconductor device, which can be represented by the following formula (2):
[0122]
[0123] Among them, y(i) represents the weighted sum corresponding to the i-th target test item, m(i,j) represents the result corresponding to the i-th target test item of the j-th semiconductor device, and m(i,j)*a(i) represents the weighted result corresponding to the i-th target test item of the j-th semiconductor device.
[0124] After determining the weighted sum corresponding to each semiconductor device, the verification device groups the semiconductor devices according to the weighted sum corresponding to each semiconductor device. In some embodiments, the semiconductor devices with weighted sums greater than a preset weighted threshold among the weighted sums can be evenly divided into M groups, and the remaining ungrouped semiconductor devices can be evenly divided into the aforementioned M groups. As can be seen from the foregoing, the characteristics of semiconductor devices can be characterized based on the test results of semiconductor devices. Therefore, the smaller the difference in the weighted sums corresponding to semiconductor devices, the more similar the characteristics of semiconductor devices. Then, in the embodiments of the present disclosure, grouping is performed based on the weighted sums of semiconductor devices, so that the distribution of the weighted sums corresponding to semiconductor devices among groups is similar, thereby enabling the processes of semiconductor devices among groups to be similar.
[0125] In other embodiments, the magnitudes of the weighted sums of each semiconductor device can be sorted, and the semiconductor devices can be sequentially divided into M groups according to the sorting result. Among them, the sorting serial numbers of the semiconductor devices included in the p-th group are M*q + p, where q is a natural number and p is a positive integer; taking M as 2 as an example, the sorting serial numbers of the semiconductor devices included in the first group are 2*q + 1 (odd numbers), and the sorting serial numbers of the semiconductor devices included in the second group are 2*q + 2 (even numbers). Thus, the verification device verifies the reliability of the second test facility based on the result differences after aging tests on the grouped semiconductor devices. As can be seen from the foregoing, the smaller the difference in the weighted sums corresponding to semiconductor devices, the more similar the characteristics of semiconductor devices. Therefore, the smaller the characteristic difference between semiconductor devices corresponding to weighted sums with closer sorting serial numbers. Therefore, in the embodiments of the present disclosure, grouping is performed after sorting based on the weighted sums of semiconductor devices, and it can also make the processes of semiconductor devices among groups similar.
[0126] It can be understood that the verification device in the embodiments of the present disclosure groups the semiconductor devices based on the weighted sum corresponding to each semiconductor device, so as to take into account the influence of the characteristics of semiconductor devices characterized by the results of multiple test items (such as the results corresponding to multiple second test items in the target test items) on grouping, thereby improving the accuracy of verifying the reliability of the second test facility based on the grouped semiconductor devices.
[0127] In some embodiments, the semiconductor device corresponds to a position identifier;
[0128] Grouping the multiple semiconductor devices according to the weighted sum corresponding to each of the semiconductor devices includes:
[0129] Sort the weighted sums corresponding to the semiconductor devices, and group the semiconductor devices indicated by the position identifiers associated with the weighted sums with odd sorting serial numbers into one group, and group the semiconductor devices indicated by the position identifiers associated with the weighted sums with even sorting serial numbers into another group.
[0130] In the embodiments of the present disclosure, the semiconductor devices correspond to position identifiers, such as the coordinates of the semiconductor devices on the wafer, or the serial numbers of the semiconductor devices arranged on the wafer determined in a preset order. It should be noted that in the case of multiple wafers, different wafers can be distinguished by wafer identifiers. The position identifier of the semiconductor device can also be a combination of the wafer identifier and the coordinates or serial numbers of the semiconductor device on the wafer indicated by the wafer identifier. Among them, the wafer identifier can be the wafer name, or information such as a unique identifier of letters, numbers, etc.
[0131] After determining the weighted sums corresponding to the semiconductor devices, the verification device in the embodiments of the present disclosure sorts the magnitudes of the weighted sums, and groups the semiconductor devices indicated by the position identifiers associated with the weighted sums with odd sorting serial numbers into one group, and groups the semiconductor devices indicated by the position identifiers associated with the weighted sums with even sorting serial numbers into another group. Among them, the sorting can be ascending order or descending order.
[0132] It can be understood that, as described above, the characteristics of the semiconductor devices can be characterized based on the electrical signals output by the operation of the semiconductor devices (such as the first result set and / or the second result set). Therefore, the weighted sum of the semiconductor devices can characterize the characteristics of the semiconductor devices. The smaller the difference between the weighted sums corresponding to the semiconductor devices, the smaller the difference in the characteristics of the semiconductor devices. In the embodiments of the present disclosure, the weighted sums corresponding to the semiconductor devices are sorted, and the difference between the sorted weighted sum and its adjacent weighted sum is smaller than the difference between the weighted sum and other non-adjacent weighted sums. Therefore, in the embodiments of the present disclosure, the semiconductor devices with odd sorting serial numbers are grouped into one group, and the semiconductor devices with even sorting serial numbers are grouped into another group, which can reduce the difference in the characteristics of the semiconductor devices between the groups after grouping, and further improve the accuracy of verifying the reliability of the second test facility based on the difference in the results after aging testing of the semiconductor devices grouped.
[0133] In some embodiments, the method further includes:
[0134] According to a preset data processing rule, process the results corresponding to the target test item in the second result set to obtain the processed result; wherein, the preset data processing rule includes at least one of the following: a data filtering rule, a data normalization rule;
[0135] Weighting the result corresponding to the target test item by using the weight corresponding to the target test item to obtain a weighted result corresponding to the target test item, including:
[0136] Weighting the result after data processing corresponding to the target test item by using the weight corresponding to the target test item to obtain a weighted result corresponding to the target test item.
[0137] In the embodiments of the present disclosure, before weighting the result corresponding to the target test item by using the weight corresponding to the target test item, the verification device processes the result corresponding to the target test item by using a preset data processing rule; wherein, the preset data processing rule includes a data filtering rule and a data normalization rule.
[0138] In the embodiments of the present disclosure, when the verification device filters data according to the data filtering rule, it may filter out results that do not fall within a preset parameter range, such as the range of the target test item, according to the preset parameter range; among them, the results that do not fall within the preset parameter range are such as abnormal voltage values. It can be understood that by performing data filtering processing on the result corresponding to the target test item in the embodiments of the present disclosure, the influence of abnormal data such as exceeding the range of the target test item on the weighted result can be reduced, thereby improving the accuracy of grouping semiconductor devices and verifying the reliability of the second test facility according to the results of the aging test after grouping.
[0139] In the embodiments of the present disclosure, when the verification device normalizes data according to the data normalization rule, it may normalize the result corresponding to the target test item according to a preset normalization function, where the preset normalization function can be represented by the following formula (3):
[0140]
[0141] Wherein, m(i,j) represents the result after normalization, max{M(i,j)} represents the maximum value in the results corresponding to the target test item, and min{M(i,j)} represents the minimum value in the results corresponding to the target test item.
[0142] It can be understood that since the orders of magnitude of the results of each target test item may be different, resulting in a greater impact of results with a larger order of magnitude on the weighted result, the embodiments of the present disclosure perform data normalization processing on the results corresponding to the target test items, which can reduce the influence of different orders of magnitude on the weighted result, and further improve the accuracy of subsequently determining the weighted result corresponding to the target test item according to the result after data processing, grouping semiconductor devices according to the weighted result, and verifying the reliability of the second test facility according to the results of the aging test after grouping.
[0143] In some embodiments, it is also possible to assign the result that does not fall within the preset parameter range to the minimum value in the result corresponding to the target test item. The result corresponding to the target test item after assignment can be expressed by the following formula (4):
[0144] M(i,j) = min{M(i,j)} (4);
[0145] Where M(i,j) represents the result corresponding to the target test item after assignment. In the embodiments of the present disclosure, when the result corresponding to the target test item does not fall within the preset parameter range, the result can be assigned to the minimum value in the result corresponding to the target test item by using formula (4), and the result corresponding to the target test item after normalization can be made zero by using the preset normalization function in formula (3), so as to realize the filtering process of the result corresponding to the target test item that does not fall within the preset range through normalization.
[0146] It can be understood that after the verification device of the embodiments of the present disclosure processes the result corresponding to the target test item according to the preset data processing rule, weights are assigned to the processed result of the data corresponding to the target test item to obtain the weighted result corresponding to the target test item, so that the accuracy of grouping semiconductor devices according to the weighted result in the subsequent process is relatively high.
[0147] In some embodiments, grouping the multiple semiconductor devices according to the result corresponding to the target test item includes:
[0148] When the target test item meets the preset test requirements, grouping the multiple semiconductor devices according to the result corresponding to the target test item; wherein, the preset test requirements include the test items included in the second test facility.
[0149] In the embodiments of the present disclosure, since the second test facility performing the test may add or reduce test items, therefore, after the verification device of the embodiments of the present disclosure determines the target test item, it determines whether the target test item meets the preset test requirements; wherein, the preset test requirements include the test items that can be executed by the second test facility.
[0150] If the target test item belongs to the test items that can be executed by the second test facility, the verification device groups the multiple semiconductor devices according to the result corresponding to the target test item. If the target test item does not belong to the test items that can be executed by the second test facility, that is, the second test facility does not execute this test item, so this test item is filtered, and according to the correlation between each test item other than this test item and the first test item, a target test item is reselected. For example, if 5 target test items need to be selected, among the top 6 test items sorted from high to low in terms of correlation, the 5th test item in the sorting does not meet the preset test requirements, so the test items ranked 1-4 and 6 can be determined as the target test items.
[0151] It can be understood that when determining the target test items in the embodiments of the present disclosure, according to the preset test requirements, filtering out the test items that are not executed by the second test facility can improve the purposefulness of the selected target test items, and analyzing the semiconductor device according to the results corresponding to the target test items can reduce the influence of the test items not executed by the second test facility on grouping, thereby improving the purposefulness of grouping, and further improving the accuracy of verifying the reliability of the second test facility based on the target test items related to the second test facility.
[0152] In some embodiments, the first result set includes the results of at least two first test items;
[0153] Determining the target test items according to the correlation between each of the second test items and the first test items includes:
[0154] For each second test item, summing the correlation coefficients between the second test item and each first test item; wherein, the correlation coefficient is used to characterize the correlation, and the correlation coefficient is positively correlated with the degree of correlation;
[0155] Determining the target test items according to the summed correlation coefficient corresponding to each second test item.
[0156] In the embodiments of the present disclosure, the first result set includes the results of at least two first test items, that is, the first result set includes the results corresponding to at least two aging test items, and each first test item includes different aging test parameter groups. The verification device in the embodiments of the present disclosure determines the correlation coefficient between each second test item and each first test item for each second test item, and sums them to obtain the summed correlation coefficient corresponding to the second test item; and determines the target test items according to the summed correlation coefficient corresponding to each second test item.
[0157] Exemplarily, the first result set includes N4 columns of test results respectively corresponding to N4 aging test items, and the second result set includes N1 columns of test results respectively corresponding to N1 DC test items, N2 columns of test results respectively corresponding to N2 AC test items, and N3 columns of results respectively corresponding to N3 function test items; thus, the verification device uses a correlation function, for each second test item, to determine the correlation coefficient between the 1 column of results corresponding to the second test item and the 1 column of results respectively corresponding to N4 first test items, and determines the sum value of the correlation coefficients corresponding to the second test item as the weighted correlation coefficient corresponding to the second test, and determines the test items corresponding to the weighted correlation coefficient greater than the preset correlation coefficient threshold (such as 1.5) as the target test items; further, the verification device groups the semiconductor devices according to the results corresponding to the target test items, and uses the grouped semiconductor devices to verify the reliability of the second test facility for probe testing.
[0158] It should be noted that, if the first result set includes the results of at least two first test items, when determining the weights corresponding to each target test item according to the correlation between each target test item and the first test item, for example, when determining the weights based on the foregoing formula (1), b(i) is the sum value of the correlation coefficients corresponding to the target test item and each first test item.
[0159] It can be understood that in the embodiments of the present disclosure, when the first result set includes the results of at least two first test items, that is, when at least two sets of aging test parameters of the semiconductor device are tested, the sufficiency of the test for the aging of the semiconductor device is relatively high. Therefore, it is verified that for each second test item, the device sums the correlation coefficients between the second test item and each first test item, and determines the target test item according to the summed correlation coefficients corresponding to each second test item, which can improve the accuracy of grouping the semiconductor devices based on the results of the target test item, and further improve the accuracy of verifying the second test facility.
[0160] In some embodiments, the grouped semiconductor devices include two groups of semiconductor devices;
[0161] Verifying the reliability of the second test facility for probe testing by using the grouped semiconductor devices includes:
[0162] Obtaining a second test result after performing the probe test on a group of the grouped semiconductor devices by using the first test facility;
[0163] Obtaining a third test result after performing the probe test on the other group of the grouped semiconductor devices by using the second test facility;
[0164] Determining the difference between the second test result and the third test result; [[ID=2I]]
[0165] When the difference satisfies a preset difference condition, determining that the second test facility is reliable;
[0166] When the difference does not satisfy the preset difference condition, determining that the second test facility is unreliable.
[0167] In the embodiments of the present disclosure, as can be seen from the foregoing, the verification device can divide multiple semiconductor devices into two groups, the characteristic differences between the two groups of semiconductor devices are within a preset difference range, and the processes of the semiconductor devices between the two groups are similar.
[0168] The verification device in the embodiments of the present disclosure obtains the second test result after probe testing a grouped set of semiconductor devices using the first test facility, and the third test result after probe testing another grouped set of semiconductor devices using the second test facility in the same manner as obtaining the first test result described above, and determines the difference between the second test result and the first test result. If the difference between the second test result and the third test result meets the preset difference condition, it is determined that the second test facility is reliable; if the difference does not meet the preset difference condition, it is determined that the second test facility is unreliable. Wherein, the difference may be the difference between the proportion of semiconductor devices in the second test result whose electrical signals meet the requirements corresponding to the test items and the proportion of semiconductor devices in the third test result whose electrical signals meet the requirements corresponding to the test items; or the difference between the average value of each electrical signal in the second test result and the average value of each electrical signal in the third test result.
[0169] The preset difference condition in the embodiments of the present disclosure may include the aforementioned preset difference threshold, and may also include a preset difference range. Taking the preset difference condition as the preset difference threshold as an example, when the difference is less than the preset difference threshold, it is determined that the second test facility is reliable; when the difference is greater than or equal to the preset difference threshold, it is determined that the second test facility is unreliable.
[0170] It can be understood that since the processes of the semiconductor devices in each of the two groups after grouping are similar, the test results of testing two groups of semiconductor devices with similar processes based on a more reliable test facility should also be similar. In this regard, the verification device in the embodiments of the present disclosure can verify whether the second test facility is reliable based on the difference between the second test result obtained by probe testing a group of semiconductor devices using the first test facility and the third test result obtained by probe testing another group of semiconductor devices using the second test facility. Compared with grouping the semiconductor devices into multiple groups and comparing the pairwise test results in the multiple groups, the efficiency and convenience of obtaining the verification result can be improved.
[0171] Figure 2 Shows the flow of a verification method for probe testing in the embodiments of the present disclosure Figure 2 , such as Figure 2 shown, the method includes:
[0172] S21. Analyze a large amount of data, extract N columns of test items, and calculate the weights corresponding to the N columns of test items;
[0173] In an embodiment of the present disclosure, a large amount of data corresponds to the first test results of the aforementioned probe test on multiple semiconductor devices on one or more wafers using the first test facility; wherein the first test results include a first result set after an aging test is performed on each semiconductor device, and a second result set after a test other than the aging test is performed on each semiconductor device; and N columns of test items correspond to the aforementioned target test items.
[0174] The verification device of the disclosed embodiment analyzes a large amount of data, that is, based on the result corresponding to the first test item and the results corresponding to at least two second test items in the large amount of data, determines the correlation between the first test item and each test item (including the first test item and the second test item), and determines N columns of test items based on the correlation between each test item and the first test item; wherein the degree of correlation between any test item in the N columns of test items and the first test item is greater than the degree of correlation between the test items outside the N columns of test items and the first test item.
[0175] S22, determine whether the N columns of test items are applicable to this experiment;
[0176] In the embodiment of the present disclosure, it is determined whether N columns of test items are applicable to this experiment, that is, whether the N columns of test items meet the aforementioned preset test requirements, and if the N columns of test items are applicable to this experiment, step S23 is executed; if any of the N columns of test items is not applicable to this experiment, step S21 is executed.
[0177] S23, selecting a wafer to be tested, and extracting N columns of test item test results and the coordinates of each bare die;
[0178] In the disclosed embodiments, the wafer to be tested is the aforementioned one or more wafers, the bare die corresponds to the aforementioned semiconductor device, and the coordinates of the bare die correspond to the position identifiers of the aforementioned semiconductor device. The position identifiers can be the coordinates of the semiconductor device on the wafer, or the serial numbers of the semiconductor devices arranged on the wafer in a predetermined order.
[0179] After determining N columns of test items, the verification device of the embodiment of the present disclosure selects test results of the N columns of test items of the wafer to be tested from the first test results, and each test result is associated with the coordinates of the die.
[0180] S24, remove abnormal data from the N columns of test items and perform normalization processing;
[0181] In an embodiment of the present disclosure, the verification device processes the test results of N columns of test items according to preset data processing rules, such as performing data filtering on the N columns of test items to eliminate abnormal data and normalize the data.
[0182] S25, performing weighted summing and sorting on the normalized data, and dividing the dies into two groups according to the sorting results;
[0183] In the embodiment of the present disclosure, the verification device determines the weights corresponding to each N-column test item according to the correlation between the N-column test items and the first test item; wherein, the weights corresponding to the N-column test items are positively correlated with the degree of correlation between the N-column test items and the first test item.
[0184] The verification device weights the normalized results corresponding to the N-column test items by using the weights corresponding to the N-column test items to obtain the weighted results corresponding to the N-column test items; and for each die, the weighted results corresponding to the N-column test items of the die are added up to obtain the weighted sum corresponding to the die.
[0185] After determining the weighted sums corresponding to each die, the verification device in the embodiment of the present disclosure sorts the weighted sums corresponding to each die, and classifies the dies indicated by the position identifiers associated with the weighted sums with odd sorting serial numbers into one group, and classifies the dies indicated by the position identifiers associated with the weighted sums with even sorting serial numbers into another group.
[0186] S26. Use the two groups of dies to verify and analyze the aging test items.
[0187] In the embodiment of the present disclosure, after the verification device divides multiple dies into two groups of dies, it obtains a second test result after testing one group of the grouped dies by using a first test facility, and a third test result after testing the other group of the grouped dies by using a second test facility;
[0188] Determine the difference between the second test result and the third test result, and determine that the second test facility is reliable when the difference meets a preset difference condition; determine that the second test facility is unreliable when the difference does not meet the preset difference condition.
[0189] It can be understood that the verification device divides semiconductor devices into multiple groups with similar processes according to the first test result, so as to verify the reliability of the second test facility based on the differences between the test results of each of the groups with similar processes tested separately. On the basis of taking into account the accuracy of verification, the timeliness of verification can be improved. In addition, the embodiment of the present disclosure eliminates abnormal data in the results of the N-column test items and performs normalization processing, which can further improve the accuracy of verification.
[0190] Figure 3 Shows a block diagram of a verification device for probe testing according to an embodiment of the present disclosure. It can be seen from Figure 3 that this device includes:
[0191] An acquisition module 301, configured to acquire a first test result of performing probe testing on a plurality of semiconductor devices on a wafer by using a first test facility;
[0192] A grouping module 302, configured to group the multiple semiconductor devices according to the first test result; wherein, the characteristic differences between the groups after grouping are within a preset difference range;
[0193] A verification module 303, configured to verify the reliability of probe testing by a second test facility by using the grouped semiconductor devices.
[0194] In some embodiments, the first test result includes a first result set after aging testing each of the semiconductor devices, and a second result set after testing each of the semiconductor devices other than the aging testing;
[0195] The grouping module 302 is configured to group the multiple semiconductor devices according to the first result set and the second result set;
[0196] The verification module 303 is configured to verify the reliability of performing the aging testing by using a second test facility by using the grouped semiconductor devices.
[0197] In some embodiments, the first result set includes results corresponding to a first test item, and the second result set includes results corresponding to at least two second test items;
[0198] The grouping module 302 is configured to determine the correlation between the first test item and each of the second test items according to the results corresponding to the first test item and the results corresponding to the at least two second test items; determine a target test item according to the correlation between each of the second test items and the first test item; wherein, the correlation degree between the target test item and the first test item is greater than the correlation degree between the test items other than the target test item and the first test item; group the multiple semiconductor devices according to the results corresponding to the target test item.
[0199] In some embodiments, there are multiple target test items, and the apparatus further includes:
[0200] A determination module 304, configured to determine the weights corresponding to the target test items according to the correlation between each of the target test items and the first test item; wherein, the weight corresponding to the target test item is positively correlated with the correlation degree between the target test item and the first test item;
[0201] The grouping module 302 is configured to weight the results corresponding to the target test items by using the weights corresponding to the target test items to obtain weighted results corresponding to the target test items; group the multiple semiconductor devices according to the weighted results corresponding to each of the target test items of each semiconductor device.
[0202] In some embodiments, the grouping module 302 is configured to add up the weighted results corresponding to each target test item of each semiconductor device to obtain the weighted sum corresponding to the semiconductor device; and group the multiple semiconductor devices according to the weighted sums corresponding to the semiconductor devices.
[0203] In some embodiments, the semiconductor device has a position identifier;
[0204] The grouping module 302 is configured to sort the weighted sums corresponding to the semiconductor devices, and group the semiconductor devices indicated by the position identifiers associated with the weighted sums with odd sorting serial numbers into one group, and group the semiconductor devices indicated by the position identifiers associated with the weighted sums with even sorting serial numbers into another group.
[0205] In some embodiments, the apparatus further includes:
[0206] A processing module 305, configured to perform data processing on the results corresponding to the target test item in the second result set according to a preset data processing rule to obtain a result after data processing; wherein the preset data processing rule includes at least one of the following: a data filtering rule, a data normalization rule;
[0207] The grouping module 302 is configured to weight the results after data processing corresponding to the target test item by using the weight corresponding to the target test item to obtain the weighted result corresponding to the target test item.
[0208] In some embodiments, the grouping module 302 is configured to group the multiple semiconductor devices according to the results corresponding to the target test item when the target test item meets a preset test requirement; wherein the preset test requirement includes the test items included in the second test facility.
[0209] In some embodiments, the first result set includes the results of at least two first test items;
[0210] The grouping module 302 is configured to add up the correlation coefficients between each second test item and each first test item; wherein the correlation coefficient is used to characterize the correlation, and the correlation coefficient is positively correlated with the degree of correlation; and determine the target test item according to the added correlation coefficient corresponding to each second test item.
[0211] In some embodiments, the grouped semiconductor devices include two groups of semiconductor devices;
[0212] The verification module 303 is configured to obtain a second test result after performing the probe test on a grouped set of semiconductor devices using the first test facility; obtain a third test result after performing the probe test on another grouped set of semiconductor devices using the second test facility; determine the difference between the second test result and the third test result; determine that the second test facility is reliable when the difference meets a preset difference condition; and determine that the second test facility is unreliable when the difference does not meet the preset difference condition.
[0213] Figure 4 FIG. shows a schematic physical structure diagram of an electronic device according to an embodiment of the present disclosure, as Figure 4 shown, including: a processor 01, a memory 02 storing executable instructions of the processor 01, a communication interface 03, and a bus 04 for connecting the processor 01, the memory 02, and the communication interface 03. Among them, the processor 01 is configured to execute a verification method program for probe testing stored in the memory.
[0214] In an embodiment of the present invention, the above-mentioned processor 01 may be at least one of an application specific integrated circuit (ASIC), a digital signal processor (DSP), a digital signal processing device (DSPD), a programmable logic device (PLD), a field programmable gate array (FPGA), a central processing unit (CPU), a controller, a microcontroller, and a microprocessor. It can be understood that for different devices, the electronic device for implementing the above processor function may be other, and the embodiments of the present invention do not make specific limitations. The terminal may further include a memory 02, which may be connected to the processor 01. Among them, the memory 02 is used to store semantic analysis program code, and the program code includes computer operation instructions. The memory 02 may include a high-speed RAM memory and may also include non-volatile memory, for example, at least two disk memories.
[0215] In practical applications, the above-mentioned memory 02 can be a volatile memory, such as a Random-Access Memory (RAM); or a non-volatile memory, such as a Read-Only Memory (ROM), a flash memory, a Hard Disk Drive (HDD), or a Solid-State Drive (SSD); or a combination of the above types of memories, and provides instructions and data to the processor 01.
[0216] In addition, in this embodiment, each functional module can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional module.
[0217] If the integrated unit is implemented in the form of a software functional module and is not sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this embodiment, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the method of this embodiment. The aforementioned storage medium includes: USB flash drives, mobile hard disks, Read Only Memories (ROMs), Random Access Memories (RAMs), magnetic disks, or optical discs, etc., which can store program codes.
[0218] The embodiments of the present disclosure provide a storage medium, and the computer storage medium stores computer-executable instructions; after the computer-executable instructions are executed by a processor, the methods provided by one or more of the foregoing technical solutions can be implemented. For example, Figure 1 at least one of the verification methods of the probe test shown.
[0219] In several embodiments provided by the present disclosure, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of the modules is only a logical function division. In actual implementation, there may be other division methods. For example, multiple modules or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the couplings between the components shown or discussed, either direct couplings or communication connections, can be through some interfaces. The indirect couplings or communication connections of the devices or units can be electrical, mechanical or other forms.
[0220] The modules described above as separate components may or may not be physically separated. The components shown as modules may or may not be physical modules, that is, they can be located in one place or distributed to multiple network modules. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0221] In addition, in each embodiment of the present disclosure, all the functional modules can be integrated in one processing module, or each module can be a separate module alone, or two or more modules can be integrated in one module. The above-mentioned integrated modules can be implemented in the form of hardware, or in the form of a combination of hardware and software functional modules. Those of ordinary skill in the art can understand that all or part of the steps of implementing the above method embodiments can be completed by hardware related to program instructions. The foregoing program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps including the above method embodiments. The foregoing storage medium includes various media that can store program codes, such as removable storage devices, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs.
[0222] The methods disclosed in several method embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments.
[0223] The features disclosed in several device embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new device embodiments.
[0224] The features disclosed in several method or device embodiments provided by the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.
[0225] As described above, it is only the specific implementation manner of the present disclosure. However, the protection scope of the present disclosure is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present disclosure can easily think of changes or substitutions, which should all be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims described above.
Claims
1. A verification method for probe testing, characterized in that, The method includes: Obtaining a first test result of probe testing multiple semiconductor devices on a wafer using a first test facility; Grouping the multiple semiconductor devices according to the first test result; wherein, the characteristic differences between the groups after grouping are within a preset difference range; Verifying the reliability of probe testing using a second test facility with the grouped semiconductor devices.
2. The method according to claim 1, wherein The first test result includes a first result set after aging testing each of the semiconductor devices and a second result set after testing each of the semiconductor devices other than the aging testing; The grouping the multiple semiconductor devices according to the first test result includes: Grouping the multiple semiconductor devices according to the first result set and the second result set; The verifying the reliability of testing using a second test facility with the grouped semiconductor devices includes: Verifying the reliability of the aging testing using a second test facility with the grouped semiconductor devices.
3. The method according to claim 2, wherein The first result set includes results corresponding to a first test item, and the second result set includes results corresponding to at least two second test items; The grouping the multiple semiconductor devices according to the first result set and the second result set includes: Determining the correlation between the first test item and each of the second test items according to the results corresponding to the first test item and the results corresponding to the at least two second test items; Determining a target test item according to the correlation between each of the second test items and the first test item; wherein, the correlation degree between the target test item and the first test item is greater than the correlation degree between the test items other than the target test item and the first test item; Grouping the multiple semiconductor devices according to the results corresponding to the target test item.
4. The method according to claim 3, characterized in that, There are multiple target test items, and the method further includes: Determining the weights corresponding to the target test items according to the correlation between each of the target test items and the first test item; wherein, the weight corresponding to the target test item is positively correlated with the correlation degree between the target test item and the first test item; The grouping the multiple semiconductor devices according to the results corresponding to the target test item includes: Weighting the results corresponding to the target test item using the weights corresponding to the target test item to obtain a weighted result corresponding to the target test item; Grouping the multiple semiconductor devices according to the weighted results corresponding to the target test items of each semiconductor device.
5. The method according to claim 4, wherein The grouping the multiple semiconductor devices according to the weighted results corresponding to the target test items of each semiconductor device includes: For each semiconductor device, adding up the weighted results corresponding to the target test items of the semiconductor device to obtain a weighted sum corresponding to the semiconductor device; Grouping the multiple semiconductor devices according to the weighted sums corresponding to the semiconductor devices.
6. The method according to claim 4, characterized in that, The semiconductor device is corresponding to a position identifier; The grouping the multiple semiconductor devices according to the weighted sums corresponding to the semiconductor devices includes: Sort the weighted sums corresponding to each of the semiconductor devices, and group the semiconductor devices indicated by the position identifiers associated with the weighted sums with odd sorting sequence numbers into one group, and group the semiconductor devices indicated by the position identifiers associated with the weighted sums with even sorting sequence numbers into another group.
7. The method according to claim 4, wherein The method further includes: According to a preset data processing rule, perform data processing on the results corresponding to the target test item in the second result set to obtain a result after data processing; wherein, the preset data processing rule includes at least one of the following: a data filtering rule, a data normalization rule; The step of weighting the result corresponding to the target test item by using the weight corresponding to the target test item to obtain a weighted result corresponding to the target test item includes: Use the weight corresponding to the target test item to weight the result after data processing corresponding to the target test item to obtain the weighted result corresponding to the target test item.
8. The method according to claim 3, characterized in that, The step of grouping the multiple semiconductor devices according to the result corresponding to the target test item includes: When the target test item meets a preset test requirement, group the multiple semiconductor devices according to the result corresponding to the target test item; wherein, the preset test requirement includes the test items included in the second test facility.
9. The method according to claim 3, wherein The first result set includes the results of at least two first test items; The step of determining a target test item according to the correlation between each of the second test items and the first test item includes: For each second test item, sum the correlation coefficients between the second test item and each first test item; wherein, the correlation coefficient is used to characterize the correlation, and the correlation coefficient is positively correlated with the degree of correlation; Determine the target test item according to the summed correlation coefficient corresponding to each second test item.
10. The method according to claim 1, characterized in that, The grouped semiconductor devices include two groups of semiconductor devices; The step of verifying the reliability of the second test facility for probe testing by using the grouped semiconductor devices includes: Obtain a second test result after performing the probe test on a group of the grouped semiconductor devices by using the first test facility; Obtain a third test result after performing the probe test on the other group of the grouped semiconductor devices by using the second test facility; Determine the difference between the second test result and the third test result; When the difference meets a preset difference condition, determine that the second test facility is reliable; When the difference does not meet the preset difference condition, determine that the second test facility is unreliable.
11. A verification device for probe testing, characterized in that, The device includes: An acquisition module, configured to acquire a first test result of performing a probe test on multiple semiconductor devices on a wafer by using a first test facility; A grouping module, configured to group the multiple semiconductor devices according to the first test result; wherein, the characteristic differences between the grouped groups of semiconductor devices are within a preset difference range; A verification module, configured to verify the reliability of the second test facility for probe testing by using the grouped semiconductor devices.
12. An electronic device, characterized in that, Includes: A memory, configured to store computer-executable instructions; A processor, connected to the memory, for implementing the method according to any one of claims 1 to 10 by executing the computer-executable instructions.
13. A computer storage medium storing computer-executable instructions; after the computer-executable instructions are executed by a processor, the method according to any one of claims 1 to 10 can be implemented.
Citation Information
Patent Citations
User interface test method and device
CN113468066A
Flying probe test method, flying probe test device, computer equipment and storage medium
CN114910778A