Charge reading circuit and method, multi-channel charge reading device and method

Abstract

The present disclosure provides a charge readout circuit, method, multi-channel charge readout device and method. The charge readout circuit includes: a current integration circuit for inputting an input voltage that changes according to the amount of charge; a first charge reading branch for, when the input voltage is greater than a first reference voltage, charging the current integration circuit in an inverted manner to balance the amount of charge in the current integration circuit and generating a first pulse signal; a second charge reading branch for, when the input voltage is greater than a second reference voltage, charging the current integration circuit in an inverted manner to balance the amount of charge in the current integration circuit and generating a second pulse signal; the second reference voltage is greater than the first reference voltage, and the inverted charging voltage of the second charge reading branch is greater than the inverted charging voltage of the first charge reading branch. This charge readout circuit can achieve high-precision, large-range and multi-channel readout of weak charges, and improves the conversion range of dynamic charges under the same switching conditions with the same performance.

Description

Technical Field

[0001] The present disclosure relates to the field of electronic technologies, and in particular, to a charge readout circuit and method, and a multi-channel charge readout device and method. Background Art

[0002] The beam position and profile are key factors affecting particle therapy devices. To accurately irradiate tumors with a dose and ensure the safety and reliability of medical devices, it is necessary to monitor the beam position and profile in real time, providing important control data for doctors and physicists. Usually, in a treatment system, multi-channel weak charge signals are output through a strip ionization chamber at the treatment terminal, and then the real-time monitoring of the beam position and profile can be achieved through a multi-channel charge readout device. Generally, the output charge signal range of the strip ionization chamber used for beam monitoring is large and the number of channels is large. The span of the output charge range can reach six orders of magnitude (pA to μA), and the number of channels can generally reach 100 to 400. For multi-channel weak charge signals, they need to be read out after a series of front-end processing, conversion, and amplification. When processing such weak signals, attention needs to be paid to noise, interference, especially problems in terms of processing speed. Therefore, developing a multi-channel and wide-range weak charge readout device has become an urgent problem to be solved.

[0003] The prior art generally uses a method of real-time current-voltage conversion to read out the input charge amount. The advantage of this method is that real-time information of the beam can be obtained, but this will result in a large amount of data, with high requirements for subsequent real-time data transmission and processing, leading to a high manufacturing cost. Secondly, the interference of environmental noise on the circuit is also relatively large with this method, affecting the accuracy of beam monitoring. Thirdly, in order to ensure the conversion accuracy of the input charge, the prior art generally uses a method of alternately operating two integrators, which is likely to cause poor connection when switching between the two integrators. Finally, the prior art solutions generally use a multiplexing circuit to achieve serial output of multi-channel signals. While this solution reduces the complexity of the data acquisition and processing system, it increases the signal conversion readout time and reduces the signal processing efficiency. Summary of the Invention

[0004] In view of the above problems, the present invention provides a charge readout circuit and method, and a multi-channel charge readout device and method to solve the above problems.

[0005] One aspect of the present disclosure provides a charge readout circuit, comprising: a current integration circuit configured to receive an input charge and output an input voltage that varies with the amount of the input charge; a first charge reading branch, whose input terminal is connected to the output terminal of the current integration circuit, whose first output terminal is connected to the input terminal of the current integration circuit, and whose second output terminal is connected to an external reading circuit, the first output terminal being configured to, when the input voltage is greater than a first reference voltage, charge the current integration circuit in an inverted manner to balance the amount of charge in the current integration circuit, and the second output terminal being configured to output a first pulse signal generated when the input voltage is greater than the first reference voltage; a second charge reading branch, whose input terminal is connected to the output terminal of the current integration circuit, whose third output terminal is connected to the input terminal of the current integration circuit, and whose fourth output terminal is connected to an external reading circuit, the third output terminal being configured to, when the input voltage is greater than a second reference voltage, charge the current integration circuit in an inverted manner to balance the amount of charge in the current integration circuit, and the fourth output terminal being configured to output a second pulse signal generated when the input voltage is greater than the second reference voltage; wherein the second reference voltage is greater than the first reference voltage, and the inverted charging voltage generated by the second charge reading branch is greater than the inverted charging voltage generated by the first charge reading branch.

[0006] Optionally, the current integration circuit includes: an operational amplifier and a variable integration capacitor; the inverting input terminal of the operational amplifier is connected to the input terminal of the charge, and the non-inverting input terminal is grounded; one end of the variable integration capacitor is connected to the inverting input terminal of the operational amplifier, and the other end is connected to the output terminal of the operational amplifier.

[0007] Optionally, the first charge reading branch includes: a first comparator, a first timer, a first switch, and a first constant current source; the positive input terminals of the first comparator are all connected to the output terminal of the current integration circuit, and the negative input terminal is connected to the first reference voltage, and is configured to output a first trigger signal to the first timer when the input voltage is greater than the first reference voltage; the output terminal of the first timer is connected to the first switch that controls the on / off of the first constant current source, and is configured to generate a first pulse signal that closes the first switch based on the first trigger signal; the first constant current source is configured to reversely charge the current integration circuit when the first switch is closed; the second charge reading branch includes: a second comparator, a second timer, a second switch, and a second constant current source; the positive input terminals of the second comparator are all connected to the output terminal of the current integration circuit, and the negative input terminal is connected to the second reference voltage, and is configured to output a second trigger signal to the second timer when the input voltage is greater than the second reference voltage; the output terminal of the second timer is connected to the second switch that controls the on / off of the second constant current source, and is configured to generate a second pulse signal that closes the second switch based on the second trigger signal; the second constant current source is configured to reversely charge the current integration circuit when the second switch is closed.

[0008] Optionally, the first timer and the second timer include a high level state, a low level state, and an initial state. Among them, the high level state is the working state of outputting a high level to generate the first pulse signal, and the timing duration is Ht. The low level state is the working state of outputting a low level after the high level state ends, and the timing duration is Lt, where Ht≥Lt>0. The initial state is the static state after the low level state ends.

[0009] A second aspect of the present disclosure provides a multi-channel charge reading device, including a plurality of charge reading circuits according to any one of the first aspects and a data acquisition card; each of the charge reading circuits is respectively connected to a charge channel, and is configured to read the input charge transmitted by the charge channel; the data acquisition card is connected to the output terminals of the charge reading circuits, and is configured to collect the pulse signals generated by the charge reading circuits reading the input charge.

[0010] Optionally, the device further includes: a digital integrated circuit, connected to the first timer and the second timer in the charge reading circuit, and configured to set the pulse width of the pulse signals generated by the first timer and the second timer.

[0011] Optionally, the device further includes: a first photoelectric conversion module and a second photoelectric conversion module; an input end of the first photoelectric conversion module is connected to an output end of each of the charge readout circuits, and an output end thereof is connected to an optical fiber, configured to convert a pulse signal generated by the charge readout circuit reading an input charge into an optical signal, and transmit the optical signal to the second photoelectric conversion module through the optical fiber; an input end of the second photoelectric conversion module is connected to the optical fiber, and an output end thereof is connected to the digital integrated circuit, configured to convert the optical signal into an electrical signal and output the electrical signal to the digital integrated circuit.

[0012] The third aspect of the present disclosure provides a charge readout method, including: receiving a charge output from a charge channel to generate an input voltage corresponding to the charge; comparing the input voltage with a first reference voltage and a second reference voltage, and when the input voltage is greater than the first reference voltage or the second reference voltage, generating an inverted charging voltage to charge the current integration circuit in an inverted manner to balance the amount of charge in the current integration circuit, and when the input voltage is greater than the first reference voltage, outputting a first pulse signal, and when the input voltage is greater than the second reference voltage, outputting a second pulse signal; wherein, the second reference voltage is greater than the first reference voltage, and the inverted charging voltage generated when the input voltage is greater than the second reference voltage is greater than the inverted charging voltage generated when the input voltage is greater than the first reference voltage.

[0013] The fourth aspect of the present disclosure provides a multi-channel charge readout method, including: receiving charges output from multiple charge channels to respectively generate input voltages corresponding to the charges output from each of the charge channels; comparing the input voltages of each of the charge channels with a first reference voltage and a second reference voltage respectively, and when the input voltage is greater than the first reference voltage or the second reference voltage, generating an inverted charging voltage to charge the current integration circuit in an inverted manner to balance the amount of charge in the current integration circuit, and when the input voltage is greater than the first reference voltage, outputting a first pulse signal, and when the input voltage is greater than the second reference voltage, outputting a second pulse signal; converting the first pulse signals and the second pulse signals generated by each of the charge channels into optical signals and transmitting them through an optical fiber; converting the optical signals into electrical signals and collecting the electrical signals, where the electrical signals represent the amount of charge output from the corresponding charge channels; wherein, the second reference voltage is greater than the first reference voltage, and the inverted charging voltage generated when the input voltage is greater than the second reference voltage is greater than the inverted charging voltage generated when the input voltage is greater than the first reference voltage.

[0014] At least one of the above technical solutions adopted in the embodiments of the present disclosure can achieve the following beneficial effects:

[0015] 1. The present disclosure adopts the charge balance principle, automatically switches the constant current source that balances with it according to the magnitude of the input charge amount, better solves the contradiction between the measurement range and the resolution, and realizes the readout of weak charges with high precision, large measurement range, and multiple channels. Under the switching conditions of the same performance, the conversion range of dynamic charges is greatly improved.

[0016] 2. Adopt the technology of charge-frequency conversion to convert the input charge signal into a frequency signal, which greatly reduces the subsequent data acquisition volume and reduces the requirements for subsequent data transmission and processing.

[0017] 3. A single channel adopts a single integrator to work without switching the input signal. Within the full measurement range, there will be no loss of charge information during the dynamic charge reading process, and it has higher conversion accuracy.

[0018] 4. During the transmission process of the output frequency signal, adopt the method of two photoelectric conversions to convert the pulse signal into an optical signal for transmission, which maximally avoids the interference of environmental noise on signal transmission and ensures the accuracy of beam current monitoring. Description of the Drawings

[0019] To more fully understand the present disclosure and its advantages, reference will now be made to the following description in conjunction with the accompanying drawings, in which:

[0020] Figure 1 Schematically shows a schematic diagram of a charge readout circuit provided by an embodiment of the present disclosure;

[0021] Figure 2 Schematically shows a schematic diagram of the working state process of a timer provided by an embodiment of the present disclosure;

[0022] Figure 3 Schematically shows a schematic diagram of the basic working waveform of a charge readout circuit provided by an embodiment of the present disclosure;

[0023] Figure 4 Schematically shows a schematic diagram of a current integration circuit provided by an embodiment of the present disclosure;

[0024] Figure 5 Schematically shows a schematic diagram of a comparison circuit provided by an embodiment of the present disclosure;

[0025] Figure 6 Schematically shows a schematic diagram of a constant current source circuit provided by an embodiment of the present disclosure;

[0026] Figure 7 Schematically shows a schematic diagram of a charge readout device provided by an embodiment of the present disclosure. Detailed Embodiments

[0027] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present disclosure. In the following detailed description, for the sake of explanation, numerous specific details are set forth in order to provide a comprehensive understanding of the embodiments of the present disclosure. However, obviously, one or more embodiments can also be implemented without these specific details. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily obscuring the concepts of the present disclosure.

[0028] The terms used herein are merely for describing specific embodiments and are not intended to limit the present disclosure. The terms "including", "comprising", etc. used herein indicate the presence of the described features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0029] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0030] A charge reading circuit provided by an embodiment of the present disclosure includes a current integration circuit, a first charge reading branch, and a second charge reading branch.

[0031] The current integration circuit is configured to receive an input charge and output an input voltage that varies with the amount of the input charge.

[0032] The input end of the first charge reading branch is connected to the output end of the current integration circuit, its first output end is connected to the input end of the current integration circuit, its second output end is connected to an external reading circuit. The first output end is configured to, when the input voltage is greater than a first reference voltage, charge the current integration circuit in an opposite phase to balance the amount of charge in the current integration circuit, and the second output end is configured to output a first pulse signal generated when the input voltage is greater than the first reference voltage.

[0033] The input end of the second charge reading branch is connected to the output end of the current integration circuit, its third output end is connected to the input end of the current integration circuit, its fourth output end is connected to an external reading circuit. The third output end is configured to, when the input voltage is greater than a second reference voltage, charge the current integration circuit in an opposite phase to balance the amount of charge in the current integration circuit, and the fourth output end is configured to output a second pulse signal generated when the input voltage is greater than the second reference voltage.

[0034] Wherein, the second reference voltage is greater than the first reference voltage, and the reverse charging voltage generated by the second charge reading branch is greater than the reverse charging voltage generated by the first charge reading branch.

[0035] The charge readout circuit provided by the embodiment of the present disclosure adopts the charge balance principle and automatically switches the constant current source that is balanced with the input charge according to the size of the input charge, which effectively solves the contradiction between the range and resolution. in and pulse number V P11 and V P12 There is the following relationship: Qin=K1*V P11 +K2*V P12 , where K1 and K2 are precision factors, K2 ≥ K1, and the values of K1 and K2 determine the resolution of the entire circuit.

[0036] Figure 1 A schematic diagram of a charge readout circuit provided by an embodiment of the present disclosure is schematically shown.

[0037] like Figure 1 As shown, in a charge readout circuit provided by an embodiment of the present disclosure, a current integration circuit includes an operational amplifier U1 and a variable integrating capacitor C1; the inverting input terminal of the operational amplifier U1 is connected to the charge input terminal, and the non-inverting input terminal is grounded; one end of the variable integrating capacitor C1 is connected to the non-inverting input terminal of the operational amplifier U1, and the other end is connected to the output terminal of the operational amplifier U1. The output terminal of the operational amplifier U1 is also connected to the non-inverting input terminals of comparators A1 and A2.

[0038] The first charge reading branch includes: a first comparator A1, a first timer T1, a first switch KB1 and a first constant current source I1; the positive input terminal of the first comparator A1 is connected to the output terminal of the current integration circuit, and the negative input terminal is connected to the first reference voltage Vref1, and is used to output a first trigger signal U to the first timer T1 when the input voltage V1 is greater than the first reference voltage Vref1. c11 The output terminal of the first timer T1 is connected to the first switch KB1 that controls the on-off of the first constant current source I1, and is used to trigger the first trigger signal U based on the first trigger signal U1. c11 Generates a first pulse signal V that closes the first switch KB1 P11 The first constant current source I1 is used to charge the current integration circuit in reverse when the first switch KB1 is closed.

[0039] The second charge reading branch includes: a second comparator A12, a second timer T2, a second switch KB2 and a second constant current source I2; the positive input terminal of the second comparator A12 is connected to the output terminal of the current integration circuit, and the negative input terminal is connected to the second reference voltage Vref2, and is used to output a second trigger signal U to the second timer T2 when the input voltage V1 is greater than the second reference voltage Vref2. c12 The output terminal of the second timer T2 is connected to the second switch KB2 that controls the on-off of the second constant current source I2, and is used based on the second trigger signal Uc12 Generate a second pulse signal V that closes the second switch KB2 P12 ; The second constant current source I2 is used to charge the current integration circuit in the reverse direction when the second switch KB2 is closed.

[0040] Figure 2 Schematically shows a schematic diagram of the working state flow of a timer provided by an embodiment of the present disclosure.

[0041] As Figure 2 shown, the first timer T1 and the second timer T2 provided by the embodiments of the present disclosure include a high-level state, a low-level state, and an initial state. Among them, the high-level state is the working state of outputting a high level to generate a first pulse signal, and the timing length is Ht. The low-level state is the working state of outputting a low level after the high-level state ends, and the timing length is Lt. Ht≥Lt>0, and the initial state is the stationary state after the low-level state ends.

[0042] Taking the timer T1 as an example, the initial state is Timinit, and the timer output signal V P11 is 0. At the rising edge of the system clock, the output signal Uc11 of the comparator is detected. If Uc11 = 1, the state of the timer changes from the initial state Timinit to the high-level state Timon. Otherwise, the timer remains in the initial state. In the high-level state Timon, the timer starts and outputs a high level. When the timing time reaches the set value Ht of the high level, the state changes from the high-level state Timon to the low-level state Timoff. In the low-level state, the timer output signal V P11 is 0. When the timing time reaches the time set value Lt of the low level, the state changes from the low-level state Timoff to the initial state Timinit. Among them, the low-level state Timoff can ensure that when the accumulated input charge is relatively large, the output interval of the pulse is guaranteed, and the timer will not always be in the high-level state.

[0043] The output signal of the timer is used to control the switch of the constant current source on the one hand, and on the other hand, as the output signal of the multi-channel charge readout device, it directly enters the photoelectric conversion module. The high-level output set time Ht and the low-level output set time Lt of the timer can be controlled and set by the FPGA or CPLD, generally satisfying Ht≥Lt>0, and the maximum output frequency of the pulse is Fmax = 1 / (Ht + Lt).

[0044] Figure 3 Schematically shows a schematic diagram of the basic working waveform of a charge readout circuit provided by an embodiment of the present disclosure.

[0045] As Figure 3As shown, when the input charge Qin is negative and small, the voltage V1 output by the operational amplifier is positive, and the output voltage V1 continues to increase as the input charge quantity increases. When the output voltage V1 of the operational amplifier increases to the threshold voltage Vref1 of the comparator A1, the output of the comparator A1 changes from low level to high level. After the timer T1 receives a high-level signal at its input terminal, it starts to work and enters the high-level state. The output terminal VP11 of the timer T1 becomes high level, causing the analog switch KB1 to close, connecting the constant current source I1 to one end of the integration capacitor C1 to charge the integration capacitor in reverse. As the charging continues, the output terminal V1 of the operational amplifier gradually decreases. After a fixed high-level holding time Ht, the output terminal VP11 of the timer T1 becomes low level, and the output terminal of the timer T1 outputs a pulse V P11 , and the constant current source I1 is disconnected from the input terminal of the integration capacitor. As the charge continues to be input, the output voltage V1 of the operational amplifier gradually increases again. When the output voltage V1 increases to the threshold voltage Vref1 of the comparator A1, the above process is repeated. In this case, only the timer T1 outputs a pulse signal. As the input charge quantity Qin continues to increase, the output terminal V1 of the operational amplifier increases rapidly. Even if the analog switch KB1 switches at the fastest frequency, the constant current source I1 cannot discharge all the charge on the integration capacitor by reverse charging. This causes the output voltage V1 of the operational amplifier to keep increasing and exceed the threshold voltage Vref1 of the comparator A1. When the output voltage V1 increases to the threshold voltage Vref2 of the comparator A2, the output of the comparator A2 changes from low level to high level. After the timer T2 receives a high-level signal at its input terminal, it starts to work and enters the high-level state. The output terminal VP12 of the timer T2 becomes high level, causing the analog switch KB2 to close, connecting the constant current source I2 to one end of the integration capacitor C1 to charge the integration capacitor in reverse. As the charging continues, the output terminal V1 of the operational amplifier gradually decreases. After a fixed high-level holding time Ht, the output terminal VP12 of the timer T2 becomes low level, and the output terminal of the timer T2 outputs a pulse, and the constant current source I2 is disconnected from the input terminal of the integration capacitor. As the charge continues to be input, the output voltage V1 of the operational amplifier gradually increases again. When the output voltage V1 increases to the threshold voltage Vref2 of the comparator A2, the above process is repeated. In this case, both the timers A1 and A2 output pulse signals.

[0046] Therefore, when the input charge quantity is small, the comparator A2, the analog switch KB2, and the timer T2 are not triggered to start working, and the timer T2 does not output a pulse signal. Only the timer A1 outputs a pulse signal V P11 output. The input charge quantity Qin and V P11It is directly proportional. The entire circuit operates within a small range, having a high resolution. Only when the input charge quantity is large enough that the analog switch KB1 cannot balance the charge quantity of the integration capacitor C1 even when operating at the maximum frequency, will the comparator A2, the analog switch KB2, and the timer T2 be triggered to start working. The entire circuit automatically switches to the large range. In this case, the total number of output pulses should be V P11 and V P12 The sum. The total input charge quantity Qin and the number of pulses V P11 and V P12 There is the following relationship: Qin = K1 * V P11 + K2 * V P12 , where K1 and K2 are precision factors, K2 ≥ K1, and the values of K1 and K2 determine the resolution of the entire circuit. K1 and K2 can be reasonably selected according to the range and maximum output frequency of the entire circuit.

[0047] In this embodiment, control parameters such as the precision factors K1, K2, the high and low level setting values Ht, Lt, the threshold voltages Vref1, Vref2, and the value of the integration capacitor C2 can all be set according to the actual application requirements of the device, making the device more flexible and versatile in use.

[0048] Figure 4 , 5 , 6 schematically show a schematic diagram of a current integration circuit, a comparison circuit diagram, and a constant current source circuit diagram provided by an embodiment of the present disclosure in sequence.

[0049] As Figure 4 shown, an operational amplifier AD8065ARTZ and an integration capacitor with a precision of ±0.1 pF and 1 pF can be used; as Figure 5 shown, a comparator chip TLV3201 and a reference voltage source ADR130BUJZ can be used to ensure the stability of the threshold voltage; as Figure 6 shown, a precise voltage source ADR130BUJZ and a precision CMOS operational amplifier AD8605ARTZ can be used to ensure the stability of the constant current source.

[0050] According to the charge readout circuit provided by the embodiments of the present disclosure, by adopting the charge balance principle, the constant current source for balancing is automatically switched according to the magnitude of the input charge amount, which preferably solves the contradiction between the measurement range and the resolution, and realizes the readout of weak charges with high precision, large measurement range, and multiple channels. Under the switching conditions of the same performance, the conversion range of dynamic charges is greatly improved; by adopting the charge-frequency conversion technology, the input charge signal is converted into a frequency signal, which greatly reduces the subsequent data acquisition amount and reduces the requirements for subsequent data transmission and processing; a single integrator is used for a single channel without switching the input signal, and no loss of charge information will occur during the dynamic charge reading process within the full measurement range, and it has higher conversion accuracy.

[0051] The present disclosure also provides a charge readout method, including operations S110 to S120.

[0052] S110, receiving the charge output by the charge channel and generating an input voltage corresponding to the charge.

[0053] S120, comparing the input voltage V1 with the first reference voltage Vref1 and the second reference voltage Vref2. When the input voltage V1 is greater than the first reference voltage Vref1 or the second reference voltage Vref2, an inverted charging voltage V is generated. p11 Performing inverted charging on the current integration circuit to balance the charge amount in the current integration circuit, and when the input voltage V1 is greater than the first reference voltage Vref1, outputting the first pulse signal V. p11 When the input voltage is greater than the second reference voltage Vref2, outputting the second pulse signal V. p12 .

[0054] Wherein, the second reference voltage Vref2 is greater than the first reference voltage Vref1, and the inverted charging voltage generated when the input voltage V1 is greater than the second reference voltage Vref2 is greater than the inverted charging voltage generated when the input voltage V1 is greater than the first reference voltage Vref1.

[0055] According to this method, the measurement range of charge readout is expanded from Vref1 to Vref2, and pulse signals with different pulse frequencies are generated when the charge level is in different states, which preferably solves the contradiction between the measurement range and the resolution. Under the switching conditions of the same performance, the conversion range of dynamic charges is greatly improved.

[0056] It should be noted that this method has the same technical features as the Figure 1 shown charge readout circuit, so it can achieve the same technical effects and will not be elaborated here.

[0057] Figure 7 The schematic diagram of a charge readout device provided by the embodiments of the present disclosure is schematically shown.

[0058] As shown Figure 7 in the figure, a charge reading device provided by an embodiment of the present disclosure includes a multi-channel charge reading circuit and a data acquisition card. Each charge reading circuit is respectively connected to a charge channel and is used to read the input charge transmitted by the charge channel. The data acquisition card is connected to the output ends of the charge reading circuits and is used to acquire the pulse signals generated by the charge reading circuits when reading the input charge. A digital integrated circuit is connected to a first timer and a second timer in the charge reading circuit and is used to set the pulse widths of the pulse signals generated by the first timer and the second timer.

[0059] In this embodiment, each channel includes an integrating circuit, two groups of constant current sources, two groups of comparators, and two groups of timers. The multi-channel charge reading device is composed of N such single channels, and the timers of all channels are implemented by an FPGA or a CPLD. The working mode of the charge reading circuit in this embodiment is the same as that of the charge reading circuit Figure 1 shown in the figure and will not be elaborated here.

[0060] In this embodiment, the device may include a first photoelectric conversion module A and a second photoelectric conversion module B; wherein, the input end of the first photoelectric conversion module 1 is connected to the output ends of the charge reading circuits, and its output end is connected to an optical fiber, and is used to convert the pulse signals generated by the charge reading circuits when reading the input charge into optical signals and transmit the optical signals to the second photoelectric conversion module B through the optical fiber; the input end of the second photoelectric conversion module B is connected to the optical fiber, and its output end is connected to the digital integrated circuit, and is used to convert the optical signal into an electrical signal and output it to the digital integrated circuit. During the transmission of the output frequency signal, the method of two-time photoelectric conversion is adopted to convert the pulse signal into an optical signal and then transmit it, which maximally avoids the electromagnetic interference of environmental noise on signal transmission and ensures the accuracy of beam current monitoring.

[0061] In this embodiment, the digital integrated circuit is connected to the first timer and the second timer in each charge reading circuit and is used to set the pulse widths of the pulse signals generated by the first timer and the second timer.

[0062] The present disclosure also provides a multi-channel charge reading method, including S210 to S240.

[0063] S210, receiving the charges output by multiple charge channels and respectively generating input voltages corresponding to the charges output by each charge channel.

[0064] S220. Compare the input voltage of each charge channel with the first reference voltage and the second reference voltage respectively. When the input voltage is greater than the first reference voltage or the second reference voltage, generate an inverted charging voltage to charge the current integration circuit in an inverted manner to balance the charge quantity in the current integration circuit, and output a first pulse signal when the input voltage is greater than the first reference voltage, and output a second pulse signal when the input voltage is greater than the second reference voltage.

[0065] S230. Convert the first pulse signal and the second pulse signal generated by each charge channel into optical signals and transmit them through optical fibers.

[0066] S240. Convert the optical signal into an electrical signal and collect the electrical signal, and the electrical signal represents the charge quantity output by the corresponding charge channel.

[0067] Among them, the second reference voltage is greater than the first reference voltage, and the inverted charging voltage generated when the input voltage is greater than the second reference voltage is greater than the inverted charging voltage generated when the input voltage is greater than the first reference voltage.

[0068] This method can achieve multi-channel charge reading. By adopting the charge balance principle, according to the magnitude of the input charge quantity, the constant current source for balancing is automatically switched, which better solves the contradiction between the measurement range and the resolution, and realizes the reading of weak charges with high precision, large measurement range and multi-channel; by adopting the charge-frequency conversion technology, the input charge signal is converted into a frequency signal, which greatly reduces the subsequent data acquisition volume and reduces the requirements for subsequent data transmission and processing; a single channel uses a single integrator to work without switching the input signal, and there will be no loss of charge information during the dynamic charge reading process within the full measurement range, with higher conversion accuracy; during the transmission of the output frequency signal, the method of two-time optoelectronic conversion is adopted to convert the pulse signal into an optical signal for transmission, which maximally avoids the interference of environmental noise on signal transmission and ensures the accuracy of beam current monitoring.

[0069] Those skilled in the art can understand that the features recited in the various embodiments and / or claims of the present disclosure can be combined or combined in various ways, even if such combinations or combinations are not explicitly recited in the present disclosure. In particular, without departing from the spirit and teachings of the present disclosure, the features recited in the various embodiments and / or claims of the present disclosure can be combined and combined in various ways. All such combinations and / or combinations fall within the scope of the present disclosure.

[0070] Although the present disclosure has been shown and described with reference to particular exemplary embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope of the present disclosure as defined by the appended claims and their equivalents. Accordingly, the scope of the present disclosure should not be limited to the above-described embodiments, but should be determined not only by the appended claims but also by the equivalents of the appended claims.

Claims

1. A charge reading circuit, characterized in that, Comprising: A current integration circuit, configured to receive an input charge and output an input voltage that varies with the amount of the input charge; A first charge reading branch, whose input end is connected to the output end of the current integration circuit, whose first output end is connected to the input end of the current integration circuit, and whose second output end is connected to an external reading circuit. The first output end is configured to, when the input voltage is greater than a first reference voltage, charge the current integration circuit in an inverted manner to balance the amount of charge in the current integration circuit, and the second output end is configured to output a first pulse signal generated when the input voltage is greater than the first reference voltage; A second charge reading branch, whose input end is connected to the output end of the current integration circuit, whose third output end is connected to the input end of the current integration circuit, and whose fourth output end is connected to an external reading circuit. The third output end is configured to, when the input voltage is greater than a second reference voltage, charge the current integration circuit in an inverted manner to balance the amount of charge in the current integration circuit, and the fourth output end is configured to output a second pulse signal generated when the input voltage is greater than the second reference voltage; Wherein, the second reference voltage is greater than the first reference voltage, and the inverted charging voltage generated by the second charge reading branch is greater than the inverted charging voltage generated by the first charge reading branch.

2. The charge reading circuit according to claim 1, wherein The current integration circuit includes: An operational amplifier and a variable integration capacitor; The inverting input end of the operational amplifier is connected to the input end of the charge, and the non-inverting input end is grounded; One end of the variable integration capacitor is connected to the inverting input end of the operational amplifier, and the other end is connected to the output end of the operational amplifier.

3. The charge reading circuit according to claim 1, wherein The first charge reading branch includes: A first comparator, a first timer, a first switch, and a first constant current source; The non-inverting input ends of the first comparator are all connected to the output end of the current integration circuit, and the inverting input end is connected to the first reference voltage, and is configured to output a first trigger signal to the first timer when the input voltage is greater than the first reference voltage; The output end of the first timer is connected to the first switch that controls the on / off of the first constant current source, and is configured to generate a first pulse signal that causes the first switch to close based on the first trigger signal; The first constant current source is configured to, when the first switch is closed, charge the current integration circuit in an inverted manner; The second charge reading branch includes: A second comparator, a second timer, a second switch, and a second constant current source; The non-inverting input ends of the second comparator are all connected to the output end of the current integration circuit, and the inverting input end is connected to the second reference voltage, and is configured to output a second trigger signal to the second timer when the input voltage is greater than the second reference voltage; The output end of the second timer is connected to the second switch that controls the on / off of the second constant current source, and is configured to generate a second pulse signal that causes the second switch to close based on the second trigger signal; The second constant current source is configured to, when the second switch is closed, charge the current integration circuit in an inverted manner.

4. The charge reading circuit according to claim 3, characterized in that, The first timer and the second timer include a high-level state, a low-level state, and an initial state. Among them, the high-level state is the working state of outputting a high level to generate the first pulse signal, with a timing duration of Ht; the low-level state is the working state of outputting a low level after the end of the high-level state, with a timing duration of Lt, where Ht≥Lt>0; and the initial state is the stationary state after the end of the low-level state.

5. A multi-channel charge readout device, characterized in that, Comprising a plurality of charge readout circuits and a data acquisition card as described in any one of claims 1 to 4; Each of the charge readout circuits is respectively connected to a charge channel for reading the input charge transmitted by the charge channel; The data acquisition card is connected to the output ends of the charge readout circuits for acquiring the pulse signals generated by the charge readout circuits reading the input charge.

6. The device according to claim 5, characterized in that The device further includes: A digital integrated circuit connected to the first timer and the second timer in the charge readout circuit for setting the pulse widths of the pulse signals generated by the first timer and the second timer.

7. The device according to claim 5, characterized in that The device further includes: A first photoelectric conversion module and a second photoelectric conversion module; The input end of the first photoelectric conversion module is connected to the output ends of the charge readout circuits, and its output end is connected to an optical fiber for converting the pulse signals generated by the charge readout circuits reading the input charge into optical signals and transmitting the optical signals to the second photoelectric conversion module through the optical fiber; The input end of the second photoelectric conversion module is connected to the optical fiber, and its output end is connected to the digital integrated circuit for converting the optical signal into an electrical signal and outputting it to the digital integrated circuit.

8. A charge reading method, characterized in that, Comprising: Receiving the charge output by the charge channel and generating an input voltage corresponding to the charge; Comparing the input voltage with a first reference voltage and a second reference voltage. When the input voltage is greater than the first reference voltage or the second reference voltage, generating an inverted charging voltage to charge the current integration circuit in an inverted manner to balance the charge quantity in the current integration circuit, and outputting a first pulse signal when the input voltage is greater than the first reference voltage, and outputting a second pulse signal when the input voltage is greater than the second reference voltage; Wherein, the second reference voltage is greater than the first reference voltage, and the inverted charging voltage generated when the input voltage is greater than the second reference voltage is greater than the inverted charging voltage generated when the input voltage is greater than the first reference voltage.

9. A multi-channel charge readout method, characterized in that, Comprising: Receiving the charges output by a plurality of charge channels and respectively generating input voltages corresponding to the charges output by each of the charge channels; Respectively comparing the input voltages of each of the charge channels with a first reference voltage and a second reference voltage. When the input voltage is greater than the first reference voltage or the second reference voltage, generating an inverted charging voltage to charge the current integration circuit in an inverted manner to balance the charge quantity in the current integration circuit, and outputting a first pulse signal when the input voltage is greater than the first reference voltage, and outputting a second pulse signal when the input voltage is greater than the second reference voltage; Converting the first pulse signals and the second pulse signals generated by each of the charge channels into optical signals and transmitting them through an optical fiber; Convert the optical signal into an electrical signal and collect the electrical signal, where the electrical signal represents the amount of charge output by the corresponding charge channel; Wherein, the second reference voltage is greater than the first reference voltage, and the inverted charging voltage generated when the input voltage is greater than the second reference voltage is greater than the inverted charging voltage generated when the input voltage is greater than the first reference voltage.

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