Method for Adding Scattering Bars, Storage Medium

By dividing the layout into different regions and using pattern matching and ILT algorithms to generate scattering bars, the scattering bar addition method in the prior art cannot cope with the problem of excessive computational volume, and the high-quality scattering bar addition and computational resources of complex graphics are realized.

CN115576169BActive Publication Date: 2025-06-17SHENZHEN GUOWEI FUXIN TECH CO LTD
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Patent Information

Application Number
CN202211387164.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-07
Publication Date
2025-06-17
Estimated Expiration
2042-11-07

AI Technical Summary

Technical Problem

The method of adding scattering bars in the prior art is either unable to cope with complex graphics or is too large in computing, making it difficult to effectively correct the optical proximity effect in semiconductor manufacturing.

Method used

By dividing the layout into 1D, 1.5D and 2D areas, the pattern matching algorithm and ILT algorithm are used to generate scattering strip seeds, and grown under the constraints of the mask design rules to form a scattering strip skeleton, and finally paste back to the corresponding position on the layout.

Benefits of technology

The high-quality scattering bar addition of complex graphics is realized, reducing the consumption of computing resources, and can quickly generate efficient scattering bars suitable for 1D, 1.5D and 2D areas.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a method for adding scattering bars and a storage medium. The method for adding scattering bars includes: dividing a layout into multiple regions according to the characteristics of the patterns on the layout; separating the qualified regions into multiple adjacent square slices; classifying the slices into slices with different geometric environments by using a pattern matching algorithm; obtaining the seeds of the scattering bars by using ILT; judging whether there is an edge of a main pattern near the seeds of the scattering bars. If so, under the constraint of the photomask design rules, growing the seeds along the direction of the nearest main pattern edge to a preset length in the length direction to form a scattering bar skeleton, and growing the scattering bar skeleton to a preset width in the width direction; if not, generating square scattering bars under the constraint of the photomask design rules; and pasting the generated scattering bars on each slice back to the corresponding positions on the layout by using a pattern matching algorithm. The present invention can adapt to different layouts, and at the same time, the calculation amount is less than that of a single ILT.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a method for adding sub-resolution assist features (SRAF or SBAR) in an optical proximity correction method. Background Art

[0002] To transfer a pattern from a mask to the surface of a silicon wafer, it is usually necessary to go through an exposure step, a development step performed after the exposure step, and an etching step performed after the development step. In the exposure step, light passes through the light-transmitting areas in the mask and irradiates the silicon wafer coated with photoresist, and a chemical reaction occurs in the photoresist under the irradiation of light; in the development step, by utilizing the different dissolution degrees of the photosensitive and non-photosensitive photoresists to a developer, a photolithography pattern is formed to achieve the transfer of the pattern from the mask to the photoresist; in the etching step, the silicon wafer is etched based on the photolithography pattern formed by the photoresist layer to further transfer the pattern of the mask to the silicon wafer.

[0003] In semiconductor manufacturing, as the design size continues to shrink, the design size gets closer and closer to the limit of the photolithography imaging system, and the diffraction effect of light becomes more and more obvious, resulting in the degradation of the optical image of the final design pattern. The actually formed photolithography pattern is severely distorted relative to the pattern on the mask, and finally the actual pattern formed on the silicon wafer through photolithography is different from the design pattern. This phenomenon is called the optical proximity effect (OPE: Optical Proximity Effect).

[0004] To correct the optical proximity effect, optical proximity correction (OPC: Optical Proximity Correction) has emerged. The core idea of optical proximity correction is to establish an optical proximity correction model based on the consideration of canceling the optical proximity effect, and design the photomask pattern according to the optical proximity correction model. Although the photolithography pattern after photolithography has an optical proximity effect relative to the photomask pattern, since the cancellation of this phenomenon has been considered when designing the photomask pattern according to the optical proximity correction model, the photolithography pattern after photolithography is close to the target pattern that the user actually hopes to obtain. However, in the actual production process, the photolithography conditions are only optimized for specific photomask pattern densities. These specific photomask pattern densities have the maximum depth of focus (DOF) and contrast. There are small-sized isolated patterns in advanced manufacturing nodes, and their critical dimension (CD) can reach ~50 nanometers. Such patterns have almost no DOF and are extremely prone to forming bad points. OPC engineers will add SBAR (as shown in Figure 1 ) around them to make the local pattern density close to the optimum. The CD (critical dimension) of SBAR is small enough so that it will not be exposed on the wafer surface; but it can enable the isolated pattern to obtain sufficient DOF.Figure 1 The central square is the main figure, and the surrounding strips are SBARs. d1 is the distance between the first group of scattering strips and the closest edge of the main figure, and d2 is the distance between the second group of scattering strips and the closest edge of the main figure. w1 is the width of the first group of scattering strips, and w2 is the width of the second group of scattering strips.

[0005] The most commonly used SBAR addition method is rule-based addition (such as Figure 2 The distance and width of the added SBAR are determined according to the attributes of the edge of the target pattern, including width and space. Figure 2 The main graphics, SBAR and corresponding rule table are shown. Center means that the scattering strip is placed at the center of the two main graphics, and space means the distance from the edge of the current main graphics to the edge of the adjacent main graphics. However, in the technology nodes of 28nm and below, the actual layout graphics are very complex (such as Figure 3 shown), Figure 3 All of them are main graphics, including main graphics arranged in an array, main graphics arranged with vertical intervals, and other main graphics parts that cannot be counted using these two rules.

[0006] The prior art also provides a method for adding SBAR, specifically an inverse lithography algorithm (ILT) based on pixel optimization. ILT can obtain the position and shape of the SBAR of a complex layout through rigorous calculation. The mask pattern formed by ILT is non-Manhattan shaped (as shown in Figure 4). The SBAR obtained by ILT can more effectively improve the process window of the main pattern than the SBAR obtained by traditional rule-based methods. The degrees of freedom involved in ILT optimization are very large (equal to the total number of pixels in the layout), so the computing resources required for ILT are quite large and cannot currently be used for the entire chip (the design of the entire chip is very complex, so the computing resources cannot be used for the entire chip). In addition, the manufacture of the mask obtained by ILT requires the use of a multi-beam mask writer (MBMW), which further increases production costs.

[0007] Therefore, how to provide a suitable method for adding scattering strips that can handle complex graphics and reduce the amount of calculation is a technical problem that the industry urgently needs to solve. Summary of the invention

[0008] In order to solve the technical problems in the prior art that the method for adding scattering strips is either unable to cope with complex graphics or has too much calculation, the present invention proposes a method for adding scattering strips and a storage medium, where the complex graphics referred to here are 2D area graphics, or a layout containing 2D area graphics.

[0009] The method for adding scattering bars of the present invention includes:

[0010] Dividing the layout into multiple regions according to the characteristics of the patterns on the layout;

[0011] Dividing the qualified regions into multiple adjacent square slices;

[0012] Using the main pattern as a reference pattern and applying a pattern matching algorithm to classify the slices into slices with different geometric environments;

[0013] Using ILT to obtain the seeds of the scattering bars;

[0014] Judging whether there is an edge of the main pattern near the seeds of the scattering bars. If so, under the constraint of the photomask design rules, making the seeds grow along the direction of the nearest edge of the main pattern to a preset length in the length direction to form a scattering bar skeleton, and making the scattering bar skeleton grow to a preset width in the width direction; if not, generating square scattering bars under the constraint of the photomask design rules;

[0015] Using the main pattern as a reference pattern and applying a pattern matching algorithm to paste the generated scattering bars on each slice back to the corresponding positions on the layout.

[0016] Furthermore, the multiple regions of the layout include at least one of 1D, 1.5D, and 2D regions.

[0017] Furthermore, when the region is 2D, the region is a qualified region.

[0018] Furthermore, when the region is 1D or 1.5D, a scattering bar rule table is used to generate the scattering bars for the corresponding regions.

[0019] Furthermore, the scattering bar rule table is obtained based on a model simulation method or an experimental method.

[0020] Furthermore, the side length of the square slice is 1-10 microns.

[0021] The computer-readable storage medium of the present invention is used to store a computer program, and when the computer program runs, it executes the method for adding scattering bars described in the above technical solution.

[0022] The present invention first divides the entire layout into 1D, 1.5D, and 2D regions. For these 2D region slices, ILT is used to obtain SBAR seeds. These seeds are grown along the direction of the nearest corresponding main pattern edge and as long as possible to a predetermined length under the constraint of MRC (mask design rule) to form SBAR spines. Then these spines are grown along the transverse direction and as long as possible to a predetermined width under the constraint of MRC (mask design rule) to form the final opposite-edge SBAR (edge bar). If a seed has no corresponding main pattern edge, the seed is grown into a square diagonal SBAR (corner bar) under the constraint of MRC. Finally, the commonly used pattern matching method is used again, with the main pattern as the reference pattern, and these grown SBARs are pasted back to the corresponding positions in the layout.

[0023] The present invention can adopt different and optimal SBAR adding methods for 1D, 1.5D, and 2D regions, can quickly generate high-quality SBARs for 1D, 1.5D, and 2D regions, and at the same time does not cause a large consumption of CPU resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The present invention will be described in detail below in conjunction with embodiments and drawings, wherein:

[0025] Figure 1 is a schematic diagram of a rule-based scattering bar in the prior art.

[0026] Figure 2 is Figure 1 the rule table of the scattering bar of

[0027] Figure 3 is a schematic diagram of the partition of an embodiment of the present invention.

[0028] Figure 4(a) is a scattering bar obtained by a rule-based method in the prior art.

[0029] Figure 4(b) is a scattering bar obtained by an ILT method in the prior art.

[0030] Figure 5 is Figure 3 the schematic diagram of the slice of the 2D region of

[0031] Figure 6 is a schematic diagram of the slice of the 2D region of the layout of an embodiment of the present invention.

[0032] Figure 7 is Figure 3 the schematic diagram of the rule-based scattering bar of the 1D and 1.5D regions of

[0033] Figure 8 is a schematic diagram of the seeds of the 2D region of an embodiment of the present invention.

[0034] Figure 9 is Figure 8 Schematic diagram of the seed growing in the length direction.

[0035] Figure 10 is Figure 8 Schematic diagram of the seed growing in the width direction.

[0036] Figure 11 Flowchart of an embodiment of the present invention. Detailed implementation manners

[0037] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0038] Therefore, a feature pointed out in this specification will be used to illustrate one of the features of an embodiment of the present invention, rather than implying that each embodiment of the present invention must have the illustrated feature. In addition, it should be noted that this specification describes many features. Although some features may be combined together to show possible system designs, these features can also be used in other combinations that are not explicitly described. Therefore, unless otherwise stated, the illustrated combination is not intended to be limiting.

[0039] As Figure 11 shown, in the method for adding scattering bars of the present invention, the layout is divided into multiple regions. For example, the layout can be divided into 1D regions, 1.5D regions and 2D regions. The 1D region and 1.5D region are marked in Figure 3 , and the rest belong to the 2D region. Here, the 1D region refers to a one-dimensional long line (line-space, LS) graphic region. The 1.5D region is a hole pattern array region. Generally speaking, different partitioning requires different SBAR addition rules. In the actual production process, OPC engineers can design relatively effective SBAR addition rules for the 1D region and 1.5D region. However, for the 2D region, due to the complexity of the geometric environment, it is very difficult to design relatively effective SBAR addition rules. If a layout simultaneously has 1D, 1.5D and 2D regions, it is usually very difficult to design an effective set of SBAR addition rules. The method for adding scattering bars of the present invention is to solve the problem of how to effectively add scattering bars when there are multiple regions in the layout pattern.

[0040] The method for adding scattering bars of the present invention mainly includes the following steps.

[0041] According to the characteristics of the patterns on the layout, the layout is divided into multiple regions, and the multiple regions of the layout include at least one of 1D, 1.5D, and 2D regions. For example Figure 3 the layout can be divided into 1D regions, 1.5D regions, and 2D regions.

[0042] The qualified regions are divided into multiple adjacent square slices. In one embodiment, considering that the 2D region is relatively complex, when the region is a 2D region, the 2D region needs to be divided into multiple adjacent square slices, such as squares or rectangles. The 2D region is divided into many adjacent square slices (clips) with side lengths ranging from 1 to 10 microns. The initial number of slices can reach millions.

[0043] The pattern matching algorithm is used to classify the slices into slices with different geometric environments. For a relatively normal layout, the main pattern can be used as a reference pattern, and the common pattern matching method (pattern matching) is used to classify these initial slices into thousands of slices with different geometric environments. As Figure 5 shown, the 2D region is divided into multiple adjacent square slices. Figure 6 What is shown is that the layout is divided into multiple slices, and these slices are compressed by pattern matching and have different geometric environments.

[0044] ILT is used to obtain the seeds of the scattering bars. For the above-mentioned square slices (clips) with different geometric environments, ILT is used to obtain the seeds (seeds) of SBAR, and the effect is as Figure 8 shown, Figure 8 the part circled by the ellipse in is some of the seeds, and the others with the same color as the seeds are other seeds.

[0045] It is judged whether there is an edge of the main pattern near the seeds of the scattering bars. If so, under the constraint of the photomask design rules, the seeds grow along the direction of the nearest edge of the main pattern to a preset length in the length direction to form a scattering bar spine, and the scattering bar spine grows to a preset width in the width direction; if not, a square scattering bar is generated under the constraint of the photomask design rules. Figure 9 、 Figure 10 show the growth processes of two types of scattering bar seeds. Among them, there are seeds with an edge of the main pattern nearby, which grow into strip-shaped scattering bars, and there are also seeds without an edge of the main pattern nearby, which finally grow into square scattering bars.

[0046] Using the main pattern as a reference pattern, the pattern matching algorithm is used to paste the generated scattering bars on each slice back to the corresponding positions on the layout.

[0047] When the layout also includes 1D or 1.5D regions, for the 1D region or 1.5D region, a Scattering Bar Rule Table (SBAR Rule Table) can be used to generate the scattering bars for the corresponding regions.

[0048] For the 1D region, the SBAR Rule Table can be accurately obtained by a model simulation-based method or an experimental method. The position, width, and length of the SBAR in the 1D region rule table are only related to the width of the corresponding main pattern edge and the space width. Therefore, the SBAR Rule Table for the 1D region is a two-dimensional table, as Figure 2 shown.

[0049] For the 1.5D region, the SBAR Rule Table can be accurately obtained by a model simulation-based method or an experimental method. The position, width, and length of the SBAR in the 1.5D region rule table are related to the width, space width, and length of the corresponding main pattern edge. Therefore, the SBAR Rule Table for the 1.5D region is a two-dimensional table. In actual operation, a similar Figure 2 rule table is established for each length interval of different main pattern reference edges. The addition of the SBAR to the 1D and 1.5D regions is completed according to the SBAR Rule Table, as Figure 7 shown, Figure 7 where the light gray is the main pattern and the dark gray is the scattering bar.

[0050] In the present invention, by partitioning the layout and using different methods to generate scattering bars in different regions, the problems in the prior art that the scattering bars cannot meet the requirements or the calculation amount is too large caused by using the same method are avoided. When dealing with the 2D region in the present invention, the corresponding seeds are generated through the ILT algorithm, and the scattering bars are generated through the seeds, avoiding the jagged scattering bars generated by the ILT in the prior art as shown in Figure 4(b). In Figure 4(b), the main pattern is the overlapping oval and square patterns, and the surrounding jagged ones are the scattering bars. It is very difficult to fabricate such jagged scattering bars onto the mask, that is, it is only theoretically feasible and actually impossible to fabricate. However, through the method for adding scattering bars of the present invention, there are no such jagged scattering bars, either square scattering bars or strip-shaped scattering bars, and it is also easy to implement when actually fabricating them onto the mask.

[0051] The computer-readable storage medium of the present invention is used to store a computer program, and when the computer program runs, it executes the above-mentioned method for adding scattering bars of the present invention.

[0052] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A method for adding a scattering strip, characterized in that, Comprising: According to the characteristics of the patterns on the layout, the layout is divided into multiple regions, and the multiple regions of the layout include at least one of 1D, 1.5D, and 2D regions; When the region is 1D or 1.5D, a scattering bar rule table is used to generate the scattering bars for the corresponding region; When the region is 2D, the qualified region is divided into multiple adjacent square slices; Using the main pattern as a reference pattern, the slices are classified into slices with different geometric environments by using a pattern matching algorithm; Using ILT to obtain the seeds of the scattering bars; Judging whether there is an edge of the main pattern near the seeds of the scattering bars. If so, under the constraint of the photomask design rules, the seeds grow along the direction of the nearest main pattern edge to a preset length in the length direction to form a scattering bar skeleton, and the scattering bar skeleton grows to a preset width in the width direction; If not, a square scattering bar is generated under the constraint of the photomask design rules; Using the main pattern as a reference pattern, the scattering bars generated on each slice are pasted back to the corresponding positions on the layout by using a pattern matching algorithm.

2. The method for adding a scattering strip according to claim 1, characterized in that, The scattering bar rule table is obtained based on a model simulation method or an experimental method.

3. The method for adding a scattering strip according to claim 1, characterized in that, The side length of the square slice is 1-10 microns.

4. A computer-readable storage medium for storing a computer program, characterized in that, When the computer program runs, it executes the method for adding scattering bars according to any one of claims 1 to 3.

Citation Information

Patent Citations

  • Method and system for accelerating layout processing

    CN111458974A

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    CN114326286A