A method of driving LCD using common IO

Abstract

The invention relates to the field of electric signal processing, and in particular to a method for driving LCD by using common IO, wherein an LCD driving circuit is used to drive an LCD having four COM pins and five SEG pins; each driving pin of the LCD generates four levels by inputting two driving signal combinations correspondingly through two parallel resistors; the common IO can only generate two levels of 0 and 1, and four levels are generated by a resistor combination externally connected to the IO, so as to meet the dynamic driving of the LCD. Since only a simple resistor combination is used to meet the driving requirements, the cost is low, and the structure is simple and reliable; in addition, the LCD display graph is the intersection of COMX and SEGX, and the level difference between COMX and SEGX is set to VX. When the absolute value of VX is less than a display voltage threshold Von of the LCD, the graph is not displayed, and when the absolute value of VX is greater than the display voltage threshold Von of the LCD, the graph is displayed. Therefore, the invention can drive the LCD display by giving specific high and low levels to each driving signal at different times, and the driving process is simple.

Description

Technical Field

[0001] The invention relates to the field of electrical signal processing, and in particular to a method for driving an LCD using a common IO. Background Art

[0002] Better dynamic drive LCDs are driven by varying levels. For example, a 1 / 3 bias LCD uses four levels: VSS, 1 / 3VLCD, 2 / 3VLCD, and VLCD. Figure 1 The existing dynamic drive LCD is generally implemented with a dedicated drive chip and circuit, and the drive circuit structure and process are complex and the cost is high. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a method for driving an LCD using common IO, which can achieve the purpose of simple driving circuit structure and process and low cost.

[0004] The technical solution of the present invention to solve the above technical problems is as follows: a method for driving LCD using common IO, using an LCD driving circuit to drive an LCD having four COM pins and five SEG pins; wherein the four COM pins are respectively COM1 pin, COM2 pin, COM3 pin and COM4 pin, and the five SEG pins are respectively SEG1 pin, SEG2 pin, SEG3 pin, SEG4 pin and SEG5 pin; the LCD driving circuit comprises resistors R1-18; the SEG1 pin is connected to the driving signal RB4 through the resistor R1, and is also connected to the driving signal RB3 through the resistor R3; the SEG2 pin is connected to the driving signal RB2 through the resistor R5, and is also connected to the driving signal RB1 through the resistor R7; the SEG3 pin is connected to the driving signal RB1 through the resistor R9, and is also connected to the driving signal RB1 through the resistor R11 The drive signal RB0 is connected; the SEG4 pin is connected to the drive signal RA3 through the resistor R13, and is also connected to the drive signal RA2 through the resistor R15; the SEG5 pin is connected to the drive signal RA2 through the resistor R17, and is also connected to the drive signal RA1 through the resistor R18; the COM1 pin is connected to the drive signal RC4 through the resistor R2, and is also connected to the drive signal RC3 through the resistor R4; the COM2 pin is connected to the drive signal RC3 through the resistor R6, and is also connected to the drive signal RC2 through the resistor R8; the COM3 pin is connected to the drive signal RC1 through the resistor R10, and is also connected to the drive signal RC0 through the resistor R12; the COM4 pin is connected to the drive signal RC0 through the resistor R14, and is also connected to the drive signal RB7 through the resistor R16; the method of driving LCD using ordinary IO specifically includes the following steps,

[0005] S0, at the initial moment, initializing the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2;

[0006] S1, at the first moment, the driving signal RC4, the driving signal RC3 and the driving signal RC0 are controlled to be high level 1, the driving signal RC2, the driving signal RC1 and the driving signal RB7 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be low level 0; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 relative to the initial moment;

[0007] S2, at the second moment, the driving signal RC3, the driving signal RC2 and the driving signal RC0 are controlled to be high level 1, the driving signal RC4, the driving signal RC1 and the driving signal RB7 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be low level 0; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the first moment;

[0008] S3, at the third moment, the driving signal RC3, the driving signal RC1 and the driving signal RC0 are controlled to be high level 1, the driving signal RC4, the driving signal RC2 and the driving signal RB7 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be low level 0; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the second moment;

[0009] S4, at the fourth moment, the driving signal RC3, the driving signal RC0 and the driving signal RB7 are controlled to be high level 1, the driving signal RC4, the driving signal RC2 and the driving signal RC1 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be low level 0; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the third moment;

[0010] S5, at the fifth moment, the driving signal RC2, the driving signal RC1 and the driving signal RB7 are controlled to be high level 1, the driving signal RC4, the driving signal RC5 and the driving signal RC0 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be high level 1; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the fourth moment;

[0011] S6, at the sixth moment, the driving signal RC4, the driving signal RC1 and the driving signal RB7 are controlled to be high level 1, the driving signal RC3, the driving signal RC2 and the driving signal RC0 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be high level 1; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the fifth moment;

[0012] S7, at the seventh moment, the driving signal RC4, the driving signal RC2 and the driving signal RB7 are controlled to be high level 1, the driving signal RC3, the driving signal RC1 and the driving signal RC0 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be high level 1; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the sixth moment;

[0013] S8, at the eighth moment, the driving signal RC4, the driving signal RC2 and the driving signal RC1 are controlled to be high level 1, the driving signal RC3, the driving signal RC0 and the driving signal RB7 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be high level 1; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the seventh moment;

[0014] S9, use the driving signals RB4, RB2, RB1, RA3 and RA2 at the eighth moment as the initialized driving signals RB4, RB2, RB1, RA3 and RA2, and return to S1 and loop through S1 to S8 until the driving is stopped.

[0015] The beneficial effects of the present invention are as follows: in a method of driving LCD by using common IO of the present invention, each driving pin of LCD generates four levels by inputting two driving signal combinations corresponding to two parallel resistors, common IO can only generate two levels of 0 and 1, and four levels are generated by the resistor combination externally connected to IO, so as to meet the dynamic driving of LCD. Since only a simple resistor combination is used to meet the driving requirements, the cost is low, and the structure is simple and reliable; in addition, the LCD display graph is the intersection of COMX and SEGX, and the level difference between COMX and SEGX is VX. When the absolute value of VX is less than the display voltage threshold Von of LCD, the graph is not displayed, and when the absolute value of VX is greater than the display voltage threshold Von of LCD, the graph is displayed. Therefore, the present invention can drive LCD display by giving specific high and low levels to each driving signal at different times, and the driving process is simple. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A circuit schematic diagram of an LCD driving circuit in a method of driving an LCD using common IOs according to the present invention;

[0017] Figure 2 A flow chart of a method for driving an LCD using common IO according to the present invention;

[0018] Figure 3 This is a diagram showing an example of LCD display in a method of driving an LCD using common IOs according to the present invention. DETAILED DESCRIPTION

[0019] The principles and features of the present invention are described below in conjunction with the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0020] A method for driving an LCD using common IO, using an LCD driving circuit to drive an LCD having four COM pins and five SEG pins; wherein the four COM pins are COM1 pin, COM2 pin, COM3 pin and COM4 pin, and the five SEG pins are SEG1 pin, SEG2 pin, SEG3 pin, SEG4 pin and SEG5 pin; such as Figure 1As shown, the LCD driving circuit includes resistors R1 to 18; the resistance values ​​of resistors R1, R7, R9, R15, R17, R4, R6, R12 and R14 are all 30KΩ; the resistance values ​​of resistors R3, R5, R11, R13, R18, R2, R8, R10 and R16 are all 15KΩ. The SEG1 pin is connected to the drive signal RB4 through the resistor R1, and is also connected to the drive signal RB3 through the resistor R3; the SEG2 pin is connected to the drive signal RB2 through the resistor R5, and is also connected to the drive signal RB1 through the resistor R7; the SEG3 pin is connected to the drive signal RB1 through the resistor R9, and is also connected to the drive signal RB0 through the resistor R11; the SEG4 pin is connected to the drive signal RA3 through the resistor R13, and is also connected to the drive signal RA2 through the resistor R15; the SEG5 pin is connected to the drive signal RA2 through the resistor R17, and is also connected to the drive signal RA1 through the resistor R18; the COM1 pin is connected to the drive signal RC4 through the resistor R2, and is also connected to the drive signal RC3 through the resistor R4; the COM2 pin is connected to the drive signal RC3 through the resistor R6, and is also connected to the drive signal RC2 through the resistor R8; the COM3 pin is connected to the drive signal RC1 through the resistor R10, and is also connected to the drive signal RC0 through the resistor R12; the COM4 pin is connected to the drive signal RC0 through the resistor R14, and is also connected to the drive signal RB7 through the resistor R16; Figure 2 As shown, the method of driving LCD using common IO specifically includes the following steps:

[0021] S0, at the initial moment, initializing the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2;

[0022] S1, at the first moment, the driving signal RC4, the driving signal RC3 and the driving signal RC0 are controlled to be high level 1, the driving signal RC2, the driving signal RC1 and the driving signal RB7 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be low level 0; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 relative to the initial moment;

[0023] S2, at the second moment, the driving signal RC3, the driving signal RC2 and the driving signal RC0 are controlled to be high level 1, the driving signal RC4, the driving signal RC1 and the driving signal RB7 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be low level 0; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the first moment;

[0024] S3, at the third moment, the driving signal RC3, the driving signal RC1 and the driving signal RC0 are controlled to be high level 1, the driving signal RC4, the driving signal RC2 and the driving signal RB7 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be low level 0; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the second moment;

[0025] S4, at the fourth moment, the driving signal RC3, the driving signal RC0 and the driving signal RB7 are controlled to be high level 1, the driving signal RC4, the driving signal RC2 and the driving signal RC1 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be low level 0; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the third moment;

[0026] S5, at the fifth moment, the driving signal RC2, the driving signal RC1 and the driving signal RB7 are controlled to be high level 1, the driving signal RC4, the driving signal RC5 and the driving signal RC0 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be high level 1; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the fourth moment;

[0027] S6, at the sixth moment, the driving signal RC4, the driving signal RC1 and the driving signal RB7 are controlled to be high level 1, the driving signal RC3, the driving signal RC2 and the driving signal RC0 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be high level 1; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the fifth moment;

[0028] S7, at the seventh moment, the driving signal RC4, the driving signal RC2 and the driving signal RB7 are controlled to be high level 1, the driving signal RC3, the driving signal RC1 and the driving signal RC0 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be high level 1; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the sixth moment;

[0029] S8, at the eighth moment, the driving signal RC4, the driving signal RC2 and the driving signal RC1 are controlled to be high level 1, the driving signal RC3, the driving signal RC0 and the driving signal RB7 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be high level 1; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the seventh moment;

[0030] S9, use the driving signals RB4, RB2, RB1, RA3 and RA2 at the eighth moment as the initialized driving signals RB4, RB2, RB1, RA3 and RA2, and return to S1 and loop through S1 to S8 until the driving is stopped.

[0031] In S1-S8, the levels of the driving signals RC4-0, RB7 and COM1-4 pins are as shown in Table 1.

[0032] Table 1: Levels of drive signals RC4~0, RB7 and COM 1~4 pins

[0033] RC4 RC3 RC2 RC1 RC0 RB7 COM1 COM2 COM3 COM4 S1 1 1 0 0 1 0 1 1 / 3 1 / 3 1 / 3 S2 0 1 1 0 1 0 1 / 3 1 1 / 3 1 / 3 S3 0 1 0 1 1 0 1 / 3 1 / 3 1 1 / 3 S4 0 1 0 0 1 1 1 / 3 1 / 3 1 / 3 1 S5 0 0 1 1 0 1 0 2 / 3 2 / 3 2 / 3 S6 1 0 0 1 0 1 2 / 3 0 2 / 3 2 / 3 S7 1 0 1 0 0 1 2 / 3 2 / 3 0 2 / 3 S8 1 0 1 1 0 0 2 / 3 2 / 3 2 / 3 0

[0034] The COM1 pin is driven by the ninth drive signal RC4 and the tenth drive signal RC3 through the second resistor R2 and the fourth resistor R4.

[0035] When RC4=1,RC3=1,COM1=1;

[0036] When RC4=1,RC3=0,COM1=2 / 3;

[0037] When RC4=0,RC3=1,COM1=1 / 3;

[0038] When RC4=0, RC3=0, COM1=0.

[0039] The driving of COM2 pin, COM3 pin, COM4 pin, SEG1 pin, SEG2 pin, SEG3 pin, SEG4 pin and SEG5 pin is the same as that of COM1 pin, which will not be repeated here.

[0040] In this specific embodiment:

[0041] In the S1, the level of the COM1 pin is 1, and the levels of the COM2 pin, the COM3 pin and the COM4 pin are all 1 / 3; when the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG5 pin is lit or extinguished.

[0042] In S2, the level of the COM2 pin is 1, and the levels of the COM1 pin, the COM3 pin and the COM4 pin are all 1 / 3; when the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG5 pin is lit or extinguished.

[0043] In S3, the level of the COM3 pin is 1, and the levels of the COM1 pin, the COM2 pin and the COM4 pin are all 1 / 3; when the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG5 pin is lit or extinguished.

[0044] In S4, the level of the COM4 pin is 1, and the levels of the COM1 pin, the COM2 pin and the COM3 pin are all 1 / 3; when the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG5 pin is lit or extinguished.

[0045] In S5, the level of the COM1 pin is 0, and the levels of the COM2 pin, the COM3 pin and the COM4 pin are all 2 / 3; when the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG5 pin is lit or extinguished.

[0046] In S6, the level of the COM2 pin is 0, and the levels of the COM1 pin, the COM3 pin and the COM4 pin are all 2 / 3; when the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG5 pin is lit or extinguished.

[0047] In S7, the level of the COM3 pin is 0, and the levels of the COM1 pin, the COM2 pin and the COM4 pin are all 2 / 3; when the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG5 pin is lit or extinguished.

[0048] In S8, the level of the COM4 pin is 0, and the levels of the COM1 pin, the COM2 pin and the COM3 pin are all 2 / 3; when the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG5 pin is lit or extinguished.

[0049] In S1-S8, the levels of the driving signals RB4-0 and RA3-1 are shown in Table 2.

[0050] Table 2: Level table of driving signals RB4~0, RA3~1

[0051]

[0052]

[0053] The LCD display graph is the intersection of COMX and SEGX. Let the level difference between COMX and SEGX be VX. When the absolute value of VX is less than the LCD display voltage threshold Von, the graph will not be displayed. When the absolute value of VX is greater than the LCD display voltage threshold Von, the graph will be displayed.

[0054] Figure 3 This is a diagram showing an example of LCD display in a method of driving LCD using common IOs according to the present invention. Figure 3 In the display, T1-T4 are respectively "time" display, "jog" display, "low speed" display and "high speed" display, "1" and "2" are respectively two "8-character" seven-segment (A, B, C, D, E, F, G) displays. The truth table of the LCD display is shown in Table 3.

[0055] Table 3: LCD display truth table

[0056]

[0057] For example, the level difference between COM1 pin and SEG1 pin determines whether T2 is lit, the level difference between COM1 pin and SEG2 pin determines whether T3 is lit, the level difference between COM1 pin and SEG3 pin determines whether 1A (segment A in the "8" of "1") is lit, the level difference between COM1 pin and SEG4 pin determines whether T4 is lit, the level difference between COM1 pin and SEG5 pin determines whether 2A (segment A in the "8" of "2") is lit, and so on.

[0058] In a method of driving LCD by using common IO of the present invention, each driving pin of LCD generates four levels by inputting two driving signal combinations corresponding to two resistors in parallel. Common IO can only generate two levels of 0 and 1. Four levels are generated by the resistor combination externally connected to IO to meet the dynamic driving of LCD. Since only a simple resistor combination is used to meet the driving requirements, the cost is low, and the structure is simple and reliable. In addition, the LCD display graph is the intersection of COMX and SEGX. The level difference between COMX and SEGX is VX. When the absolute value of VX is less than the display voltage threshold Von of LCD, the graph is not displayed. When the absolute value of VX is greater than the display voltage threshold Von of LCD, the graph is displayed. Therefore, the present invention can drive LCD display by giving specific high and low levels to each driving signal at different times, and the driving process is simple.

[0059] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for driving LCD using common IO, characterized in that: An LCD driving circuit is used to drive an LCD having four COM pins and five SEG pins; wherein the four COM pins are COM1 pin, COM2 pin, COM3 pin and COM4 pin, and the five SEG pins are SEG1 pin, SEG2 pin, SEG3 pin, SEG4 pin and SEG5 pin; the LCD driving circuit comprises resistors R1-18; the SEG1 pin is connected to a driving signal RB4 through resistor R1, and is also connected to a driving signal RB3 through resistor R3; the SEG2 pin is connected to a driving signal RB2 through resistor R5, and is also connected to a driving signal RB1 through resistor R7; the SEG3 pin is connected to a driving signal RB1 through resistor R9, and is also connected to a driving signal RB2 through resistor R10; the SEG4 pin is connected to a driving signal RB1 through resistor R11, and is also connected to a driving signal RB3 through resistor R31; the SEG2 pin is connected to a driving signal RB2 through resistor R5, and is also connected to a driving signal RB1 through resistor R71; the SEG3 pin is connected to a driving signal RB1 through resistor R9, and is also connected to a driving signal RB3 through resistor R31; the SEG4 pin is connected to a driving signal RB1 through resistor R1 ... The resistor R11 is connected to the drive signal RB0; the SEG4 pin is connected to the drive signal RA3 through the resistor R13, and is also connected to the drive signal RA2 through the resistor R15; the SEG5 pin is connected to the drive signal RA2 through the resistor R17, and is also connected to the drive signal RA1 through the resistor R18; the COM1 pin is connected to the drive signal RC4 through the resistor R2, and is also connected to the drive signal RC3 through the resistor R4; the COM2 pin is connected to the drive signal RC3 through the resistor R6, and is also connected to the drive signal RC2 through the resistor R8; the COM3 pin is connected to the drive signal RC1 through the resistor R10, and is also connected to the drive signal RC0 through the resistor R12; the COM4 pin is connected to the drive signal RC4 through the resistor R14 RC0, and also connected to the driving signal RB7 through the resistor R16; the method of using ordinary IO to drive LCD specifically includes the following steps, S0, at the initial moment, initializing the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2; S1, at the first moment, controlling the driving signal RC4, the driving signal RC3 and the driving signal RC0 to be high level 1, controlling the driving signal RC2, the driving signal RC1 and the driving signal RB7 to be low level 0, and controlling the driving signal RB3, the driving signal RB0 and the driving signal RA1 to be low level 0; controlling the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 to correspond to each other respectively For the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2 at the initial moment, S2, at the second moment, control the drive signal RC3, the drive signal RC2 and the drive signal RC0 to be high level 1, control the drive signal RC4, the drive signal RC1 and the drive signal RB7 to be low level 0, and control the drive signal RB3, the drive signal RB0 and the drive signal RA1 to be low level 0; control the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2 to be respectively opposite to the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2 at the first moment;S3, at the third moment, the drive signal RC3, the drive signal RC1 and the drive signal RC0 are controlled to be high level 1, the drive signal RC4, the drive signal RC2 and the drive signal RB7 are controlled to be low level 0, and the drive signal RB3, the drive signal RB0 and the drive signal RA1 are controlled to be low level 0; the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2 are controlled to be inverted respectively with respect to the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2 at the second moment; S4, at the fourth moment, the drive signal RC3, the drive signal RC0 and the drive signal RB7 are controlled to be high level 1, and the drive signal RC4 is controlled , the drive signal RC2 and the drive signal RC1 are low level 0, and the drive signal RB3, the drive signal RB0 and the drive signal RA1 are low level 0; the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2 are respectively inverted corresponding to the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2 relative to the third moment; S5, at the fifth moment, the drive signal RC2, the drive signal RC1 and the drive signal RB7 are controlled to be high level 1, the drive signal RC4, the drive signal RC5 and the drive signal RC0 are controlled to be low level 0, and the drive signal RB3, the drive signal RB0 and the drive signal RA1 are controlled to be high level 1; control the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2 to be inverted respectively with respect to the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2 at the fourth moment; S6, at the sixth moment, control the drive signal RC4, the drive signal RC1 and the drive signal RB7 to be high level 1, control the drive signal RC3, the drive signal RC2 and the drive signal RC0 to be low level 0, control the drive signal RB3, the drive signal RB0 and the drive signal RA1 to be high level 1; control the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2 to be inverted respectively with respect to the drive signal RB4, the drive signal RB2, the drive signal RB1, the drive signal RA3 and the drive signal RA2 The drive signals RB4, RB2, RB1, RA3 and RA2 at the fifth moment are inverted; S7, at the seventh moment, the drive signals RC4, RC2 and RB7 are controlled to be high level 1, the drive signals RC3, RC1 and RC0 are controlled to be low level 0, and the drive signals RB3, RB0 and RA1 are controlled to be high level 1; the drive signals RB4, RB2, RB1, RA3 and RA2 are controlled to be inverted respectively corresponding to the drive signals RB4, RB2, RB1, RA3 and RA2 at the sixth moment;S8, at the eighth moment, the driving signal RC4, the driving signal RC2 and the driving signal RC1 are controlled to be high level 1, the driving signal RC3, the driving signal RC0 and the driving signal RB7 are controlled to be low level 0, and the driving signal RB3, the driving signal RB0 and the driving signal RA1 are controlled to be high level 1; the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 are controlled to be inverted respectively corresponding to the driving signal RB4, the driving signal RB2, the driving signal RB1, the driving signal RA3 and the driving signal RA2 at the seventh moment; S9, taking the driving signals RB4, RB2, RB1, RA3 and RA2 at the eighth moment as the initialized driving signals RB4, RB2, RB1, RA3 and RA2, and returning to S1 and looping through S1 to S8 until the driving stops; The resistance values ​​of resistors R1, R7, R9, R15, R17, R4, R6, R12 and R14 are all 30KΩ; the resistance values ​​of resistors R3, R5, R11, R13, R18, R2, R8, R10 and R16 are all 15KΩ; In S1, the level of the COM1 pin is 1, and the levels of the COM2 pin, the COM3 pin, and the COM4 pin are all 1 / 3; When the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG5 pin is lit or extinguished; In S2, the level of the COM2 pin is 1, and the levels of the COM1 pin, the COM3 pin, and the COM4 pin are all 1 / 3; When the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG5 pin is lit or extinguished; In S3, the level of the COM3 pin is 1, and the levels of the COM1 pin, the COM2 pin, and the COM4 pin are all 1 / 3; When the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG5 pin is lit or extinguished; In S4, the level of the COM4 pin is 1, and the levels of the COM1 pin, the COM2 pin, and the COM3 pin are all 1 / 3; When the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM4 pin and the SEG5 pin is lit or extinguished; In S5, the level of the COM1 pin is 0, and the levels of the COM2 pin, the COM3 pin, and the COM4 pin are all 2 / 3; When the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM1 pin and the SEG5 pin is lit or extinguished; In S6, the level of the COM2 pin is 0, and the levels of the COM1 pin, the COM3 pin, and the COM4 pin are all 2 / 3; When the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM2 pin and the SEG5 pin is lit or extinguished; In the S7, the level of the COM3 pin is 0, and the levels of the COM1 pin, the COM2 pin and the COM4 pin are all 2 / 3; When the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the pattern determined by the level difference between the COM3 pin and the SEG5 pin is lit or extinguished; In the S8, the level of the COM4 pin is 0, and the levels of the COM1 pin, the COM2 pin and the COM3 pin are all 2 / 3; When the driving signal RB4 at the first moment is inverted relative to the driving signal RB4 at the initial moment, the graphic determined by the level difference between the COM4 pin and the SEG1 pin is lit or extinguished; when the driving signal RB2 at the first moment is inverted relative to the driving signal RB2 at the initial moment, the graphic determined by the level difference between the COM4 pin and the SEG2 pin is lit or extinguished; when the driving signal RB1 at the first moment is inverted relative to the driving signal RB1 at the initial moment, the graphic determined by the level difference between the COM4 pin and the SEG3 pin is lit or extinguished; when the driving signal RA3 at the first moment is inverted relative to the driving signal RA3 at the initial moment, the graphic determined by the level difference between the COM4 pin and the SEG4 pin is lit or extinguished; when the driving signal RA2 at the first moment is inverted relative to the driving signal RA2 at the initial moment, the graphic determined by the level difference between the COM4 pin and the SEG5 pin is lit or extinguished.

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