Method and apparatus for delaying a signal

By constructing a combination of reconstruction and compensation filters based on window functions, the phase error problem in multi-channel coherent signal source systems is solved, achieving accurate, stable coherence and efficient arbitrary fractional delay of the signal.

CN115589215BActive Publication Date: 2026-02-17成都玖锦科技有限公司
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Patent Information

Application Number
CN202211232591.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-10-10
Publication Date
2026-02-17
Estimated Expiration
2042-10-10

AI Technical Summary

Technical Problem

In a multi-channel coherent signal source system, phase errors between channels lead to inaccurate and unstable signals, affecting system performance. Existing technologies struggle to effectively eliminate these errors to achieve accurate and stable coherence between channels.

Method used

A reconstruction filter based on a window function to construct a delay τfra is adopted, and the amplitude unevenness is compensated by a compensation filter. The coefficients of the reconstruction filter with variable coefficients are calculated by FPGA or DSP to realize two-stage filtering to achieve arbitrary decimal delay.

Benefits of technology

It achieves efficient and convenient arbitrary decimal delay processing, improves signal accuracy and stability, simplifies design and reduces resource consumption.

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Abstract

Method and device for delaying a signal. Method for delaying a signal, characterized in that it comprises: - obtaining a signal to be delayed by τ fra , said signal comprising an input point and an output point; - constructing a reconstruction filter of the delay τ fra based on a window function, - outputting the signal of the input point delayed at the output point.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of digital signal processing, and in particular to a method and device for delaying a signal. BACKGROUND

[0002] In many wireless communication and military application systems, such as MIMO communication (Multiple Input Multiple Output), beam forming, phased array radar, synthetic aperture radar (SAR) system, etc., multiple signal sources are needed to generate multiple signals with stable phase relationship between each other. The accuracy and stability of the relative phase between each of the multiple signals play a very important role in the performance of the above-mentioned application systems.

[0003] In a multi-channel phase coherent signal source system, the main factors affecting the phase coherent performance (phase coherent accuracy and stability) include four aspects:

[0004] (1) Different local oscillators (LO) in each channel, causing the phase of the carrier signal to drift over time;

[0005] (2) Different baseband sampling clocks in each channel, causing the baseband modulation envelope to be out of synchronization;

[0006] (3) Different baseband trigger signals in each channel, causing the baseband modulation envelope to have a time delay difference;

[0007] (4) Different path delays and initial phases in each channel, causing the phase of the radio frequency signal to shift.

[0008] The above factors are more or less related to the delay of the system. How to flexibly delay the signal to effectively eliminate the above system errors and achieve accurate and stable phase coherence between channels is a problem to be solved by the present application. SUMMARY

[0009] The present application aims to provide a method and device for delaying a signal, which can at least flexibly delay the signal to effectively eliminate system errors and achieve accurate and stable phase coherence between channels.

[0010] According to an aspect of the present application, at least one embodiment provides a method for delaying a signal, comprising: obtaining a signal to be delayed by τ fra , the signal comprising an input point and an output point; constructing a reconstruction filter for delaying τ fra based on a window function, and outputting the signal at the input point at the output point.

[0011] According to another aspect of the present application, at least one embodiment further provides a device for delaying a signal, comprising: a processor adapted to implement instructions; and a memory adapted to store a plurality of instructions adapted to be loaded and executed by the processor to implement the method for delaying a signal as described above.

[0012] According to another aspect of the present application, at least one embodiment further provides a system for delaying a signal, comprising: the device for delaying a signal as described above.

[0013] According to another aspect of the present application, at least one embodiment further provides a computer readable nonvolatile storage medium storing computer program instructions, which when executed by a computer, implement the method for delaying a signal as described above.

[0014] Through the above-mentioned embodiments of the present application, a reconstruction filter with an arbitrary fixed group delay is built in a filtering manner, and a compensation filter is used to compensate for the amplitude flatness characteristics caused by the reconstruction filter, wherein the reconstruction filter can calculate variable coefficients according to the delay value by FPGA or DSP, and the compensation filter is a fixed coefficient, which can reduce design consumption. The present application only needs to pass through two levels of filtering, and can efficiently and conveniently realize an arbitrary fractional delay, and has simple implementation and good expansibility. BRIEF DESCRIPTION OF DRAWINGS

[0015] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the drawings needed in the specific embodiments or prior art description will be briefly introduced as follows. Obviously, the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0016] Figure 1 is an application environment schematic diagram according to an embodiment of the present application;

[0017] Figure 2 is a device for delaying a signal according to an embodiment of the present application;

[0018] Figure 3 is a flowchart of a method for delaying a signal according to an embodiment of the present application;

[0019] Figure 4 is a signal schematic diagram according to an embodiment of the present application;

[0020] Figure 5 is a compensation filter and reconstruction filter amplitude frequency response comparison schematic diagram according to an embodiment of the present application;

[0021] Figure 6is a schematic diagram of overall amplitude-frequency response of a compensation filter and a reconstruction filter according to an embodiment of the present application;

[0022] Figure 7 is a schematic diagram of overall group delay response of a compensation filter and a reconstruction filter according to an embodiment of the present application;

[0023] Figure 8 is a schematic diagram of real part curves of a CW signal before and after delay according to an embodiment of the present application. DETAILED DESCRIPTION

[0024] The technical solutions of the present application will be described clearly and completely below with reference to the drawings. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0025] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and do not necessarily mean a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to the process, method, product or device.

[0026] Delay of digital signal is a key technology in the fields of radar signal processing, speech signal processing, underwater acoustic signal processing, etc., and has wide applications in multi-channel coherent calibration, time adjustment of digital receiver, etc. When the delay amount of digital signal is an integer multiple of sampling period (i.e. integer delay), only data shift is needed, but in daily life, integer delay is less likely to occur, and more often, decimal delay is encountered.

[0027] Common delay implementation methods: one is to use interpolation, filtering, delay, decimation method to improve the sampling rate of the system, so that the delay precision is no longer limited by the original sampling clock period, but the implementation of arbitrary decimal delay interpolation and decimation factor may require very large and low implementation efficiency; The second is to fit the original sequence to obtain the data of the corresponding delay time position by fitting method, and the fitting method is various, such as Lagrange, Taylor expansion, etc. The oversampling multiple of the input signal is required, and the large bandwidth signal will appear spurious. In order to realize high-efficiency arbitrary decimal delay, and then achieve accurate and stable signal inter-channel correlation, at least one embodiment of the present application provides a system for delaying signals, which comprises a device for delaying signals.

[0028] The system for delaying signals can include an environment as shown in Figure 1 The above hardware environment includes a device 100 for delaying signals and a server 200. The device 100 for delaying signals can operate the server 200 through corresponding instructions, so as to read, change, add data, etc. The device 100 for delaying signals can be one or more, and can include multiple processing nodes which can be regarded as a whole externally.

[0029] Optionally, the device 100 for delaying signals can also send the acquired signal to be delayed τ fra to the server 200, so that the server 200 executes the method for delaying signals of the present application. Optionally, the device 100 for delaying signals can be connected with the server 200 through a network. The network includes wired network and wireless network. The wireless network includes but is not limited to wide area network, metropolitan area network, local area network or mobile data network. Typically, the mobile data network includes but is not limited to global system for mobile communication (GSM) network, code division multiple access (CDMA) network, wideband code division multiple access (WCDMA) network, long term evolution (LTE) communication network, WIFI network, ZigBee network, Bluetooth technology-based network, etc. Different types of communication networks can be operated by different operators. The type of communication network does not constitute a limitation on the embodiments of the present application.

[0030] The device 100 for delaying signals, as shown in Figure 2 includes a processor 202 and a memory 204 configured to store computer program instructions suitable for being loaded and executed by the processor to perform the method for delaying signals developed by the present application (which will be described in detail later). Optionally, at least one embodiment of the present application further provides a computer-readable nonvolatile storage medium storing computer program instructions, which, when executed by a computer, perform the method for delaying signals developed by the present application.

[0031] The processor 202 can be various applicable processors, for example, implemented in the form of a central processor, a microprocessor, an embedded processor, etc., which can adopt an X86, ARM, etc. architecture. The memory 204 can be various applicable storage devices, for example, non-volatile storage devices, including but not limited to magnetic storage devices, semiconductor storage devices, optical storage devices, etc., and can be arranged as a single storage device, an array of storage devices, or a distributed storage device, and embodiments of the present application do not limit these.

[0032] Those skilled in the art can understand that the structure of the above-mentioned device for delaying a signal is only schematic, and does not limit the structure of the device. For example, the device for delaying a signal can further include more or fewer components (such as a transmission device) than those shown in the above-mentioned device. The transmission device described above is used to receive or send data via a network. In one example, the transmission device is a radio frequency (RF) module, which is used to communicate with the Internet in a wireless manner. Figure 2

[0033] Under the above-mentioned operating environment, at least one embodiment of the present application proposes a method for delaying a signal, which can be loaded and executed by the processor 202, for at least arbitrarily delaying a signal. As shown in the flowchart of the method for delaying a digital signal, it should be noted that the steps shown in the flowchart of the drawing can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that here. The method can include the following steps: Figure 3

[0034] Step S301, acquiring a signal to be delayed τ fra , the signal including an input point and an output point;

[0035] Step S303, constructing a reconstruction filter for delaying τ fra based on a window function, and outputting the signal at the input point at the output point.

[0036] It should be noted that the delay refers to an arbitrary delay adjustment of the output point of the signal relative to the input point (i.e., the sampling intervals corresponding to the input sampling rate and the output sampling rate are consistent, but the sampling time is different), for example, Figure 4 ​​The signal curve shown, the solid arrow points to the input sample point, the dotted circle arrow points to the output sample point, that is, the output sample time is time-shifted relative to the input sample time as a whole. In order to realize efficient and high-precision arbitrary delay of the signal, the present application realizes arbitrary delay of the input point through a reconstruction filter of arbitrary group delay, and simultaneously introduces a compensation filter to compensate for the amplitude unevenness in the delay processing process, thereby more conveniently realizing arbitrary fractional delay of the signal.

[0037] In step S301, a signal to be delayed by τ fra is acquired, the signal including an input point and an output point, 0≤τ fra <1. The present application does not limit the type of input signal, for example, the above-mentioned signal is a CW complex signal, and its time-domain formula is: The signal after delay τ is: The phase difference of the input and output signals is: Then the delay τ can be obtained by the following formula: Where f c is the center frequency of the CW complex signal, is the initial phase of the signal, is the phase of the input point, is the phase of the output point. Alternatively, the above-mentioned input signal is a comb wave signal Where f n = f1+ (n-1) · Δf, is the initial phase of each frequency component, Δf is the frequency interval, A n is the initial amplitude value of each frequency component, n = 0, 1, 2, 3, …, N.

[0038] In step S303, a reconstruction filter of delay τ fra is constructed based on a window function, and the signal of the input point is output with delay at the output point. For example, Q reconstruction filters are divided by using a window function q[k], where, k = 0, 1, …, K-1, K = P·Q, P is the coefficient length of the reconstruction filter (P is an odd number), a n is the coefficient of the window function, the number Q of discrete reconstruction filters and the reconstruction filter coefficient length P can be adjusted as needed; the filter coefficients of the Q reconstruction filters are obtained by τ fra q[m+d], q[Q+m+d], q[2Q+m+d], …, q[(P-1)·Q+m+d], where, 0≤m≤Q-1, m is an integer, 0≤d<1, d is a fraction.

[0039] ​Optionally, Q filters are segmented by using a window function q[k]. The window function q[k] is not limited to the flattop window, and any window function with periodic symmetry can be used to design reconstruction filters with fixed group delay and consistent amplitude-frequency response, so as to realize the function of arbitrary resampling. For example, the flattop window is used as the window function q[k], and N=5, P=11, Q=128, a0=0.21557895, a1=-0.41663158, a2=0.277263158, a3=-0.083578947, and a4=0.006947368. That is, the window function with periodic symmetry is used to design reconstruction filters with fixed group delay and consistent amplitude-frequency response, so as to realize the function of arbitrary delay. Specifically, the window function is used as a prototype to construct a reconstruction filter, and a plurality of groups of reconstruction filters with fixed group delay and consistent amplitude-frequency response can be obtained by uniform segmentation / fitting or direct formula calculation. The amplitude-frequency response of each filter coefficient is consistent, and the group delay response changes uniformly and regularly. The Q filters uniformly extract data, and the Q filter coefficients are as follows:

[0040] coef0: q[0], q[Q], q[2Q], …, q[(P-1)·Q]

[0041] coef1: q[1], q[Q+1], q[2Q+1], …, q[(P-1)·Q+1]

[0042]

[0043] coef m : q[m], q[Q+m], q[2Q+m], …, q[(P-1)·Q+m]

[0044]

[0045] coef Q-1 : q[Q-1], q[Q+Q-1], q[2Q+Q-1], …, q[(P-1)·Q+Q-1]

[0046] It can be seen that when m=Q / 2, the filter coefficient is: Q / 2 : At the same time, since P is an odd number, the symmetry point is and It is proved that the filter coefficient coef Q / 2 is even symmetric, and the group delay is a fixed value The proof process is as follows:

[0047]

[0048]

[0049] Therefore, relative to m=Q / 2, the filter coefficient coef Q / 2 Other reconstructed filter coefficients coef m The filter coefficients coef Q / 2 are time-shifted by m / Q-0.5 sampling points. According to the time-shift characteristic of Fourier transform, the frequency domain also has a fixed group delay, that is, a filter corresponding to τ fra can be selected from the Q filters divided by the window function q[k], and the filter is regarded as a reconstructed filter that can delay τ fra . That is, the Q filters divided by the window function q[k] have consistent amplitude-frequency responses, a fixed group delay response related to time shift, and filter coefficients coef0, coef1,.., coef Q-1 , and the delay resolution is sampling points. Therefore, a filter corresponding to the required delay can be selected.

[0050]

[0051]

[0052] Alternatively, the filter coefficients coef fra of the reconstructed filter are obtained by τ It is known from the foregoing argument that the mth filter coefficient of the Q filters is coef m : q[m], q[Q+m], q[2Q+m], …, q[(P-1)·Q+m]. Therefore, first, the group delay is divided into an integer part and a decimal part, the integer part is: 0≤m≤Q-1, m is an integer; and the decimal part is: 0≤d<1, d is a decimal. Second, the filter coefficients coef The above acquisition can directly acquire values through the original window function formula, or can acquire values through Lagrange fitting or Taylor expansion fitting. Thus, the reconstructed filter coefficients of any group delay can be obtained, and the amplitude-frequency responses of these reconstructed filters are consistent, and the group delay response is any fixed value.

[0053] ​For example, the window coefficient value corresponding to the position of the moment is directly calculated by the original window function formula, and the software implementation has high precision; or on the basis of the current limited Q filter coefficients, an interpolation method (including but not limited to Lagrange, Taylor, polynomial fitting, etc.) is used to obtain, and only the discrete reconstructed filter coefficients need to be stored to obtain the reconstructed filter coefficients at any moment position. The above-mentioned method in the prior art is mature and will not be described in detail.

[0054] In addition, in view of the uneven characteristics of the reconstructed filter, a compensation filter is added in front of the reconstructed filter to compensate the in-band amplitude unevenness of the reconstructed filter by the amplitude-frequency compensation of the compensation filter on the signal, so that the whole system for signal delay becomes a full-pass arbitrary group delay filter. Wherein, the amplitude-frequency response of the reconstructed filter is opposite to the amplitude-frequency response of the compensation filter, the group delay response of the compensation filter is a fixed value, and the compensation filter is a coefficient-symmetric FIR filter.

[0055] Suppose that for the sampling rate of 250MHz of the CW complex signal, the sampling interval is 4ns, the CW center frequency is 5MHz, and the delay of 2.16ns and 3.421ns is required respectively. Suppose that the order of the compensation filter is 32, and the amplitude-frequency response of the compensation filter under this parameter is compared with the frequency response of the reconstructed filter as shown in FIG. 6, and it can be seen from the figure that the amplitude-frequency responses of the compensation filter and the reconstructed filter are opposite in the [-0.3, 0.3] normalized frequency, and the amplitude-frequency response of the whole filter system in the interval is close to flat, and the group delay response is a fixed value. Figure 5 、 6 As shown in Table 1, for the CW complex signal, the actual delay result is the same as the required delay, and the comparison overview of the real part of the CW complex signal before and after the delay is shown in FIG. 7, and it can be seen from the figure that the output point is delayed compared with the input point. Further, it is illustrated that the present application can realize the arbitrary delay of the signal. Figure 8

[0056] Table 1 CW complex signal delay calculation

[0057] First sample point value Phase Phase difference Time delay Input point -0.5878-j*0.8090 -0.7·π —— —— Output point with a delay of 2.16 ns -0.6413-j*0.7673 -0.7216·π 0.0216·π 2.16 ns Output point with a delay of 3.421 ns -0.6712-j*0.7413 -0.73421·π 0.03421·π 3.421 ns

[0058] By the above-mentioned manner of the present application, the arbitrary decimal delay of the signal can be realized by using a fixed coefficient compensation filter (the compensation filter is a fixed coefficient, which can reduce the design consumption) and a group of reconstructed filters determined by the delay value. Specifically, two modules realize arbitrary resampling, the signal passes through a fixed coefficient compensation filter first, then the corresponding reconstructed filter coefficient is calculated according to the required delay for filtering, and finally the output signal is the delayed signal. The overall process is realized by two-stage filters, the compensation filter is designed as a coefficient-symmetric FIR filter, which consumes less resources and is helpful for FPGA or DSP implementation, and improves the rate. ​

[0059] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit the present application; although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that the technical solutions recorded in the above embodiments can still be modified, or some or all of the technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for delaying a signal, characterized by, Comprising: acquiring a signal to be delayed by τ fra , the signal comprising an input point and an output point; Delay τ is constructed based on window function. fra The reconstruction filter delays the signal at the input point and outputs it at the output point. Wherein, the delay τ is constructed based on a window function fra The reconstruction filter includes: The reconstruction filter is segmented by using a window function q[k], wherein the window function q[k] is P is the coefficient length of the reconstruction filter, Q is the number of segmented filters, a n is the coefficient of the window function; By τ fra Obtaining filter coefficients of a reconstruction filter The are q[m+d], q[Q+m+d], q[2Q+m+d],..., q[(P-1)·Q+m+d], wherein m is an integer, d is a fraction; The dividing of the reconstruction filter by the window function q[k] comprises: Q filters are divided by using a window function q[k], wherein a coefficient of an mth filter in the Q filters is coef m : q[m], q[Q+m], q[2Q+m], …, q[(P-1)·Q+m], the window function q[k] is a flattop window, N=5, a0=0.21557895, a1=-0.41663158, a2=0.277263158, a3=-0.083578947, a4=0.006947368; selecting from the Q filters the filter corresponding to τ fra corresponding filter, considering this filter as a reconstruction filter.

2. The method of claim 1, wherein, by τ fra obtaining filter coefficients of a reconstruction filter comprising obtaining the filter coefficients by the q[k] or obtaining the filter coefficients by an interpolation fit 3. The method of claim 1, wherein, The reconstruction filter is constructed based on a window function fra and further comprises: A compensation filter is preposed in front of the reconstruction filter, so that the compensation filter performs amplitude-frequency compensation on the signal, wherein the amplitude-frequency response of the reconstruction filter is opposite to the amplitude-frequency response of the compensation filter.

4. The method of claim 3, wherein, The group delay response of the compensation filter is a fixed value, and the compensation filter is a coefficient-symmetrical FIR filter.

5. The method of claim 1, the signal being a CW complex signal After a delay τ is: wherein, f c is the CW complex signal center frequency, is the signal initial phase, is the input point phase, is the output point phase.

6. An apparatus for delaying a signal, comprising: a processor adapted to implement the instructions; and a memory adapted to store a plurality of instructions adapted to be loaded and executed by the processor, the instructions being adapted to perform the method for delaying a signal according to any one of claims 1-5.

7. A system for delaying a signal, comprising: The apparatus for delaying a signal according to claim 6.

8. A computer-readable nonvolatile storage medium storing computer program instructions, which, when executed by a computer, perform the method for delaying a signal according to any one of claims 1-5.

Citation Information

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