Control system, method, display device and storage medium for display panel

By dividing the display area of ​​the display panel into multiple partitions and dynamically adjusting the voltage signal according to the working status of each partition, the problem of large power consumption in the existing display panel power supply scheme is solved, and higher energy efficiency is achieved.

CN115602121BActive Publication Date: 2025-04-18XIAMEN TIANMA DISPLAY TECH CO LTD
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Patent Information

Application Number
CN202211214296.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-30
Publication Date
2025-04-18
Estimated Expiration
2042-09-30

AI Technical Summary

Technical Problem

When the power supply scheme of the existing display panel supplies power to multiple pixel circuits, there is a problem of high power consumption.

Method used

By dividing the display area of ​​the display panel into multiple partitions, each partition includes at least one pixel circuit, the working state parameters of each partition are obtained by using the detection circuit, and the voltage adjustment parameters of each partition are determined based on these parameters. The driving chip provides the target voltage signal to each partition according to these parameters, thereby realizing dynamic adjustment of the voltage signal of each partition.

Benefits of technology

By dynamically adjusting the voltage signals of each partition, the overall power consumption of the display panel is reduced and energy efficiency is improved.

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Abstract

The embodiment of the present application provides a control system, method, display device and storage medium of a display panel, wherein the display panel includes a display area, the display area includes M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; the control system includes: a detection circuit, the detection circuit is used to obtain working state parameters of the M partitions, the working state parameters are used to feedback the working state of the partitions, and according to the working state parameters of the M partitions, determine the voltage adjustment parameters of the M partitions; a driving chip is electrically connected to the detection circuit, and is used to determine the voltage value of the target voltage signal corresponding to each of the M partitions according to the voltage adjustment parameters of the M partitions, and according to the voltage value of the target voltage signal corresponding to each of the M partitions, provide the target voltage signal to the pixel circuits in the M partitions. The embodiment of the present application can reduce the power consumption of the display panel.
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Description

Technical Field

[0001] The present application belongs to the field of display technology, and in particular, relates to a control system, method, display device and storage medium of a display panel. Background Art

[0002] With the development of display technology, the application of display panels is becoming more and more extensive, and the corresponding requirements for display panels are becoming higher and higher. The display panel includes multiple pixel circuits, and the signal lines connected by the pixel circuits can provide the pixel circuits with voltage signals that meet the working requirements of the pixel circuits, so that the pixel circuits can normally drive the light-emitting elements to emit light.

[0003] However, the inventors of the present application have found through research that the current power supply scheme has a problem of high power consumption when supplying power to multiple pixel circuits of a display panel. Summary of the invention

[0004] Embodiments of the present application provide a control system, method, display device, and storage medium for a display panel, which can reduce the power consumption of the display panel.

[0005] In a first aspect, an embodiment of the present application provides a control system for a display panel, wherein the display panel includes a display area, the display area includes M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; the control system includes: a detection circuit, the detection circuit is used to obtain working state parameters of the M partitions, the working state parameters are used to feedback the working state of the partitions, and determine voltage adjustment parameters of the M partitions based on the working state parameters of the M partitions; a driving chip, electrically connected to the detection circuit, for determining voltage values ​​of target voltage signals corresponding to each of the M partitions based on the voltage adjustment parameters of the M partitions, and providing target voltage signals to the pixel circuits in the M partitions based on the voltage values ​​of the target voltage signals corresponding to each of the M partitions.

[0006] In a second aspect, an embodiment of the present application provides a control method for a display panel, wherein the display panel includes a display area, the display area includes M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; the control method includes: obtaining working state parameters of the M partitions, the working state parameters are used to feedback the working state of the partitions; determining voltage adjustment parameters of the M partitions according to the working state parameters of the M partitions; determining voltage values ​​of target voltage signals corresponding to each of the M partitions according to the voltage adjustment parameters of the M partitions; and providing the target voltage signals to the pixel circuits in the M partitions according to the voltage values ​​of the target voltage signals corresponding to each of the M partitions.

[0007] In a third aspect, an embodiment of the present application provides a display device, which includes a control system of a display panel as provided in the first aspect.

[0008] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the display panel control method provided in the second aspect are implemented.

[0009] The control system, method, display device and storage medium of the display panel of the embodiment of the present application divide the display area of ​​the display panel into M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; the working state parameters of the M partitions are obtained through the detection circuit, and the voltage adjustment parameters of the M partitions are determined according to the working state parameters of the M partitions; the driving chip determines the voltage values ​​of the target voltage signals corresponding to the M partitions according to the voltage adjustment parameters of the M partitions, and provides the target voltage signals to the pixel circuits in the M partitions according to the voltage values ​​of the target voltage signals corresponding to the M partitions, thereby realizing dynamic adjustment of the voltage values ​​of the target voltage signals of each partition, thereby achieving the effect of reducing the power consumption of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0011] Figure 1 A schematic diagram of the structure of a control system of a display panel provided in an embodiment of the present application;

[0012] Figure 2 A schematic diagram of the corresponding partition distribution under various display modes of the display panel;

[0013] Figure 3 Another structural schematic diagram of a control system of a display panel provided in an embodiment of the present application;

[0014] Figure 4 A schematic diagram of another structure of a control system of a display panel provided in an embodiment of the present application;

[0015] Figure 5 A schematic diagram of another structure of a control system of a display panel provided in an embodiment of the present application;

[0016] Figure 6 A circuit diagram of a pixel circuit in a display panel provided in an embodiment of the present application;

[0017] Figure 7A schematic cross-sectional view of a display panel provided in an embodiment of the present application;

[0018] Figure 8 A schematic diagram of a flow chart of a method for controlling a display panel provided in an embodiment of the present application;

[0019] Fig. 9 Another schematic diagram of a flow chart of a method for controlling a display panel provided in an embodiment of the present application;

[0020] Fig.10 for Figure 8 A schematic diagram of a flow chart of S803 in the method for controlling a display panel;

[0021] Fig.11 for Figure 8 A schematic diagram of a flow chart of S803 in the method for controlling a display panel;

[0022] Fig.12 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0023] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0024] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0025] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0026] It should be noted that the transistors in the embodiments of the present application can be N-type transistors or P-type transistors, except for the cases that are highlighted. For N-type transistors, the on-level is a high level and the off-level is a low level. That is, when the gate of the N-type transistor is at a high level, the first pole and the second pole are connected, and when the gate of the N-type transistor is at a low level, the first pole and the second pole are disconnected. For P-type transistors, the on-level is a low level and the off-level is a high level. That is, when the control terminal of the P-type transistor is at a low level, the first pole and the second pole are connected, and when the control terminal of the P-type transistor is at a high level, the first pole and the second pole are disconnected. In a specific implementation, the gate of each of the above-mentioned transistors serves as its control electrode, and, according to the signal of the gate of each transistor and its type, its first electrode can be used as the source and the second electrode as the drain, or its first electrode can be used as the drain and the second electrode as the source, without making any distinction here. In addition, the on-level and off-level in the embodiments of the present invention are both general terms, the on-level refers to any level that can turn on the transistor, and the off-level refers to any level that can turn off / shut down the transistor.

[0027] In the embodiments of the present application, the term “electrically connected” may refer to a direct electrical connection between two components, or may refer to an electrical connection between two components via one or more other components.

[0028] In the embodiment of the present application, the first node is defined only for the convenience of describing the circuit structure, and the first node is not an actual circuit unit.

[0029] It is obvious to those skilled in the art that various modifications and changes can be made in the present application without departing from the spirit or scope of the present application. Therefore, the present application is intended to cover modifications and changes of the present application that fall within the scope of the corresponding claims (technical solutions for protection) and their equivalents. It should be noted that the implementation methods provided in the embodiments of the present application can be combined with each other without contradiction.

[0030] Before describing the technical solutions provided by the embodiments of the present application, in order to facilitate the understanding of the embodiments of the present application, the present application first specifically describes the problems existing in the related art:

[0031] The display panel includes a plurality of pixel circuits, and the signal lines connected through the pixel circuits can provide the pixel circuits with voltage signals that meet the working requirements of the pixel circuits, thereby enabling the pixel circuits to normally drive the light-emitting elements to emit light.

[0032] When a user uses an electronic device equipped with a display panel, sometimes only a partial area (called the target area) in the display area of ​​the display panel may be required to display content, while non-target areas in the display area other than the target area may not display content or have a brightness lower than that of the target area.

[0033] However, the inventors of this application have discovered that the current power supply scheme is that the display area of ​​the entire display panel shares a set of voltage signals, resulting in non-target areas also having to share the same voltage setting as the target area, which in turn causes unnecessary power loss and makes the display panel consume more power.

[0034] In view of the above research findings of the inventors, the embodiments of the present application provide a control system, method, display device and storage medium for a display panel, which can solve the technical problem of high power consumption of the display panel existing in the related art.

[0035] The technical concept of the embodiments of the present application is: dividing the display area of ​​the display panel into M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; obtaining the working state parameters of the M partitions through the detection circuit, and determining the voltage adjustment parameters of the M partitions according to the working state parameters of the M partitions; the driving chip determines the voltage values ​​of the target voltage signals corresponding to the M partitions according to the voltage adjustment parameters of the M partitions, and provides the target voltage signals to the pixel circuits in the M partitions according to the voltage values ​​of the target voltage signals corresponding to the M partitions, thereby realizing dynamic adjustment of the voltage values ​​of the target voltage signals of each partition, such as making the voltage value of the target voltage signal in the non-target area smaller than the voltage value of the target voltage signal in the target area, so as to achieve the effect of reducing the power consumption of the display panel.

[0036] The following first introduces the control system of the display panel provided in the embodiment of the present application.

[0037] Figure 1 A schematic diagram of a control system of a display panel provided in an embodiment of the present application. Figure 1As shown, the display panel may include a display area AA, and the display area AA may include M partitions a, where M is an integer greater than 1. That is, the display area AA may include multiple partitions a. Each partition a may include at least one pixel circuit (not shown in the figure). Exemplarily, the pixel circuit includes but is not limited to a 2T1C pixel circuit, a 7T1C pixel circuit, a 7T2C pixel circuit, an 8T1C pixel circuit or a 9T1C pixel circuit. A 2T1C pixel circuit is a pixel circuit that includes two thin film transistors (TFTs) and a storage capacitor. A 7T2C pixel circuit is a pixel circuit that includes seven TFTs and two storage capacitors. Other types of pixel circuits are analogous and will not be described in detail here.

[0038] The control system 10 of the display panel may include a detection circuit 101 and a driver chip 102. The detection circuit 101 may be electrically connected to the M partitions a respectively, and is used to obtain the working state parameters of the M partitions a. Among them, the working state parameters can be used to feedback the parameters of the working state of the partition. Exemplarily, the working state parameters include but are not limited to the voltage value of the data voltage signal, the driving current of the pixel circuit, the refresh rate or the touch capacitance value, etc. The detection circuit 101 can also be used to determine the voltage adjustment parameter k of the M partitions a according to the working state parameters of the M partitions a. Among them, the voltage adjustment parameter k can be a value greater than 0, such as 0.2, 1.5 or other values. The voltage adjustment parameter k can be used to adjust the voltage value of the target voltage signal. Exemplarily, the target voltage signal includes but is not limited to a reference voltage signal, a first power supply voltage signal and / or a second power supply voltage signal, and each signal will be described in detail below.

[0039] The driver chip 102 can be electrically connected to the detection circuit 101, and the driver chip 102 can be used to determine the voltage value of the target voltage signal corresponding to each of the M partitions a according to the voltage adjustment parameter k of the M partitions a. That is, the voltage value of the target voltage signal corresponding to each of the partitions a is adjusted by the voltage adjustment parameter k of each partition a. The driver chip 102 can also be used to provide a target voltage signal to the pixel circuits in the M partitions a according to the voltage value of the target voltage signal corresponding to each of the M partitions a. That is, for any i-th partition a, the driver chip 102 can be used to provide a target voltage signal of a corresponding voltage value to the pixel circuit in the i-th partition a according to the voltage value of the target voltage signal corresponding to the i-th partition a, where i is a positive integer.

[0040] In this way, the embodiment of the present application divides the display area of ​​the display panel into M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; the working state parameters of the M partitions are obtained through the detection circuit, and the voltage adjustment parameters of the M partitions are determined according to the working state parameters of the M partitions; the driving chip determines the voltage values ​​of the target voltage signals corresponding to the M partitions according to the voltage adjustment parameters of the M partitions, and provides the target voltage signals to the pixel circuits in the M partitions according to the voltage values ​​of the target voltage signals corresponding to the M partitions, thereby realizing dynamic adjustment of the voltage values ​​of the target voltage signals of each partition.

[0041] For example, the voltage value of the target voltage signal of the partition corresponding to the non-target area (hereinafter referred to as the non-target partition) can be reduced so that the non-target partition no longer uses the same voltage value of the target voltage signal as the partition corresponding to the target area (hereinafter referred to as the target partition), but is smaller than the voltage value of the target voltage signal of the target partition, thereby achieving the effect of reducing the power consumption of the display panel.

[0042] The inventor of the present application realizes that when the number of partitions a is large, the detection circuit 101 needs to transmit a large number of voltage adjustment parameters to the driver chip 102. The driver chip 102 needs to calculate each voltage adjustment parameter one by one to obtain the voltage values ​​of the target voltage signals of the multiple partitions. Both data transmission and data calculation take a certain amount of time.

[0043] In view of this, according to some embodiments of the present application, optionally, the detection circuit 101 can also be used to generate a voltage adjustment parameter matrix K according to the voltage adjustment parameters k of the M partitions a. Exemplarily, the voltage adjustment parameter matrix K can be, for example:

[0044]

[0045] Where k1 represents the voltage regulation parameter k of the first partition a, k M represents the voltage regulation parameter k of the Mth partition a, and so on.

[0046] The driver chip 102 can be specifically used to obtain a voltage value matrix V according to the voltage adjustment parameter matrix K. The voltage value matrix V can include voltage values ​​of target voltage signals corresponding to each of the M partitions. Exemplarily, the voltage value matrix V can be, for example:

[0047]

[0048] Where V represents the reference voltage value of the target voltage signal, k1 represents the voltage adjustment parameter k of the first partition a, and k Mrepresents the voltage regulation parameter k of the Mth partition a, Vk1 represents the voltage value of the target voltage signal corresponding to the first partition a, Vk M It represents the voltage value of the target voltage signal corresponding to the Mth partition a, and so on.

[0049] The driving chip 102 may also be configured to provide target voltage signals to the pixel circuits in the M partitions according to the voltage value matrix V.

[0050] In this way, by generating the voltage adjustment parameter matrix K and the voltage value matrix V, data calculation and transmission can be facilitated, and the calculation time and transmission time can be effectively shortened.

[0051] According to some embodiments of the present application, optionally, the detection circuit 101 may specifically determine the voltage regulation parameters of each partition through the following steps.

[0052] The detection circuit 101 can be specifically used to determine the voltage regulation parameter of any i-th partition among the M partitions according to the pre-established correspondence between the working state parameter and the voltage regulation parameter and the working state parameter of the i-th partition, where i is a positive integer.

[0053] For example, the voltage adjustment parameter k corresponding to different working state parameters can be obtained in advance through experiments, simulations or model training, that is, the corresponding relationship between the working state parameters and the voltage adjustment parameter k is obtained. Then, the corresponding relationship between the working state parameters and the voltage adjustment parameter k is stored in the detection circuit 101, the driver chip 102 or other storage modules.

[0054] After the working state parameter of the i-th partition is obtained, the voltage regulation parameter k corresponding to the working state parameter of the i-th partition can be queried according to the corresponding relationship between the working state parameter and the voltage regulation parameter k, thereby determining the voltage regulation parameter k of the i-th partition.

[0055] Taking the refresh rate as an example of the working state parameter, the voltage adjustment parameter k corresponding to different refresh rates can be obtained in advance through experiments, simulations or model training, that is, the corresponding relationship between the refresh rate and the voltage adjustment parameter k is obtained. Then, the corresponding relationship between the refresh rate and the voltage adjustment parameter k is stored in the detection circuit 101, the driver chip 102 or other storage modules.

[0056] After the refresh rate of the ith partition is obtained, the voltage adjustment parameter k corresponding to the refresh rate of the ith partition can be queried according to the corresponding relationship between the refresh rate and the voltage adjustment parameter k, thereby determining the voltage adjustment parameter k of the ith partition.

[0057] When the working state parameter is the voltage value of the data voltage signal, the driving current of the pixel circuit or the touch capacitance value, the process is similar to that corresponding to the above refresh rate and will not be repeated here.

[0058] In this way, by pre-establishing the corresponding relationship between the working state parameters and the voltage regulation parameters and storing them in the detection circuit 101, the driver chip 102 or other storage modules, after obtaining the working state parameters of each partition, the voltage regulation parameter k of each partition can be found out according to the corresponding relationship between the working state parameters and the voltage regulation parameters, which greatly reduces the amount of data calculation, shortens the time for determining the voltage regulation parameter k of each partition, and improves the data processing efficiency.

[0059] According to other embodiments of the present application, different display modes may be preset, and different display modes may preset voltage adjustment parameters k corresponding to each partition. In subsequent use, as long as the display mode of the display panel is determined, the voltage adjustment parameters k corresponding to each partition in the display mode may be directly determined.

[0060] Specifically, the display panel can be set to multiple display modes. For example, the multiple display modes may include a normal display mode, a browsing mode, and a screen-off display mode. Each display mode is correspondingly set with multiple partitioned voltage adjustment parameters k.

[0061] The detection circuit 101 can be specifically used to: determine the target display mode of the display panel according to the working status parameters of the M partitions, the target display mode being one of multiple display modes; determine the voltage adjustment parameters of the M partitions according to the voltage adjustment parameters of multiple partitions pre-set corresponding to the target display mode.

[0062] Let's take the driving current of the pixel circuit as an example. In the off-screen display mode, for example, the driving current of the pixel circuit in the partition corresponding to the edge area of ​​the display area is relatively small, and the driving current of the pixel circuit in the partition corresponding to the central area of ​​the display area is relatively large. Therefore, it is possible to determine whether the display panel is in the off-screen display mode by judging whether the driving current of the pixel circuit in the multiple partitions corresponding to the edge area of ​​the display area is less than the first preset threshold, and whether the driving current of the pixel circuit in the multiple partitions corresponding to the central area of ​​the display area is greater than the second preset threshold. Among them, the second preset threshold is greater than the first preset threshold. The first preset threshold and the second preset threshold can be flexibly adjusted according to actual conditions, and the embodiments of the present application are not limited to this.

[0063] When it is determined that the display panel is in the screen-off display mode, the voltage adjustment parameters of the M partitions may be determined according to the voltage adjustment parameters of the pre-set multiple partitions corresponding to the screen-off display mode.

[0064] In this way, different display modes are pre-set, and different display modes can pre-set the voltage adjustment parameters k corresponding to each partition. In the subsequent use process, as long as it is determined which display mode the display panel is currently in, the voltage adjustment parameters k corresponding to each partition in the display mode can be directly determined. On the one hand, the amount of data calculation is greatly reduced, the time for determining the voltage adjustment parameters k of each partition is shortened, and the data processing efficiency is improved. On the other hand, setting different display modes meets the display requirements of the display panel in different scenarios.

[0065] According to some embodiments of the present application, optionally, different display modes may divide the partitions differently. Moreover, when the display mode is switched, the partitions in the display area may change, for example, from the original m1 smaller partitions to m2 larger partitions, where m2 is smaller than m1.

[0066] Specifically, the display panel may include at least a first display mode and a second display mode. In the first display mode, the display area is divided into M1 partitions a, and in the second display mode, the display area is divided into M2 partitions a, M1 and M2 are both integers greater than 1, and M1 may not be equal to M2.

[0067] The detection circuit 101 can be specifically used to determine the target display mode of the display panel according to the working state parameters of the M partitions. The detection circuit 101 can also be used to: when the target display mode is the first display mode, determine the voltage adjustment parameters of the M1 partitions according to the pre-set voltage adjustment parameters of the M1 partitions corresponding to the first display mode. The driving chip 102 can be used to determine the voltage value of the target voltage signal corresponding to each of the M1 partitions according to the voltage adjustment parameter k of the M1 partitions, and provide the target voltage signal to the pixel circuit in the M1 partition according to the voltage value of the target voltage signal corresponding to each of the M1 partitions.

[0068] The detection circuit 101 can also be used to: when the target display mode is the second display mode, determine the voltage adjustment parameters of the M2 partitions according to the pre-set voltage adjustment parameters of the M2 partitions corresponding to the second display mode. The driving chip 102 can be used to determine the voltage value of the target voltage signal corresponding to each of the M2 partitions according to the voltage adjustment parameter k of the M2 partitions, and provide the target voltage signal to the pixel circuit in the M2 partitions according to the voltage value of the target voltage signal corresponding to each of the M2 partitions.

[0069] Figure 2 Schematic diagram of the corresponding partition distribution under various display modes of the display panel. Figure 2As shown, the display modes of the display panel include normal display mode A, browsing mode B and screen-off display mode C as an example. For example, in normal display mode A, it can be set that multiple partitions a in the central area A1 of the display area can share the same voltage adjustment parameter k4, and the edge area of ​​the display area can be divided into three larger partitions a according to different positions, and the voltage adjustment parameters corresponding to the three larger partitions a can be k1, k2 and k3 respectively. For example, in browsing mode B, the display area can be equally divided into multiple partitions a arranged in sequence along the column direction, such as 5 partitions a, and the voltage adjustment parameters corresponding to the 5 partitions a can be k1', k2', k3', k4' and k5' respectively. For example, in screen-off display mode C, it can be set that the central area A1 of the display area includes only one partition a, and the corresponding voltage adjustment parameter is k1", and multiple partitions a in the edge area of ​​the display area can share the same voltage adjustment parameter k2".

[0070] It should be noted that Figure 2 The distribution of the corresponding partitions in each display mode shown is only for illustration and does not constitute a limitation on the embodiments of the present application.

[0071] According to some embodiments of the present application, optionally, when setting the partitions of the display panel, the areas where the touch channels are located can be reused.

[0072] Figure 3 Another structural schematic diagram of a control system of a display panel provided in an embodiment of the present application. Figure 3 As shown, according to some embodiments of the present application, optionally, the display area AA may include a plurality of touch channels TP. One partition a may include one touch channel TP, that is, one partition a reuses an area where one touch channel TP is located.

[0073] In some embodiments, the driver chip 102 may be a touch driver chip that integrates a touch function and a driving function. The driver chip 102 may be specifically used to receive touch sensing signals sent by the touch channels TP in the M partitions, and process the touch sensing signals to obtain touch data of the touch channels TP in the M partitions. The detection circuit 101 may be specifically used to determine the touch state of the touch channels TP in the M partitions according to the touch data of the touch channels TP in the M partitions. Exemplarily, the touch data includes but is not limited to the touch capacitance value. The touch state may be used to characterize whether the touch channel TP is touched or not touched. For example, when the touch data corresponding to the i-th partition is greater than or equal to a preset threshold, it may be determined that the touch state of the touch channel TP in the i-th partition is touched. When the touch data corresponding to the i-th partition is less than the preset threshold, it may be determined that the touch state of the touch channel TP in the i-th partition is not touched.

[0074] The detection circuit 101 can also determine the voltage adjustment parameters k of the M partitions according to the touch states of the touch channels TP in the M partitions. The voltage adjustment parameter corresponding to the touch state when the touch channel is touched is different from the voltage adjustment parameter corresponding to the touch state when the touch channel is not touched. For example, the voltage adjustment parameter corresponding to the touched partition a may be k1, and the voltage adjustment parameter corresponding to the untouched partition a may be k2, and k1≠k2.

[0075] In this way, by reusing the areas where the touch channels TP are located as partitions, and using the touch data of the touch channels TP in each partition to determine the voltage adjustment parameters corresponding to each partition a, not only can the voltage value of the target voltage signal of each partition be dynamically adjusted, but it is also equivalent to using the original touch routing to collect the working status parameters of each partition, which can reduce the routing of the detection circuit 101 in the display area, which is beneficial to saving wiring space and reducing the production cost of the display panel.

[0076] Figure 4 This is another structural diagram of a control system of a display panel provided in an embodiment of the present application. Figure 4 As shown, Figure 3 Different from the illustrated embodiment, according to other embodiments of the present application, optionally, the control system 10 of the display panel may further include a touch chip 103, which may be electrically connected to the touch channels TP in the M partitions, and the touch chip 103 may be specifically used to receive touch sensing signals sent by the touch channels TP in the M partitions, and process the touch sensing signals to obtain touch data of the touch channels TP in the M partitions. That is, the collection and processing of touch sensing signals are realized by a separate touch chip 103.

[0077] The detection circuit 101 can be electrically connected to the touch chip 103. The detection circuit 101 can be specifically used to determine the touch state of the touch channel TP in the M partitions according to the touch data of the touch channel TP in the M partitions; and determine the voltage adjustment parameter k of the M partitions according to the touch state of the touch channel TP in the M partitions. The driving chip 102 can be used to determine the voltage value of the target voltage signal corresponding to each of the M partitions according to the voltage adjustment parameter k of the M partitions, and provide the target voltage signal to the pixel circuit in the M partitions according to the voltage value of the target voltage signal corresponding to each of the M partitions.

[0078] In this way, by reusing the areas where the touch channels TP are located as partitions, and using the touch data of the touch channels TP in each partition to determine the voltage adjustment parameters corresponding to each partition, not only can the voltage value of the target voltage signal of each partition be dynamically adjusted, but it is also equivalent to using the original touch routing to collect the working status parameters of each partition, which can reduce the routing of the detection circuit 101 in the display area, which is beneficial to saving wiring space and reducing the production cost of the display panel.

[0079] It should be noted that in the embodiment of the present application, the display panel can be a self-capacitive touch display panel or a mutual-capacitive touch display panel. When the display panel is a self-capacitive touch display panel, one touch channel TP can be one touch electrode. When the display panel is a mutual-capacitive touch display panel, the touch channel TP can be a receiving channel (or sensing electrode).

[0080] According to some embodiments of the present application, optionally, when the detection circuit 101 obtains the working state parameters of each partition, for any i-th partition among the M partitions, the working state parameters of a pixel circuit in the i-th partition can be obtained to obtain the working state parameters of the i-th partition, where i is a positive integer. That is, the working state parameters of any pixel circuit in the i-th partition are used as the working state parameters of the i-th partition.

[0081] The inventor of the present application realizes that a partition may include multiple pixel circuits, and the driving currents or data voltages of different pixel circuits are different. Therefore, in order to ensure the accuracy of voltage regulation, in other embodiments, the average value of the working state parameters of multiple pixel circuits in a partition may be calculated, and the average value may be used as the working state parameter of the partition.

[0082] Specifically, for any i-th partition among the M partitions, the working state parameters of the multiple pixel circuits in the i-th partition can be obtained, and the average value of the working state parameters of the multiple pixel circuits in the i-th partition can be calculated to obtain the working state parameter of the i-th partition. That is, the average value of the working state parameters of the multiple pixel circuits in the i-th partition is used as the working state parameter of the i-th partition.

[0083] Figure 5 This is another structural diagram of a control system of a display panel provided in an embodiment of the present application. Figure 5 As shown, according to some embodiments of the present application, optionally, the pixel circuit 50 may be electrically connected to a scan signal line S, and the scan signal line S may be used to provide a scan signal to control the switching unit in the pixel circuit 50 to be turned on or off. For example, the scan signal line S may include Figure 6 The first scanning signal line S1 or the second scanning signal line S2 is shown.

[0084] The pixel circuit 50 may be electrically connected to a data signal line data. The data signal line data may be used to provide a data signal (also called a data voltage signal). The data signal may be used to control the magnitude of a driving current provided by the pixel circuit 50 .

[0085] In some examples, the detection circuit 101 may be electrically connected to the pixel circuit 50 in each partition a, and the working state parameter may include the current value of the driving current. For example, the detection circuit 101 may be electrically connected to the output end (such as the drain) of the driving transistor in the pixel circuit 50 to collect the current value of the driving current output by the driving transistor.

[0086] In other examples, the detection circuit 101 can be electrically connected to the scanning signal line S corresponding to the pixel circuit 50 in each partition a, and accordingly, the working status parameter can include the refresh rate of the partition, that is, the frequency of the scanning signal output by the scanning signal line S corresponding to the partition.

[0087] In some other examples, the detection circuit 101 may be electrically connected to the data signal line data connected to the corresponding pixel circuit 50 in each partition a, and accordingly, the working state parameter may include a voltage value of the data signal.

[0088] It should be noted that Figure 5 It is illustrated by taking an example that the detection circuit 101 can be electrically connected to the data signal line data corresponding to the pixel circuit 50 in each partition a.

[0089] The target voltage signal of the embodiment of the present application is described below by way of example in conjunction with a 7T1C pixel circuit.

[0090] Figure 6 A circuit diagram of a pixel circuit in a display panel provided in an embodiment of the present application. Figure 6 As shown, according to some embodiments of the present application, optionally, the pixel circuit 50 can be electrically connected to the first pole of the light-emitting element D. The pixel circuit 50 can be electrically connected to the first power supply voltage signal line PVDD. The second pole of the light-emitting element D can be electrically connected to the second power supply voltage signal line PVEE. The first power supply voltage signal line PVDD can be used to transmit a first power supply voltage signal, and the first power supply voltage signal can be a positive voltage signal. The second power supply voltage signal line PVEE can be used to transmit a second power supply voltage signal, and the second power supply voltage signal can be a negative voltage signal. The first pole of the light-emitting element D can be an anode, and the second pole of the light-emitting element D can be a cathode.

[0091] The pixel circuit 50 may include a first reset module 501, a control end of the first reset module 501 is electrically connected to the first scan signal line S1, a first end of the first reset module 501 is electrically connected to the first reference voltage signal line Vref1, and a second end of the first reset module 501 is electrically connected to the first electrode of the light emitting element D. The first reset module 501 is configured to be turned on in response to a turn-on level provided by the first scan signal line S1, and transmit the first reference voltage signal provided by the first reference voltage signal line Vref1 to the first electrode of the light emitting element D, so as to reset the first electrode of the light emitting element D.

[0092] Among them, the target voltage signal may include at least one of a first reference voltage signal, a first power supply voltage signal, and a second power supply voltage signal. That is, in the embodiment of the present application, the voltage value of the first reference voltage signal output by the first reference voltage signal line Vref1 corresponding to the pixel circuits in different partitions may be different. And / or, the voltage value of the first power supply voltage signal output by the first power supply voltage signal line PVDD corresponding to the pixel circuits in different partitions may be different. And / or, the voltage value of the second power supply voltage signal output by the second power supply voltage signal line PVEE corresponding to the pixel circuits in different partitions may be different.

[0093] Continue to see Figure 6 In some specific embodiments, optionally, the first reset module 501 may include a first transistor M1, a gate of the first transistor M1 is electrically connected to the first scan signal line S1, a first electrode of the first transistor M1 is electrically connected to the first reference voltage signal line Vref1, and a second electrode of the first transistor M1 is electrically connected to the first electrode of the light-emitting element D.

[0094] The pixel circuit 50 may further include a second transistor M2 (ie, a driving transistor), and a gate of the second transistor M2 is electrically connected to the first node N1.

[0095] The pixel circuit 50 may further include a third transistor M3, a gate of the third transistor M3 being electrically connected to the second scan signal line S2, a first electrode of the third transistor M3 being electrically connected to the data signal line data, a second electrode of the third transistor M3 being electrically connected to the first electrode of the second transistor M2, and the third transistor M3 being used to write a data signal in response to control of the second scan signal line S2.

[0096] The pixel circuit 50 may further include a fourth transistor M4, a gate of the fourth transistor M4 being electrically connected to the second scan signal line S2, a first electrode of the fourth transistor M4 being electrically connected to the first node N1, a second electrode of the fourth transistor M4 being electrically connected to the second electrode of the second transistor M2, and the fourth transistor M4 being used to respond to the control of the second scan signal line S2 to achieve threshold compensation of the second transistor M2.

[0097] The pixel circuit 50 may further include a fifth transistor M5, a gate of which is electrically connected to the first scan signal line S1, a first electrode of the fifth transistor M5 is electrically connected to the second reference voltage signal terminal Vref2, a second electrode of the fifth transistor M5 is electrically connected to the first node N1, and the fifth transistor M5 is used to transmit the second reference voltage signal of the second reference voltage signal terminal Vref2 to the first node N1 in response to the control of the first scan signal line S1, so as to reset the first node N1.

[0098] The pixel circuit 50 may further include a sixth transistor M6, a gate of the sixth transistor M6 is electrically connected to the light emission control signal line EM, a first electrode of the sixth transistor M6 is electrically connected to the first power supply voltage signal line PVDD, and a second electrode of the sixth transistor M6 is electrically connected to the first electrode of the second transistor M2.

[0099] The pixel circuit 50 may further include a seventh transistor M7, a gate of which is electrically connected to the light emitting control signal line EM, a first electrode of which is electrically connected to the second electrode of the second transistor M2, and a second electrode of which is electrically connected to the first electrode of the light emitting element D1.

[0100] The pixel circuit 50 may further include a storage capacitor Cst, a first plate of the storage capacitor Cst is electrically connected to the first power voltage signal line PVDD, and a second plate of the storage capacitor Cst is electrically connected to the first node N1 for maintaining the potential of the first node N1.

[0101] Figure 7 A cross-sectional schematic diagram of a display panel provided in an embodiment of the present application. Figure 7 As shown, according to some embodiments of the present application, optionally, the display panel 70 can be electrically connected to a flexible printed circuit 71 (Flexible Printed Circuit, FPC), and the detection circuit 101 can be integrated on the flexible printed circuit 71. Exemplarily, the driving chip can be bound to the flexible printed circuit 71, or directly bound to the display panel 70, and the embodiments of the present application are not limited to this.

[0102] In this way, by integrating the detection circuit 101 on the flexible circuit board 71, on the one hand, the detection circuit 101 will not occupy too much space of the display panel 70, which is conducive to making the display panel 70 thin and light; on the other hand, since the detection circuit 101 is integrated on the flexible circuit board 71, during the use of the display device where the display panel 70 is located, the voltage value of the target voltage signal of each partition can be dynamically adjusted, thereby reducing the power consumption of the display device during use.

[0103] Based on the same technical concept as the control system of the display panel provided in the above embodiment, accordingly, the present application also provides a control method of a display panel, which can be applied to the control system 10 of the display panel provided in the above embodiment.

[0104] like Figure 1 As shown, the display panel may include a display area AA, and the display area AA may include M partitions a. Each partition a may include at least one pixel circuit, and M is an integer greater than 1.

[0105] Figure 8 A schematic flow chart of a method for controlling a display panel provided in an embodiment of the present application.

[0106] like Figure 8 As shown, the control method of the display panel provided in the embodiment of the present application may include the following steps:

[0107] S801, obtaining working status parameters of M partitions, where the working status parameters are used to feedback the working status of the partitions;

[0108] S802, determining voltage regulation parameters of the M partitions according to the working state parameters of the M partitions;

[0109] S803, determining voltage values ​​of target voltage signals corresponding to the M partitions according to the voltage adjustment parameters of the M partitions;

[0110] S804 . Provide target voltage signals to pixel circuits in the M partitions according to voltage values ​​of the target voltage signals corresponding to the M partitions.

[0111] The specific implementation process of the above steps S801 to S804 has been described in detail in the control system 10 of the display panel, and will not be repeated here for the sake of brevity.

[0112] The control method of the display panel provided in the embodiment of the present application divides the display area of ​​the display panel into M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; obtains working state parameters of the M partitions, and determines voltage adjustment parameters of the M partitions according to the working state parameters of the M partitions; determines voltage values ​​of target voltage signals corresponding to each of the M partitions according to the voltage adjustment parameters of the M partitions, and provides target voltage signals to pixel circuits in the M partitions according to the voltage values ​​of the target voltage signals corresponding to each of the M partitions, thereby realizing dynamic adjustment of the voltage values ​​of the target voltage signals of each partition, thereby achieving the effect of reducing the power consumption of the display panel.

[0113] Fig. 9 Another flow chart of the control method of the display panel provided in the embodiment of the present application. Fig. 9As shown, according to some embodiments of the present application, optionally, before S803, determining the voltage values ​​of the target voltage signals corresponding to the M partitions according to the voltage adjustment parameters of the M partitions, the control method of the display panel may further include the following steps:

[0114] S901. Generate a voltage regulation parameter matrix according to voltage regulation parameters of M partitions.

[0115] Accordingly, S803, determining the voltage values ​​of the target voltage signals corresponding to the M partitions according to the voltage adjustment parameters of the M partitions, may specifically include the following steps:

[0116] A voltage value matrix is ​​obtained according to the voltage adjustment parameter matrix, and the voltage value matrix includes voltage values ​​of target voltage signals corresponding to each of the M partitions.

[0117] Accordingly, S804, providing target voltage signals to pixel circuits in the M partitions according to the voltage values ​​of the target voltage signals corresponding to the M partitions, may specifically include the following steps:

[0118] According to the voltage value matrix, target voltage signals are provided to the pixel circuits in the M partitions.

[0119] In this way, by generating the voltage adjustment parameter matrix K and the voltage value matrix V, data calculation and transmission can be facilitated, and the calculation time and transmission time can be effectively shortened.

[0120] Fig.10 for Figure 8 A flow chart of S803 in the method for controlling a display panel. Fig.10 As shown, according to some embodiments of the present application, optionally, S803, determining the voltage adjustment parameters of the M partitions according to the working state parameters of the M partitions, may include the following steps:

[0121] S1001, determining a target display mode of the display panel according to working status parameters of the M partitions;

[0122] S1002 : Determine voltage adjustment parameters of M partitions according to voltage adjustment parameters of a plurality of partitions that are preset corresponding to a target display mode.

[0123] In this way, different display modes are pre-set, and different display modes can pre-set the voltage adjustment parameters k corresponding to each partition. In the subsequent use process, as long as it is determined which display mode the display panel is currently in, the voltage adjustment parameters k corresponding to each partition in the display mode can be directly determined. On the one hand, the amount of data calculation is greatly reduced, the time for determining the voltage adjustment parameters k of each partition is shortened, and the data processing efficiency is improved. On the other hand, setting different display modes meets the display requirements of the display panel in different scenarios.

[0124] According to some other embodiments of the present application, optionally, S803, determining the voltage adjustment parameters of the M partitions according to the working state parameters of the M partitions, may include the following steps:

[0125] For any i-th partition among the M partitions, the voltage regulation parameter of the i-th partition is determined according to the pre-established correspondence between the working state parameter and the voltage regulation parameter and the working state parameter of the i-th partition, where i is a positive integer.

[0126] In this way, by pre-establishing the corresponding relationship between the working state parameters and the voltage regulation parameters and storing them in the detection circuit 101, the driver chip 102 or other storage modules, after obtaining the working state parameters of each partition, the voltage regulation parameter k of each partition can be found out according to the corresponding relationship between the working state parameters and the voltage regulation parameters, which greatly reduces the amount of data calculation, shortens the time for determining the voltage regulation parameter k of each partition, and improves the data processing efficiency.

[0127] According to some embodiments of the present application, M may include M1 or M2. The display panel includes at least a first display mode and a second display mode. In the first display mode, the display area is divided into M1 partitions, and in the second display mode, the display area is divided into M2 partitions, and M1 and M2 are both integers greater than 1.

[0128] S803, determining the voltage adjustment parameters of the M partitions according to the working state parameters of the M partitions, may include the following steps:

[0129] Step 1: determining the target display mode of the display panel according to the working state parameters of the M partitions;

[0130] Step 2: when the target display mode is the first display mode, determining the voltage adjustment parameters of the M1 partitions according to the pre-set voltage adjustment parameters of the M1 partitions corresponding to the first display mode;

[0131] Step three: when the target display mode is the second display mode, the voltage adjustment parameters of the M2 partitions are determined according to the pre-set voltage adjustment parameters of the M2 partitions corresponding to the second display mode.

[0132] According to some embodiments of the present application, optionally, the display area may include multiple touch channels, and one partition may include one touch channel. The working state parameters of the M partitions may include touch data of the touch channels in the M partitions.

[0133] Fig.11 for Figure 8 A flow chart of S803 in the method for controlling a display panel. Fig.11 As shown, according to some embodiments of the present application, optionally, S803, determining the voltage adjustment parameters of the M partitions according to the working state parameters of the M partitions, may include the following steps:

[0134] S1101, determining the touch states of the touch channels in the M partitions according to the touch data of the touch channels in the M partitions, where the touch states are used to indicate whether the touch channels are touched or not touched;

[0135] S1102, determining voltage adjustment parameters of the M partitions according to the touch states of the touch channels in the M partitions;

[0136] The voltage adjustment parameter corresponding to when the touch state is that the touch channel is touched is different from the voltage adjustment parameter corresponding to when the touch state is that the touch channel is not touched.

[0137] In this way, by reusing the areas where the touch channels TP are located as partitions, and using the touch data of the touch channels TP in each partition to determine the voltage adjustment parameters corresponding to each partition a, not only can the voltage value of the target voltage signal of each partition be dynamically adjusted, but it is also equivalent to using the original touch routing to collect the working status parameters of each partition, which can reduce the routing of the detection circuit 101 in the display area, which is beneficial to saving wiring space and reducing the production cost of the display panel.

[0138] It should be noted that the specific implementation process of each of the above steps has been described in detail in the control system 10 of the display panel, and for the sake of brevity, it will not be repeated here. The control method of the display panel can achieve the same or corresponding technical effect as the control system 10 of the display panel, and for the sake of brevity, it will not be repeated here.

[0139] Based on the control system 10 of the display panel provided in the above embodiment, the embodiment of the present application further provides a display device, and the display device may include the control system 10 of the display panel provided in the above embodiment.

[0140] Exemplarily, the display device includes, but is not limited to, an organic light-emitting diode (OLED) display device.

[0141] Based on the control method of the display panel provided in the above embodiment, the present application also provides a specific implementation method of the electronic device accordingly. Please refer to the following embodiment.

[0142] Fig.12 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application is shown.

[0143] The electronic device may include a processor 1201 and a memory 1202 storing computer program instructions.

[0144] Specifically, the processor 1201 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0145] The memory 1202 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 1202 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In one example, the memory 1202 may include a removable or non-removable (or fixed) medium, or the memory 1202 is a non-volatile solid-state memory. The memory 1202 may be inside or outside the integrated gateway disaster recovery device.

[0146] In one example, the memory 1202 may be a read-only memory (ROM). In one example, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically rewritable ROM (EAROM), or a flash memory, or a combination of two or more of these.

[0147] The memory 1202 may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk storage medium device, an optical storage medium device, a flash memory device, an electrical, optical or other physical / tangible memory storage device. Thus, typically, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., a memory device) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to an aspect of the present application.

[0148] The processor 1201 implements the method / steps in the above method embodiment by reading and executing the computer program instructions stored in the memory 1202, and achieves the corresponding technical effects achieved by the above method embodiment executing its method / steps, which will not be repeated here for the sake of brevity.

[0149] In one example, the electronic device may further include a communication interface 1203 and a bus 1210. Fig.12 As shown, the processor 1201, the memory 1202, and the communication interface 1203 are connected via a bus 1210 and communicate with each other.

[0150] The communication interface 1203 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiments of the present application.

[0151] Bus 1210 includes hardware, software or both, and the parts of electronic equipment are coupled to each other. For example, but not limitation, bus may include accelerated graphics port (Accelerated Graphics Port, AGP) or other graphics bus, enhanced industry standard architecture (Extended Industry Standard Architecture, EISA) bus, front side bus (Front Side Bus, FSB), Hyper Transport (Hyper Transport, HT) interconnection, industry standard architecture (Industry Standard Architecture, ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 1210 may include one or more buses. Although the present application embodiment describes and shows a specific bus, the application considers any suitable bus or interconnection.

[0152] In addition, in combination with the control method of the display panel in the above embodiment, the embodiment of the present application may provide a computer-readable storage medium for implementation. The computer-readable storage medium stores computer program instructions; when the computer program instructions are executed by the processor, any one of the control methods of the display panel in the above embodiment is implemented. Examples of computer-readable storage media include non-transitory computer-readable storage media, such as electronic circuits, semiconductor memory devices, ROM, random access memory, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, and hard disks.

[0153] It should be clear that the present application is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present application is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present application.

[0154] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), appropriate firmware, plug-in, function card, etc. When implemented in software, the elements of the present application are programs or code segments used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or communication link by a data signal carried in a carrier. "Machine-readable medium" may include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (Radio Frequency, RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0155] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0156] The above reference is according to the method of the embodiment of the present application, the flow chart of the device (system) and the computer program product and / or the block diagram described various aspects of the present application.It should be understood that each square box in the flow chart and / or the block diagram and the combination of each square box in the flow chart and / or the block diagram can be realized by computer program instructions.These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the realization of the function / action specified in one or more square boxes of the flow chart and / or the block diagram.Such a processor can be but is not limited to a general-purpose processor, a special-purpose processor, a special application processor or a field programmable logic circuit.It can also be understood that each square box in the block diagram and / or the flow chart and the combination of the square boxes in the block diagram and / or the flow chart can also be realized by the dedicated hardware that performs the specified function or action, or can be realized by the combination of dedicated hardware and computer instructions.

[0157] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.

Claims

1. A control system for a display panel, characterized in that: The display panel includes a display area, the display area includes M partitions, each of the partitions includes at least one pixel circuit, and M is an integer greater than 1; The control system comprises: A detection circuit, the detection circuit is used to obtain working state parameters of the M partitions, the working state parameters are used to feedback the working state of the partitions, and determine the voltage regulation parameters of the M partitions according to the working state parameters of the M partitions; a driving chip, electrically connected to the detection circuit, for determining voltage values ​​of target voltage signals corresponding to the M partitions according to the voltage adjustment parameters of the M partitions, and providing the target voltage signals to the pixel circuits in the M partitions according to the voltage values ​​of the target voltage signals corresponding to the M partitions; The detection circuit is also used to generate a voltage regulation parameter matrix according to the voltage regulation parameters of the M partitions; The driving chip is specifically used to obtain a voltage value matrix according to the voltage adjustment parameter matrix, wherein the voltage value matrix includes voltage values ​​of target voltage signals corresponding to each of the M partitions; and provide the target voltage signal to the pixel circuits in the M partitions according to the voltage value matrix; The detection circuit is specifically used for: For any i-th partition among the M partitions, the voltage regulation parameter of the i-th partition is determined according to the pre-established correspondence between the working state parameter and the voltage regulation parameter and the working state parameter of the i-th partition, where i is a positive integer.

2. The control system according to claim 1, characterized in that: The display panel includes multiple display modes, and each display mode is correspondingly provided with multiple voltage adjustment parameters of the partitions; The detection circuit is specifically used for: Determining a target display mode of the display panel according to the working state parameters of the M partitions, wherein the target display mode is one of the multiple display modes; The voltage adjustment parameters of the M partitions are determined according to the voltage adjustment parameters of the plurality of partitions that are preset corresponding to the target display mode.

3. The control system according to claim 1, characterized in that: The M includes M1 or M2, the display panel includes at least a first display mode and a second display mode, the display area is divided into M1 partitions in the first display mode, and the display area is divided into M2 partitions in the second display mode, and both M1 and M2 are integers greater than 1; The detection circuit is specifically used for: Determining a target display mode of the display panel according to the working state parameters of the M partitions; When the target display mode is the first display mode, determining the voltage adjustment parameters of the M1 partitions according to the pre-set voltage adjustment parameters of the M1 partitions corresponding to the first display mode; When the target display mode is the second display mode, the voltage adjustment parameters of the M2 partitions are determined according to the preset voltage adjustment parameters of the M2 partitions corresponding to the second display mode.

4. The control system according to claim 1, characterized in that: The display area includes a plurality of touch channels, and one of the partitions includes one of the touch channels; The driving chip is specifically used to receive the touch sensing signals sent by the touch channels in the M partitions, and process the touch sensing signals to obtain the touch data of the touch channels in the M partitions; The detection circuit is specifically used to determine the touch state of the touch channels in the M partitions according to the touch data of the touch channels in the M partitions, wherein the touch state is used to indicate whether the touch channels are touched or not touched; and determine the voltage adjustment parameters of the M partitions according to the touch state of the touch channels in the M partitions; The voltage adjustment parameter corresponding to when the touch state is that the touch channel is touched is different from the voltage adjustment parameter corresponding to when the touch state is that the touch channel is not touched.

5. The control system according to claim 1, characterized in that: The pixel circuit is electrically connected to a scanning signal line, and the scanning signal line is used to provide a scanning signal to control the switching unit in the pixel circuit to be turned on or off; The pixel circuit is electrically connected to a data signal line, the data signal line is used to provide a data signal, and the data signal is used to control the magnitude of the driving current provided by the pixel circuit; The detection circuit is electrically connected to the pixel circuit in each of the partitions, and the working state parameter includes the current value of the driving current; or, The detection circuit is electrically connected to the scanning signal line corresponding to the pixel circuit in each of the partitions, and the working state parameter includes the refresh rate of the partition; or, The detection circuit is electrically connected to the data signal line corresponding to the pixel circuit in each of the partitions, and the working state parameter includes a voltage value of the data signal.

6. The control system according to claim 1, characterized in that: The detection circuit is used for: For any i-th partition among the M partitions, obtaining a working state parameter of a pixel circuit in the i-th partition to obtain a working state parameter of the i-th partition, where i is a positive integer; or, The working state parameters of the plurality of pixel circuits in the i-th partition are obtained, and the average value of the working state parameters of the plurality of pixel circuits in the i-th partition is calculated to obtain the working state parameters of the i-th partition.

7. The control system according to claim 1, characterized in that: The pixel circuit is electrically connected to a first electrode of the light emitting element, the pixel circuit is electrically connected to a first power supply voltage signal line, the second electrode of the light emitting element is electrically connected to a second power supply voltage signal line, the first power supply voltage signal line is used to transmit a first power supply voltage signal, and the second power supply voltage signal line is used to transmit a second power supply voltage signal; The pixel circuit comprises: a first reset module, a control end of the first reset module is electrically connected to a first scan signal line, a first end of the first reset module is electrically connected to a first reference voltage signal line, a second end of the first reset module is electrically connected to a first electrode of the light emitting element, the first reset module is configured to be turned on in response to a turn-on level provided by the first scan signal line, and transmit a first reference voltage signal provided by the first reference voltage signal line to the first electrode of the light emitting element, so as to reset the first electrode of the light emitting element; The target voltage signal includes at least one of a first reference voltage signal, a first power supply voltage signal, and a second power supply voltage signal.

8. The control system according to claim 1, characterized in that: The display panel is electrically connected to a flexible circuit board, and the detection circuit is integrated on the flexible circuit board.

9. A method for controlling a display panel, characterized in that: The display panel includes a display area, the display area includes M partitions, each of the partitions includes at least one pixel circuit, and M is an integer greater than 1; The control method comprises: Acquire working status parameters of the M partitions, where the working status parameters are used to feedback the working status of the partitions; Determining voltage regulation parameters of the M partitions according to the working state parameters of the M partitions; Determining voltage values ​​of target voltage signals corresponding to the M partitions respectively according to the voltage adjustment parameters of the M partitions; providing the target voltage signals to the pixel circuits in the M partitions according to the voltage values ​​of the target voltage signals corresponding to the M partitions; Before determining the voltage values ​​of the target voltage signals corresponding to the M partitions respectively according to the voltage adjustment parameters of the M partitions, the control method further includes: Generate a voltage regulation parameter matrix according to the voltage regulation parameters of the M partitions; The step of determining voltage values ​​of target voltage signals corresponding to the M partitions according to the voltage adjustment parameters of the M partitions includes: According to the voltage adjustment parameter matrix, a voltage value matrix is ​​obtained, wherein the voltage value matrix includes voltage values ​​of target voltage signals corresponding to each of the M partitions; The providing the target voltage signal to the pixel circuits in the M partitions according to the voltage values ​​of the target voltage signals corresponding to the M partitions respectively includes: providing the target voltage signal to the pixel circuits in the M partitions according to the voltage value matrix; Determining the voltage regulation parameters of the M partitions according to the working state parameters of the M partitions includes: For any i-th partition among the M partitions, determining the voltage regulation parameter of the i-th partition according to the pre-established correspondence between the working state parameter and the voltage regulation parameter and the working state parameter of the i-th partition, where i is a positive integer; or, Determining a target display mode of the display panel according to the working state parameters of the M partitions; The voltage adjustment parameters of the M partitions are determined according to the voltage adjustment parameters of the plurality of partitions that are preset corresponding to the target display mode.

10. The control method according to claim 9, characterized in that: The M includes M1 or M2, the display panel includes at least a first display mode and a second display mode, the display area is divided into M1 partitions in the first display mode, and the display area is divided into M2 partitions in the second display mode, and both M1 and M2 are integers greater than 1; Determining the voltage regulation parameters of the M partitions according to the working state parameters of the M partitions includes: Determining a target display mode of the display panel according to the working state parameters of the M partitions; When the target display mode is the first display mode, determining the voltage adjustment parameters of the M1 partitions according to the pre-set voltage adjustment parameters of the M1 partitions corresponding to the first display mode; When the target display mode is the second display mode, the voltage adjustment parameters of the M2 partitions are determined according to the preset voltage adjustment parameters of the M2 partitions corresponding to the second display mode.

11. The control method according to claim 9, characterized in that: The display area includes a plurality of touch channels, and one of the partitions includes one of the touch channels; The working state parameters of the M partitions include touch data of the touch channels in the M partitions; Determining the voltage regulation parameters of the M partitions according to the working state parameters of the M partitions includes: Determine, according to the touch data of the touch channels in the M partitions, a touch state of the touch channels in the M partitions, wherein the touch state is used to indicate whether the touch channels are touched or not touched; Determining voltage adjustment parameters of the M partitions according to the touch states of the touch channels in the M partitions; The voltage adjustment parameter corresponding to when the touch state is that the touch channel is touched is different from the voltage adjustment parameter corresponding to when the touch state is that the touch channel is not touched.

12. A display device, characterized in that: A control system comprising a display panel as claimed in any one of claims 1 to 8.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method for controlling a display panel according to any one of claims 9 to 11 are implemented.

Citation Information

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