Power amplifier circuit

By introducing transistor 103 and control circuit system into the power amplifier circuit, precise control of bias current is achieved, solving the problem of reduced controllability caused by low output power region and power supply voltage and temperature changes, and ensuring the stability and accuracy of output power.

CN115603678BActive Publication Date: 2026-02-24MURATA MFG CO LTD
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Patent Information

Application Number
CN202210714732.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2021-06-28
Filing Date
2022-06-22
Publication Date
2026-02-24
Estimated Expiration
2042-06-22

AI Technical Summary

Technical Problem

Existing power amplifier circuits exhibit reduced controllability in the low output power region and struggle to effectively control output power when power supply voltage and temperature change.

Method used

The bias control signal is output by transistor 103. Through the combination of control circuit 104, control voltage generation circuit 105, reference voltage generation circuit 106 and control current generation circuit 107, the bias current is precisely controlled and the change of current I1 is suppressed.

Benefits of technology

It improves the controllability of the power amplifier circuit in the low output power region, adapts to changes in power supply voltage and temperature, and ensures that the output power remains stable within the target range.

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Abstract

The present application provides a power amplifier circuit capable of improving the controllability of output power. The power amplifier circuit (10) has a transistor (101) that amplifies an input signal (RFin) and outputs a current (I1) with a base supplied with a bias current (IB1), a transistor (102) that has a base connected to the base of the transistor (101) and a collector supplied with a current (I2) corresponding to the current (I1), and a transistor (103) that outputs a bias control signal that controls the supply of the bias current (IB1). The power amplifier circuit (10) further includes a control circuit (104) that is connected to the collector of the transistor (102) and the gate of the transistor (103) and controls the bias control signal based on a reference current (I3) based on a reference signal (Vramp) and the current (I2).
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Description

Technical Field

[0001] This invention relates to power amplifier circuits. Background Technology

[0002] Regarding methods for controlling the output power of a power amplifier circuit, there are methods that fix the gain of the power amplifier circuit while controlling the input power, and methods that fix the input power while controlling the gain of the power amplifier circuit. For example, in the GSM (Global System for Mobile Communications) communication method, the input power is fixed while the gain of the power amplifier circuit is controlled, thereby controlling the output power.

[0003] Patent Document 1 illustrates a power amplifier module in which the input power is fixed while the gain of the power amplifier circuit is controlled, thereby controlling the output power. In the power amplifier module described in Patent Document 1, the gain of the power amplifier circuit is controlled by controlling the power supply voltage of the amplifier and the current input to the bias circuit.

[0004] Prior art literature

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2015-95708

[0007] In a power amplifier module as described in Patent Document 1, a variable voltage circuit is used to supply power to the amplifier. The variable voltage circuit supplies a variable power supply voltage to the amplifier based on the power supply voltage supplied to itself. If a voltage drop occurs in the variable voltage circuit, the variable power supply voltage decreases. Consequently, the amplifier's output power sometimes decreases.

[0008] When controlling the gain of a power amplifier circuit solely by controlling the current input to the bias circuit without using a variable voltage circuit, the controllability of the power amplifier circuit sometimes decreases in the low output power region. Even in the low output power region, the amplifier's bias current, based on the current input to the bias circuit, may sometimes be higher than a given value in order to obtain a given gain. In this case, even if the amplifier is intended to be turned off by the bias current, it may still be turned on. Therefore, the controllability of the power amplifier circuit sometimes decreases. Summary of the Invention

[0009] The problem the invention aims to solve

[0010] The present invention was made in view of the following circumstances, and its object is to provide a power amplifier circuit that can improve the controllability of output power.

[0011] Technical solutions for solving the problem

[0012] One aspect of the present invention relates to a power amplifier circuit comprising: a first transistor having a bias current supplied to its base or gate, amplifying an input signal and outputting a first current; a second transistor having its base or gate connected to the base or gate of the first transistor, having a second current corresponding to the first current supplied to its collector or drain; and a third transistor outputting a bias control signal for controlling the supply of the bias current. The power amplifier circuit further comprises: a control circuit connected to the collector or drain of the second transistor and the base or gate of the third transistor, and controlling the bias control signal according to a reference current based on a reference signal and the second current.

[0013] Invention Effects

[0014] According to the present invention, a power amplifier circuit that can improve the controllability of output power can be provided. Attached Figure Description

[0015] Figure 1 This is a schematic circuit diagram of the power amplifier circuit according to the first embodiment.

[0016] Figure 2 This is a circuit diagram of the power amplifier circuit according to the first embodiment.

[0017] Figure 3 This is a graph illustrating the operation of the power amplifier circuit according to the first embodiment.

[0018] Figure 4 This is a graph illustrating the operation of the power amplifier circuit according to the first embodiment.

[0019] Figure 5 This is a graph illustrating the operation of the power amplifier circuit according to the first embodiment.

[0020] Figure 6 This is another circuit diagram of the reference voltage generation circuit involved in the first embodiment.

[0021] Figure 7 This is a schematic circuit diagram of the power amplifier circuit according to the second embodiment.

[0022] Figure 8 This is a schematic circuit diagram of the power amplifier circuit according to the third embodiment.

[0023] Figure 9This is a schematic circuit diagram of the power amplifier circuit according to the fourth embodiment.

[0024] Explanation of reference numerals in the attached figures

[0025] 10, 10A, 10B, 10C: Power amplifier circuit; 101, 102, 103: Transistor; 104: Control circuit; 105: Control voltage generation circuit; 106, 106A: Reference voltage generation circuit; 107: Control current generation circuit; 800: Bias supply circuit; 801: Switch. Detailed Implementation

[0026] The first embodiment will be described. Figure 1 A schematic circuit diagram of the power amplifier circuit according to the first embodiment is shown. The power amplifier circuit 10 includes transistors 101, 102, and 103, a control circuit 104, a control voltage generation circuit 105, a reference voltage generation circuit 106, and a control current generation circuit 107.

[0027] The base of transistor 101 (transistor 1) is connected to the input, the collector to the output, and the emitter to ground. The base receives the input signal RFI and the bias current IB1. Transistor 101 amplifies the input signal RFI and outputs the output signal RFout from its collector. A current I1 (the first current) flows through the collector of transistor 101.

[0028] The base of transistor 102 (the second transistor) is connected to the base of transistor 101, its collector is connected to control circuit 104, and its emitter is connected to ground. A current I2 (the second current), based on the input signal RFI and the bias current IB1, flows through the collector of transistor 102. Due to the difference in characteristics between transistors 101 and 102, current I2 may, for example, be 1 / n times the current I1. Current I2 thus serves as a current simulating current I1.

[0029] Transistors 101 and 102 are, for example, bipolar transistors such as heterojunction bipolar transistors (HBTs). Alternatively, transistors 101 and 102 can be constructed from field-effect transistors such as MOSFETs (Metal-oxide-semiconductor Field-Effect Transistors) instead of HBTs. In this case, simply replace the collector, base, and emitter described below with drain, gate, and source, respectively.

[0030] The gate of transistor 103 (the third transistor) is connected to control circuit 104 and control voltage generation circuit 105, its source is connected to the power supply, and its drain is connected to resistors 1031 and 1032. Transistor 103 is, for example, a P-channel MOSFET. The drain of transistor 103 is connected to ground through resistor 1031. Furthermore, the drain of transistor 103 is connected to the base of transistors 101 and 102 through resistor 1032.

[0031] Transistor 103 outputs a bias current IB1 from its drain based on the bias voltage VB1 input to its gate. Here, the bias control signal may include the bias current IB1. The bias current IB1 is illustrated in the accompanying drawings of this embodiment. Furthermore, in various embodiments, the so-called bias control signal may include the bias current itself and a signal used to control the bias current.

[0032] Transistor 103 can be constructed, for example, from a field-effect transistor such as a MOSFET. Alternatively, transistor 103 can also be constructed from an HBT. In this case, simply rewrite the drain, gate, and source as collector, base, and emitter, respectively.

[0033] Control circuit 104 is connected to transistors 102 and 103, and control voltage generation circuit 105. Control circuit 104 is supplied with a reference signal Vramp to control the operation of power amplifier circuit 10. Based on the reference signal Vramp and current I2, control circuit 104 outputs voltage V1 to control voltage generation circuit 105 and transistor 103. Control circuit 104 is a circuit that controls the voltage V1 to decrease and the bias current IB1 to decrease if current I2 increases. Here, decreasing voltage V1 means changing voltage V1 such that the absolute value of the gate voltage of transistor 103 decreases. If transistor 103 is a P-channel MOSFET, the gate voltage value increases; if transistor 103 is an N-channel MOSFET, the gate voltage value decreases.

[0034] The control voltage generation circuit 105 is connected to the control circuit 104, the reference voltage generation circuit 106, and the transistor 103. The control voltage generation circuit 105 generates a control voltage V2 based on a voltage V1 (first reference voltage) from the control circuit 104 and a reference voltage V3 (second reference voltage) from the reference voltage generation circuit 106. The control voltage generation circuit 105 supplies the control voltage V2 to the transistor 103.

[0035] The reference voltage generation circuit 106 is connected to the control voltage generation circuit 105 and the control current generation circuit 107. The reference voltage generation circuit 106 generates a reference voltage V3 and supplies it to the control voltage generation circuit 105. The reference voltage generation circuit 106 generates the reference voltage V3 based on the control current IC1 from the control current generation circuit 107.

[0036] When the current amplification rate of transistor 101 changes due to variations in the external environment of power amplifier circuit 10, such as temperature changes, the reference voltage generation circuit 106 generates a reference voltage V3 corresponding to that change. For example, if the current amplification rate increases, the reference voltage V3 decreases. More specifically, the reference voltage V3 changes inversely proportional to the current amplification rate of transistor 101.

[0037] The control current generating circuit 107 is connected to the power supply of the reference voltage generating circuit 106 and the power amplifier circuit 10. The control current generating circuit 107 extracts a control current IC1 from the reference voltage generating circuit 106 that corresponds to changes in the power supply voltage supplied to the power amplifier circuit 10. For example, when the power supply voltage changes by increasing, the control current IC1 increases.

[0038] The operation of the power amplifier circuit 10 will be explained.

[0039] In the power amplifier circuit 10, a current I1 flows through the collector of transistor 101, corresponding to the input signal RFI and the bias current IB1. A current I2 flows through the collector of transistor 102, corresponding to current I1.

[0040] For example, if current I1 increases, then current I2 increases. If current I2 increases, then control circuit 104 decreases voltage V1. If voltage V1 decreases, then the bias voltage VB1 applied to the gate of transistor 103 decreases. If bias voltage VB1 decreases, then bias current IB1 decreases. Because bias current IB1 decreases, current I1 decreases. Thus, the increase in current I1 can be suppressed.

[0041] Therefore, when transistor 101 is turned on according to the magnitude of bias current IB1, the bias current IB1 decreases based on the current I1 flowing through transistor 101. Thus, in the low output power region where the output power of the output signal RFout is low, it is possible to suppress transistor 101 from turning on according to the magnitude of bias current IB1.

[0042] Furthermore, the power amplifier circuit 10 includes a control voltage generation circuit 105. The control voltage generation circuit 105 operates to control the gate voltage of the transistor 103 according to a reference voltage V3. The control voltage generation circuit 105 is supplied with a reference voltage V3 corresponding to the current amplification rate of the transistor 101 by, for example, the reference voltage generation circuit 106.

[0043] For example, if the current amplification rate of transistor 101 increases due to heat generation or other reasons, the output power of transistor 101 will increase compared to the target control value. The case where the output power of power amplifier circuit 10 is controlled by control voltage generation circuit 105 and reference voltage generation circuit 106 in this situation will be explained.

[0044] If the current amplification of transistor 101 increases, the reference voltage generation circuit 106 reduces the reference voltage V3. The control voltage generation circuit 105 generates a control voltage V2 based on voltage V1 and reference voltage V3. If the reference voltage V3 decreases, the control voltage generation circuit 105 reduces the control voltage V2. Reducing the control voltage V2 means changing the control voltage V2, causing a decrease in the absolute value of the gate voltage of transistor 103.

[0045] If the control voltage V2 decreases, the bias voltage VB1 applied to the gate of transistor 103 decreases. If the bias voltage VB1 decreases, the bias current IB1 decreases. Because the bias current IB1 decreases, the current I1 decreases. Therefore, the increase in current I1 can be suppressed. Thus, even if the current amplification of transistor 101 increases, by suppressing the increase in current I1, the output power of the power amplifier circuit 10 is appropriately controlled so that it does not increase excessively.

[0046] Furthermore, the power amplifier circuit 10 includes a control current generation circuit 107. The control current generation circuit 107 performs control corresponding to changes in the power supply voltage V supplied to the power amplifier circuit 10. For example, if the power supply voltage V increases, the bias current IB1 output by the transistor 103 increases. Therefore, the increase in the power supply voltage V causes an increase in the output power of the transistor 101. Because this control is not based on the reference signal Vramp, appropriate compensation is required.

[0047] Regarding the control current generating circuit 107, it is also supplied with a power supply voltage V (not shown). When the power supply voltage V increases, the control current generating circuit 107 draws a control current IC1 from the reference voltage generating circuit 106. If the control current IC1 is drawn, the reference voltage generating circuit 106 reduces the reference voltage V3. If the reference voltage V3 decreases, the control voltage generating circuit 105 reduces the control voltage V2. Therefore, similarly to the above case, the result is that the current I1 decreases. Thus, the increase in the output power of the transistor 101 caused by the increase in the power supply voltage V is compensated, and the output power of the power amplifier circuit 10 can be appropriately controlled.

[0048] Reference Figure 2 The details of the power amplifier circuit 10 will be explained. Figure 2 The diagram specifically illustrates the circuits of each part of the control circuit 104, the control voltage generation circuit 105, the reference voltage generation circuit 106, and the control current generation circuit 107.

[0049] The control circuit 104 includes transistor 1041, resistors 1042 and 1043, transistors 10441 and 10442, V / I conversion circuit 1045, error amplifier 1046, resistors 10461, 10462 and 1047, and capacitor 1048.

[0050] Transistor 1041 is supplied with a power supply voltage at its source, and its gate and drain are connected in a diode configuration. The drain of transistor 1041 is connected to the drain of transistor 10441 via resistor 1042. Furthermore, the drain of transistor 1041 is connected to the collector of transistor 102 via resistor 1043. Transistor 1041 is a P-channel MOSFET.

[0051] Resistor elements 1042 and 1043 generate a given voltage drop corresponding to the output current from transistor 1041. Resistor element 1042 generates a voltage drop corresponding to the reference current I3, and resistor element 1043 generates a voltage drop corresponding to the current I2.

[0052] Transistors 10441 and 10442 are current mirror connected transistors. Transistors 10441 and 10442 are N-channel MOSFETs. Transistor 10442 is connected to the V / I conversion circuit 1045.

[0053] The V / I converter circuit 1045 receives a reference signal Vramp. The V / I converter circuit 1045 supplies a current corresponding to the reference signal Vramp to the transistor 10442. The current flowing through the transistor 10442 is mirrored by the transistor 10441 to become the reference current I3.

[0054] The inverting input terminal of the error amplifier 1046 is connected to resistor 1042 via resistor 10462. The non-inverting input terminal of the error amplifier 1046 is connected between resistor 1043 and the collector of transistor 102. Resistor 10461 is provided between the output terminal and the inverting input terminal of the error amplifier 1046. The output terminal of the error amplifier 1046 is connected to the gate of transistor 103 via resistor 1047.

[0055] For example, if the current I2 increases, the voltage drop caused by the resistive element 1043 increases, resulting in an increase in the differential voltage between the two input terminals of the error amplifier 1046. In this case, the error amplifier 1046 operates, causing the voltage at the output terminal to decrease. As a result, the voltage V1 supplied to the transistor 103 decreases.

[0056] The control voltage generation circuit 105 includes a differential amplifier 1051, a transistor 1052, a resistor element 1053, and a transistor 1054.

[0057] The inverting input terminal of differential amplifier 1051 is connected to the drain of transistor 1052, and the non-inverting input terminal is connected to the output terminal of differential amplifier 1068. The output terminal of differential amplifier 1051 is connected to the gate of transistor 1054. Transistors 1052 and 1054 are P-channel MOSFETs.

[0058] The gate of transistor 1052 is connected in parallel with the gate of transistor 103. The gate of transistor 1052 is supplied with voltage V1 from control circuit 104. Transistor 1052 outputs a current corresponding to voltage V1 from its drain. This current, along with resistor 1053, determines the voltage at the inverting input terminal of differential amplifier 1051. In other words, the inverting input terminal of differential amplifier 1051 is supplied with a voltage corresponding to voltage V1.

[0059] The source of transistor 1054 is connected to the power supply, and the drain is connected to the gate of transistor 103. Transistor 1054 supplies a control voltage V2 to the gate of transistor 103.

[0060] For example, when voltage V1 is a relatively fixed value and the voltage variation at the non-inverting input terminal is decreasing, the differential amplifier 1051 operates, causing the voltage at the output terminal to decrease. As a result, the voltage supplied to transistor 1054 decreases. If the gate voltage of transistor 1054 decreases, the control voltage V2 output by transistor 1054 decreases.

[0061] The reference voltage generation circuit 106 includes transistors 1061, 10621, and 10622, resistors 1063, 1064, 10651, and 10652, current source 1066, resistor 1067, differential amplifier 1068, resistors 10681 and 10682, and resistor 10691.

[0062] The base of transistor 1061 (the fourth transistor) is connected to the drain of transistor 1064, the collector is connected to the drain of transistor 10621, and the emitter is connected to ground.

[0063] Transistor 1061 is a device having the same temperature characteristics as transistor 101. When transistor 101 is a FET or similar device, the element of transistor 1061 can be appropriately replaced with a device having the same characteristics as transistor 101. A current I5 (fourth current) corresponding to the current I4 (third current) input to the base flows through the collector of transistor 1061.

[0064] Transistors 10621 and 10622 are current-mirror connected transistors. The drain of transistor 10622 is connected to ground via resistor 1063. Furthermore, the drain of transistor 10622 is connected to the inverting input terminal of differential amplifier 1068 via resistor 10682. Transistors 10621 and 10622 are P-channel MOSFETs. Through transistors 10621 and 10622, current I5 is mirrored and flows to resistor 1063. The voltage V4 (third reference voltage) at the inverting input terminal of differential amplifier 1068 is determined by current I5.

[0065] The gate of transistor 1064 is connected to current source 1066, and the drain is connected to the base of transistor 1061. Transistor 1064 supplies current 14 to transistor 1061 according to the current from current source 1066.

[0066] Transistors 10651 and 10652 are current-mirror connected transistors. The drain of transistor 10651 is connected to current source 1066. The drain of transistor 10652 is connected to ground via resistor 1067. Furthermore, the drain of transistor 10652 is connected to the non-inverting input terminal of differential amplifier 1068. Transistors 10651 and 10652 are P-channel MOSFETs. The current from current source 1066 is mirrored through transistors 10651 and 10652. Based on the mirrored current, current 16 flows through resistor 1067. The voltage at the non-inverting input terminal of differential amplifier 1068 is determined by the voltage drop across resistor 1067.

[0067] The differential amplifier 1068 outputs a voltage corresponding to the difference between the voltage at the non-inverting input terminal and the voltage at the inverting input terminal. The output terminal of the differential amplifier 1068 is connected to the non-inverting input terminal of the differential amplifier 1051, supplying a reference voltage V3 to the non-inverting input terminal of the differential amplifier 1051.

[0068] For example, if the current I5 increases, the voltage change at the inverting input terminal of the differential amplifier 1068 caused by the resistive element 1063 increases, resulting in an increase in the difference between the two input terminals of the differential amplifier 1068. In this case, the differential amplifier 1068 operates, causing the voltage at the output terminal to decrease, which in turn reduces the reference voltage V3.

[0069] The control current generation circuit 107 includes a differential amplifier 1071, resistors 1072 and 1073, a transistor 1074, a resistor 1075, a transistor 1076, and transistors 10771 and 10772.

[0070] The differential amplifier 1071 is supplied with a voltage divided by resistors 1072 and 1073 at its non-inverting input terminal. The voltage value at the non-inverting input terminal varies according to changes in the power supply voltage. The output terminal of the differential amplifier 1071 is connected to the gate of transistor 1074. The voltage generated by transistor 1074 is input to the inverting input terminal of the differential amplifier 1071.

[0071] The output terminal of differential amplifier 1071 is connected to the gate of transistor 1076. Transistor 1076 is connected to transistors 10771 and 10772, which are current mirrored. The drain of transistor 10772 is connected between the drain of transistor 10652 and resistor 1067. Transistor 1076 supplies a current corresponding to the output voltage of differential amplifier 1071 to transistor 10771. The current corresponding to the output voltage of differential amplifier 1071 is mirrored by transistors 10771 and 10772. The mirrored current flows to transistor 10772 as control current IC1.

[0072] The control current generation circuit 107 functions as a circuit to detect changes in the power supply voltage. If the power supply voltage increases, the control current IC1 increases. If the control current IC1 increases, the current I6 in the reference voltage generation circuit 106 decreases. Due to the decrease in current I6, the reference voltage V3 decreases.

[0073] Reference Figures 3 to 5 The improvement of the controllability of the output power in the power amplifier circuit 10 will be explained. Figure 3These are graphs showing the changes in output power Pout [dBm] and collector current Icc [A] of transistor 101 when the reference signal Vramp is varied in power amplifier circuit 10. Figure 3 The improvement of the controllability of the output power in the power amplifier circuit 10 when the current amplification rate of transistor 101 changes is explained.

[0074] exist Figure 3 In the diagram, output power P1 and collector current Iccl are shown as solid lines, and output power P2 and collector current Icc2 are shown as dotted lines. Output power P1 and collector current Iccl are values ​​where the current amplification of transistor 101 is 30% less than the reference value. Output power P2 and collector current Icc2 are values ​​where the current amplification of transistor 101 is 30% greater than the reference value.

[0075] In this case, both output power P1 and output power P2 smoothly increase within the voltage range Vr1 to approximately 35 dBm, which is the target. This is due to feedback control based on control circuit 104. Without control based on control circuit 104, the output power Pout would vary and become... Figure 3 When the values ​​are large, the output voltage will not increase smoothly. The same applies to the collector currents Iccl and Icc2.

[0076] Furthermore, it is shown that both output power P1 and output power P2 are stably maintained at a target value of around 35 dBm within the voltage range Vr2. This is because, in the high output region where the effect of differences in current amplification becomes greater, the difference in current amplification can be compensated by controlling the voltage generation circuit 105 and the reference voltage generation circuit 106. If control based on the voltage generation circuit 105 and the reference voltage generation circuit 106 is not performed, then in this case, Pout will vary and become... Figure 3 The larger the value, the better. The same applies to collector currents Icc1 and Icc2.

[0077] Figure 4 Is with Figure 3 The same graph. In Figure 4 In this paper, the improvement of the controllability of the output power in the power amplifier circuit 10 under the condition that the ambient temperature outside the transistor 101 changes, thereby changing the amplification characteristics of the transistor 101.

[0078] exist Figure 4In the diagram, output power P3 and collector current Icc3 are shown as solid lines, and output power P4 and collector current Icc4 are shown as dotted lines. Output power P3 and collector current Icc3 are values ​​obtained when the ambient temperature of transistor 101 is 30°C lower than the reference value. Output power P4 and collector current Icc4 are values ​​obtained when the ambient temperature of transistor 101 is 85°C higher than the reference value.

[0079] In this case, also with Figure 3 Similarly, it is shown that both output power P3 and output power P4 smoothly increase to around 35 dBm within the voltage range Vr3. The same applies to collector currents Icc3 and Icc4.

[0080] In addition, with Figure 3 Similarly, it is shown that both output power P3 and output power P4 are stably maintained at values ​​around the target 35 dBm within the voltage range Vr4. This is because, in the high-output region where the effects of ambient temperature differences become greater, these differences can be compensated for by controlling the voltage generation circuit 105 and the reference voltage generation circuit 106. The same applies to the collector currents Icc3 and Icc4.

[0081] Figure 5 Is with Figure 3 The same graph. In Figure 5 The improvement of the controllability of the output power of the power amplifier circuit 10 under the condition of a change in the power supply voltage supplied to the power amplifier circuit 10 will be explained.

[0082] exist Figure 5 In the diagram, output power P5 and collector current Icc5 are shown as solid lines, and output power P6 and collector current Icc6 are shown as dotted lines. Output power P5 and collector current Icc5 are values ​​when the power supply voltage of power amplifier circuit 10 is 3.5V. Output power P6 and collector current Icc6 are values ​​when the power supply voltage of power amplifier circuit 10 is 4.5V.

[0083] In this case, also with Figure 3 Similarly, it is shown that both output power P5 and output power P6 smoothly increase to around 35 dBm within the voltage range Vr5. The same applies to collector currents Icc5 and Icc6.

[0084] In addition, with Figure 3Similarly, it is shown that both output power P5 and output power P6 stably reach values ​​around the target of 35 dBm within the voltage range Vr6. This is because, in the high output region where the impact of power supply voltage differences becomes greater, in addition to the control voltage generation circuit 105 and the reference voltage generation circuit 106, the power supply voltage difference can also be compensated by the control current generation circuit 107, which generates a control current IC1 based on the power supply voltage. The same applies to the collector currents Icc5 and Icc6.

[0085] exist Figure 6 In the example shown is a reference voltage generation circuit 106A.

[0086] The reference voltage generation circuit 106A includes transistors 6011 and 6012, a transimpedance amplifier 602, a resistor element 603, and a voltage source 604. Transistor 10621 generates a current I4 that multiplies the current I5 supplied to the base of transistor 1061 by a given current amplification rate of transistor 1061. Current I4 is mirrored by transistor 10622. In the reference voltage generation circuit 106A, the differential current between the current I4 generated by transistors 1061 and 10621, 10622 and the current I7 mirrored by transistor 6011 is input to the inverting input terminal of the transimpedance amplifier 602.

[0087] When the current amplification rate of transistor 1061 increases, the current I4 increases. Consequently, the current flowing to transimpedance amplifier 602 increases. The voltage drop caused by resistor 603 increases. Transimpedance amplifier 602 operates, causing the voltage at the output terminal to decrease, thus making the voltage at the inverting input terminal the same as the voltage at the non-inverting input terminal. In other words, the reference voltage V3 decreases. The reference voltage generation circuit 106 can be replaced by the structure of reference voltage generation circuit 106A.

[0088] The second embodiment will be described. From the second embodiment onwards, descriptions of matters common to the first embodiment will be omitted, and only the differences will be described. In particular, the same effects based on the same structure will not be mentioned repeatedly in each embodiment.

[0089] exist Figure 7 A schematic circuit diagram of the power amplifier circuit 10A according to the second embodiment is shown. The power amplifier circuit 10A differs from the power amplifier circuit 10 in that a bias circuit 701 is provided between the transistor 103 and the resistor element 1032.

[0090] In power amplifier circuit 10A, transistor 103 outputs a bias control signal IC2 to bias circuit 701. Based on the bias control signal IC2, bias circuit 701 supplies bias current IB2 to transistors 101 and 102. Similar to power amplifier circuit 10, control circuit 104, control voltage generation circuit 105, reference voltage generation circuit 106, and control current generation circuit 107 can be used in power amplifier circuit 10A to improve the controllability of the output power.

[0091] The third embodiment will be described. Figure 8 A schematic circuit diagram of the power amplifier circuit 10B according to the third embodiment is shown. The power amplifier circuit 10B differs from the power amplifier circuit 10 in that it has a bias supply circuit 800 and a switch 801.

[0092] The input of switch 801 is connected to transistor 103 and transistor 8022 respectively, and the output is connected to resistor 1032.

[0093] The bias supply circuit 800 is a general bias circuit with transistors 8021 and 8022 and a current source 803, outputting a given bias current IB3. In the power amplifier circuit 10B, according to the control signal input to the switch 801, the bias current supplied to the transistor 101 is switched between bias current IB1 (first bias current) and bias current IB3 (second bias current). By being configured to supply a given bias current, the power amplifier circuit 10B can further control the output power using a method that fixes the gain of the transistor 101 and varies the power of the input signal RFin to the transistor 101.

[0094] The fourth embodiment will be described. Figure 9 A schematic circuit diagram of the power amplifier circuit 10C according to the fourth embodiment is shown. The power amplifier circuit 10C is a structure that further includes amplifiers 901 and 902, bias circuits 903 and 904, and switches 905, 906, and 907 in the power amplifier circuit 10A. Amplifiers 901 and 902 amplify the input signal in stages. Bias circuits 903 and 904 supply bias currents IB2 and IB3 to amplifiers 901 and 902, respectively.

[0095] Switches 905, 906, and 907 are controlled by external control signals and are in the ON state when the power amplifier circuit 10C operates. Transistor 103 is controlled according to the current I1 flowing through the collector of transistor 101. The bias control signal IC3 from transistor 103 is supplied not only to bias circuit 701 but also to bias circuits 903 and 904. Bias circuits 903 and 904 output bias currents IB2 and IB3 according to the bias control signal IC3. The power amplifier circuit 10C also improves the controllability of the output power.

[0096] The exemplary embodiments of the present invention have been described above. Furthermore, in each of the above embodiments, each circuit may, for example, be disposed on a single chip using a Bi-CMOS process. Alternatively, each circuit may be disposed on multiple chips depending on the transistors used.

[0097] The power amplifier circuit 10 includes: a transistor 101, which is supplied with a bias current IB1 at its base, amplifies the input signal RFin, and outputs a current I1; a transistor 102, whose base is connected to the base of transistor 101, and whose collector is supplied with a current I2 corresponding to the current I1; and a transistor 103, which outputs a bias control signal that controls the supply of the bias current IB1. The power amplifier circuit 10 also includes: a control circuit 104, which is connected to the collector of transistor 102 and the gate of transistor 103, and controls the bias control signal according to the reference current I3 and the current I2 based on the reference signal Vramp.

[0098] Therefore, the increase in the current I1 flowing through the collector of transistor 101 is detected by transistor 102 and control circuit 104. Control circuit 104 controls the bias control signal according to the change in current I1, thereby suppressing the change in current I1. Therefore, the controllability of the output power in power amplifier circuit 10 is improved.

[0099] Furthermore, the power amplifier circuit 10 also includes a control voltage generation circuit 105, which is connected to the gate of the transistor 103. The control voltage generation circuit 105 supplies a control voltage V2 to the gate of the transistor 103 based on a voltage V1 based on the bias current IB1 and a reference voltage V3 corresponding to the operation of the transistor 101. Thus, based on the operation of the transistor 101 and the change in the reference voltage V3, the control voltage V2 is supplied. The control voltage V2 is supplied to the gate of the transistor 103, thereby controlling the bias control signal. This suppresses fluctuations in the current I1. Therefore, the controllability of the output power in the power amplifier circuit 10 is improved.

[0100] In addition, the power amplifier circuit 10 also includes a reference voltage generation circuit 106, which is connected to the control voltage generation circuit 105 and has a transistor 1061. The transistor 1061 is supplied with a current I4 at its base and outputs a current I5 from its collector based on the current I4, which corresponds to the change in the current amplification rate of the transistor 101. The reference voltage generation circuit 106 generates a reference voltage V3 based on the voltage corresponding to the current I5 and supplies the reference voltage V3 to the control voltage generation circuit 105.

[0101] Transistor 1061 generates a current I5 corresponding to variations in its current amplification. Reference voltage generation circuit 106 generates a reference voltage V3 based on the current I5. The control voltage V2 is controlled according to the reference voltage V3, thereby suppressing variations in the current I1. Therefore, the controllability of the output power in power amplifier circuit 10 is improved.

[0102] In addition, the power amplifier circuit 10 also includes a control current generation circuit 107, which is connected to the reference voltage generation circuit 106. The control current generation circuit 107 generates a control current IC1 based on the change of the power supply voltage V and supplies the control current IC1 to the reference voltage generation circuit 106. The reference voltage generation circuit 106 generates a reference voltage V3 based on the voltage corresponding to the current I5 and the control current.

[0103] Therefore, the influence of power supply voltage V fluctuations can be considered in the generation of the reference voltage V3. By controlling the control voltage V2 based on the reference voltage V3, fluctuations in current I1 can be suppressed. Consequently, the controllability of the output power in the power amplifier circuit 10 is improved.

[0104] In addition, the power amplifier circuit 10B also includes: a bias supply circuit 800 that supplies bias current to transistors 101 and 102; and a switch 801 connected to transistor 103 and the bias supply circuit 800 to switch the connection between transistor 101 and transistor 103 or the bias supply circuit 800.

[0105] The power amplifier circuit 10B can selectively control the output power by changing the power of the input signal RFin to the transistor 101 and by changing the gain of the transistor 101 through switching of the switch 801.

[0106] Furthermore, the embodiments described above are intended to facilitate understanding of the present invention and are not intended to limit the scope of the invention. The present invention can be modified / improved without departing from its spirit, and the present invention also includes its equivalents. That is, embodiments to which those skilled in the art have appropriately applied design changes are also included within the scope of the present invention, provided they possess the features of the present invention. For example, the elements, their configurations, materials, conditions, shapes, and dimensions of each embodiment are not limited to the illustrated elements, their configurations, materials, conditions, shapes, and dimensions, and can be appropriately modified. Moreover, each embodiment is exemplified; it is self-evident that partial substitutions or combinations of the structures shown in different embodiments are possible, and these substitutions or combinations are also included within the scope of the present invention, provided they contain the features of the present invention.

Claims

1. A power amplifier circuit, comprising: The first transistor is supplied with bias current at its base or gate, amplifies the input signal and outputs the first current. The second transistor, whose base or gate is connected to the base or gate of the first transistor, is supplied with a second current corresponding to the first current at its collector or drain; and The third transistor outputs a bias control signal that controls the supply of the bias current. The power amplifier circuit also includes: A control circuit, connected to the collector or drain of the second transistor and the base or gate of the third transistor, controls the bias control signal according to a reference current based on a reference signal and the second current; and A control voltage generation circuit is connected to the base or gate of the third transistor and supplies a control voltage to the base or gate of the third transistor according to a first reference voltage based on the bias current and a second reference voltage corresponding to the current amplification of the first transistor.

2. The power amplifier circuit according to claim 1, wherein, It also includes: a reference voltage generation circuit connected to the control voltage generation circuit, and having a fourth transistor, the fourth transistor being supplied with a third current at its base or gate, and outputting a fourth current from its collector or drain based on the third current, corresponding to a variation in the current amplification of the first transistor; the reference voltage generation circuit generating the second reference voltage based on the third reference voltage corresponding to the fourth current, and supplying the second reference voltage to the control voltage generation circuit.

3. The power amplifier circuit according to claim 2, wherein, It also includes: a control current generation circuit connected to the reference voltage generation circuit, which generates a control current based on changes in the power supply voltage and supplies the control current to the reference voltage generation circuit. The reference voltage generation circuit generates the second reference voltage based on the third reference voltage and the control current.

4. The power amplifier circuit according to any one of claims 1 to 3, wherein, The bias current is the first bias current. The power amplifier circuit also includes: A bias supply circuit supplies a second bias current to the first transistor and the second transistor; as well as A switch, connected to the third transistor and the bias supply circuit, switches the connection between the first transistor and the third transistor or the bias supply circuit.

Citation Information

Patent Citations

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    JP2015095708A

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    US20030016083A1