A cable, interface configuration method, device and network system

Abstract

The present invention provides a cable, an interface configuration method, a device and a network system, which relate to the field of communication technology. An interface configuration method includes: if a presence signal is detected through the presence pin of the cable, an I 2 C bus protocol access request; if the access request for the preset number of times does not receive a response, then the chipless detection pin is detected; if the chipless detection pin is set to a preset level, the cable is determined to be a chipless cable; based on the type identification pin, the type information of the cable is determined, and the interface to which the cable is plugged is configured according to the type information. Through the above method, the deployment efficiency of network equipment can be improved.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a cable, an interface configuration method, a device, and a network system. Background Art

[0002] At present, network devices such as switches, routers, and servers are connected by plugging cables into external ports. Passive cables can be used. Passive cables have built-in IC (Integrated Circuit) chips such as MCU (Microcontroller Unit) and EEPROM (Electrically Erasable Programmable Read Only Memory) for cable information identification.

[0003] However, due to the complexity of the connection between network devices, a large number of cables are needed for connection, and these cables need to be equipped with IC chips for identification. These cables with chips need to be adapted and tested with each network device to ensure the reliability of the connection between the IC chip in the cable and the network device. This will prolong the network deployment cycle and reduce the efficiency of network deployment. Summary of the invention

[0004] To overcome the problems existing in the related art, this specification provides a cable, an interface configuration method, a device and a network system.

[0005] According to a first aspect of the embodiments of this specification, the present application provides a cable, including:

[0006] A connecting terminal, used for plugging into an optical module interface; and

[0007] Cables are used to connect the connection terminals on both sides of the cable for data transmission;

[0008] Connection terminals, including:

[0009] In-position pin, used by the network device to identify whether the cable is inserted into the optical module interface, and is pulled down to a low level;

[0010] No chip detection pin, used to identify whether the cable is a no chip cable;

[0011] Type identification pin, used to identify the type of cable.

[0012] Optionally, the cable is a small form-factor pluggable (SFP) cable;

[0013] The in-position pin is the Mod_ABS pin;

[0014] The chip-free detection pins are the TX_Fault pin and the TX_Disable pin.

[0015] Further, the type identification pin includes a rate selection pin;

[0016] The rate select pin is one of the RS0 pin, RS1 pin, and RX_LOS pin.

[0017] Optionally, the cable is a quad small form-factor pluggable QSFP cable;

[0018] The in-position pin is the ModPrsL pin;

[0019] The chip-free detection pin is the ResetL pin;

[0020] Type identification pins, including rate selection pins and breakout selection pins;

[0021] The rate selection pin is the LPMode pin;

[0022] The branch line selection pin is the ModSelL pin.

[0023] According to a second aspect of the embodiments of this specification, the present application provides an interface configuration method, including:

[0024] If a presence signal is detected through the presence pin of the cable, an access request of the interconnect integrated circuit I2C bus protocol is initiated to the cable;

[0025] If no response is received to the preset number of access requests, the chip-free detection pin is tested;

[0026] If the no-chip detection pin is placed at a preset level, the cable is determined to be a no-chip cable;

[0027] Based on the type identification pin, the type information of the cable is determined, and the interface to which the cable is plugged is configured according to the type information.

[0028] Optionally, the cable is an SFP cable;

[0029] The in-position pin is the Mod_ABS pin, and the in-position signal is a low-level signal;

[0030] The chip-absent detection pins are a TX_Fault pin and a TX_Disable pin. The preset level of the TX_Fault pin is a high level, and the preset level of the TX_Disable pin is a high level.

[0031] Further, the type identification pin includes a rate selection pin;

[0032] The rate select pin is one of the RS0 pin, RS1 pin, and RX_LOS pin.

[0033] Optionally, the cable is a QSFP cable;

[0034] The in-position pin is the ModPrsL pin, and the in-position signal is a low-level signal;

[0035] The chip-free detection pin is the ResetL pin, and the preset level of the ResetL pin is a low level;

[0036] The type identification pins include a rate selection pin and a branch line selection pin. The rate selection pin is an LPMode pin, and the branch line selection pin is a ModSelL pin.

[0037] According to a third aspect of the embodiments of this specification, the present application provides an interface configuration device, including:

[0038] An access unit, configured to initiate an access request of the I2C bus protocol to the cable if a presence signal is detected through the presence pin of the cable;

[0039] A detection unit, configured to detect a no-chip detection pin if no response is received to a preset number of access requests; if the no-chip detection pin is set to a preset level, determining that the cable is a no-chip cable;

[0040] The identification unit is used to determine the type information of the cable based on the type identification pin, and configure the interface to which the cable is plugged according to the type information.

[0041] Optionally, the cable is an SFP cable;

[0042] The in-position pin is the Mod_ABS pin, and the in-position signal is a low-level signal;

[0043] The chip-absent detection pins are a TX_Fault pin and a TX_Disable pin. The preset level of the TX_Fault pin is a high level, and the preset level of the TX_Disable pin is a high level.

[0044] Optionally, the type identification pin includes a rate selection pin;

[0045] The rate select pin is one of the RS0 pin, RS1 pin, and RX_LOS pin.

[0046] Optionally, the cable is a QSFP cable;

[0047] The in-position pin is the ModPrsL pin, and the in-position signal is a low-level signal;

[0048] The chip-free detection pin is the ResetL pin, and the preset level of the ResetL pin is a low level;

[0049] The type identification pins include a rate selection pin and a branch line selection pin. The rate selection pin is an LPMode pin, and the branch line selection pin is a ModSelL pin.

[0050] According to a fourth aspect of the embodiments of this specification, the present application provides a network system, including a network device and a cable of any one of the above items connecting the network device;

[0051] A network device includes a processor and a machine-readable storage medium, wherein the machine-readable storage medium stores machine-executable instructions that can be executed by the processor, and the processor is prompted by the machine-executable instructions to implement any of the method steps described above.

[0052] The technical solutions provided by the embodiments of this specification may have the following beneficial effects:

[0053] In the embodiment of this specification, by adjusting the level of various pins on the connection terminal, the I 2 When the access request of the C protocol bus is not responded, the cable is determined to be a chip-free cable, and the level on the type identification pin is continued to be obtained to configure the interface, which reduces the process of testing cables containing chips and improves the efficiency of network deployment.

[0054] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the specification and, together with the description, serve to explain the principles of the specification.

[0056] Figure 1 It is a structural schematic diagram of a cable involved in an implementation manner of the present application;

[0057] Figure 2 It is a structural diagram of a network system involved in an implementation mode of the present application;

[0058] Figure 3 It is a flow chart of an interface configuration method involved in this application;

[0059] Figure 4 It is a structural schematic diagram of an SFP cable involved in an embodiment of the present application;

[0060] Figure 5It is a structural schematic diagram of a QSFP cable involved in an embodiment of the present application;

[0061] Figure 6 It is a structural diagram of an interface configuration device involved in this application. DETAILED DESCRIPTION

[0062] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with this specification. Instead, they are merely examples of devices and methods consistent with some aspects of this specification as detailed in the appended claims.

[0063] The present application provides a cable 1, such as Figure 1 As shown, including:

[0064] A connecting terminal 10, used for plugging into an optical module interface 20; and

[0065] A cable 11 is used to connect the connection terminals 10 on both sides of the cable for data transmission;

[0066] The connecting terminal 10 comprises:

[0067] The in-position pin 101 is used by the network device 2 to identify whether the cable is inserted into the optical module interface 20 and is pulled down to a low level;

[0068] A chip-free detection pin 102 is used to identify whether the cable 1 is a chip-free cable;

[0069] The type identification pin 103 is used to identify the type of the cable 1 .

[0070] In addition, other pins 104 may be provided on the connection terminal 10 , and their functions may include power supply, data transmission, and grounding, etc., which are not limited.

[0071] In combination with network systems, such as Figure 2As shown, in the network device 2, an optical module interface 20 for externally connecting the optical module is provided. Inside the network device 2, the optical module interface 20 is connected to the processor 21 to receive data or send processed data. When the optical module is not in use, the optical module interface 20 can be connected to the optical module interface 20 through a corresponding cable 1. The cables 1 to which these optical module interfaces 20 can be connected include SFP (Small Form Pluggable) cables and QSFP (Quad Small Form Pluggable) cables. Of course, the selected cable adapted to the optical module interface 20 is not limited thereto, and can also be other types of cables, which are not limited thereto.

[0072] In the cable 1, the connection terminal 10 can be understood as a circuit board including a plurality of gold fingers 12, on which a plurality of resistors can be arranged, and the chipless cable can be identified and the rate selection and branch line selection can be distinguished through the connection relationship between the resistor, the ground and the power supply. Of course, based on the different selected cables, such as SFP cables and QSFP cables, different connection modes can be set, which are described in detail below.

[0073] Method 1:

[0074] like Figure 3 As shown, cable 1 is an SFP cable, and 20 pins are set on the gold finger 12A of the connecting terminal 10A, among which the pins mainly used in this method are Mod_ABS pin, TX_Fault pin and TX_Disable pin, and at least one of RS0 pin, RS1 pin and RX_LOS pin needs to be selected for use.

[0075] The Mod_ABS pin is used as an in-position pin and is connected to the ground pin VeeR through a resistor, so that a low level is formed when the cable 1 is plugged into the optical module interface 20 .

[0076] The TX_Fault pin and the TX_Disable pin are used together as chip-free detection pins and are connected to the power pin VccT through a resistor, so that a high level is formed when the cable 1 is plugged into the optical module interface 20 .

[0077] Through the above configuration, when the cable 1 is plugged into the network device 2 having the SFP optical module interface 20, the network device 2 determines that the cable 1 is a chipless SFP cable.

[0078] Further, in order to realize the type identification of the SFP cable, the type identification pin may include a rate selection pin. The rate selection pin is one of the RS0 pin, the RS1 pin and the RX_LOS pin. For example, if the RS0 pin is connected to the ground pin VeeR through a resistor and pulled down to a low level, it can be indicated that the SFP cable is at a 10G rate. If the RS0 pin is connected to the power pin VccT through a resistor and pulled up to a high level, it can be indicated that the SFP cable is at a 25G rate.

[0079] In addition, in order to enable the network device 2 to identify more type information, the RS0 pin, RS1 pin and RX_LOS pin may be used simultaneously for identification.

[0080] Method 2:

[0081] like Figure 4 As shown, cable 1 is a QSFP cable, and 38 pins are set on the gold finger 12B of the connection terminal 10B, among which the pins mainly used in this method are ModPrsL pin and ResetL pin, and two are selected from LPMode pin, ModSelL pin and IntL pin, one of which is used as the rate selection pin and the other as the branch line selection pin. Figure 4 Only pins related to this implementation are shown.

[0082] For example, the ModPrsL pin is used as the in-position pin and is connected to the ground pin GND through a resistor, so that a low level is formed when the cable 1 is plugged into the optical module interface 20 .

[0083] The ResetL pin is used as a chip-free detection pin and is connected to the ground pin GND through a resistor, so that a low level is formed when the cable 1 is plugged into the optical module interface 20 .

[0084] Through the above configuration, when the cable 1 is plugged into the network device 2 having the QSFP optical module interface 20, the network device 2 determines that the cable 1 is a chipless QSFP cable.

[0085] Further, in order to realize the type identification of the QSFP cable, the type identification pin may include a rate selection pin and a branch line selection pin. The rate selection pin and the branch line selection pin may be selected from the LPMode pin, the ModSelL pin and the IntL pin. For example, the LPMode pin is used as the rate selection pin, the LPMode pin is connected to the power pin Vcc through a resistor, and is pulled up to a high level, indicating that the QSFP cable uses a 40G rate, the LPMode pin is connected to the ground pin GND through a resistor, and is pulled down to a low level, indicating that the QSFP cable uses a 100G rate, the ModSelL pin is used as the branch line selection pin, the ModSelL pin is connected to the power pin Vcc through a resistor, and is pulled up to a high level, indicating that the QSFP cable uses a one-to-four cable mode, and the ModSelL pin is connected to the ground pin through a resistor and is pulled down to a low level, indicating that the QSFP cable uses a direct connection mode.

[0086] In addition, in order to enable the network device 2 to identify more type information, the LPMode pin, the ModSelL pin and the IntL pin may be used simultaneously for identification.

[0087] When using cable 1, the current signal pins can be used for signal transmission. For example, for an SFP cable, the TD+ pin, TD- pin, RD+ pin, and RD- pin can be used for data transmission. For a QSFP cable, the TXn pin and RXn pin can be used for data transmission.

[0088] Correspondingly, the present application provides an interface configuration method, such as Figure 5 As shown, including:

[0089] S100: If a presence signal is detected through the presence pin of the cable, an I 2 C bus protocol access request.

[0090] After the cable 1 is inserted into the optical module interface 20 , since the in-position pin is pulled down to a low level, the network device 2 can detect that the cable 1 is in position.

[0091] Afterwards, based on I 2 C (Inter-Integrated Circuit) bus protocol, corresponding to the SCL (clock line) pin and SDA (data line) pin on the connection terminal 10 of the cable 1. Since there is no chip in the cable 1, the I 2 C-bus protocol is not used, and the SCL and SDA pins are left floating.

[0092] The network device 2 initiates an I to the cable 1 through the optical module interface 20. 2C bus protocol access request, because there is no chip set, it cannot respond. Therefore, different from the current process, when no response to the access request is received for several consecutive times (which can be set according to actual needs, more than one time can be achieved), it is considered that the inserted cable 1 may be a cable without a chip. In other words, it can be connected through I 2 C-bus protocol to trigger the identification and confirmation of the chip-less cable.

[0093] In addition, since the pin settings of SFP cables and QSFP cables are different, the optical module interface of QSFP and the optical module interface of SFP cannot be plugged into each other, so it is impossible to distinguish between the two, and there is no need to distinguish between the two. The optical module interface for QSFP can only be plugged into QSFP cables, and the optical module interface for SFP can only be plugged into SFP cables.

[0094] In mode 1, when cable 1 is an SFP cable, the in-position pin is the Mod_ABS pin, and the in-position signal is a low-level signal.

[0095] In mode 2, the cable is a QSFP cable, the in-position pin is a ModPrsL pin, and the in-position signal is a low-level signal.

[0096] If a response to the access request is received within the preset number of times, it means that the plugged cable is a chip cable, and the current chip cable process is performed; otherwise, jump to S101.

[0097] S101: If no response is received to the access request for a preset number of times, a chip-free detection pin is detected.

[0098] After multiple failures to detect responses, it is considered that cable 1 may be a chipless cable, but further confirmation is required.

[0099] In mode 1, for SFP cables, the chipless detection pins are the TX_Fault pin and the TX_Disable pin, the preset level of the TX_Fault pin is a high level, and the preset level of the TX_Disable pin is a high level. That is, when the TX_Fault pin and the TX_Disable pin are both high levels, the chipless cable is confirmed. This is because the TX_Fault pin is an indicator that the transmitter has not received light, and the TX_Disable pin is an indicator that the transmitter is turned off. When there is a chip cable and an optical module, the situation of both being high levels will not occur. Therefore, when both are high levels, it can be confirmed that the cable is a chipless cable.

[0100] In mode 2, for the QSFP cable, the chip-free detection pin is the ResetL pin, and the preset level of the ResetL pin is a low level. Among them, the ResetL pin is used for module reset in the optical module and is not used in the cable. Therefore, when the network device 2 detects that the ResetL pin is at a low level, it can be used as a confirmation of the chip-free state.

[0101] If it is determined that it is a chipless cable, the process jumps to step S102; if it cannot be determined, it may be prompted that the cable may be faulty.

[0102] S102: If the no-chip detection pin is set to a preset level, it is determined that the cable is a no-chip cable.

[0103] S103: Determine type information of the cable based on the type identification pin, and configure the interface to which the cable is plugged according to the type information.

[0104] After determining that the cable is a chip-free cable, the type information of the corresponding pins can be read to perform type identification.

[0105] For method 1, the type identification pin may include a rate selection pin, and the rate selection pin is one of an RS0 pin, an RS1 pin, and an RX_LOS pin.

[0106] For example, if the RS0 pin is connected to the ground pin through a resistor and pulled down to a low level, it can be indicated that the SFP cable has a 10G rate. If the RS0 pin is connected to the power pin through a resistor and pulled up to a high level, it can be indicated that the SFP cable has a 25G rate.

[0107] For mode 2, the type identification pins include a rate selection pin and a branch line selection pin, the rate selection pin is the LPMode pin, and the branch line selection pin is the ModSelL pin.

[0108] For example, the LPMode pin is used as a rate selection pin, and the LPMode pin is connected to the power pin through a resistor and pulled up to a high level, indicating that the QSFP cable uses a 40G rate. The LPMode pin is connected to the ground pin through a resistor and pulled down to a low level, indicating that the QSFP cable uses a 100G rate. The ModSelL pin is used as a branch line selection pin, and the ModSelL pin is connected to the power pin through a resistor and pulled up to a high level, indicating that the QSFP cable uses a one-to-four cable mode. The ModSelL pin is connected to the ground pin through a resistor and pulled down to a low level, indicating that the QSFP cable uses a direct connection mode.

[0109] It should be noted that the above is only a specific implementation. For type identification, more identifications can be performed using unoccupied pins on the optical module interface, and there is no limitation to this.

[0110] After the network device 2 identifies the type of the cable 1, the optical module interface 20 may be configured to achieve data communication between the network devices.

[0111] Correspondingly, the present application provides an interface configuration device, such as Figure 6 As shown, including:

[0112] The access unit is used to initiate an I to the cable if a presence signal is detected through the presence pin of the cable. 2 C bus protocol access request;

[0113] A detection unit, configured to detect a no-chip detection pin if no response is received to a preset number of access requests; if the no-chip detection pin is set to a preset level, determining that the cable is a no-chip cable;

[0114] The identification unit is used to determine the type information of the cable based on the type identification pin, and configure the interface to which the cable is plugged according to the type information.

[0115] Optionally, the cable is an SFP cable;

[0116] The in-position pin is the Mod_ABS pin, and the in-position signal is a low-level signal;

[0117] The chip-absent detection pins are a TX_Fault pin and a TX_Disable pin. The preset level of the TX_Fault pin is a high level, and the preset level of the TX_Disable pin is a high level.

[0118] Optionally, the type identification pin includes a rate selection pin;

[0119] The rate select pin is one of the RS0 pin, RS1 pin, and RX_LOS pin.

[0120] Optionally, the cable is a QSFP cable;

[0121] The in-position pin is the ModPrsL pin, and the in-position signal is a low-level signal;

[0122] The chip-free detection pin is the ResetL pin, and the preset level of the ResetL pin is a low level;

[0123] The type identification pins include a rate selection pin and a branch line selection pin. The rate selection pin is an LPMode pin, and the branch line selection pin is a ModSelL pin.

[0124] Correspondingly, the present application provides a network system, such as Figure 2As shown, it includes network devices 2, 3 and a cable 1 of any one of the above items connecting the network devices 2, 3;

[0125] The network device includes a processor 21 and a machine-readable storage medium (not shown), wherein the machine-readable storage medium stores machine-executable instructions that can be executed by the processor 21, and the processor 21 is prompted by the machine-executable instructions to implement any of the method steps described above.

[0126] The technical solutions provided by the embodiments of this specification may have the following beneficial effects:

[0127] In the embodiment of this specification, by adjusting the level of various pins on the connection terminal, the I 2 When the access request of the C protocol bus is not responded, the cable is determined to be a chip-free cable, and the level on the type identification pin is continued to be obtained to configure the interface, which reduces the process of testing cables containing chips and improves the efficiency of network deployment.

[0128] In addition, the deployment of chipless cables can reduce the cost of cables and the impact of chip supply, avoid the problem of adaptation between chips and network equipment, and improve the reliability of cables and network equipment.

[0129] It should be understood that the present description is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present description is limited only by the appended claims.

[0130] The above description is only a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of this specification should be included in the scope of protection of this specification.

Claims

1. An interface configuration method, characterized in that: include: If a presence signal is detected through the presence pin of the cable, an I 2 C bus protocol access request; If no response is received to the preset number of access requests, the chip-free detection pin is tested; If the no-chip detection pin is set to a preset level, determining that the cable is a no-chip cable; Determining type information of the cable based on the type identification pin, and configuring the interface to which the cable is plugged according to the type information; Among them, if the cable is an SFP cable, the in-position pin is the Mod_ABS pin, the in-position signal is a low-level signal, the chip-free detection pin is the TX_Fault pin and the TX_Disable pin, the preset level of the TX_Fault pin is a high level, the preset level of the TX_Disable pin is a high level, and the type identification pin includes a rate selection pin, and the rate selection pin is one of the RS0 pin, the RS1 pin and the RX_LOS pin; if the cable is a QSFP cable, the in-position pin is the ModPrsL pin, the in-position signal is a low-level signal, the chip-free detection pin is the ResetL pin, the preset level of the ResetL pin is a low level, the type identification pin includes a rate selection pin and a branch line selection pin, the rate selection pin is the LPMode pin, and the branch line selection pin is the ModSelL pin.

2. An interface configuration device, characterized in that: include: The access unit is used to initiate an I to the cable if a presence signal is detected through the presence pin of the cable. 2 C bus protocol access request; a detection unit, configured to detect a chip-free detection pin if no response is received to a preset number of access requests; If the no-chip detection pin is set to a preset level, determining that the cable is a no-chip cable; an identification unit, configured to determine type information of the cable based on the type identification pin, and configure the interface to which the cable is plugged according to the type information; Among them, if the cable is an SFP cable, the in-position pin is the Mod_ABS pin, the in-position signal is a low-level signal, the chip-free detection pin is the TX_Fault pin and the TX_Disable pin, the preset level of the TX_Fault pin is a high level, the preset level of the TX_Disable pin is a high level, and the type identification pin includes a rate selection pin, and the rate selection pin is one of the RS0 pin, the RS1 pin and the RX_LOS pin; if the cable is a QSFP cable, the in-position pin is the ModPrsL pin, the in-position signal is a low-level signal, the chip-free detection pin is the ResetL pin, the preset level of the ResetL pin is a low level, the type identification pin includes a rate selection pin and a branch line selection pin, the rate selection pin is the LPMode pin, and the branch line selection pin is the ModSelL pin.

3. A network system, characterized in that: This includes network equipment and cables; The network device comprises a processor and a machine-readable storage medium, wherein the machine-readable storage medium stores machine-executable instructions that can be executed by the processor, and the processor is prompted by the machine-executable instructions to implement the method steps described in claim 1.

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