An online monitoring method and system for the state information of power electronic devices

The method uses thermal resistance and voltage parameter estimation to monitor power electronic components' aging, enhancing the accuracy and reliability of power electronic component monitoring in electrical devices.

CN115616367BActive Publication Date: 2025-07-15LANGXIN (SHANGHAI) ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202110789642.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-07-13
Publication Date
2025-07-15
Estimated Expiration
2041-07-13

AI Technical Summary

Technical Problem

The prior art is difficult to achieve real-time accurate monitoring of power electronic devices, especially since the method based on the external sensors and circuits at the end of the device will change the hardware structure, the method based on the end characteristics of the device is difficult to measure, and the method based on the model is high accuracy requirements.

Method used

The junction temperature estimation method based on temperature-sensitive parameters, the junction temperature estimation method based on device power terminal temperature and the junction temperature estimation method based on shell temperature are used to estimate the junction temperature through three methods and compare them to realize real-time online monitoring of the status information of the power electronic device.

Benefits of technology

Accurate judgment of the types of aging power electronic devices, including chip aging, bond wire aging and under-chip solder layer aging, improving the accuracy and reliability of monitoring, and providing the safety and economic benefits of power electronic devices.

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Abstract

The present invention discloses an online monitoring method and system for the state information of power electronic devices, which relates to the field of power electronic device monitoring and includes: a junction temperature estimation method based on temperature-sensitive electrical parameters to determine the first estimated junction temperature of the power electronic device; a junction temperature estimation method based on the temperature of the device power terminal to determine the second estimated junction temperature of the power electronic device; a junction temperature estimation method based on the case temperature to determine the third estimated junction temperature of the power electronic device; and based on the first estimated junction temperature, the second estimated junction temperature and the third estimated junction temperature, the state information of the power electronic device is monitored in real time online. The present invention can monitor the state information of power electronic devices in real time and accurately.
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Description

Technical Field

[0001] The present invention relates to the field of power electronic device monitoring, and particularly to an online monitoring method and system for the state information of power electronic devices. Background Art

[0002] Most of the electric energy in the world, such as the electric energy in electric vehicle drive equipment, rail transit traction equipment, new energy power generation equipment, communication power supply equipment, etc., is converted and controlled by power electronic devices. Power electronic devices are almost the most easily faulty components in all electrical equipment. Therefore, online monitoring of the reliability state or aging evolution state of power electronic devices is of great significance for mastering the state information of power electronic devices, ensuring operation safety, and realizing the health management / life management of electrical equipment.

[0003] Monitoring of the reliability state or aging evolution state of power electronic devices has always been a research hotspot in power electronic equipment at home and abroad. Summarizing the current state monitoring methods of power electronic equipment at home and abroad, they can be roughly classified into: methods based on external sensors and circuits at the device end, methods based on device end characteristics, and model-based methods.

[0004] For the methods based on external sensors and circuits at the device end, such as leading out a terminal at the emitter lead of an IGBT to connect an external resistor and other auxiliary measurement circuits, the IGBT lead disconnection fault can be monitored. For example, resistors are connected in parallel on both sides of the emitter lead terminal of the IGBT, and the change in the voltage drop across the resistor is used to trigger the auxiliary circuit and issue an alarm. Although such methods based on external sensors and circuits at the device end can effectively monitor the occurrence of faults, the introduction of the auxiliary circuit and / or sensor elements will change the internal structural layout of the converter IGBT, and the power loss of the auxiliary circuit and / or sensor elements will also affect the accuracy of the state detection of power electronic equipment.

[0005] For the methods based on device end characteristics, such as through electrothermal loading experiments, studying the characteristics of the on-state voltage drop, transconductance, and gate threshold voltage of power electronic devices changing with temperature before and after fatigue, so as to infer the aging of power electronic devices. However, in practical applications, since most power electronic devices are encapsulated in modules, it is very difficult to directly measure the end characteristics such as on-state voltage drop, transconductance, and gate threshold voltage. And due to factors such as measurement errors and weak signal changes, that is, it is very difficult to accurately measure such methods based on device end characteristics, which limits their practical engineering applications.

[0006] Model-based methods, such as the thermal resistance model method, estimate the change in the internal thermal resistance of a power electronic device by analyzing the change in power loss of the power electronic device over the entire operating range, thereby judging the degree of fatigue of the solder layer under the chip; such as the junction temperature model method, which uses the characteristic relationship between the aging of the power electronic device and the change in junction temperature to infer the aging condition of the power electronic device; such as the method combining the thermal resistance model and the junction temperature model, which compares the magnitudes of the two junction temperature parameters obtained from the junction temperature model and the thermal resistance model to judge the type of aging of the power electronic device. However, such model-based methods may introduce certain errors, resulting in inaccurate measurement accuracy. In addition, they have relatively high requirements for the accuracy of the corresponding thermal resistance model and / or junction temperature model.

[0007] In summary, the method based on external sensors and circuits at the device ends needs to consider the measurement error of the sensors and their impact on the hardware structure. The method based on the characteristics at the device ends is not suitable for online measurement. The model-based methods, on the other hand, pose relatively high requirements for both the model accuracy and the algorithm. Summary of the Invention

[0008] The object of the present invention is to provide an online monitoring method and system for the state information of power electronic devices, so as to achieve the purpose of real-time and accurate monitoring of the state information of power electronic devices.

[0009] To achieve the above object, the present invention provides the following solutions:

[0010] An online monitoring method for the state information of power electronic devices includes:

[0011] Using the junction temperature estimation method based on temperature-sensitive electrical parameters to determine the first estimated junction temperature of the power electronic device; the power electronic device includes a chip, a power terminal, and a solder layer under the chip;

[0012] Using the junction temperature estimation method based on the temperature of the device power terminal to determine the second estimated junction temperature of the power electronic device;

[0013] Using the junction temperature estimation method based on the case temperature to determine the third estimated junction temperature of the power electronic device;

[0014] Based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature, the state information of the power electronic device is monitored in real time online; the state information includes that the chip is aging, the chip is not aging, the bonding wire is aging, the bonding wire is not aging, the solder layer under the chip is aging, and the solder layer under the chip is not aging.

[0015] Optionally, the using the junction temperature estimation method based on temperature-sensitive electrical parameters to determine the first estimated junction temperature of the power electronic device specifically includes:

[0016] Obtaining the temperature-sensitive electrical parameters of the power electronic device;

[0017] Based on the temperature-sensitive characteristic relationship and the temperature-sensitive electrical parameters, online estimate the first estimated junction temperature of the power electronic device; the temperature-sensitive characteristic relationship is the mapping relationship between the temperature-sensitive electrical parameters and the junction temperature.

[0018] Optionally, the junction temperature estimation method based on the temperature of the device power terminal to determine the second estimated junction temperature of the power electronic device specifically includes:

[0019] Obtain the thermal resistance network parameters from the chip to the power terminal in the power electronic device;

[0020] Obtain the temperature of the power terminal of the power electronic device;

[0021] Calculate the loss corresponding to the second estimated junction temperature of the power electronic device; the loss corresponding to the second estimated junction temperature is determined according to the operating point information of the power electronic device; the power electronic device is installed on the power electronic device;

[0022] According to the formula T B =P B *Z th_jt +T t Determine the second estimated junction temperature of the power electronic device;

[0023] Wherein, T B represents the second estimated junction temperature, P B represents the loss corresponding to the second estimated junction temperature, T t represents the temperature of the power terminal, and Z th_jt represents the thermal resistance network parameters from the chip to the power terminal.

[0024] Optionally, the junction temperature estimation method based on the case temperature to determine the third estimated junction temperature of the power electronic device specifically includes:

[0025] Obtain the thermal resistance network parameters from the chip to the solder layer in the power electronic device;

[0026] Obtain the case temperature of the power electronic device; the case temperature is the temperature of the outer shell or the copper bottom plate of the power electronic device;

[0027] Calculate the loss corresponding to the third estimated junction temperature of the power electronic device; the loss corresponding to the third estimated junction temperature is determined according to the operating point information of the power electronic device; the power electronic device is installed on the power electronic device;

[0028] According to the formula T C =P*Z th_jc +T case Determine the third estimated junction temperature of the power electronic device;

[0029] Wherein, T CDenote the third estimated junction temperature as \(T_j3\), \(P\) represents the loss corresponding to the third estimated junction temperature, and \(T_c\) case denotes the case temperature, and \(Z\) th_jc represents the thermal resistance network parameters from the chip to the solder layer.

[0030] Optionally, based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature, the state information of the power electronic device is monitored in real time online, specifically including:

[0031] When the difference between the first estimated junction temperature and the second estimated junction temperature is within the set interval, determine that the state information of the power electronic device is that the chip has not aged and the bonding wire has not aged;

[0032] When the difference between the first estimated junction temperature and the second estimated junction temperature is greater than the maximum value of the set interval, determine that the state information of the power electronic device is that the chip has aged;

[0033] When the difference between the first estimated junction temperature and the second estimated junction temperature is less than the minimum value of the set interval, determine that the state information of the power electronic device is that the bonding wire has aged;

[0034] When the difference between the second estimated junction temperature and the third estimated junction temperature is less than or equal to the set threshold, determine that the state information of the power electronic device is that the solder layer under the chip has not aged;

[0035] When the difference between the second estimated junction temperature and the third estimated junction temperature is greater than the set threshold, determine that the state information of the power electronic device is that the solder layer under the chip has aged.

[0036] An online monitoring system for the state information of a power electronic device, comprising:

[0037] A first estimated junction temperature determination module, configured to determine the first estimated junction temperature of the power electronic device based on the junction temperature estimation method of temperature-sensitive electrical parameters; the power electronic device includes a chip, a power terminal, and a solder layer under the chip;

[0038] A second estimated junction temperature determination module, configured to determine the second estimated junction temperature of the power electronic device based on the junction temperature estimation method of the device power terminal temperature;

[0039] A third estimated junction temperature determination module, configured to determine the third estimated junction temperature of the power electronic device based on the junction temperature estimation method of the case temperature;

[0040] A status information monitoring module, configured to monitor in real time and online the status information of the power electronic device based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature; the status information includes that the chip is aged, the chip is not aged, the bonding wire is aged, the bonding wire is not aged, the solder layer under the chip is aged, and the solder layer under the chip is not aged.

[0041] Optionally, the first estimated junction temperature determination module specifically includes:

[0042] A temperature-sensitive electrical parameter acquisition unit, configured to acquire the temperature-sensitive electrical parameters of the power electronic device;

[0043] A first estimated junction temperature determination unit, configured to estimate online the first estimated junction temperature of the power electronic device according to the temperature-sensitive characteristic relationship and the temperature-sensitive electrical parameters; the temperature-sensitive characteristic relationship is the mapping relationship between the temperature-sensitive electrical parameters and the junction temperature.

[0044] Optionally, the second estimated junction temperature determination module specifically includes:

[0045] A thermal resistance network parameter acquisition unit, configured to acquire the thermal resistance network parameters from the chip to the power terminal in the power electronic device;

[0046] A power terminal temperature acquisition unit, configured to acquire the power terminal temperature of the power electronic device;

[0047] A loss calculation unit corresponding to the second estimated junction temperature, configured to calculate the loss corresponding to the second estimated junction temperature of the power electronic device; the loss corresponding to the second estimated junction temperature is determined according to the operating working point information of the power electronic device; the power electronic device is installed on the power electronic device;

[0048] A second estimated junction temperature determination unit, configured to determine the second estimated junction temperature of the power electronic device according to the formula T B =P B *Z th_jt +T t ;

[0049] wherein, T B represents the second estimated junction temperature, P B represents the loss corresponding to the second estimated junction temperature, T t represents the power terminal temperature, and Z th_jt represents the thermal resistance network parameters from the chip to the power terminal.

[0050] Optionally, the third estimated junction temperature determination module specifically includes:

[0051] A thermal resistance network parameter acquisition unit, configured to acquire the thermal resistance network parameters from the chip to the solder layer in the power electronic device;

[0052] A case temperature acquisition module for acquiring the case temperature of the power electronic device; the case temperature is the temperature of the outer shell or the copper base plate of the power electronic device;

[0053] A loss calculation unit corresponding to the third estimated junction temperature for calculating the loss of the power electronic device corresponding to the third estimated junction temperature; the loss corresponding to the third estimated junction temperature is determined according to the operating point information of the power electronic device; the power electronic device is installed on the power electronic device;

[0054] A third estimated junction temperature determination unit for determining the third estimated junction temperature of the power electronic device according to the formula T C = P * Z th_jc + T case ;

[0055] Wherein, T C represents the third estimated junction temperature, P represents the loss corresponding to the third estimated junction temperature, T case represents the case temperature, and Z th_jc represents the thermal resistance network parameter from the chip to the solder layer.

[0056] Optionally, the status information monitoring module specifically includes:

[0057] A chip non-aging and bonding wire non-aging determination unit for determining that the status information of the power electronic device is that the chip has not aged and the bonding wire has not aged when the difference between the first estimated junction temperature and the second estimated junction temperature is within a set interval;

[0058] A chip aging determination unit for determining that the status information of the power electronic device is that the chip has aged when the difference between the first estimated junction temperature and the second estimated junction temperature is greater than the maximum value of the set interval;

[0059] A bonding wire aging determination unit for determining that the status information of the power electronic device is that the bonding wire has aged when the difference between the first estimated junction temperature and the second estimated junction temperature is less than the minimum value of the set interval;

[0060] A chip under-solder layer non-aging determination unit for determining that the status information of the power electronic device is that the chip under-solder layer has not aged when the difference between the second estimated junction temperature and the third estimated junction temperature is less than or equal to a set threshold;

[0061] A chip under-solder layer aging determination unit for determining that the status information of the power electronic device is that the chip under-solder layer has aged when the difference between the second estimated junction temperature and the third estimated junction temperature is greater than the set threshold.

[0062] According to the specific embodiments provided by the present invention, the following technical effects are disclosed by the present invention:

[0063] The present invention discloses an online monitoring method and system for the state information of power electronic devices. Based on the characteristics of different junction temperatures measured by different methods under different aging modes of power electronic devices, an aging diagnosis model based on junction temperature is established. Specifically, according to the electro-thermal data in the actual working conditions of power electronic devices, the junction temperature estimation of power electronic devices is respectively carried out by combining the junction temperature estimation method based on temperature-sensitive electrical parameters, the junction temperature estimation method based on the temperature of the device power terminal, and the junction temperature estimation method based on the case temperature. Then, the three estimated junction temperatures are compared to realize real-time, accurate and online monitoring of the state information of power electronic devices, and further realize the discrimination of the aging types of power electronic devices, including package aging (mainly referring to the aging of the solder layer under the chip), chip aging, bonding wire aging, etc. Brief Description of the Drawings

[0064] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required to be used in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0065] Figure 1 It is a schematic flowchart of the online monitoring method for the state information of the power electronic device of the present invention;

[0066] Figure 2 It is a schematic flowchart for realizing the determination of the aging types of the power electronic device of the present invention;

[0067] Figure 3 It is a schematic structural diagram of the online monitoring system for the state information of the power electronic device of the present invention;

[0068] Figure 4 It is a schematic diagram of the calibration experimental platform for the junction temperature estimation based on temperature-sensitive electrical parameters of the present invention;

[0069] Figure 5 It is a schematic diagram of the principle of the calibration experimental system for the junction temperature estimation based on temperature-sensitive electrical parameters of the present invention;

[0070] Figure 6 It is a schematic diagram of the electrical symbol of the IGBT device of the present invention;

[0071] Figure 7 It is a schematic structural diagram of the IGBT device of the present invention;

[0072] Figure 8 It is the collector-emitter voltage v of the IGBT device within one switching period of the present invention ce and the collector current i cWaveform schematic diagram; Figure 8 (a) Schematic diagram of the gate-emitter voltage waveform of the present invention; Figure 8 (b) Collector current i of the present invention c Waveform schematic diagram; Figure 8 (c) Collector-emitter voltage v of the present invention ce Waveform schematic diagram;

[0073] Figure 9 Schematic diagram of the principle of the junction temperature estimation method based on the temperature of the device power terminal of the present invention;

[0074] Figure 10 Schematic diagram of the basis for judging the aging type of the present invention; Figure 10 (a) Schematic diagram of the basis for judging chip aging of the present invention; Figure 10 (b) Schematic diagram of the basis for judging bond wire aging of the present invention; Figure 10 (c) Schematic diagram of the basis for judging the aging of the solder layer under the chip of the present invention;

[0075] Figure 11 Schematic diagram of the change curve of the estimated junction temperature based on the power terminal of the power electronic device of the present invention.

[0076] Symbol description:

[0077] 1. Thermostat, 2. Control board, 3. High-power DC power supply, 4. Host computer, 5. Mixed signal oscilloscope (MSO), 6. High-voltage differential probe and high-precision circuit probe, 7. Cooling fan, 8. Device under test (DUT), 9. Inductive load (8mh). Detailed implementation manners

[0078] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0079] To overcome the deficiencies of the prior art, the present invention proposes an on-line monitoring method that uses the information of the chip junction temperature T j , power terminal temperature T t , and case temperature T case (or the mutual relationship among the three) to characterize and judge the aging status of the chip, bond wire, and solder layer under the chip. It has the advantages of simple implementation, novel principle, scientific and reasonable aging judgment for power electronic devices, and high confidence. With the support of big data, potential hazards of power electronic devices can be quickly discovered, and effective support can be provided for the extended operation of power electronic devices.

[0080] Another object of the present invention is to improve the safety and economic benefits of power electronic devices, which is a new idea in the field of pre-diagnosis of power electronic device aging.

[0081] In order to make the above objects, features and advantages of the present invention more obvious and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0082] To achieve the above object of the invention, the present invention adopts the following technical solutions:

[0083] Embodiment 1

[0084] Please refer to Figure 1 and Figure 2 , this embodiment provides an on-line monitoring method for the state information of power electronic devices (such as inverters) used in power electronic devices. The power electronic devices include chips, power terminals and solder layers under the chips; the method includes the following steps:

[0085] Step 101: Based on the junction temperature estimation method of temperature-sensitive electrical parameters, determine the first estimated junction temperature T A of the power electronic device; specifically:

[0086] Step 1011: Obtain the temperature-sensitive electrical parameters of the power electronic device in the power electronic device.

[0087] Among them, various temperature-sensitive electrical parameters can be measured and obtained through calibration experiments according to actual situations. For example: on-state voltage drop v ce(on) , turn-off delay time t d_off , voltage rise time t rv during turn-off, voltage fall time t fv during turn-on, etc.

[0088] Step 1012: According to the pre-calibrated temperature-sensitive characteristic relationship between the temperature-sensitive electrical parameters and the temperature and the obtained temperature-sensitive electrical parameters, online estimate the first estimated junction temperature T A of the power electronic device.

[0089] The temperature-sensitive characteristic relationship is determined according to the temperature-sensitive electrical parameter characteristic calibration experiment.

[0090] Taking IGBT as an example, the determination process of the temperature-sensitive characteristic relationship is as follows:

[0091] First, select an IGBT and place the IGBT on a temperature calibration platform.

[0092] Secondly, adopt the method of controlling variables, and measure the collector current i c signal and the collector-emitter voltage v ce signal of the IGBT within a single switching cycle under a certain current gradient and junction temperature gradient respectively.

[0093] Then, based on the collector current i c signal and the collector-emitter voltage v ce signal, experimental sample data is established through an offline data processing method.

[0094] Finally, based on the experimental sample data, a mapping relationship table of the temperature-sensitive electrical parameter - junction temperature of the power electronic device, that is, the temperature-sensitive characteristic relationship, is determined.

[0095] Step 102: Determine the second estimated junction temperature T B of the power electronic device based on the junction temperature estimation method of the device power terminal temperature; specifically:

[0096] Step 1021: Obtain the thermal resistance network parameter Z th_jt from the chip to the power terminal in the power electronic device through means such as experimental calibration or finite element simulation calculation.

[0097] Step 1022: Online measure and obtain the power terminal temperature T t of the power electronic device.

[0098] Step 1023: Calculate the loss P B corresponding to the second estimated junction temperature of the power electronic device.

[0099] Step 1024: Estimate the second estimated junction temperature T th_jt of the power electronic device according to the thermal resistance network parameter Z t , the power terminal temperature T B , the loss P B corresponding to the second estimated junction temperature, and the electrothermal model of the power electronic device chip - power terminal.

[0100] The estimation formula of the electrothermal model of the power electronic device chip - power terminal is T B = P B * Z th_jt + T t .

[0101] Among them, the loss P case corresponding to the second estimated junction temperature can be calculated according to the device loss model established based on the power electronic device manual or calibration experiment, and the operating working point information of the online measured power electronic device (including DC voltage, output current, duty cycle, and case temperature T B etc.).

[0102] Step 103: Determine the third estimated junction temperature T C of the power electronic device based on the junction temperature estimation method of the case temperature; specifically:

[0103] Step 1031: Obtain the thermal resistance network parameter Z from the chip to the solder layer in the power electronic device through means such as a power electronic device manual or a calibration experiment th_jc , such as the temperature of the NTC temperature-sensitive resistor integrated at the substrate of the power electronic device.

[0104] Step 1032: Measure and obtain the case temperature T of the power electronic device online case . The case temperature T case is the temperature of the outer shell or the copper bottom plate of the power electronic device.

[0105] Step 1033: Calculate the loss P corresponding to the third estimated junction temperature of the power electronic device.

[0106] Step 1034: Based on the thermal resistance network parameter Z th_jc , the case temperature T case , the loss P corresponding to the third estimated junction temperature, and the electrothermal model of the power electronic device chip - under-chip solder layer, estimate the third estimated junction temperature T of the power electronic device C .

[0107] The expression of the electrothermal model of the power electronic device chip - under-chip solder layer is T C = P * Z th_jc + T case .

[0108] Among them, the loss P corresponding to the third estimated junction temperature can be calculated according to the device loss model established from the power electronic device manual or calibration experiment, and the online measured operation working point information of the power electronic device (including DC voltage, output current, duty cycle, and case temperature T case etc.).

[0109] Step 104: Based on the first estimated junction temperature T A , the second estimated junction temperature T B and the third estimated junction temperature T C , real-time online monitor the state information of the power electronic device; the state information includes that the chip is aging, the chip is not aging, the bonding wire is aging, the bonding wire is not aging, the under-chip solder layer is aging, and the under-chip solder layer is not aging.

[0110] By comparing the junction temperatures of the power electronic device estimated by different methods with each other, to judge the aging type of the power electronic device, and realize the characterization of the aging evolution of the power electronic device and the online monitoring of the state information.

[0111] The determination of the aging types of the power electronic device is realized as follows:

[0112] (1) A method for determining (or characterizing) the aging of the chip of the power electronic device.

[0113] Two junction temperature parameters are adopted: namely, the first estimated junction temperature T A (When the chip ages, the turn-off process of the power electronic device slows down and the loss increases. That is, the first estimated junction temperature T obtained by estimating the turn-off time according to the temperature-sensitive electrical parameter A will be greater than the actual chip junction temperature) and the second estimated junction temperature T B (When the chip ages, it hardly affects the thermal resistance network parameters from the chip to the power terminal. That is, the estimated second estimated junction temperature T B is equal to or almost equal to the actual chip junction temperature). At the same operating point, when the first estimated junction temperature T A The change trend will gradually deviate from the change trend of the second estimated junction temperature T B and the difference △T1 = T A - T B increases, it can be determined that the chip of the power electronic device has aged.

[0114] (2) A method for determining (characterizing) the aging of the bonding wire of a power electronic device.

[0115] Two junction temperature parameters are adopted: namely, the first estimated junction temperature T A (When the bonding wire ages and the chip does not age, the first estimated junction temperature T A is equal to or almost equal to the actual chip junction temperature) and the second estimated junction temperature T B (When the bonding wire ages and the chip does not age, the equivalent internal resistance of the bonding wire will increase and the heat generation will increase. The second estimated junction temperature T B will be greater than the actual chip junction temperature). At the same operating point, when the second temperature T B The change trend will gradually deviate from the change trend of the first estimated junction temperature T A and the difference △T1 = T A - T B decreases, it can be determined that the bonding wire of the power electronic device has aged.

[0116] (3) A method for determining (characterizing) the aging of the solder layer under the chip of a power electronic device.

[0117] Two junction temperature parameters are adopted: namely, the second estimated junction temperature T B (When the solder layer under the chip ages and the chip and the bonding wire do not age, the second estimated junction temperature T B is equal to or almost equal to the actual chip junction temperature), and the third estimated junction temperature T C (When the aging of the solder layer under the chip occurs, the actual thermal resistance will become larger and the third estimated junction temperature T C is less than the actual chip junction temperature). At the same operating point, when the third estimated junction temperature T C The change trend will gradually deviate from the second estimated junction temperature TB The change trend and the difference △T2 = T B -T C When it increases, it can be judged that the solder layer under the chip of the power electronic device is aging.

[0118] Step 104 described in this embodiment specifically includes:

[0119] When the first estimated junction temperature T A and the second estimated junction temperature T B When the difference between them is within the set interval, it is determined that the state information of the power electronic device is that the chip has not aged and the bonding wire has not aged.

[0120] When the first estimated junction temperature T A and the second estimated junction temperature T B When the difference between them is greater than the maximum value of the set interval, it is determined that the state information of the power electronic device is that the chip is aging.

[0121] When the first estimated junction temperature T A and the second estimated junction temperature T B When the difference between them is less than the minimum value of the set interval, it is determined that the state information of the power electronic device is that the bonding wire is aging.

[0122] When the second estimated junction temperature T B and the third estimated junction temperature T C When the difference between them is less than or equal to the set threshold, it is determined that the state information of the power electronic device is that the solder layer under the chip has not aged.

[0123] When the second estimated junction temperature T B and the third estimated junction temperature T C When the difference between them is greater than the set threshold, it is determined that the state information of the power electronic device is that the solder layer under the chip is aging.

[0124] Compared with the prior art, it has the following obvious outstanding substantive features and remarkable advantages:

[0125] 1. The online monitoring method provided in this embodiment diagnoses the aging type based on the key state variable "junction temperature" of the power electronic device, which has the advantages of directness and reliability.

[0126] 2. In this embodiment, the junction temperature monitoring is respectively carried out by the junction temperature estimation method based on temperature-sensitive electrical parameters, the junction temperature estimation method based on the temperature of the device power terminal, and the junction temperature estimation method based on the case temperature. By comparing the monitored junction temperatures with each other, the determination of the types of aging of power electronic devices is realized, and then the diagnosis of the aging degree and the life estimation are realized, which improves the safety and economic benefits of power electronic devices and provides a new idea for the online diagnosis research of power electronic device aging.

[0127] 3. The online monitoring method provided in this embodiment has the advantages of simple method, novel principle, scientific and reasonable determination of device aging, high confidence, etc. With the support of big data, it can quickly discover device hidden dangers and provide effective support for the extended operation of power electronic devices.

[0128] Embodiment 2

[0129] Please refer to Figure 3 , this embodiment provides an online monitoring system for the state information of a power electronic device, including:

[0130] The first estimated junction temperature determination module 301 is used to determine the first estimated junction temperature of the power electronic device based on the junction temperature estimation method of temperature-sensitive electrical parameters; the power electronic device includes a chip, a power terminal, and a solder layer under the chip.

[0131] The second estimated junction temperature determination module 302 is used to determine the second estimated junction temperature of the power electronic device based on the junction temperature estimation method of the device power terminal temperature.

[0132] The third estimated junction temperature determination module 303 is used to determine the third estimated junction temperature of the power electronic device based on the junction temperature estimation method of the case temperature.

[0133] The state information monitoring module 304 is used to monitor the state information of the power electronic device in real time online based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature; the state information includes that the chip is aging, the chip is not aging, the bonding wire is aging, the bonding wire is not aging, the solder layer under the chip is aging, and the solder layer under the chip is not aging.

[0134] The first estimated junction temperature determination module 301 specifically includes:

[0135] The temperature-sensitive electrical parameter acquisition unit is used to acquire the temperature-sensitive electrical parameters of the power electronic device.

[0136] Among them, the temperature-sensitive electrical parameters are measured according to the bus DC voltage of the power electronic device and the current sensor of the power electronic device (such as an inverter) and its peripheral circuit.

[0137] A first estimated junction temperature determination unit for online estimating a first estimated junction temperature of the power electronic device according to a temperature-sensitive characteristic relationship and the temperature-sensitive electrical parameter; the temperature-sensitive characteristic relationship is a mapping relationship between the temperature-sensitive electrical parameter and the junction temperature.

[0138] The second estimated junction temperature determination module 302 specifically includes:

[0139] A thermal resistance network parameter acquisition unit for acquiring thermal resistance network parameters from the chip to the power terminal in the power electronic device.

[0140] A power terminal temperature acquisition unit for acquiring the power terminal temperature of the power electronic device collected by a power terminal temperature sensor.

[0141] A loss calculation unit corresponding to the second estimated junction temperature for calculating the loss of the power electronic device corresponding to the second estimated junction temperature; the loss corresponding to the second estimated junction temperature is determined according to the operation working point information of the power electronic device; the power electronic device is installed on the power electronic device.

[0142] A second estimated junction temperature determination unit for according to the formula T B =P B *Z th_jt +T t To determine the second estimated junction temperature of the power electronic device.

[0143] Wherein, T B Represents the second estimated junction temperature, P B Represents the loss corresponding to the second estimated junction temperature, T t Represents the power terminal temperature, Z th_jt Represents the thermal resistance network parameter from the chip to the power terminal.

[0144] The third estimated junction temperature determination module 303 specifically includes:

[0145] A thermal resistance network parameter acquisition unit for acquiring thermal resistance network parameters from the chip to the solder layer in the power electronic device.

[0146] A case temperature acquisition module for acquiring the case temperature of the power electronic device collected by a case temperature sensor; the case temperature is the temperature of the outer shell or the copper bottom plate of the power electronic device.

[0147] A loss calculation unit corresponding to the third estimated junction temperature for calculating the loss of the power electronic device corresponding to the third estimated junction temperature; the loss corresponding to the third estimated junction temperature is determined according to the operation working point information of the power electronic device; the power electronic device is installed on the power electronic device.

[0148] A third estimated junction temperature determination unit for according to the formula TC = P * Z th_jc + T case Determine the third estimated junction temperature of the power electronic device.

[0149] Where T C represents the third estimated junction temperature, P represents the loss corresponding to the third estimated junction temperature, and T case represents the case temperature, and Z th_jc represents the thermal resistance network parameter from the chip to the solder layer.

[0150] The state information monitoring module 304 specifically includes:

[0151] A chip non - aging and bond wire non - aging determination unit, configured to determine that the state information of the power electronic device is that the chip has not aged and the bond wire has not aged when the difference between the first estimated junction temperature and the second estimated junction temperature is within a set interval.

[0152] A chip aging determination unit, configured to determine that the state information of the power electronic device is that the chip has aged when the difference between the first estimated junction temperature and the second estimated junction temperature is greater than the maximum value of the set interval.

[0153] A bond wire aging determination unit, configured to determine that the state information of the power electronic device is that the bond wire has aged when the difference between the first estimated junction temperature and the second estimated junction temperature is less than the minimum value of the set interval.

[0154] A chip under - solder layer non - aging determination unit, configured to determine that the state information of the power electronic device is that the chip under - solder layer has not aged when the difference between the second estimated junction temperature and the third estimated junction temperature is less than or equal to a set threshold.

[0155] A chip under - solder layer aging determination unit, configured to determine that the state information of the power electronic device is that the chip under - solder layer has aged when the difference between the second estimated junction temperature and the third estimated junction temperature is greater than the set threshold.

[0156] Embodiment III

[0157] This embodiment provides an on - line monitoring method for the state information of an IGBT device for an inverter. By comparing the junction temperatures of the IGBT device collected by three junction temperature estimation methods, the state of the IGBT device is determined.

[0158] Figure 6 is a schematic diagram of the electrical symbol of the IGBT device. C is the collector of the IGBT device, E is the emitter of the IGBT device, and G is the gate of the IGBT device.

[0159] Please refer toFigure 7 , the IGBT device described in this embodiment includes: a chip, an anti-parallel diode chip, bonding wires, an under-chip solder layer, a copper layer on the DBC, a DBC ceramic substrate, a copper layer under the DBC, an under-DBC solder layer, a copper bottom plate, and power terminals.

[0160] Among them, the chip is connected to the bonding wires, the bonding wires are connected to the anti-parallel diode chip, the bonding wires are connected to the copper layer on the DBC, the copper layer on the DBC is connected to the power terminals, the chip is connected to the under-chip solder layer, the anti-parallel diode chip is connected to the under-chip solder layer, the under-chip solder layer is connected to the copper layer on the DBC, the copper layer on the DBC is connected to the DBC ceramic substrate, the DBC ceramic substrate is connected to the copper layer under the DBC, the copper layer under the DBC is connected to the under-DBC solder layer, and the under-DBC solder layer is connected to the copper bottom plate.

[0161] At the same time, the copper layer on the DCB is divided into three parts, which are respectively connected to the three output terminals C, E, and G of the IGBT device, and there is no connection (no electrical connection) between the three upper copper layers.

[0162] An on-line monitoring method for the state information of an IGBT device for an inverter described in this embodiment includes: first, respectively collecting the power terminal temperature T of the IGBT device t , the case temperature T of the IGBT device case , the collector-emitter voltage V of the IGBT device ce , the DC bus voltage U of the inverter d and the inverter output current signal i; then, respectively estimating the junction temperature of the IGBT device by using the junction temperature estimation method based on temperature-sensitive electrical parameters, the junction temperature estimation method based on the power terminal temperature of the device, and the junction temperature estimation method based on the case temperature, and finally judging the aging type of the IGBT device by comparing the three estimated junction temperatures with each other, so as to realize the characterization of the aging evolution of the IGBT device and the on-line monitoring of the state information.

[0163] Among them, the junction temperature monitoring method of the IGBT device includes:

[0164] (1) Junction temperature estimation method based on temperature-sensitive electrical parameters: On-line collect the collector-emitter voltage V of the IGBT device ce and the inverter output current signal i, select the voltage rise time t of the IGBT device during turn-off rv as the temperature-sensitive electrical parameter, and estimate the first estimated junction temperature T of the IGBT device according to the pre-calibrated temperature-sensitive characteristic relationship between the temperature-sensitive electrical parameter and the temperature A .

[0165] The temperature-sensitive characteristic calibration test is implemented on the temperature calibration platform shown in Figure 4 (the schematic diagram is as shown in Figure 5As shown in the figure, a single-phase inverter circuit is used for double-pulse testing, and an IGBT device of Infineon (model: FF50R12RT4) is selected for testing. During the experiment, after starting with heating elements on both sides of the device under test 8 (i.e., the IGBT device), when the temperature controller 1 shows a stable temperature and maintains it for 15 minutes, it can be considered that the temperature of the chip inside the device under test 8 is the same as the temperature inside the chamber. By changing the pulse width of the first pulse, the collector current at the turn-off moment can be adjusted to 10A, 15A, 20A, 25A, 30A, 35A, 40A. The collector-emitter voltage V ce and the collector current i c of the IGBT device at 30°C, 60°C, 90°C, and 120°C are respectively tested within a single switching cycle, and the experimental data (i.e., the collector-emitter voltage V ce and the collector current i c ) are recorded. The waveforms of the collector-emitter voltage V ce and the collector current i c within a single switching cycle are as shown in Figure 8 .

[0166] (2) Junction temperature estimation method based on the temperature of the device power terminal: First, obtain the thermal resistance network parameters Z th_jt from the chip to the power terminal in the IGBT device through experimental calibration or simulation calculation, etc. Then, online measure the power terminal temperature T t of the IGBT device and the loss P B corresponding to the second estimated junction temperature. Finally, estimate the second estimated junction temperature T B of the IGBT device according to the electrothermal model T B = P B *Z th_jt + T t .

[0167] As shown in Figure 9 is the schematic diagram of the junction temperature estimation method based on the temperature of the device power terminal. Using a power electronic device as the device under test and installing it inside a power electronic device; the power terminals of the power electronic device are connected to an external load or power supply through a bus bar. An infrared temperature sensor is installed near the power electronic device (the distance is between 1 mm and 100 m), and the temperature measurement point is the power terminal of the power electronic device. The measured power terminal temperature T t of the power electronic device is sent to the electrothermal model unit of the power electronic device in the MCU to calculate the second estimated junction temperature T B. The results show that the power terminals of the power electronic device are located outside the power electronic device, facilitating on-line temperature measurement, and the heat capacity from the power terminals to the chip is small. That is, by using the temperature of the power terminals, the junction temperature of the chip inside the power electronic device can be measured in a timely and accurate manner, and it is not affected by the fatigue of the solder layer under the chip of the power electronic device. It can be combined with the thermal resistance network method and the temperature-sensitive electrical parameter method to establish a combined model to finally determine the aging state of the IGBT device.

[0168] (3) Junction temperature estimation method based on case temperature: First, obtain the thermal resistance network parameters Z from the chip of the IGBT device to the case of the device through means such as the IGBT device manual or calibration experiment. th_jc , then on-line measure the case temperature (T case ) of the IGBT device and the loss P corresponding to the third estimated junction temperature. Finally, according to the electrothermal model T C = P * Z th_jc + T case estimate the third estimated junction temperature T C .

[0169] Among them, the loss P corresponding to the third estimated junction temperature is calculated according to the device loss model provided in the IGBT device manual and the on-line measured inverter operating point information (including DC voltage, output current, duty cycle, and case temperature T case ).

[0170] According to Figure 10 the schematic diagram of the aging type determination basis shown, it can be found that the actual junction temperature and the measured temperature inside the power electronic device are affected by the aging state and aging degree, but the aging state of the power electronic device can be judged by comparing the estimated first estimated junction temperature T A and the second estimated junction temperature T B , the second estimated junction temperature T B and the third estimated junction temperature T C . When the value of △T1 = T A - T B becomes larger, it indicates that the chip of the power electronic device is aging; when the value of △T1 = T A - T B becomes smaller, it indicates that the bonding wire of the power electronic device is aging; when the value of △T2 = T B - T C becomes larger, it indicates that the solder layer under the chip of the power electronic device is aging.

[0171] In this embodiment, according to the electrical data of the IGBT device in the actual working condition, the junction temperature of the IGBT device is estimated respectively by combining the junction temperature estimation method based on temperature-sensitive electrical parameters, the junction temperature estimation method based on the temperature of the device power terminals, and the junction temperature estimation method based on the case temperature. Through the comparison of the three estimated junction temperatures, the determination of the aging type of the IGBT device is realized.

[0172] For example, the temperature of the IGBT device in a 380V / 7.5kW three-phase frequency converter was experimentally measured. During the experiment, the frequency converter drove a 380V / 3kW permanent magnet synchronous motor to operate at rated load, and an infrared thermal imager was used to simultaneously measure the power terminal and chip temperature of the IGBT device online. To facilitate the measurement of the chip temperature of the IGBT device by the infrared thermal imager, the housing of the IGBT device in phase A of the frequency converter was removed, exposing the internal chip within the measurement range of the infrared thermal imager.

[0173] The curves of the temperature changes of the IGBT device measured experimentally at different positions are as Figure 11 shown. Figure 10 The estimated junction temperature T B was determined using the method provided by the present invention. The experimental results show that the temperature of the IGBT device at different positions gradually increases with the increase in the operating time of the frequency converter. The junction temperature estimated by the present invention is basically consistent with the junction temperature measured by the infrared thermal imager.

[0174] In this specification, each embodiment is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other. For the system disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple, and reference can be made to the description in the method part for relevant parts.

[0175] In this article, specific examples are used to elaborate on the principle and implementation of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention. At the same time, for those of ordinary skill in the art, based on the idea of the present invention, there will be changes in the specific implementation and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. An online monitoring method for the state information of power electronic devices, characterized in that, Including: Based on the junction temperature estimation method using temperature-sensitive electrical parameters, determine the first estimated junction temperature of the power electronic device; The power electronic device includes a chip, a power terminal, and an under-chip solder layer; Based on the junction temperature estimation method using the temperature of the device's power terminal, determine the second estimated junction temperature of the power electronic device; Based on the junction temperature estimation method using the case temperature, determine the third estimated junction temperature of the power electronic device; Based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature, monitor the status information of the power electronic device in real time online; The status information includes that the chip is aging, the chip is not aging, the bonding wire is aging, the bonding wire is not aging, the under-chip solder layer is aging, and the under-chip solder layer is not aging; The step of monitoring the status information of the power electronic device in real time online based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature specifically includes: When the difference between the first estimated junction temperature and the second estimated junction temperature is within the set interval, determine that the status information of the power electronic device is that the chip is not aging and the bonding wire is not aging; When the difference between the first estimated junction temperature and the second estimated junction temperature is greater than the maximum value of the set interval, determine that the status information of the power electronic device is that the chip is aging; When the difference between the first estimated junction temperature and the second estimated junction temperature is less than the minimum value of the set interval, determine that the status information of the power electronic device is that the bonding wire is aging; When the difference between the second estimated junction temperature and the third estimated junction temperature is less than or equal to the set threshold, determine that the status information of the power electronic device is that the under-chip solder layer is not aging; When the difference between the second estimated junction temperature and the third estimated junction temperature is greater than the set threshold, determine that the status information of the power electronic device is that the under-chip solder layer is aging.

2. The online monitoring method for the state information of a power electronic device according to claim 1, characterized in that, The step of determining the first estimated junction temperature of the power electronic device based on the junction temperature estimation method using temperature-sensitive electrical parameters specifically includes: Obtain the temperature-sensitive electrical parameters of the power electronic device; According to the temperature-sensitive characteristic relationship and the temperature-sensitive electrical parameters, online estimate the first estimated junction temperature of the power electronic device; the temperature-sensitive characteristic relationship is the mapping relationship between the temperature-sensitive electrical parameters and the junction temperature.

3. The on-line monitoring method for the state information of a power electronic device according to claim 1, characterized in that, The step of determining the second estimated junction temperature of the power electronic device based on the junction temperature estimation method using the temperature of the device's power terminal specifically includes: Obtain the thermal resistance network parameters from the chip to the power terminal in the power electronic device; Obtain the temperature of the power terminal of the power electronic device; Calculate the loss corresponding to the second estimated junction temperature of the power electronic device; the loss corresponding to the second estimated junction temperature is determined according to the operating working point information of the power electronic device; the power electronic device is installed on the power electronic device; According to the formula T B = P B * Z th_jt + T t Determine the second estimated junction temperature of the power electronic device; Among them, T B represents the second estimated junction temperature, P B represents the loss corresponding to the second estimated junction temperature, T t represents the power terminal temperature, Z th_jt represents the thermal resistance network parameter from the chip to the power terminal.

4. An on-line monitoring method for the state information of a power electronic device according to claim 1, characterized in that, The step of determining the third estimated junction temperature of the power electronic device based on the junction temperature estimation method using the case temperature specifically includes: Obtain the thermal resistance network parameters from the chip to the solder layer in the power electronic device; Obtain the case temperature of the power electronic device; the case temperature is the temperature of the outer shell or the copper base plate of the power electronic device; Calculate the losses corresponding to the third estimated junction temperature of the power electronic device; the losses corresponding to the third estimated junction temperature are determined according to the operating point information of the power electronic device; the power electronic device is installed on the power electronic device; According to the formula T C = P * Z th_jc + T case to determine the third estimated junction temperature of the power electronic device; Among them, T C represents the third estimated junction temperature, P represents the loss corresponding to the third estimated junction temperature, T case represents the case temperature, and Z th_jc represents the thermal resistance network parameter from the chip to the solder layer.

5. An on-line monitoring system for the state information of power electronic devices, characterized in that, Including: The first estimated junction temperature determination module is used to determine the first estimated junction temperature of the power electronic device based on the junction temperature estimation method of temperature-sensitive electrical parameters; The power electronic device includes a chip, a power terminal, and an under-chip solder layer; The second estimated junction temperature determination module is used to determine the second estimated junction temperature of the power electronic device based on the junction temperature estimation method of the device power terminal temperature; The third estimated junction temperature determination module is used to determine the third estimated junction temperature of the power electronic device based on the junction temperature estimation method of the case temperature; The status information monitoring module is used to monitor the status information of the power electronic device in real time and online based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature; The status information includes that the chip is aging, the chip is not aging, the bonding wire is aging, the bonding wire is not aging, the under-chip solder layer is aging, and the under-chip solder layer is not aging; The monitoring of the status information of the power electronic device in real time and online based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature specifically includes: When the difference between the first estimated junction temperature and the second estimated junction temperature is within the set interval, it is determined that the status information of the power electronic device is that the chip is not aging and the bonding wire is not aging; When the difference between the first estimated junction temperature and the second estimated junction temperature is greater than the maximum value of the set interval, it is determined that the status information of the power electronic device is that the chip is aging; When the difference between the first estimated junction temperature and the second estimated junction temperature is less than the minimum value of the set interval, it is determined that the status information of the power electronic device is that the bonding wire is aging; When the difference between the second estimated junction temperature and the third estimated junction temperature is less than or equal to the set threshold, it is determined that the status information of the power electronic device is that the under-chip solder layer is not aging; When the difference between the second estimated junction temperature and the third estimated junction temperature is greater than the set threshold, it is determined that the status information of the power electronic device is that the under-chip solder layer is aging.

6. The on-line monitoring system for the state information of a power electronic device according to claim 5, wherein The first estimated junction temperature determination module specifically includes: The temperature-sensitive electrical parameter acquisition unit is used to acquire the temperature-sensitive electrical parameters of the power electronic device; The first estimated junction temperature determination unit is used to estimate the first estimated junction temperature of the power electronic device online according to the temperature-sensitive characteristic relationship and the temperature-sensitive electrical parameters; the temperature-sensitive characteristic relationship is the mapping relationship between the temperature-sensitive electrical parameters and the junction temperature.

7. An on-line monitoring system for the state information of a power electronic device according to claim 5, characterized in that, The second estimated junction temperature determination module specifically includes: The thermal resistance network parameter acquisition unit is used to acquire the thermal resistance network parameters from the chip to the power terminal in the power electronic device; The power terminal temperature acquisition unit is used to acquire the power terminal temperature of the power electronic device; A loss calculation unit corresponding to the second estimated junction temperature, which is used to calculate the loss of the power electronic device corresponding to the second estimated junction temperature; the loss corresponding to the second estimated junction temperature is determined according to the operating point information of the power electronic device; the power electronic device is installed on the power electronic device; The second estimated junction temperature determination unit is configured to determine the second estimated junction temperature of the power electronic device according to the formula T B = P B * Z th_jt + T t ; Among them, T B represents the second estimated junction temperature, P B represents the loss corresponding to the second estimated junction temperature, T t represents the power terminal temperature, Z th_jt represents the thermal resistance network parameter from the chip to the power terminal.

8. An on-line monitoring system for the state information of a power electronic device according to claim 5, characterized in that, The third estimated junction temperature determination module specifically includes: A thermal resistance network parameter acquisition unit, which is used to acquire the thermal resistance network parameters from the chip to the solder layer in the power electronic device; A case temperature acquisition module, which is used to acquire the case temperature of the power electronic device; the case temperature is the temperature of the outer shell or the copper base plate of the power electronic device; A loss calculation unit corresponding to the third estimated junction temperature, which is used to calculate the loss of the power electronic device corresponding to the third estimated junction temperature; the loss corresponding to the third estimated junction temperature is determined according to the operating point information of the power electronic device; the power electronic device is installed on the power electronic device; The third estimated junction temperature determination unit is configured to determine the third estimated junction temperature of the power electronic device according to the formula T C = P * Z th_jc + T case ; Among them, T C represents the third estimated junction temperature, P represents the loss corresponding to the third estimated junction temperature, T case represents the case temperature, and Z th_jc represents the thermal resistance network parameter from the chip to the solder layer.

9. An on-line monitoring system for the state information of a power electronic device according to claim 5, characterized in that, The status information monitoring module specifically includes: A chip non-aging and bond wire non-aging determination unit, which is used to determine that the status information of the power electronic device is that the chip has not aged and the bond wire has not aged when the difference between the first estimated junction temperature and the second estimated junction temperature is within a set interval; A chip aging determination unit, which is used to determine that the status information of the power electronic device is that the chip has aged when the difference between the first estimated junction temperature and the second estimated junction temperature is greater than the maximum value of the set interval; A bond wire aging determination unit, which is used to determine that the status information of the power electronic device is that the bond wire has aged when the difference between the first estimated junction temperature and the second estimated junction temperature is less than the minimum value of the set interval; A chip under-solder layer non-aging determination unit, which is used to determine that the status information of the power electronic device is that the chip under-solder layer has not aged when the difference between the second estimated junction temperature and the third estimated junction temperature is less than or equal to a set threshold; A chip under-solder layer aging determination unit, which is used to determine that the status information of the power electronic device is that the chip under-solder layer has aged when the difference between the second estimated junction temperature and the third estimated junction temperature is greater than the set threshold.

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