Clamp voltage selectable multi-step schottky contact SiC-TVS device and preparation method

Abstract

The application relates to a multi-step Schottky contact SiC-TVS device with optional clamping voltage and a preparation method, which comprises: a silicon carbide substrate layer, the silicon carbide substrate layer having a first upper surface and a second upper surface; a silicon carbide epitaxial layer, the silicon carbide epitaxial layer being located on the silicon carbide substrate layer, and an n-step terrace structure being formed on one end edge of the upper surface of the silicon carbide epitaxial layer; a plurality of negative electrodes, the plurality of negative electrodes being respectively located above the water flat surface on the silicon carbide epitaxial layer; a positive electrode, the positive electrode being located on the lower surface of the silicon carbide substrate layer; the silicon carbide epitaxial layer is lightly doped, and the conductive type of the silicon carbide substrate layer is opposite to that of the silicon carbide epitaxial layer. The application utilizes the material characteristic advantages of SiC and the terrace etching terminal principle, constructs a multi-step inclined angle terrace structure with a Schottky contact upper electrode, avoids the occurrence of electric field concentration at the edges of the device, and makes the avalanche breakdown occur at the PN junction inside the device. Moreover, a wider range of clamping voltage selection on a single tube TVS chip is realized.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of microelectronics, and particularly relates to a multi-step Schottky contact SiC-TVS device with selectable clamping voltage and a preparation method. BACKGROUND

[0002] Lightning, electromagnetic pulse and other transient high-energy surge impacts can cause electronic components and downstream electronic systems to fail or even be damaged. Transient voltage suppressor (TVS) has the advantages of high power absorption, fast response speed and stable clamping voltage, and can effectively protect the damage of abnormal high-energy surge impact on devices and circuit systems. Usually, it is connected in parallel to the working circuit at both ends. When a transient surge impact occurs, the TVS will be turned on in a short time and absorb the surge power, clamping the terminal voltage to a preset value, thereby ensuring that the electronic components / systems are not damaged by overvoltage or overcurrent impact.

[0003] Silicon carbide (SiC) material has superior material physical properties. Compared with traditional Si-based TVS devices, the SiC-TVS devices prepared therefrom have the following advantages: 1) the wide band gap feature makes SiC have extremely low intrinsic carrier concentration, so the leakage current of SiC-TVS is much smaller than that of Si-TVS, thereby further bringing excellent blocking characteristics, rigid clamping effect and high temperature resistance advantages; 2) the high critical breakdown field makes the SiC-TVS have a smaller drift region thickness under the same voltage resistance, thereby reducing the on-resistance and improving the response speed; 3) the high thermal conductivity ensures that the SiC-TVS can dissipate heat faster at high temperatures, improving reliability; 4) compared with the series-parallel component form commonly used in Si-TVS, the SiC-TVS can obtain the same current or voltage as the Si-TVS series-parallel component using a single core, thereby saving system size. Therefore, SiC-TVS is getting more and more attention in the field of extreme complex working environments such as high temperature, strong electromagnetic interference and the like.

[0004] Usually, when the working voltage of the circuit system is determined, a precise clamping voltage value is obtained; if the working voltage of the circuit system needs to be changed according to some external conditions (such as working temperature, frequency and the like), the clamping voltage also needs to be adjusted and changed accordingly, at which time multiple TVSs are needed to build a protection circuit topology. This will undoubtedly increase the size of the entire system and increase the power consumption. SUMMARY

[0005] In order to solve the above problems in the prior art, the application provides a multi-step Schottky contact SiC-TVS device with selectable clamping voltage and a preparation method. The technical problems to be solved by the application are solved by the following technical solutions.

[0006] One embodiment of the present application provides a multi-step Schottky contact SiC-TVS device with optional clamping voltage, which comprises:

[0007] a silicon carbide substrate layer having a first upper surface and a second upper surface, the first upper surface being above the second upper surface, a first bevel angle sidewall surface between the first upper surface and the second upper surface forming an acute angle θ with the second upper surface;

[0008] a silicon carbide epitaxial layer on the silicon carbide substrate layer, a n-step step structure being formed on an end edge of an upper surface of the silicon carbide epitaxial layer, each step structure comprising a second bevel angle sidewall surface and a horizontal surface, the second bevel angle sidewall surface forming an acute angle θ with the horizontal surface, and the second bevel angle sidewall surface of the n-step step structure closest to the silicon carbide substrate layer having continuity with the first bevel angle sidewall surface, n≥1, wherein when n≥2, the etching depth of the k-step step structure is h k -h k-1 , h k is the vertical distance between the horizontal surface of the k-step step structure and the upper surface of the silicon carbide substrate layer, h k-1 is the vertical distance between the horizontal surface of the k-1-step step structure and the upper surface of the silicon carbide substrate layer, 1≤k≤n;

[0009] a plurality of negative electrodes on the horizontal surfaces of the silicon carbide epitaxial layer;

[0010] a positive electrode on the lower surface of the silicon carbide substrate layer;

[0011] wherein the silicon carbide epitaxial layer is lightly doped, and the conductivity type of the silicon carbide substrate layer is opposite to that of the silicon carbide epitaxial layer.

[0012] In one embodiment of the present application, if the conductivity type of the silicon carbide substrate layer is N-type, the conductivity type of the silicon carbide epitaxial layer is P-type, and if the conductivity type of the silicon carbide substrate layer is P-type, the conductivity type of the silicon carbide epitaxial layer is N-type.

[0013] In one embodiment of the present application, the doping concentration of the silicon carbide epitaxial layer ranges from 1×10 15 to 1×10 17 cm -3 -3.

[0014] In one embodiment of the present application, the θ ranges from 5° to 80°.

[0015] In one embodiment of the present application, the θ is in the range of 10° to 45°.

[0016] In one embodiment of the present application, the etching depth of the silicon carbide substrate layer is 0.5 to 2 μm.

[0017] In one embodiment of the present application, the negative electrode forms a Schottky contact with the surface of the silicon carbide epitaxial layer.

[0018] In one embodiment of the present application, the material of the negative electrode is one of Ni, Ti, Al, and Ag or a composite layer composed of multiple kinds of Ni, Ti, Al, and Ag.

[0019] One embodiment of the present application also provides a preparation method of the multi-step Schottky contact SiC-TVS device with selectable clamping voltage, for preparing the multi-step Schottky contact SiC-TVS device of any of the above embodiments, when n≥2, the preparation method comprises:

[0020] Step 1, selecting a silicon carbide substrate layer;

[0021] Step 2, epitaxially growing a silicon carbide epitaxial layer on the silicon carbide substrate layer;

[0022] Step 3, depositing a SiO2 layer on the surface of the silicon carbide epitaxial layer;

[0023] Step 4, coating and photoetching on the surface of the SiO2 layer, and performing exposure, development, post-baking, and UV solidification to form a photoresist etching mask;

[0024] Step 5, etching the SiO2 layer by using ICP or RIE plasma dry etching technology to form a SiO2 etching mask;

[0025] Step 6, removing the photoresist;

[0026] Step 7, etching the silicon carbide epitaxial layer by using ICP or RIE plasma dry etching technology to form a first step structure with a second inclined angle sidewall surface and a flat surface;

[0027] Step 8, removing the SiO2 etching mask and cleaning the wafer;

[0028] Step 9, re-depositing a SiO2 layer on the surface of the silicon carbide epitaxial layer;

[0029] Step 10, coating and photoetching on the surface of the SiO2 layer, and performing exposure, development, post-baking, and UV solidification to form a photoresist etching mask;

[0030] Step 11, etching the SiO2 layer by using ICP or RIE plasma dry etching technology to form a SiO2 etching mask;

[0031] Step 12, removing photoresist;

[0032] Step 13, etching the silicon carbide epitaxial layer by ICP or RIE plasma dry etching technology to form a second level step structure with a second inclined side wall and a water flat surface;

[0033] Step 14, removing the SiO2 etching mask and cleaning to form a photo chip;

[0034] Step 15, repeating steps 9 to 14 to form an n-level step structure;

[0035] Step 16, depositing a SiO2 layer on the surface of the silicon carbide epitaxial layer;

[0036] Step 17, coating photoresist on the surface of the SiO2 layer, and forming a photoresist etching mask through exposure, development, post-baking and UV solidification;

[0037] Step 18, etching the SiO2 layer by ICP or RIE plasma dry etching technology to form a SiO2 etching mask;

[0038] Step 19, removing the photoresist;

[0039] Step 20, etching the silicon carbide epitaxial layer and the silicon carbide substrate layer by ICP or RIE plasma dry etching technology to form a second upper surface lower than a first upper surface in the silicon carbide substrate layer, and the first inclined side wall between the first upper surface and the second upper surface and the second inclined side wall have continuity;

[0040] Step 21, removing the SiO2 etching mask and cleaning to form a photo chip;

[0041] Step 22, forming a positive electrode on the back surface of the silicon carbide substrate layer;

[0042] Step 23, forming a negative electrode with a Schottky contact on the surface of each water flat surface of the silicon carbide epitaxial layer.

[0043] Compared with the prior art, the present application has the following beneficial effects:

[0044] The present application utilizes the material characteristics advantage of SiC and the mesa etching terminal principle, and constructs a multi-level inclined mesa structure with a Schottky contact upper electrode, avoids the occurrence of electric field concentration at the edge of the device, and makes the avalanche breakdown occur at the PN junction inside the device. The multi-level Schottky contact electrode corresponds to different drift region thicknesses, thereby realizing wider range of clamping voltage selection on a single tube TVS chip, and solving the problems of system size increase and power consumption increase caused by the need for multiple TVS devices to protect the circuit system due to the change of working voltage. BRIEF DESCRIPTION OF DRAWINGS

[0045] Figure 1 A structure schematic diagram of a clamping voltage selectable multi-step Schottky contact SiC-TVS device provided by the present application;

[0046] Figure 2 A structure schematic diagram of a clamping voltage selectable one-step Schottky contact SiC-TVS device provided by the present application;

[0047] Figure 3 Another structure schematic diagram of a clamping voltage selectable multi-step Schottky contact SiC-TVS device provided by the present application;

[0048] Figure 4 Still another structure schematic diagram of a clamping voltage selectable multi-step Schottky contact SiC-TVS device provided by the present application;

[0049] Figure 5 A structure schematic diagram of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application;

[0050] Figure 6 A clamping characteristic curve diagram of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application;

[0051] Figure 7 A two-dimensional breakdown electric field distribution diagram and a lateral electric field distribution curve diagram along the PN junction boundary of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application when the first negative electrode is turned on;

[0052] Figure 8 An avalanche breakdown path diagram of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application when the first negative electrode is turned on;

[0053] Figure 9 A two-dimensional breakdown electric field distribution diagram and a lateral electric field distribution curve diagram along the PN junction boundary of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application when the fourth negative electrode is turned on;

[0054] Figure 10 An avalanche breakdown path diagram of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application when the fourth negative electrode is turned on;

[0055] Figure 11 A preparation process flow diagram of a clamping voltage selectable multi-step Schottky contact SiC-TVS device provided by the present application. DETAILED DESCRIPTION

[0056] The application will be described in further detail below with reference to specific embodiments, but the embodiments of the application are not limited thereto.

[0057] It should be noted that the "upper", "lower", "left", "right" mentioned in the embodiment are the positional relationship of the SiC-TVS device in the illustrated state, "long" is the lateral dimension of the SiC-TVS device in the illustrated state, and "deep" is the longitudinal dimension of the SiC-TVS device in the illustrated state.

[0058] Embodiment one

[0059] Please refer to Figure 1 and Figure 2 , Figure 1 The structure diagram of a clamping voltage selectable multi-step Schottky contact SiC-TVS device provided by the embodiment of the application, Figure 2 The structure diagram of a clamping voltage selectable one-step Schottky contact SiC-TVS device provided by the application. The embodiment of the application provides a clamping voltage selectable multi-step Schottky contact SiC-TVS device, which comprises:

[0060] A silicon carbide substrate layer 101, the silicon carbide substrate layer 101 has a first upper surface 1011 and a second upper surface 1012, and the first upper surface 1011 is located above the second upper surface 1012, and the first inclined side wall surface 1013 between the first upper surface 1011 and the second upper surface 1012 forms an acute angle θ with the second upper surface 1012;

[0061] A silicon carbide epitaxial layer 102, the silicon carbide epitaxial layer 102 is located above the silicon carbide substrate layer 101, and an n-step structure is formed on an end edge of the upper surface of the silicon carbide epitaxial layer 102, each step structure comprises a second inclined side wall surface 103 and a horizontal surface 104, the second inclined side wall surface 103 and the horizontal surface 104 form an acute angle θ, and the second inclined side wall surface 103 of the n-step structure closest to the silicon carbide substrate layer 101 has continuity with the first inclined side wall surface 1013, n≥1, wherein, when n=1, please refer to Figure 2 , only one step, that is, only one silicon carbide epitaxial layer 102 comprising a second inclined side wall surface 103 and a horizontal surface 104 is arranged on the first upper surface 1011 of the silicon carbide substrate layer 101, and a negative electrode 105 is directly arranged on the horizontal surface 104 of the silicon carbide substrate layer 101, and when n≥2, as shown in Figure 1 , a plurality of horizontal surfaces 104 are arranged, and the etching depth of the k-step structure is h k –h k-1 , h kh is the vertical distance between the horizontal platform surface 104 of the k-th step structure and the upper surface of the silicon carbide substrate layer 101. k-1 is the vertical distance between the platform surface 104 of the (k-1)th step structure and the upper surface of the silicon carbide substrate layer 101, 1≤k≤n;

[0062] A plurality of negative electrodes 105 are located on a plurality of horizontal platform surfaces 104 on the silicon carbide epitaxial layer 102.

[0063] Positive electrode 106, the positive electrode is located on the lower surface of silicon carbide substrate layer 101;

[0064] In this process, the silicon carbide substrate 101 is heavily doped and the silicon carbide epitaxial layer 102 is lightly doped, which can generate a concentration abrupt junction, which is conducive to the depletion of the space charge region and thus achieves avalanche breakdown. The conductivity type of the silicon carbide substrate 101 is opposite to that of the silicon carbide epitaxial layer 102, so a reverse bias PN junction can be formed by applying an external voltage.

[0065] Furthermore, such as Figure 3 As shown, if the conductivity type of the silicon carbide substrate 101 is N-type, then the conductivity type of the silicon carbide epitaxial layer 102 is P-type, such as... Figure 4 As shown, if the conductivity type of the silicon carbide substrate 101 is P-type, then the conductivity type of the silicon carbide epitaxial layer 102 is N-type.

[0066] Furthermore, a Schottky contact is formed between the negative electrode and the surface of the silicon carbide epitaxial layer.

[0067] Specifically, the etching depth corresponding to the step structure determines the epitaxial layer thickness of each step structure, and different epitaxial layer thicknesses depend on the different clamping voltage level designs included in the device.

[0068] For applications where the operating voltage of the circuit system needs to be dynamically adjusted, a multi-stage Schottky contact SiC-TVS device structure with selectable clamping voltage is proposed. Utilizing the material properties of SiC and the mesa etching termination principle, a multi-stage beveled mesa structure with Schottky contacts as the upper electrode is constructed to avoid electric field concentration at the device edges, thus preventing avalanche breakdown at the PN junction inside the device. The multi-stage Schottky contact electrodes correspond to different drift region thicknesses (i.e., the thickness of the silicon carbide epitaxial layer), thereby achieving a wider range of clamping voltage selection on a single TVS chip. This solves the problems of increased system size and power consumption caused by the need for multiple TVS devices to protect the circuit system due to changes in operating voltage.

[0069] Optionally, the doping concentration of the silicon carbide epitaxial layer is in the range of 1×10⁻⁶. 15 ~1×10 17 cm -3 .

[0070] Optionally, the acute angle θ is in the range of 5° to 80°.

[0071] Preferably, the acute angle θ is in the range of 10° to 45°. When θ is in the range of 10° to 45°, the problem of electric field concentration at the PN junction at the side wall surface is more effectively alleviated.

[0072] Optionally, the etching depth of the silicon carbide substrate layer is in the range of 0.5 to 2 μm. The etching depth range of the silicon carbide substrate layer is firstly advantageous to form a positive tilt angle etching termination at the PN junction surface, thereby being advantageous to alleviate the problem of electric field concentration. Secondly, the depth of etching into the substrate is kept shallow and moderate, which is advantageous to reduce the difficulty of the etching process.

[0073] Optionally, the material of the negative electrode is one of Ni, Ti, Al and Ag or a composite layer composed of multiple of Ni, Ti, Al and Ag.

[0074] In the formula, N+ represents a heavily doped N-type region, N- represents a lightly doped N-type region, P+ represents a heavily doped P-type region, and P- represents a lightly doped P-type region.

[0075] For the scenario application that the working voltage of the circuit system needs to be dynamically adjusted, the application provides a multi-step Schottky contact SiC-TVS device structure with selectable clamping voltages, which utilizes the material characteristic advantages of SiC and is used to solve the problems of size increase and power consumption increase caused by parallel connection of multiple TVS single tube devices in the circuit system.

[0076] The application adopts dry etching to form multiple electrode steps, utilizes the difference in the thickness of the effective silicon carbide epitaxial layer drift region corresponding to each step to realize different breakdown voltages and clamping voltages, that is, the integration of multiple clamping voltage gears on a single tube TVS chip is realized; by changing a single structure parameter (such as the concentration of the silicon carbide epitaxial layer) of the silicon carbide epitaxial layer, the overall selection range of the preset value of the clamping voltage can also be adjusted, which has good design convenience.

[0077] The electrode on the step can be formed in the manner of directly depositing metal. Since the epitaxial layer is a lightly doped SiC layer, the electrode on the step at the upper end of the SiC-TVS is of the Schottky contact type, which avoids the difficulty of preparing a P-type ohmic contact required by the conventional SiC-TVS.

[0078] The application incorporates a positive tilt angle mesa etching termination structure and controls the etching angle, so that the avalanche breakdown of the device occurs at the PN junction inside the device, which avoids the risk of high electric field concentration at the Schottky contact interface and the edge of the device step sidewall, and improves the voltage endurance reliability of the SiC-TVS.

[0079] Embodiment two

[0080] Please refer to Figure 5 、 Figure 6 、 Figure 7 、 Figure 8 、 Figure 9 and Figure 10 . Figure 5 A schematic diagram of a clamping voltage selectable four-step Schottky contact SiC-TVS device structure provided by the present application, Figure 6 A clamping characteristic curve diagram of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application, Figure 7 A two-dimensional breakdown electric field distribution diagram and a lateral electric field distribution curve diagram along the PN junction boundary of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application when the first negative electrode is turned on, Figure 8 An avalanche breakdown path diagram of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application when the first negative electrode is turned on, Figure 9 A two-dimensional breakdown electric field distribution diagram and a lateral electric field distribution curve diagram along the PN junction boundary of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application when the fourth negative electrode is turned on, Figure 10 An avalanche breakdown path diagram of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application when the fourth negative electrode is turned on.

[0081] An embodiment of a clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the present application, as shown in Figure 5 , the device structure of the embodiment comprises:

[0082] A silicon carbide substrate layer 101, the thickness of the silicon carbide substrate layer 101 is 350 μm, the doping type is N type, and the doping concentration is 5×10 18 cm -3 The width of the second upper surface 1012 is 10 μm, the acute angle θ formed by the first inclined side wall surface 1013 and the second upper surface 1012 is 45°, and the etching depth of the silicon carbide substrate layer 101 is 0.5 μm.

[0083] A silicon carbide epitaxial layer 102, the thickness of the silicon carbide epitaxial layer 102 is 2.5 μm, the doping type is P type, and the doping concentration is 6×10 16 cm -3Based on the etching angle in the silicon carbide substrate layer 101, the N+ / P- junction between the silicon carbide substrate layer 101 and the silicon carbide epitaxial layer 102 forms a positive inclined angle etching terminal structure at the side wall edge. The silicon carbide epitaxial layer 102 is formed by dry etching to form four steps, the second inclined side wall surface 103 at each step forms an acute angle θ of 45° with the horizontal surface 104, the width of the horizontal surface 104 is 10 μm, and the thickness of the epitaxial layer corresponding to each step is h1=2.5 μm, h2=2.0 μm, h3=1.5 μm, and h4=1.0 μm.

[0084] Based on the basic structure of the clamping voltage selectable four-step Schottky contact SiC-TVS device of the embodiment, simulation verification is performed by using sentaurus TCAD software. The signal source used in dynamic characteristic simulation is a 10 / 1000 μs pulse signal with a peak voltage of 1000 V.

[0085] Please refer to Figure 6 , Figure 6 The clamping characteristic curve of the clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the embodiment of the application is shown in the figure. It can be seen that the clamping voltage of 425 V can be achieved by connecting the first negative electrode Cathode1, the clamping voltage of 399 V can be achieved by connecting the second negative electrode Cathode2, the clamping voltage of 308 V can be achieved by connecting the third negative electrode Cathode3, and the clamping voltage of 230 V can be achieved by connecting the fourth negative electrode Cathode4, thereby achieving the effect of integrating multiple clamping voltage grades on a single tube TVS chip.

[0086] Please refer to Figure 7 , Figure 7 The two-dimensional breakdown electric field distribution graph and the lateral electric field distribution curve along the PN junction boundary of the clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the embodiment of the application when the first negative electrode is connected are shown in the figure. It can be seen that the electric field value of the PN junction at the step side wall edge is 0.8 MV / cm, and the electric field value of the Schottky contact interface is 0.56 MV / cm, both of which are much smaller than the maximum peak electric field value 3.05 MV / cm at the PN junction inside the device. The clamping voltage selectable four-step Schottky contact SiC-TVS device provided by the embodiment of the application avoids the high electric field concentration at the electrode contact interface and the step side wall edge of the device through the preparation of the positive inclined angle mesa etching terminal structure at the PN junction edge and the design and setting of the Schottky contact at the mesa, so that the avalanche breakdown of the device occurs at the PN junction inside the device, thereby improving the voltage resistance reliability of the SiC-TVS.

[0087] Please refer to Figure 8 , Figure 8The avalanche breakdown path graph of the four-step optional clamping voltage Schottky contact SiC-TVS device provided by the embodiment of the present application when the first negative electrode is connected can be seen, the avalanche breakdown path is located in the epitaxial layer between the PN junction in the device and the first negative electrode, far away from the step sidewall edge of the device.

[0088] Please refer to Figure 9 , Figure 9 The two-dimensional breakdown electric field distribution graph and the lateral electric field distribution curve along the PN junction boundary of the four-step optional clamping voltage Schottky contact SiC-TVS device provided by the embodiment of the present application when the fourth negative electrode is connected can be seen, the electric field value of the PN junction at the step sidewall edge is 0.88 MV / cm, and the electric field value of the Schottky contact interface is 1.22 MV / cm, both of which are far less than the maximum peak electric field value 2.9 MV / cm at the PN junction in the device. The four-step optional clamping voltage Schottky contact SiC-TVS device provided by the embodiment of the present application avoids the high electric field concentration of the electrode contact interface and the step sidewall edge of the device through the preparation of the PN junction edge positive inclined angle mesa etching terminal structure and the design and setting of the mesa Schottky contact, so that the avalanche breakdown of the device occurs at the PN junction in the device, and the voltage reliability of the SiC-TVS is improved.

[0089] Please refer to Figure 10 , Figure 10 The avalanche breakdown path graph of the four-step optional clamping voltage Schottky contact SiC-TVS device provided by the embodiment of the present application when the fourth negative electrode is connected can be seen, the avalanche breakdown path is located in the epitaxial layer between the PN junction in the device and the fourth negative electrode, far away from the step sidewall edge of the device.

[0090] Embodiment three

[0091] Please refer to Figure 11 , Figure 11 The preparation process flow chart of the four-step optional clamping voltage Schottky contact SiC-TVS device provided by the embodiment of the present application is as follows:

[0092] (a), select a silicon carbide substrate layer 101.

[0093] (b), epitaxially grow a silicon carbide epitaxial layer 102 on the silicon carbide substrate layer 101.

[0094] Specifically, a P-epi layer is epitaxially grown on the silicon carbide substrate layer 101 to form the silicon carbide epitaxial layer 102.

[0095] (c), deposit a SiO2 layer on the surface of the silicon carbide epitaxial layer.

[0096] Specifically, a SiO2 layer with a thickness of 1-2 μm is deposited on the surface of the silicon carbide epitaxial layer 102 by PECVD (Plasma Enhanced Chemical Vapor Deposition).

[0097] (d) Glue photoetching is performed on the surface of the SiO2 layer, and then exposure, development, post-baking and UV curing are performed to form a photoresist (PR) etching mask.

[0098] (e) ICP (Inductive Coupled Plasma Emission Spectrometer) or RIE (Reactive ion etching) plasma dry etching technology is used to etch the SiO2 layer to form a SiO2 etching mask.

[0099] (f) The photoresist is removed.

[0100] (g) ICP or RIE plasma dry etching technology is used to etch the silicon carbide epitaxial layer 102 to form a first-stage stepped structure that meets the etching depth requirement and the sidewall angle θ requirement, and the first-stage stepped structure includes a second inclined sidewall surface 103 and a horizontal surface 104.

[0101] (h) The SiO2 etching mask is removed, and the wafer is cleaned.

[0102] (i) A SiO2 layer is deposited again on the surface of the silicon carbide epitaxial layer.

[0103] (j) Glue photoetching is performed on the surface of the SiO2 layer, and then exposure, development, post-baking and UV curing are performed to form a photoresist etching mask.

[0104] (k) ICP or RIE plasma dry etching technology is used to etch the SiO2 layer to form a SiO2 etching mask.

[0105] (l) The photoresist is removed.

[0106] (m) ICP or RIE plasma dry etching technology is used to etch the silicon carbide epitaxial layer 102 to form a second-stage stepped structure that meets the etching depth requirement and the sidewall angle θ requirement, and the second-stage stepped structure includes a second inclined sidewall surface 103 and a horizontal surface 104.

[0107] (n) The SiO2 etching mask is removed, and the wafer is cleaned.

[0108] (o) Steps i to n are repeated to form an n-stage stepped structure with an inclined angle.

[0109] (p) depositing a SiO2 layer on the surface of the silicon carbide epitaxial layer 102 by PECVD, with a thickness of 2-4 μm.

[0110] (q) coating the surface of the SiO2 layer with photoresist, and performing exposure, development, post-baking and UV curing to form a photoresist etching mask.

[0111] (r) etching the SiO2 layer by ICP or RIE plasma dry etching technology to form a SiO2 etching mask.

[0112] (s) removing the photoresist.

[0113] (t) etching the silicon carbide epitaxial layer 102 and the silicon carbide substrate layer 101 by ICP or RIE plasma dry etching technology to form a second upper surface 1012 lower than the first upper surface 1011 in the silicon carbide substrate layer 101, and the first inclined angle sidewall surface 1013 and the second inclined angle sidewall surface 103 between the first upper surface 1011 and the second upper surface 1012 have continuity, thereby forming an isolation mesa of the SiC-TVS device.

[0114] (u) removing the SiO2 etching mask and cleaning the wafer.

[0115] (v) forming a positive electrode on the back surface of the silicon carbide substrate layer 101.

[0116] Specifically, depositing 200 nm of metal Ni on the back surface of the silicon carbide substrate layer 101, and annealing at 1000°C for 2 min to form an ohmic contact positive electrode of the multi-step Schottky contact SiC-TVS device with optional clamping voltage.

[0117] (w) forming a Schottky contact negative electrode on the surface of each level terrace surface of the silicon carbide epitaxial layer 102.

[0118] Specifically, depositing a composite layer of one or more of Ni, Ti, Al and Ag on the surface of each level terrace surface 104 in the silicon carbide epitaxial layer 102 to form a plurality of Schottky contact negative electrodes of the multi-step Schottky contact SiC-TVS device with optional clamping voltage, thereby completing the multi-step Schottky contact SiC-TVS device.

[0119] In the description of the present application, the terms "first" and "second" are used only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first" and "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited.

[0120] In the description of the specification, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" etc. means that the specific features, structures, materials or specific data points described in connection with the embodiment or example are contained in at least one embodiment or example of the present application. In the specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or specific data points described can be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate different embodiments or examples described in the specification.

[0121] The above is a further detailed description of the present application in combination with specific preferred embodiments, and cannot be considered as limiting the specific implementation of the present application to these descriptions. For those skilled in the art, without departing from the concept of the present application, a number of simple deductions or substitutions can be made, which should be considered as falling within the protection scope of the present application.

Claims

1. A multi-step Schottky contact SiC-TVS device with selectable clamping voltage, characterized in that, The multi-step Schottky contact SiC-TVS device includes: A silicon carbide substrate layer having a first upper surface and a second upper surface, wherein the first upper surface is located above the second upper surface, and the acute angle formed by the first oblique sidewall between the first upper surface and the second upper surface and the second upper surface is θ; A silicon carbide epitaxial layer is located on a silicon carbide substrate. An n-level step structure is formed at one end edge of the upper surface of the silicon carbide epitaxial layer. Each step structure includes a second oblique sidewall and a horizontal platform. The acute angle formed by the second oblique sidewall and the horizontal platform is θ. The second oblique sidewall of the nth step structure closest to the silicon carbide substrate is continuous with the first oblique sidewall, where n ≥ 1. When n ≥ 2, the etching depth corresponding to the kth step structure is h. k -h k-1 h k h is the vertical distance between the horizontal platform surface of the k-th step structure and the upper surface of the silicon carbide substrate. k-1 is the vertical distance between the horizontal platform surface of the (k-1)th step structure and the upper surface of the silicon carbide substrate, 1≤k≤n; A plurality of negative electrodes, wherein the plurality of negative electrodes are respectively located on a plurality of horizontal platform surfaces on the silicon carbide epitaxial layer; A positive electrode, wherein the positive electrode is located on the lower surface of a silicon carbide substrate; The silicon carbide epitaxial layer is lightly doped, and the conductivity type of the silicon carbide substrate is opposite to that of the silicon carbide epitaxial layer.

2. The multi-step Schottky contact SiC-TVS device with selectable clamping voltage according to claim 1, characterized in that, If the conductivity type of the silicon carbide substrate is N-type, then the conductivity type of the silicon carbide epitaxial layer is P-type; if the conductivity type of the silicon carbide substrate is P-type, then the conductivity type of the silicon carbide epitaxial layer is N-type.

3. The multi-step Schottky contact SiC-TVS device with selectable clamping voltage according to claim 1, characterized in that, The doping concentration range of the silicon carbide epitaxial layer is 1×10⁻⁶. 15 ~1×10 17 cm -3 .

4. The multi-step Schottky contact SiC-TVS device with selectable clamping voltage according to claim 1, characterized in that, The range of θ is 5° to 80°.

5. The multi-step Schottky contact SiC-TVS device with selectable clamping voltage according to claim 4, characterized in that, The range of θ is 10° to 45°.

6. The multi-step Schottky contact SiC-TVS device with selectable clamping voltage according to claim 1, characterized in that, The etching depth of the silicon carbide substrate is 0.5–2 μm.

7. The multi-step Schottky contact SiC-TVS device with selectable clamping voltage according to claim 1, characterized in that, The negative electrode forms a Schottky contact with the surface of the silicon carbide epitaxial layer.

8. The multi-step Schottky contact SiC-TVS device with selectable clamping voltage according to claim 1, characterized in that, The negative electrode is made of one of Ni, Ti, Al, and Ag, or a composite layer composed of multiple of Ni, Ti, Al, and Ag.

9. A method for fabricating a multi-step Schottky contact SiC-TVS device with selectable clamping voltage, characterized in that, For fabricating the multi-step Schottky contact SiC-TVS device according to any one of claims 1 to 8, when n≥2, the fabrication method includes: Step 1: Select a silicon carbide substrate; Step 2: Epitaxially grow a silicon carbide epitaxial layer on the silicon carbide substrate; Step 3: Deposit a SiO2 layer on the surface of the silicon carbide epitaxial layer; Step 4: Photolithography is performed on the surface of the SiO2 layer, followed by exposure, development, post-baking, and UV curing to form a photoresist etching mask; Step 5: Etch the SiO2 layer using ICP or RIE plasma dry etching technology to form a SiO2 etching mask; Step 6: Remove the photoresist; Step 7: Etch the silicon carbide epitaxial layer using ICP or RIE plasma dry etching technology to form a first-level step structure with a second oblique sidewall and a horizontal platform surface; Step 8: Remove the SiO2 etching mask and clean the wafer to form a smooth surface; Step 9: Redeposit a SiO2 layer on the surface of the silicon carbide epitaxial layer; Step 10: Photolithography is performed on the surface of the SiO2 layer, followed by exposure, development, post-baking, and UV curing to form a photoresist etching mask; Step 11: Etch the SiO2 layer using ICP or RIE plasma dry etching technology to form a SiO2 etching mask; Step 12: Remove the photoresist; Step 13: Etch the silicon carbide epitaxial layer using ICP or RIE plasma dry etching technology to form a second-level stepped structure with a second oblique sidewall and a horizontal platform. Step 14: Remove the SiO2 etching mask and clean the wafer to form a smooth surface; Step 15: Repeat steps 9 to 14 to form an n-level step structure; Step 16: Deposit a SiO2 layer on the surface of the silicon carbide epitaxial layer; Step 17: Photolithography is performed on the surface of the SiO2 layer, followed by exposure, development, post-baking, and UV curing to form a photoresist etching mask; Step 18: Etch the SiO2 layer using ICP or RIE plasma dry etching technology to form a SiO2 etching mask; Step 19: Remove the photoresist; Step 20: Etch the silicon carbide epitaxial layer and the silicon carbide substrate layer using ICP or RIE plasma dry etching technology to form a second upper surface on the silicon carbide substrate layer that is lower than the first upper surface, and the first beveled sidewall and the second beveled sidewall between the first upper surface and the second upper surface are continuous. Step 21: Remove the SiO2 etching mask and clean the wafer to form a smooth surface; Step 22: Form a positive electrode on the back side of the silicon carbide substrate; Step 23: Form a Schottky contact negative electrode on the surface of each level of the silicon carbide epitaxial layer.

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