A circuit manufacturing method for a circuit board and a circuit board

Abstract

The application discloses a circuit manufacturing method of a circuit board and the circuit board. The circuit manufacturing method of the circuit board comprises the following steps: S1, drilling a substrate with conductive layers on both a first surface and a second surface; S2, performing first copper plating on the substrate to cover the conductive layers on the first surface and the second surface and the hole wall with a copper plating layer; S3, pasting dry films on the first surface and the second surface of the substrate; S4, performing line pattern and full surface exposure on the dry films of the first surface and the second surface respectively; S5, performing developing, etching and film removing; S6, pasting dry films on the first surface and the second surface of the substrate; S7, performing exposure on the dry film of the first surface and setting exposure block points on the plating area of the outer periphery of the hole; performing full surface exposure on the dry film of the second surface; S8, performing developing, second copper plating and film removing; S9, pasting dry films on the first surface and the second surface of the substrate; S10, performing full surface and line pattern exposure on the dry films of the first surface and the second surface respectively; and S11, performing developing, etching and film removing.

Description

Technical Field

[0001] This invention belongs to the field of circuit board technology, and specifically relates to a circuit board fabrication method and a circuit board. Background Technology

[0002] For multilayer circuit boards, such as double-layer and triple-layer boards, the conduction of interlayer circuits is achieved by setting vias and plating copper layers on the via walls. For some products that require high via reliability, the copper thickness of the via walls needs to be increased, usually called pattern plating or selective plating. After this process, there will be obvious via protrusion. When the via spacing is close and the circuit is small, the via protrusion will prevent the film from adhering tightly to the photosensitive dry film. This will cause light to leak through the gaps during exposure, resulting in abnormal etching short circuits. The problem becomes more pronounced as the required copper thickness of the via walls increases. Summary of the Invention

[0003] The purpose of this invention is to provide a circuit board fabrication method to solve the aforementioned technical problems.

[0004] To achieve the above objectives, the technical solution adopted by the present invention is: a method for fabricating circuit boards, comprising the following steps:

[0005] S1, Drill holes in the substrate with conductive layers on both the first and second surfaces, then proceed to step S2;

[0006] S2, perform the first copper plating on the substrate, so that the conductive layers on the first and second surfaces and the hole walls are covered with a copper plating layer. The thickness of the copper plating layer is less than the copper thickness of the hole walls of the finished product, and proceed to step S3.

[0007] S3, apply dry film to the first and second surfaces of the substrate, and proceed to step S4;

[0008] S4, expose the circuit pattern on the dry film on the first surface, expose the entire dry film on the second surface, and proceed to step S5.

[0009] S5, perform development, etching and film removal, then proceed to step S6;

[0010] S6, apply dry film to the first and second surfaces of the substrate, and proceed to step S7;

[0011] S7, expose the dry film on the first surface and set exposure blocks in the patterning area around the hole; expose the dry film on the second surface, and proceed to step S8;

[0012] S8, develop, perform second copper plating and remove film. The second copper plating makes the hole wall copper thickness reach the finished hole wall copper thickness, then proceed to step S9.

[0013] S9, dry film is applied to the first and second surfaces of the substrate, proceed to step S10;

[0014] S10, expose the dry film on the first surface to the whole surface, expose the dry film on the second surface to the circuit pattern, and proceed to step S11.

[0015] S11 is used for development, etching, and film removal.

[0016] Furthermore, in step S2, the thickness of the copper plating layer is less than 50% of the copper thickness of the hole wall of the finished product, or the thickness of the copper plating layer is 5-10 μm.

[0017] Furthermore, in step S4, the lines on the first surface are thinner than the lines on the second surface.

[0018] Furthermore, in steps S3, S6 and S9, the temperature for applying the dry film is 100±5°C, the speed is 0.9±0.2m / min, and the pressure is 0.7±0.1mpa.

[0019] Furthermore, in steps S4, S7, and S10, the exposure energy is measured using an exposure scale of 21 levels, with levels 7-9.

[0020] Furthermore, in steps S5, S8, and S11, sodium carbonate developer is used for development.

[0021] Furthermore, in steps S5 and S11, acid etching is used.

[0022] Furthermore, in steps S5, S8, and S11, sodium hydroxide solution is used to remove the membrane.

[0023] Furthermore, the film removal speed is 2.5 ± 1.0 m / min.

[0024] The present invention also provides a circuit board manufactured using the circuit board fabrication method described above.

[0025] Beneficial technical effects of the present invention:

[0026] This invention can both satisfy the need for secondary thickening of the copper thickness of the hole wall and ensure that the film adheres tightly to the dry film during exposure, thereby improving the yield of precision line etching. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1This is a flowchart illustrating a specific embodiment of the method of the present invention;

[0029] Figure 2 This is a schematic diagram illustrating the manufacturing process of a specific embodiment of the present invention. Detailed Implementation

[0030] To further illustrate the various embodiments, the present invention provides accompanying drawings. These drawings are part of the disclosure of the present invention and are mainly used to illustrate the embodiments, and can be used in conjunction with the relevant descriptions in the specification to explain the operating principles of the embodiments. With reference to these drawings, those skilled in the art should be able to understand other possible implementations and the advantages of the present invention. Components in the drawings are not drawn to scale, and similar component symbols are generally used to represent similar components.

[0031] The present invention will now be further described in conjunction with the accompanying drawings and specific embodiments.

[0032] like Figure 1 and 2 As shown, a method for fabricating a circuit board includes the following steps:

[0033] S1, Drilling 2 is performed on a substrate 1 having conductive layers on both the first and second surfaces, such as... Figure 2 As shown in (a), proceed to step S2.

[0034] Specifically, in this embodiment, substrate 1 is a double-sided copper-clad substrate, but it is not limited to this. The first surface and the second surface are the upper surface and the lower surface, respectively (as shown in the diagram). Figure 2 (For directional reference). Drilling adopts existing drilling technology, which is a very mature technology that can be easily implemented by those skilled in the art, and will not be discussed in detail here.

[0035] S2, perform a first copper plating on the drilled substrate 1, so that the conductive layers on the upper and lower surfaces and the hole walls are covered with a copper plating layer 2. The thickness of the copper plating layer 2 is less than the thickness of the finished hole wall copper. Figure 2 As shown in (b), proceed to step S3.

[0036] In this specific embodiment, the current density used for copper plating is 0.8-2.0 A / dm², and the thickness of the copper plating layer 2 is preferably 5-10 μm to satisfy the electrical connection between the upper and lower surface copper layers, but it is not limited to this. In some embodiments, the thickness of the copper plating layer 2 is sufficient to not exceed 50% of the copper thickness of the hole wall of the finished product.

[0037] S3, dry film 3 is applied to the upper and lower surfaces of the substrate 1 after the first copper plating, such as... Figure 2 As shown in (c), proceed to step S4.

[0038] In this specific embodiment, the temperature for applying the dry film is 100±5 ℃, the speed is 0.9±0.2 m / min, and the pressure is 0.7±0.1 MPa, resulting in a good bonding effect, but it is not limited to this.

[0039] S4, expose the circuit pattern on the upper surface of the dry film 3, and expose the entire lower surface of the dry film 3, such as... Figure 2 As shown in (d), proceed to step S5.

[0040] Specifically, film 4 is used to expose the circuit pattern on the dry film 3 on the upper surface. Preferably, the circuit on the upper surface is thinner than that on the lower surface. In this case, the copper thickness of the entire board is uniform, and film 4 and dry film 3 adhere tightly, which can avoid exposure short circuits. The dry film 3 on the lower surface is exposed directly on the entire surface, so that dry film 3 protects the entire copper layer on the lower surface. The exposure energy is measured using a 21-level exposure ruler. A level of 7-9 provides good exposure results, but it is not limited to this.

[0041] S5, perform development, etching and film removal, then proceed to step S6.

[0042] In this specific embodiment, sodium carbonate developer is used, with a sodium carbonate content of 9-11 g / L, a solution temperature of 30±2℃, and a nozzle pressure of 2.0±0.3 Kgf / cm. 2 The development speed is 2±0.3 m / min, and the development effect is good, but this is not a limitation. Development retains the dry film in the via pattern plating area and circuit area on the upper surface, while the dry film in other areas is revealed. The dry film on the entire lower surface is retained. Figure 2 As shown in (e).

[0043] Etching is performed using acid etching with HCl 2.6±0.5 mg / L, H2O2 content 450-950 mol / L, copper content 130±30 g / L, and solution temperature 52±2 ℃. The etching rate can be adjusted from 0.5-4 m / min depending on the copper thickness. After etching, the result is as follows... Figure 2 As shown in (f).

[0044] The film removal process uses NaOH solution at a bath temperature of 50±2 ℃. The expansion section uses a 1%-2% NaOH solution to remove large sheets of dry film. A further removal section uses a 1.5%-2.5% NaOH solution to dissolve any remaining fine dry film. The optimal removal speed is 2.5±1.0 m / min. After removal, if... Figure 2 As shown in (g).

[0045] S6, dry film 3 is applied to the upper and lower surfaces of the substrate 1 after film removal, such as... Figure 2 As shown in (h), proceed to step S7.

[0046] In this specific embodiment, the temperature of the dry film 3 is 100±5 ℃, the speed is 0.9±0.2 m / min, and the pressure is 0.7±0.1 MPa, resulting in a good bonding effect, but it is not limited to this.

[0047] S7, expose the dry film 3 on the upper surface and set exposure blocks in the patterned area around the holes; expose the entire dry film 3 on the lower surface, such as... Figure 2 As shown in (i), proceed to step S8.

[0048] Specifically, film 4 is used to expose the dry film 3 on the upper surface, and exposure blocking points 41 are set in the pattern plating area around the hole 11. The exposure energy is measured using an exposure ruler of level 21, with a level of 7-9, which provides good exposure results, but is not limited to this. In this specific embodiment, exposure blocking points are set in the process edge areas of the upper and lower surfaces to increase the electroplating area, disperse the current, and prevent excessive current from burning the board.

[0049] S8, develop, perform second copper plating and remove film. The second copper plating makes the hole wall copper thickness reach the finished hole wall copper thickness, then proceed to step S9.

[0050] In this specific embodiment, sodium carbonate developer is used, with a sodium carbonate content of 9-11 g / L, a solution temperature of 30±2℃, and a nozzle pressure of 2.0±0.3 Kgf / cm. 2 The development speed is 2±0.3 m / min, and the development effect is good, but this is not a limitation. Development removes the dry film 3 from the via pattern plating area on the upper surface and the process edges on the upper and lower surfaces, while retaining the dry film 3 in the remaining product areas on the upper and lower surfaces to form a copper plating protective layer. Figure 2 As shown in (j).

[0051] In this specific embodiment, the second copper plating is performed using direct current electroplating. Through the conductive copper layer on the lower surface, the plating area and hole wall of the via are electrolytically reacted with the plating solution, depositing a secondary copper plating layer 21. This ensures that the copper thickness of the hole wall reaches the finished product's hole wall copper thickness. The preferred current density is 0.8-2.0 A / dm², and the preferred thickness of the secondary copper plating layer 21 is 10-25 μm, but it is not limited to these values. The second copper plating... Figure 2 As shown in (k).

[0052] The film removal process uses NaOH solution at a bath temperature of 50±2 ℃. The expansion section uses a 1%-2% NaOH solution to remove large sheets of dry film. A further removal section uses a 1.5%-2.5% NaOH solution to dissolve any remaining fine dry film. The optimal removal speed is 2.5±1.0 m / min. After removal, if... Figure 2 As shown in (l).

[0053] S9, dry film 3 is applied to the upper and lower surfaces of the substrate 1 after film removal, such as... Figure 2 (m), proceed to step S10.

[0054] In this specific embodiment, the temperature for applying the dry film is 100±5 ℃, the speed is 0.9±0.2 m / min, and the pressure is 0.7±0.1 MPa, resulting in a good bonding effect, but it is not limited to this.

[0055] S10, expose the entire surface of the dry film 3 on the upper surface, and expose the circuit pattern of the dry film 3 on the lower surface, such as... Figure 2 As shown in (n), proceed to step S11.

[0056] Specifically, film 4 is used to expose the circuit pattern on the dry film 3 on the lower surface. At this time, the copper layer on the lower surface remains flat without any protruding holes. Film 4 can adhere tightly to the surface of dry film 3, effectively avoiding exposure short circuits and improving etching yield. The entire upper surface of dry film 3 is then exposed directly to protect the circuit from etching. The exposure energy is measured using a 21-level exposure scale. Levels 7-9 provide good exposure results, but are not limited to this.

[0057] S11 is used for development, etching, and film removal.

[0058] In this specific embodiment, sodium carbonate developer is used, with a sodium carbonate content of 9-11 g / L, a solution temperature of 30±2℃, and a nozzle pressure of 2.0±0.3 Kgf / cm. 2 The developing speed is 2±0.3 m / min, which provides good developing results, but this is not a limitation. After developing, as... Figure 2 As shown in (o).

[0059] Etching is performed using acidic etching with HCl 2.6±0.5 mg / L, H2O2 content 450-950 mol / L, copper content 130±30 g / L, and solution temperature 52±2 ℃. The etching rate can be adjusted from 0.5-4 m / min depending on the copper thickness. After etching, the result is as follows: Figure 2 As shown in (p).

[0060] The film removal process uses a NaOH solution at a bath temperature of 50±2℃. The expansion section uses a 1%-2% NaOH solution to remove large sheets of dry film. A further removal section uses a 1.5%-2.5% NaOH solution to dissolve any remaining fine dry film. The optimal removal speed is 2.5±1.0 m / min. After removal, the final product 100 is formed. Figure 2 As shown in (q).

[0061] like Figure 2As shown in (q), the present invention also provides a circuit board 100, which is manufactured using the circuit board fabrication method described above.

[0062] This invention can both satisfy the need for secondary thickening of the copper thickness of the hole wall and ensure that the film adheres tightly to the dry film during exposure, thereby improving the yield of precision line etching.

[0063] Although the invention has been specifically shown and described in conjunction with preferred embodiments, those skilled in the art will understand that various changes in form and detail may be made to the invention without departing from the spirit and scope of the invention as defined in the appended claims, all of which shall be within the scope of protection of the invention.

Claims

1. A method of manufacturing a circuit on a circuit board, characterized by, The method comprises the following steps: S1, drilling the substrate with conductive layers on both the first surface and the second surface, and entering step S2; S2, first copper plating on the substrate, so that the conductive layers on both the first surface and the second surface and the hole wall are covered with a copper plating layer, the thickness of the copper plating layer is less than the copper thickness of the hole wall of the finished product, and entering step S3; S3, pasting dry film on both the first surface and the second surface of the substrate, and entering step S4; S4, line pattern exposure on the dry film of the first surface, and full-area exposure on the dry film of the second surface, and entering step S5; S5, developing, etching and film removing, the dry film of the via plating area and the line area of the first surface is reserved by developing, and the dry film of other areas is removed, and the full-area dry film of the second surface is reserved, and entering step S6; S6, pasting dry film on both the first surface and the second surface of the substrate, and entering step S7; S7, exposing the dry film of the first surface and setting exposure block points on the plating area of the hole outer periphery, and exposing the dry film of the second surface full area, and entering step S8; S8, developing, second copper plating and film removing, the second copper plating makes the copper thickness of the hole wall reach the copper thickness of the hole wall of the finished product, the dry film of the via plating area and the process edge of the upper and lower surfaces of the first surface is removed by developing, and the dry film of the product area of the first and second surfaces is reserved to form a copper plating protection layer, and entering step S9; S9, pasting dry film on both the first surface and the second surface of the substrate, and entering step S10; S10, full-area exposure on the dry film of the first surface, and line pattern exposure on the dry film of the second surface, and entering step S11; S11, developing, etching and film removing, the dry film of the second surface is exposed by line pattern exposure using a film, and the dry film of the first surface is directly exposed full area to protect the line from being etched, and the final finished product is formed after film removing.

2. The method of manufacturing a circuit on a circuit board according to claim 1, wherein, In step S2, the thickness of the copper plating layer is less than 50% of the copper thickness of the hole wall of the finished product, or the thickness of the copper plating layer is 5-10 μm.

3. The method of manufacturing a circuit on a circuit board according to claim 1, wherein In step S4, the line of the first surface is finer than the line of the second surface.

4. The method of manufacturing a circuit on a circuit board according to claim 1, wherein In steps S3, S6 and S9, the temperature for pasting the dry film is 100±5°C, the speed is 0.9±0.2 m / min, and the pressure is 0.7±0.1 mpa.

5. The method of manufacturing a circuit on a circuit board according to claim 1, wherein, In steps S4, S7 and S10, the exposure energy is measured by an exposure ruler of grade 21, and the grade is 7-9.

6. The method of manufacturing a circuit on a circuit board according to claim 1, wherein, In steps S5, S8 and S11, sodium carbonate developing solution is used for developing.

7. The method of manufacturing a circuit on a circuit board according to claim 1, wherein In steps S5 and S11, acid etching is used for etching.

8. The method of manufacturing a circuit on a circuit board according to claim 1, wherein, In steps S5, S8 and S11, sodium hydroxide solution is used for film removing.

9. The method of manufacturing a circuit on a circuit board according to claim 8, wherein, The film removing speed is 2.5±1.0 m / min.

10. A wiring board, characterized by The line is made by the line making method of the line board according to any one of claims 1-9.

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