A radar target simulator radio frequency storage board

Abstract

The present invention provides a radar signal source radio frequency storage board, including: a power module, a clock generation module, an analog-to-digital conversion module, a data storage module, a signal processing module and a digital-to-analog conversion module. The analog-to-digital conversion module adopts a high-speed analog-to-digital conversion ADC chip; the data storage module adopts an external QDR storage chip as data storage, and sets different delay times according to different target signals; the signal processing module takes several groups of channel frequencies measured as a group, and takes the average value as the frequency measurement result, and the Doppler frequency shift is realized by resolving the real signal into a complex signal; the digital-to-analog conversion module adopts two DAC chips; the clock generation module adopts an integrated chip to generate the working clock required by the high-speed analog-to-digital conversion chip and the digital-to-analog conversion chip. The present invention has a wide frequency coverage range, long delay, and high reliability, and can simulate information such as the distance and speed of multiple radar targets.

Description

Technical Field

[0001] The invention belongs to the technical field of radar signal processing, and in particular relates to a radar signal source radio frequency storage board. Background Art

[0002] In modern information warfare, radar systems, as the main information source of war, play an important role in all aspects (such as early warning, tracking, identification, guidance and battlefield assessment). In order to better optimize and verify radar design parameters, many verification tests are usually required during the development and debugging of radar systems. If each test uses real targets or battlefield environments, it will inevitably cost a lot of manpower, financial resources and material resources, and may also extend the product development time. Therefore, we usually use radar target simulator technology to simulate real targets and battlefield environments.

[0003] Among them, the digital radio frequency memory (DRFM) board is the core board of the radar target simulator. Its main function is to perform digital signal processing on the radar signal input by the target simulator, and it can simulate the distance and radial velocity of the target radar signal. According to specific needs, it can also modulate the target signal to generate interference signals, and then output them to the radar system. Its characteristics are that it uses digital form as the storage form and can sample the signal at high speed, that is, it can reproduce the radio frequency and microwave signals. The traditional digital frequency storage system collects and stores signals at the intermediate frequency or baseband. Limited by the hardware chip, the signal bandwidth that the early DRFM can process is limited. It can only perform short delay on the signal and simulate a single target signal. In addition, the frequency hopping problem in the frequency measurement process causes the frequency measurement result to have too large an error. The bandwidth of the frequency hopping signal and the spread spectrum signal in the modern radar system generally reaches tens of megahertz or even hundreds of megahertz, so the DRFM system is required to have a large frequency coverage range. With the development and improvement of DRFM and its technology, it can adapt to the threat signal environment of changeable, fast-changing and complex time domain modulation. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a radar signal source radio frequency storage board suitable for modern radar target simulators, with wide frequency coverage, long delay, high reliability, and capable of simulating information such as the distance and speed of multiple radar targets.

[0005] In order to solve the above technical problems, the present invention provides a radar signal source radio frequency storage board, which adopts the following technical solutions:

[0006] The radar signal source radio frequency storage board includes: a power supply module, a clock generation module, an analog-to-digital conversion module, a data storage module, a signal processing module and a digital-to-analog conversion module.

[0007] The analog-to-digital conversion module adopts a high-speed analog-to-digital conversion ADC chip;

[0008] The data storage module uses an external QDR storage chip as data storage, and sets different delay times according to different target signals;

[0009] The signal processing module uses FPGA to perform data acquisition, data storage, instantaneous frequency measurement, Doppler frequency shift, simulation of multi-target signals and data forwarding on the data converted by ADC, wherein:

[0010] The instantaneous frequency measurement method is as follows: channelizing the high-speed digital signal, dividing the channel using a blind-zone-free division method, taking several groups of channel frequencies measured as a group, and calculating the average value as the frequency measurement result,

[0011] The Doppler frequency shift is achieved by resolving the real signal into a complex signal;

[0012] The digital-to-analog conversion module uses two DAC chips, and the two channels independently forward the data of the signal generated by the signal processing module, one channel is used as the target signal, and the other channel is used as the interference signal;

[0013] The clock generation module uses an integrated chip to generate the working clock required by the high-speed analog-to-digital conversion chip and the digital-to-analog conversion chip, and physically distances the ADC working clock generation chip and the DAC working clock generation chip; and performs timing constraints on the data transmission clocks and output IOs of the two DAC chips.

[0014] Compared with the prior art, the beneficial effects of the present invention are:

[0015] 1. Improved frequency measurement accuracy. In the process of signal discrimination, the measured frequency value is averaged, that is, the four groups of measured frequency values ​​are added together to obtain the average value, and the average value of the frequency is used as the final output frequency measurement value. This can effectively solve the problem of frequency hopping in the frequency measurement process, which causes the frequency measurement result to have too large an error.

[0016] 2. Multi-target simulation function. A single channel of an ordinary DRFM board can only generate a single target simulation signal. This board uses the QDR storage resources of the FPGA plug-in to delay the digital signal, and then uses Doppler frequency shift technology to achieve the function of simulating up to 8 target signals in a single channel.

[0017] 3. High-frequency band and large-bandwidth signal processing. A high-sampling-rate analog-to-digital conversion chip is selected, and the sampling rate can reach up to 3GHz. This board uses a sampling rate of 2.5GHz, and it can process intermediate frequency signals in the frequency band of 1.375GHz to 2.375GHz. At the same time, in order to improve the output signal spurious performance index, two aspects of work were carried out. In terms of hardware, the ADC working clock generation chip and the DAC working clock generation chip were physically distanced; in terms of HDL coding, the data transmission clock and output IO of the two DAC chips were constrained, which ultimately greatly improved the spurious performance index.

[0018] 4. Compatibility. This board also has an innovative point in the design process, that is, the design process takes into account the chip functional requirements while taking into account the replacement of domestic chips. Ensure that each imported component on the board can find a corresponding pin-to-pin compatible domestic component. Therefore, the printed circuit board of this board can be soldered with imported chips or replaced with domestic chips.

[0019] 5. Cost saving. According to technical requirements, during the use of the radar target simulator, the RF storage board needs to generate two radar output signals. One is used as the target signal and the other is used as the interference signal. This board can generate two different radar output signals only through HDL language programming, which greatly saves the cost of components; in addition, the board can process intermediate frequency signals in higher frequency bands (1.375GHz~2.375GHz), saving the production cost of microwave down-conversion modules. In addition, as an extension, the board can also perform interference modulation processing and replication on the signal to achieve the flexibility of interference technology. It can be applied to electronic reconnaissance, radar target simulation and waveform acquisition.

[0020] 6. Stronger adaptability. This board can weld both domestic devices and imported devices, which can effectively prevent the hidden dangers caused by foreign chip blockades. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The included drawings are used to provide a further understanding of the embodiments of the present invention, which constitute a part of the specification, are used to illustrate the embodiments of the present invention, and together with the text description, explain the principles of the present invention. Obviously, the drawings in the following description are only some embodiments of the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 A schematic diagram showing the composition of a radar signal source radio frequency storage board provided according to a specific embodiment of the present invention is shown;

[0023] Figure 2 A schematic diagram of a digital instantaneous frequency test provided according to a specific embodiment of the present invention is shown;

[0024] Figure 3 A schematic diagram of implementing Doppler frequency shift according to a specific embodiment of the present invention is shown;

[0025] Figure 4 A schematic diagram of implementing single-channel data flow provided according to a specific embodiment of the present invention is shown. DETAILED DESCRIPTION

[0026] Embodiments of the present invention are described below with reference to the accompanying drawings. Elements and features described in one drawing or one embodiment of the present invention may be combined with elements and features shown in one or more other drawings or embodiments. It should be noted that for the purpose of clarity, the representation and description of components and processes that are not related to the present invention and are known to those of ordinary skill in the art are omitted in the drawings and descriptions.

[0027] The present invention provides a radar signal source radio frequency storage board, including a power module, a clock generation module, an analog-to-digital conversion module, a data storage module, a signal processing module, and a digital-to-analog conversion module, and uses a programmable digital device FPGA to store, process and forward the collected data. At the same time, the host computer interface sets the delay and Doppler frequency to be transmitted to the control component, and the control component transmits the control instruction to the board through the chassis backplane custom bus, so as to accurately control the delay amount and frequency shift amount of the forwarded signal, and realize the simulation of the distance and speed of the radar target.

[0028] like Figure 1 As shown, as a radar signal source radio frequency storage board provided by an embodiment of the present invention, the implementation method is as follows:

[0029] The analog-to-digital conversion module adopts a high-speed analog-to-digital conversion chip (ADC chip) with a sampling rate of 2.5Gsps, which can process intermediate frequency signals in the frequency band of 1.375GHz to 2.375GHz and realize data processing of intermediate frequency signals with a large bandwidth of 1GHz.

[0030] The data storage module uses an external QDR storage chip as data storage, which saves internal resources of the FPGA, simulates different target signals according to needs, and sets different delay times of the optical delay network through the host computer interface.

[0031] Specifically, the delay time of the optical delay network that needs to be set by the host computer is calculated according to the following formula 1.

[0032]

[0033] In formula 1, d is the distance of the simulated target signal, c is the speed of light, and T is the data delay time.

[0034] The signal processing module uses FPGA to collect data, store data, measure instantaneous frequency, perform Doppler frequency shift, simulate multiple targets, and forward data on the data converted by ADC, and can achieve the function of simulating up to 8 target signals on a single channel. Figure 3 .

[0035] The instantaneous frequency measurement implementation process is as follows: ADC converts the analog signal into a digital signal, and then performs channelization processing on the high-speed digital signal. The channel division adopts a blind-zone-free division method. After the channelization processing, the digital signal is converted from a time domain signal to a frequency domain signal. The Cordic algorithm is used to measure the amplitude and phase value of the signal, and then the phase difference method is used to measure the channel frequency. After the channel frequency is measured, the four groups of output frequency measurement results are taken as a group, and the average value is calculated. This average value is used as the frequency measurement result, so that the measured signal frequency is more accurate, ensuring the smooth implementation of the Doppler frequency shift algorithm. For details on the principle of instantaneous frequency measurement, see Figure 2 .

[0036] refer to Figure 3 The Doppler frequency shift is achieved by Hilbert transform and complex mixing after the real signal is resolved into a complex signal.

[0037] The host computer can set two instructions: Doppler frequency and Doppler speed. When the host computer instruction is set to Doppler speed, the instantaneous frequency measurement result of the signal is required to calculate the Doppler frequency. The specific calculation is shown in formula 2

[0038]

[0039] In formula 2, f d is the Doppler frequency, c is the speed of light, and v is the Doppler velocity.

[0040] In view of the limited FPGA resources, the digital-to-analog conversion module uses two DAC chips. The two channels can independently forward the data of the signal generated by the signal processing module. Through HDL language programming, two channel signals can be generated on one board, one as the target signal and the other as the interference signal.

[0041] The clock generation module uses an integrated chip to generate the working clock required by the high-speed analog-to-digital conversion chip and the digital-to-analog conversion chip, saving space for the external clock generation module to provide the working clock of the high-speed analog-to-digital conversion chip and the digital-to-analog conversion chip.

[0042] In order to improve the output signal spurious performance indicators, the ADC working clock generating chip and the DAC working clock generating chip were physically separated; in terms of HDL coding, the data transmission clock and output IO of the two DAC chips were constrained in timing, which ultimately greatly improved the spurious performance indicators.

[0043] In some embodiments of the present invention, the power module uses multiple power chips to provide working voltage for the active chips on the board. The power module selects different types of power chips according to the working characteristics of different active devices. For example, the ADC chip is powered by a linear power supply to reduce ripple interference; the IO voltage of the FPGA is powered by a switching power supply to improve the working efficiency of the power chip and reduce heat dissipation.

[0044] In some embodiments of the present invention, the chip functional requirements are taken into account while taking into account the replacement of domestic chips. Each imported component on the board can find a corresponding pin-to-pin compatible domestic component. Therefore, the printed circuit board of the board can be soldered with imported chips or replaced with domestic chips.

[0045] like Figure 4 As shown in the figure, the radar intermediate frequency signal is processed by the high-speed analog-to-digital conversion module for the 1GHz wide bandwidth intermediate frequency signal. After the serial / parallel conversion, on the one hand, the data signal is instantaneously measured according to the instructions sent by the control board, and on the other hand, the target signals at different distances can be simulated by setting the delay time through the host computer. The digital signal converted by the ADC is stored in the external QDR data storage device. Based on the instantaneous frequency measurement results, the Doppler frequency shift is obtained through complex mixing, and then after parallel / serial conversion and digital-to-analog conversion, a multi-target intermediate frequency signal output is formed.

[0046] Although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and conversions can be made without exceeding the spirit and scope of the present invention defined by the appended claims. Moreover, the scope of the present application is not limited to the specific embodiments of the process, equipment, means, method and steps described in the specification. It will be easily understood by those of ordinary skill in the art from the disclosure of the present invention that the process, equipment, means, method or step that performs the function substantially the same as the corresponding embodiment described herein or obtains the result substantially the same as the corresponding embodiment described herein, existing and future to be developed can be used according to the present invention. Therefore, the appended claims are intended to include such processes, equipment, means, methods or steps within their scope.

Claims

1. A radar signal source radio frequency storage board, comprising: A power supply module, a clock generation module, a high-speed analog-to-digital conversion module, a data storage module, a signal processing module and a digital-to-analog conversion module, characterized in that: The high-speed analog-to-digital conversion module adopts a high-speed analog-to-digital conversion ADC chip; The data storage module uses an external QDR storage chip as data storage, and sets different delay times according to different target signals; The signal processing module uses FPGA to perform data acquisition, data storage, instantaneous frequency measurement, Doppler frequency shift, simulation of multi-target signals and data forwarding on the data converted by ADC, wherein: The instantaneous frequency measurement method is as follows: channelizing the high-speed digital signal, dividing the channel using a blind-zone-free division method, taking the measured channel frequencies of several groups as a group, and calculating the average value as the frequency measurement result. The Doppler frequency shift is achieved by resolving the real signal into a complex signal; The digital-to-analog conversion module uses two DAC chips, and the two channels independently forward the data of the signal generated by the signal processing module, one channel is used as the target signal, and the other channel is used as the interference signal; The clock generation module uses an integrated chip to generate the working clock required by the high-speed analog-to-digital conversion chip and the digital-to-analog conversion chip, and physically distances the ADC working clock generation chip and the DAC working clock generation chip; and performs timing constraints on the data transmission clocks and output IOs of the two DAC chips.

2. The radar signal source radio frequency storage board according to claim 1, characterized in that: The sampling rate of the high-speed analog-to-digital conversion ADC chip is 2.5 GHz.

3. The radar signal source radio frequency storage board according to claim 1, characterized in that: The power module uses a plurality of power chips, and different types of power chips are selected according to the working characteristics of different active devices.

4. The radar signal source radio frequency storage board according to claim 3, characterized in that: The ADC chip is powered by a linear power supply, and the IO voltage of the FPGA is powered by a switching power supply.

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