Semiconductor photodetector, receiver and integrated optical device

Abstract

The present application relates to semiconductor photodetectors, receivers, and integrated optical devices. A disclosed semiconductor photodetector includes a first semiconductor layer having a first refractive index and a first bandgap, a second semiconductor layer formed on the first semiconductor layer, the second semiconductor layer having a second refractive index and a second bandgap, a first electrode, and a second electrode. The second refractive index is greater than the first refractive index, and the second bandgap is less than the first bandgap. The first semiconductor layer includes a p-type first region, an n-type second region, and a non-conductive third region between the first region and the second region. The second semiconductor layer includes a p-type fourth region in ohmic contact with the first electrode, an n-type fifth region in ohmic contact with the second electrode, and a non-conductive sixth region between the fourth region and the fifth region.

Description

Technical Field

[0001] The public information discussed in this article relates to semiconductor photodetectors, receivers, and integrated optical devices. Background Technology

[0002] With the increasing demand for computer throughput, there is a need to expand data transmission and reception bandwidth. Data transmission in electrical signals has reached its limits, necessitating the application of optical signals. To efficiently convert optical signals into electrical signals, it is effective to integrate optical components into electronic devices to reduce transmission losses. In recent years, research and development in silicon (Si) photonics, which involves forming various optical components on silicon (Si) substrates, has attracted considerable attention.

[0003] [Related Technical Documents]

[0004] [Patent Literature]

[0005] [Patent Document 1] U.S. Patent Application No. 2017 / 0025562

[0006] [Patent Document 2] US Patent No. 7397101

[0007] [Patent Document 3] Japanese Patent Application Publication No. 2017-11020 Summary of the Invention

[0008] According to one aspect of this disclosure, a semiconductor photodetector includes:

[0009] A first semiconductor layer having a first refractive index and a first band gap;

[0010] A second semiconductor layer is formed on the first semiconductor layer, and the second semiconductor layer has a second refractive index and a second band gap;

[0011] First electrode; and

[0012] Second electrode,

[0013] Wherein, the second refractive index is greater than the first refractive index, and

[0014] The second bandgap is smaller than the first bandgap, where

[0015] The first semiconductor layer includes:

[0016] p-type first region;

[0017] n-type second region; and

[0018] A non-conductive third region, located between the first and second regions, and

[0019] The second semiconductor layer includes:

[0020] The p-type fourth region is in ohmic contact with the first electrode;

[0021] The n-type fifth region, which is in ohmic contact with the second electrode; and

[0022] The sixth non-conductive region is located between the fourth and fifth regions, and within it...

[0023] From the perspective of the third region, the first region is positioned more towards the first direction.

[0024] From the perspective of the third region, the second region is positioned more towards a second direction opposite to the first direction.

[0025] From the perspective of the sixth region, the fourth region is positioned more towards the first direction.

[0026] From the perspective of the sixth region, the fifth region is positioned more towards the second direction, and

[0027] In the plan view, the third and sixth regions overlap.

[0028] The objectives and advantages of this embodiment will be realized and obtained through the elements and combinations specifically pointed out in the claims. It should be understood that the above general description and the following detailed description are exemplary and explanatory, and they do not limit the claimed invention. Attached Figure Description

[0029] Figure 1 This is a cross-sectional view illustrating the construction of a semiconductor photodetector according to the first example;

[0030] Figure 2 This is a cross-sectional view illustrating the construction of a semiconductor photodetector according to the second example;

[0031] Figure 3 This is a top view illustrating the structure of a semiconductor photodetector according to the first embodiment;

[0032] Figure 4 This is a diagram illustrating the layout of the semiconductor region of a semiconductor photodetector according to the first embodiment;

[0033] Figure 5 This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the first embodiment;

[0034] Figure 6 This is a diagram illustrating the distribution of guided light and electric field in a semiconductor photodetector according to the first embodiment;

[0035] Figure 7 This is a cross-sectional view illustrating the structure of a simulated semiconductor photodetector;

[0036] Figure 8 This is a graph illustrating the impurity concentration distribution in the simulation for the first example;

[0037] Figure 9 This is a diagram illustrating the contour plot of the impurity concentration distribution in a simulation of the first embodiment;

[0038] Figure 10 This is a diagram illustrating the contour plot of the electric field intensity distribution in the simulation for the first example;

[0039] Figure 11 This is a diagram illustrating the contour plot of the electric field intensity distribution in a simulation of the first embodiment;

[0040] Figure 12 This is a diagram illustrating the electric field intensity in a region 100 nm from the bottom surface of the Ge layer;

[0041] Figure 13 This is a top view (1) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0042] Figure 14 This is a top view (2) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0043] Figure 15 This is a top view (3) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0044] Figure 16 This is a top view (4) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0045] Figure 17 This is a top view (5) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0046] Figure 18 This is a top view (6) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0047] Figure 19 This is a top view (7) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0048] Figure 20 This is a top view (8) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0049] Figure 21 This is a top view (9) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0050] Figure 22 This is a top view (10) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0051] Figure 23 This is a top view (11) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0052] Figure 24 This is a top view (12) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0053] Figure 25 This is a top view (13) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0054] Figure 26 This is a top view (14) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0055] Figure 27 This is a top view (15) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0056] Figure 28 This is a cross-sectional view (1) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0057] Figure 29 This is a cross-sectional view (2) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0058] Figure 30 This is a cross-sectional view (3) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0059] Figure 31 This is a cross-sectional view (4) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0060] Figure 32 This is a cross-sectional view (5) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0061] Figure 33 This is a cross-sectional view (6) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0062] Figure 34 This is a cross-sectional view (7) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0063] Figure 35 This is a cross-sectional view (8) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0064] Figure 36 This is a cross-sectional view (9) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0065] Figure 37 This is a cross-sectional view (10) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0066] Figure 38 This is a cross-sectional view (11) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0067] Figure 39 This is a cross-sectional view (12) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0068] Figure 40 This is a cross-sectional view (13) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0069] Figure 41 This is a cross-sectional view (14) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0070] Figure 42 This is a cross-sectional view (15) illustrating a method for manufacturing a semiconductor photodetector according to the first embodiment;

[0071] Figure 43 This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the second embodiment;

[0072] Figure 44 This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the third embodiment;

[0073] Figure 45 This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the fourth embodiment;

[0074] Figure 46 This is a cross-sectional view (1) illustrating a method for manufacturing a semiconductor photodetector according to the fourth embodiment;

[0075] Figure 47 This is a cross-sectional view (2) illustrating a method for manufacturing a semiconductor photodetector according to the fourth embodiment;

[0076] Figure 48This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the fifth embodiment;

[0077] Figure 49 This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the sixth embodiment;

[0078] Figure 50 This is a cross-sectional view (1) illustrating a method for manufacturing a semiconductor photodetector according to the sixth embodiment;

[0079] Figure 51 This is a cross-sectional view (2) illustrating a method for manufacturing a semiconductor photodetector according to the sixth embodiment;

[0080] Figure 52 This is a cross-sectional view (3) illustrating a method for manufacturing a semiconductor photodetector according to the sixth embodiment; and

[0081] Figure 53 This is a block diagram illustrating the structure of a Si photonic coherent integrated device according to the seventh embodiment. Detailed Implementation

[0082] Various semiconductor photodetectors have been proposed for Si photonics; however, the proposed semiconductor photodetectors require both high operating speed and high photoresponsivity.

[0083] This disclosure aims to provide semiconductor photodetectors, receivers, and integrated optical devices that can achieve both high operating speed and high photoresponse.

[0084] In optical components, those performing light processing such as multiplexing-demultiplexing and modulation need to be non-absorbent to avoid excessive loss. However, photodetectors configured to convert optical signals into electrical signals (O / E conversion) require light absorption. Candidate materials meeting these requirements include those using a combination of Ge in the light-receiving portion for near-infrared light with wavelengths from 1.2 μm to 1.6 μm and Si in other portions. This near-infrared wavelength is transparent to Si, but readily absorbed by Ge.

[0085] Photodetectors, such as photodiodes (PDs), include mechanisms for extracting electrons and holes (i.e., photocarriers) generated through light absorption. An example of a PD is a PIN PD. An example of a PIN PD is a homojunction PD, which has a Ge layer formed on a Si layer and two electrodes in ohmic contact with the Ge layer.

[0086] Another example of a PIN PD is a heterojunction PD, which has a Ge layer formed on a Si layer, at least one electrode in ohmic contact with the Si layer, and a current path including the heterojunction interface between the Si and Ge layers. In such a heterojunction PD, a valence band discontinuity exists at the heterojunction interface, causing holes to accumulate at higher light intensities, reducing transmission speed and degrading response characteristics. This degraded response characteristics lead to bandwidth degradation in the receiver.

[0087] (First example)

[0088] Here, we will describe the first example of a homojunction PD. Figure 1 This is a cross-sectional view illustrating the architecture of a semiconductor photodetector as exemplified in the first example.

[0089] A semiconductor photodetector 901 according to a first example is fabricated on an SOI substrate 910. The SOI substrate 910 includes a silicon (Si) substrate 911, a Si oxide film 912, and a Si layer 920. A Ge layer 930 is formed on the Si layer 920. The Ge layer 930 has a p-type Ge region 934, an n-type Ge region 935, and a non-conductive i-type Ge region 936. The p-type Ge region 934 and the n-type Ge region 935 are formed on the top surface of the i-type Ge region 936. A portion of the i-type Ge region 936 is interposed between the p-type Ge region 934 and the n-type Ge region 935. In the first reference, the depth of the p-type Ge region 934 and the n-type Ge region 935 is less than half the thickness of the Ge layer 930.

[0090] A Si oxide film 941 is formed to cover a stack of Si layer 920 and Ge layer 930. An opening 941P reaching the p-type Ge region 934 and an opening 941N reaching the n-type Ge region 935 are formed in the Si oxide film 941. A metal film 943P that is in ohmic contact with the p-type Ge region 934 through the opening 941P and a metal film 943N that is in ohmic contact with the n-type Ge region 935 through the opening 941N are formed on the Si oxide film 941.

[0091] The semiconductor photodetector 901 constructed in this way has a Si layer 920 as an optical waveguide, and light propagating through the Si layer 920 is evanescently coupled into the Ge layer 930. Then, the propagating light 991 incident on the Ge layer 930 is absorbed by the Ge layer 930, generating photocarriers within it. When an electric field 992 is generated between the n-type Ge region 935 and the p-type Ge region 934, and a reverse bias is applied through metal films 943P and 943N to place the n-type Ge region 935 at a higher voltage than the p-type Ge region 934, photocarriers are extracted. Note that in Figure 1 In the diagram, the thicker the current-carrying line shown by the dashed line, the stronger the electric field.

[0092] In the first example, as described above, the depth of each of the p-type Ge region 934 and the n-type Ge region 935 is less than half the thickness of the Ge layer 930. Therefore, the region with high intensity of the guided light 991 is separated from the p-type Ge region 934 and the n-type Ge region 935, and the electric field 992 in the region with high photocarrier concentration is weakened. Consequently, the photocarrier transport speed is reduced, making it difficult to obtain a sufficient operating speed.

[0093] (Second example)

[0094] Next, a second example of a homojunction PD will be described. Figure 2 This is a cross-sectional view illustrating the construction of a semiconductor photodetector according to the second example.

[0095] In the semiconductor photodetector 902 according to the second example, the depth of each of the p-type Ge region 934 and the n-type Ge region 935 is approximately 80% of the thickness of the Ge layer 930. The other configurations are similar to those in the first example.

[0096] In the second example, the region with strong guided light 991 is close to the p-type Ge region 934 and the n-type Ge region 935, and the electric field 992 is strong in the region with high photocarrier intensity. Therefore, a high operating speed is easily obtained. However, guided light 991 is also incident on the p-type Ge region 934 and the n-type Ge region 935, and free carrier absorption will occur. Unlike light absorption that generates new photocarriers, free carrier absorption is light absorption that provides kinetic energy to existing carriers and does not contribute to the increase of current; that is, so-called ineffective absorption. The greater the ineffective absorption, the lower the photoresponsivity of the light, given by the ratio of output current to incident light intensity.

[0097] As mentioned above, it is difficult to obtain sufficient operating speed in the first example, and it is difficult to obtain sufficient photoresponse in the second example.

[0098] Therefore, there are many areas for improvement in the semiconductor photodetector 901 according to the first example and the semiconductor photodetector 902 according to the second example. Based on the above findings, the following embodiments are proposed. The embodiments will be described in detail below with reference to the accompanying drawings. In the following description, the same or corresponding elements are given the same reference numerals, and repeated descriptions may be omitted.

[0099] (First Implementation)

[0100] First, a first embodiment will be described. The first embodiment relates to a semiconductor photodetector including a homojunction PD. Figure 3 This is a top view illustrating the structure of a semiconductor photodetector according to the first embodiment. Figure 4This is a diagram illustrating the layout of the semiconductor regions in a semiconductor photodetector according to the first embodiment. Figure 5 This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the first embodiment. Figure 5 Corresponding to along Figure 3 and Figure 4 A cross-sectional view of the VV line in the diagram.

[0101] like Figures 3 to 5 As shown, a semiconductor photodetector 100 according to the first embodiment is fabricated on a silicon-on-insulator (SOI) substrate 110, and the semiconductor photodetector 100 includes the SOI substrate 110. The SOI substrate 110 includes a Si substrate 111, a Si oxide film 112, and a Si layer 120. The semiconductor photodetector 100 includes a light guiding portion 160 and a photoelectric conversion portion 163. In the light guiding portion 160, the Si layer 120 is formed into the shape of an optical waveguide. The light guiding portion 160 includes a waveguide region 161 and a spot size conversion portion 162 in which the Si layer 120 is processed into the shape of a spot size converter.

[0102] In the photoelectric conversion unit 163, for example, the Si layer 120 is processed into a rectangular planar shape. The Si layer 120 has a p-type Si region 121, an n-type Si region 122, and a non-conductive i-type Si region 123. The p-type Si region 121 and the n-type Si region 122 are formed on the top surface of the i-type Si region 123. The p-type Si region 121 and the n-type Si region 122 are separated from each other in a direction perpendicular to the propagation direction of light guided from the light guide portion 160 to the photoelectric conversion unit 163. A portion of the i-type Si region 123 is inserted between the p-type Si region 121 and the n-type Si region 122. Viewed from the i-type Si region 123, the p-type Si region 121 is located in a first direction; viewed from the i-type Si region 123, the n-type Si region 122 is located in a second direction opposite to the first direction. The first direction and the second direction are perpendicular to the propagation direction of light guided from the light guide portion 160 to the photoelectric conversion unit 163. For example, the p-type Si region 121 contains a concentration of 0.5 × 10⁻⁶. 19 cm -3 Up to 1.5×10 19 cm -3 Boron (B). For example, n-type Si region 122 contains boron (B) at a concentration of 0.5 × 10⁻⁶. 19 cm -3 Up to 1.5×10 19 cm -3 Phosphorus (P). The i-type Si region 123 may be unintentionally doped, but it can contain minimal impurities, for example, a concentration not exceeding 1.5 × 10⁻⁶. 15 cm -3Si layer 120 is an example of a first semiconductor layer, p-type Si region 121 is an example of a first region, n-type Si region 122 is an example of a second region, and i-type Si region 123 is an example of a third region.

[0103] In the photoelectric conversion unit 163, for example, a Ge layer 130 is formed on the Si layer 120. In a first embodiment, the Ge layer 130 covers the p-type Si region 121 and the n-type Si region 122. The second refractive index of the Ge layer 130 is greater than the first refractive index of the Si layer 120, and the second band gap of the Ge layer 130 is smaller than the first band gap of the Si layer 120. The Ge layer 130 has a p-type Ge region 134, an n-type Ge region 135, and a non-conductive i-type Ge region 136. The p-type Ge region 134 and the n-type Ge region 135 are formed on the top surface of the i-type Ge region 136. The thickness of each of the p-type Ge region 134 and the n-type Ge region 135 is, for example, less than or equal to half the thickness of the Ge layer 130. The p-type Ge region 134 and the n-type Ge region 135 are separated from the Si layer 120 in the thickness direction. The p-type Ge region 134 and the n-type Ge region 135 are separated from each other in a direction perpendicular to the propagation direction of light guided from the light guide section 160 to the photoelectric conversion section 163. A portion of the i-type Ge region 136 is inserted between the p-type Ge region 134 and the n-type Ge region 135. Viewed from the i-type Ge region 136, the p-type Ge region 134 is located in a first direction, and viewed from the i-type Ge region 136, the n-type Ge region 135 is located in a second direction.

[0104] In the planar view, a portion of the i-type Si region 123 located between the p-type Si region 121 and the n-type Si region 122 overlaps with a portion of the i-type Ge region 136 located between the p-type Ge region 134 and the n-type Ge region 135. In the planar view, the first edge of the n-type Si region 122 or the n-type Ge region 135 represents the distal edge of the i-type Si region 123 or the i-type Ge region 136, while the second edge of the p-type Si region 121 or the p-type Ge region 134 represents the distal edge of the i-type Si region 123 or the i-type Ge region 136. In the planar view, the second edge of the p-type Si region 121 can be positioned more oriented in a first direction relative to the second edge of the p-type Ge region 134, and the first edge of the n-type Si region 122 can be positioned more oriented in a second direction relative to the first edge of the n-type Ge region 135. For example, the p-type Ge region 134 contains a concentration of 0.5 × 10⁻⁶. 20 cm -3 Up to 1.5×10 20 cm -3 Boron. For example, n-type Ge region 135 contains boron at a concentration of 0.5 × 10⁻⁶. 20 cm -3Up to 1.5×10 20 cm -3 Phosphorus. Type I Ge region 136 may be unintentionally doped, but it can contain minimal impurities, for example, a concentration not exceeding 1.5 × 10⁻⁶. 15 cm -3 Ge layer 130 is an example of a second semiconductor layer, p-type Ge region 134 is an example of a fourth region, n-type Ge region 135 is an example of a fifth region, and i-type Ge region 136 is an example of a sixth region.

[0105] The Si oxide film 141 is formed as a laminate covering the Si layer 120 and the Ge layer 130. An opening 141P reaching the p-type Ge region 134 and an opening 141N reaching the n-type Ge region 135 are formed in the Si oxide film 141. A metal film 143P, which is in ohmic contact with the p-type Ge region 134 through the opening 141P, and a metal film 143N, which is in ohmic contact with the n-type Ge region 135 through the opening 141N, are formed on the Si oxide film 141. The metal films 143P and 143N contain, for example, aluminum (Al). The metal film 143P is an example of a first electrode, and the metal film 143N is an example of a second electrode.

[0106] Here, the function and effect of the semiconductor photodetector 100 will be described. Figure 6 This is a diagram illustrating the distribution of guided light and electric field in a semiconductor photodetector 100 according to the first embodiment. Note that in Figure 6 In the diagram, the thicker the dashed line indicating the electric current, the stronger the electric field.

[0107] The semiconductor photodetector 100 uses a Si layer 120 as an optical waveguide, and light propagating through the Si layer 120 is evanescently coupled into the Ge layer 130. The guided light 191 incident on the Ge layer 130 is then absorbed by the Ge layer 130, generating photocarriers within it. Additionally, an electric field 192 is generated between the n-type Ge region 135 and the p-type Ge region 134. Since the Si layer 120 has a p-type Si region 121, an i-type Si region 123, and an n-type Si region 122, an electric field 193 is also generated between the p-type Si region 121 and the n-type Si region 122 due to the built-in potential of the PIN structure, where the electric field 193 contributes to the movement of photocarriers. Therefore, in the semiconductor photodetector 100, the electric field 193 of the PIN structure within the Si layer 120 is superimposed on the electric field 192 of the PIN structure within the Ge layer 130, where the Ge layer 130 serves as a light-absorbing layer. Therefore, according to the semiconductor photodetector 100, a greater electric field intensity can be provided in the region of high intensity of the guided light 191, while reducing ineffective absorption in the metal. As a result, excellent photoresponsivity and operating speed can be obtained.

[0108] Furthermore, in this embodiment, the spot size conversion unit 162 expands the guided light mode that has been strongly confined within the waveguide region 161, thereby improving the coupling with the Ge layer 130. Therefore, the optical responsivity can be improved.

[0109] In the following sections, simulations relating to each of the first examples and the first implementation will be described. Figure 7 This is a cross-sectional view illustrating the construction of a simulated semiconductor photodetector. Figure 8 This is a graph illustrating the impurity concentration distribution in the simulation for the first example. Figure 9 This is an example of a contour plot showing the distribution of impurity concentration in a simulation of the first embodiment.

[0110] The simulated semiconductor photodetector 100S includes a Si layer 120S and a Ge layer 130S on the Si layer 120S. The Si layer 120S is 200 nm thick, and the Ge layer 130S is 500 nm thick. Al films 143PS and 143NS are formed on the Ge layer 130S. The Si layer 120S, Ge layer 130S, Al film 143PS, and Al film 143NS are covered with a Si oxide film 141S.

[0111] In the simulation of the first example, as Figure 8 As shown, assuming p-type impurities are present at a rate of 1 × 10⁻⁶ 21 cm -2 The concentration is contained in the portion corresponding to p-type Ge region 134, and the n-type impurities are in the range of 1 × 10⁻⁶. 21 cm -3 The concentration is contained in the portion corresponding to the n-type Ge region 135. In the simulation of the first embodiment, as... Figure 9 As shown, assuming that besides Figure 8 In addition to the impurities shown, p-type impurities are present at a rate of 1 × 10⁻� 20 cm -3 The concentration is contained in the portion corresponding to p-type Si region 121, and the n-type impurities are in the range of 1 × 10⁻⁶. 20 cm -3 The concentration is contained in the portion corresponding to the n-type Si region 122.

[0112] Then, the electric field intensity distribution is calculated when a potential difference of 1V is applied externally between Al film 143PS and Al film 143NS. Figure 10 This is a diagram illustrating the contour plot of the electric field intensity distribution in the simulation for the first example. Figure 11 This is a diagram illustrating the contour plot of the electric field intensity distribution in a simulation of the first embodiment.

[0113] like Figure 10 and Figure 11 As shown, in the simulation of the first example, the electric field strength is high in the upper portion of the Ge layer 130S, but extremely low in the lower portion of the Ge layer 130S. In contrast, in the simulation of the first embodiment, not only is the electric field strength high in the upper portion of the Ge layer 130S, but the region with high electric field strength also extends above the lower portion.

[0114] Figure 12 This is a diagram illustrating the electric field intensity in a region 100 nm above the bottom surface of the Ge layer 130S. This region 100 nm above the bottom surface of the Ge layer 130S corresponds to a region with high intensity of guided light. Figure 12 Examples Figure 10 and Figure 11 The electric field intensity in the region indicated by the dashed line 139. Figure 12 The horizontal axis represents Ge layer 130 relative to Figure 10 and Figure 11 The center of the horizontal axis shown is located in the horizontal axis direction. For example... Figure 12 As shown, in the region 100 nm above the bottom surface of the Ge layer 130S, the maximum field strength in the simulation for the first embodiment is approximately twice that in the simulation for the first example.

[0115] As a result of this simulation, according to the first embodiment, compared with the first example, the transmission speed of optical carriers is improved and the response characteristics are enhanced. Furthermore, as... Figure 9 As shown, since there are virtually no impurities near the bottom surface of the Ge layer 130S, the reduction in photoresponsivity caused by free carrier absorption is prevented.

[0116] Next, a method for manufacturing the semiconductor photodetector 100 according to the first embodiment will be described. Figures 13 to 27 This is a top view illustrating a method for manufacturing a semiconductor photodetector 100 according to a first embodiment. Figures 28 to 42 This is a cross-sectional view illustrating a method for manufacturing a semiconductor photodetector 100 according to the first embodiment.

[0117] First, such as Figure 13 and Figure 28As shown, an SOI substrate 110 is fabricated to process a Si layer 120. For example, the Si substrate 111 may be 700 μm to 800 μm thick, the Si oxide film 112 may be 1.5 μm to 2.5 μm thick, and the Si layer 120 may be 200 nm to 300 nm thick. The Si layer 120 can be fabricated by electron beam (EB) lithography and inductively coupled plasma (ICP) dry etching. For example, in the waveguide region 161, the Si layer 120 is processed into a line shape extending in one direction. In the spot size conversion section 162, the Si layer 120 is processed into a planar shape extending in a conical shape from the waveguide region 161 toward the photoelectric conversion section 163. In the photoelectric conversion section 163, the Si layer 120 is processed into a rectangular planar shape. For example, in the light guide section 160, the width of the Si layer 120 is 400 nm to 600 nm in the waveguide region 161, 400 nm to 600 nm at the boundary between the waveguide region 161 and the light spot size conversion section 162, and 800 nm to 1100 nm at the boundary between the light spot size conversion section 162 and the photoelectric conversion section 163. The size of the Si layer 120 in the photoelectric conversion section 163 is 30 μm to 40 μm in the light propagation direction and 5 μm to 15 μm in the direction perpendicular to the light propagation direction (the direction parallel to the first and second directions). Figure 28 Corresponding to along Figure 13 Cross-sectional view of the XXVIII-XXVIII line.

[0118] Then, as Figure 14 and Figure 29 As shown, a photoresist mask 151 is formed on an SOI substrate 110 having an opening 151P, which opens the area where a p-type Si region 121 is to be formed. The photoresist mask 151 can be formed by coating, exposing, and developing a photoresist agent. Subsequently, the p-type Si region 121 is formed in the Si layer 120 by ion implantation of a p-type impurity such as boron. Figure 29 Corresponding to along Figure 14 A cross-sectional view of the XXIX-XXIX line.

[0119] Subsequently, as Figure 15 and Figure 30 As shown, the photoresist mask 151 is removed, and a photoresist mask 152 with an opening 152N is formed on the SOI substrate 110, which opens the area where the n-type Si region 122 is to be formed. The photoresist mask 152 can be formed by coating, exposing, and developing a photoresist agent. Then, the n-type Si region 122 is formed in the Si layer 120 by ion implantation of an n-type impurity such as phosphorus. The remaining portion of the Si layer 120 in the photoelectric conversion section 163 is the i-type Si region 123. Figure 30 Corresponding to along Figure 15 A cross-sectional view of line XXX-XXX in the diagram.

[0120] Afterwards, the photoresist mask 152 is removed, as follows: Figure 16 and Figure 31 As shown. Subsequently, a Si oxide film 141A is formed on the SOI substrate 110. For example, the Si oxide film 141A can be formed by a chemical vapor deposition (CVD) process, and the thickness of the Si oxide film 141A is 15 nm to 25 nm. Subsequently, the p-type and n-type impurities implanted in the Si layer 120 are activated by annealing. The annealing is performed at a temperature of, for example, 900 °C to 1100 °C for a period of 0.5 minutes to 2 minutes. Figure 31 Corresponding to along Figure 16 A cross-sectional view of the XXXI-XXXI line.

[0121] Subsequently, as Figure 17 and Figure 32 As shown, a photoresist mask 153 with an opening 153X is formed on a Si oxide film 141A, the opening 153X opening the area where the Ge layer 130 is to be formed. The photoresist mask 153 can be formed by coating, exposing, and developing a photoresist agent. For example, the total length of the opening 153X is 25 μm to 35 μm, and the total width of the opening 153X is 5 μm to 10 μm. Figure 32 Corresponding to along Figure 17 Cross-sectional view of line XXXII-XXXII in the diagram.

[0122] Then, as Figure 18 and Figure 33 As shown, an opening 142 is formed in the Si oxide film 141A by dry etching. Then the photoresist mask 153 is removed. Figure 33 Corresponding to along Figure 18 Cross-sectional view of line XXXIII-XXXIII in the diagram.

[0123] Then, as Figure 19 and Figure 34 As shown, a Ge layer 130 is formed on the Si layer 120 inside the opening 142. The Ge layer 130 can be formed, for example, by a low-pressure (LP) CVD process to have a thickness of 400 nm to 600 nm. For example, the Ge layer 130 is heteroepitaxially grown into a mesa shape. Figure 34 Corresponding to along Figure 19 A cross-sectional view of line XXXIV-XXXIV in the diagram.

[0124] Then, as Figure 20 and Figure 35As shown, a photoresist mask 154 with an opening 154P is formed on the Si oxide film 141A and the Ge layer 130, which opens the area where the p-type Ge region 134 is to be formed. The photoresist mask 154 can be formed by coating, exposing, and developing a photoresist. Subsequently, the p-type Ge region 134 is formed in the Ge layer 130 by ion implantation of a p-type impurity such as boron. Figure 35 Corresponding to along Figure 20 Cross-sectional view of the XXXV-XXXV line.

[0125] Subsequently, as Figure 21 and Figure 36 As shown, photoresist mask 154 is removed, and photoresist mask 155 with an opening 155N is formed on the Si oxide film 141A and the Ge layer 130, which opens the area where the n-type Ge region 135 is to be formed. The photoresist mask 155 can be formed by coating, exposing, and developing a photoresist agent. Then, the n-type Ge region 135 is formed in the Ge layer 130 by ion implantation of an n-type impurity such as phosphorus. The remaining portion of the Ge layer 130 is the i-type Ge region 136. Figure 36 Corresponding to along Figure 21 Cross-sectional view of line XXXVI-XXXVI in the diagram.

[0126] After that, as Figure 22 and Figure 37 As shown, the photoresist mask 155 is removed, and a Si oxide film is formed on the Si oxide film 141A by, for example, a CVD process to cover the Ge layer 130, thereby forming a Si oxide film 141 containing the Si oxide film 141A. Subsequently, annealing is performed to activate the p-type and n-type impurities implanted in the Ge layer 130. The annealing is performed at a temperature of, for example, 500°C to 700°C for a period of 5 to 15 seconds. Figure 37 Corresponding to along Figure 22 A cross-sectional view of line XXXVII-XXXVII in the diagram.

[0127] Then, as Figure 23 and Figure 38 As shown, a photoresist mask 156 is formed on a Si oxide film 141, wherein the photoresist mask 156 has an opening 156P and an opening 156N, the opening 156P opening the region where the opening 141P is intended to be formed, and the opening 156N opening the region where the opening 141N is intended to be formed. The photoresist mask 156 can be formed by coating, exposing, and developing a photoresist agent. Figure 38 Corresponding to along Figure 23 Cross-sectional view of the XXXVIII-XXXVIII line.

[0128] Then, as Figure 24 and Figure 39As shown, an opening 141P reaching the p-type Ge region 134 and an opening 141N reaching the n-type Ge region 135 are formed in the Si oxide film 141. For example, the openings 141P and 141N can be formed by dry etching. Then the photoresist mask 156 is removed. Figure 39 Corresponding to along Figure 24 A cross-sectional view of the XXXIX-XXXIX line.

[0129] Then, as Figure 25 and Figure 40 As shown, openings 141P and 141N are filled to form a metal film 143 on the Si oxide film 141. For example, an aluminum film is formed by a sputtering process as the metal film 143. Figure 40 Corresponding to along Figure 25 Cross-sectional view of the XL-XL line in the diagram.

[0130] Then, as Figure 26 and Figure 41 As shown, a photoresist mask 157 is formed to cover the areas where metal films 143P and 143N are intended to be formed. The photoresist mask 157 can be formed by coating, exposing, and developing a photoresist agent. Figure 41 Corresponding to along Figure 26 A cross-sectional view of the XLI-XLI line in the diagram.

[0131] Then, metal films 143P and 143N are formed by dry etching of metal film 143, as follows: Figure 27 and Figure 42 As shown. Then remove the photoresist mask 157. Figure 42 Corresponding to along Figure 27 A cross-sectional view of the XLII-XLII line in the diagram.

[0132] The semiconductor photodetector 100 according to the first embodiment can be manufactured in this manner.

[0133] (Second Implementation)

[0134] Next, the second embodiment will be described. The main difference between the second embodiment and the first embodiment lies in the Si layer structure. Figure 43 This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the second embodiment. Figure 5 Same, Figure 43 Corresponding to along Figure 3 and Figure 4 A cross-sectional view of the VV line in the diagram.

[0135] like Figure 43As shown, in the semiconductor photodetector 200 according to the second embodiment, the Si layer 120 has a p-type Si region 221 replacing the p-type Si region 121 and an n-type Si region 222 replacing the n-type Si region 122. The p-type Si region 221 and the n-type Si region 222 are formed on the top surface of the i-type Si region 123. The p-type Si region 221 and the n-type Si region 222 are separated from each other in a direction perpendicular to the propagation direction of light guided from the light guide portion 160 to the photoelectric conversion portion 163. A portion of the i-type Si region 123 is inserted between the p-type Si region 221 and the n-type Si region 222. Viewed from the i-type Si region 123, the p-type Si region 221 is located in a first direction, and viewed from the i-type Si region 123, the n-type Si region 222 is located in a second direction. For example, the p-type Si region 221 contains a concentration of 0.5 × 10⁻⁶. 19 cm -3 Up to 1.5×10 19 cm -3 Boron. For example, n-type Si region 222 contains boron at a concentration of 0.5 × 10⁻⁶. 19 cm -3 Up to 1.5×10 19 cm -3 Phosphorus. p-type Si region 221 is an example of the first region, while n-type Si region 222 is an example of the second region, and i-type Si region 123 is an example of the third region.

[0136] In the semiconductor photodetector 200, in a planar view, the p-type Si region 221 and the p-type Ge region 134 are separated in a first direction, and the n-type Si region 222 and the n-type Ge region 135 are separated in a second direction. For example, the p-type Si region 221 is positioned more towards the first direction relative to the Ge layer 130, while the n-type Si region 222 is positioned more towards the second direction relative to the Ge layer 130. Therefore, the Ge layer 130 does not cover the p-type Si region 221 and the n-type Si region 222.

[0137] Other structures are similar to those in the first embodiment.

[0138] The second embodiment has the same effects as the first embodiment. Furthermore, even if the guided light 191 is distributed within the Si layer 120, the p-type Si region 221 and the n-type Si region 222 are separated from the region with strong guided light 191. Therefore, free carrier absorption in the Si layer can be further reduced.

[0139] (Third Implementation)

[0140] Next, the third embodiment will be described. The main difference between the third embodiment and the first embodiment, etc., lies in the structure of the Si layer. Figure 44This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the third embodiment. Figure 5 Same, Figure 44 Corresponding to along Figure 3 and Figure 4 A cross-sectional view of the VV line in the diagram.

[0141] like Figure 44 As shown, in the semiconductor photodetector 300 according to the third embodiment, the Si layer 120 has a p-type Si region 321 replacing the p-type Si region 121 and an n-type Si region 322 replacing the n-type Si region 122. The p-type Si region 321 and the n-type Si region 322 are formed on the top surface of the i-type Si region 123. The p-type Si region 321 and the n-type Si region 322 are separated from each other in a direction perpendicular to the propagation direction of light guided from the light guide portion 160 to the photoelectric conversion portion 163. A portion of the i-type Si region 123 is inserted between the p-type Si region 321 and the n-type Si region 322. Viewed from the i-type Si region 123, the p-type Si region 321 is located in a first direction, and viewed from the i-type Si region 123, the n-type Si region 322 is located in a second direction. For example, the p-type Si region 321 contains a concentration of 0.5 × 10⁻⁶. 19 cm -3 Up to 1.5×10 19 cm -3 Boron. For example, n-type Si region 322 contains boron at a concentration of 0.5 × 10⁻⁶. 19 cm -3 Up to 1.5×10 19 cm -3 Phosphorus. p-type Si region 321 is an example of the first region, n-type Si region 322 is an example of the second region, and i-type Si region 123 is an example of the third region.

[0142] In the semiconductor photodetector 300, in a planar view, a p-type Si region 321 is disposed in a direction from the inside to the outside of the Ge layer 130, while an n-type Si region 322 is disposed in a direction from the inside to the outside of the Ge layer 130. Both the p-type Si region 321 and the n-type Si region 322 have regions covered by the Ge layer 130 and regions not covered. In directions parallel to the first and second directions, the p-type Si region 321 is formed to be larger than the p-type Si region 121, and the n-type Si region 322 is formed to be larger than the n-type Si region 122.

[0143] In the plan view, the first edge of the p-type Ge region 134 or the p-type Si region 321 represents the edge positioned distal to the i-type Ge region 136 or the i-type Si region 123 and facing a first direction, while the second edge of the p-type Ge region 134 or the p-type Si region 321 represents the edge positioned distal to the i-type Ge region 136 or the i-type Si region 123 and facing a second direction. In the plan view, the distance between the second edge of the p-type Si region 321 and the second edge of the p-type Ge region 134 is greater than the distance between the second edges of the p-type Si region 121 and the p-type Ge region 134 in the first embodiment. In the plan view, the distance between the first edge of the n-type Si region 322 and the first edge of the n-type Ge region 135 is greater than the distance between the first edges of the n-type Si region 122 and the n-type Ge region 135 in the first embodiment.

[0144] Other structures are similar to those in the first embodiment.

[0145] The third embodiment has the same effects as the first embodiment. Similar to the second embodiment, it easily reduces free carrier absorption in the p-type Si region 321 and the n-type Si region 322.

[0146] Based on the application of semiconductor photodetectors, it is desirable to consider increasing the electric field strength caused by the p-type Si region and the n-type Si region, and reducing the absorption of free carriers in the p-type Si region and the n-type Si region, in order to select the arrangement of the p-type Si region and the n-type Si region.

[0147] (Fourth Implementation)

[0148] Next, the fourth embodiment will be described. The main difference between the fourth embodiment and the second embodiment lies in the structure of the Si and Ge layers. Figure 45 This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the fourth embodiment. Figure 5 Same, Figure 45 Corresponding to along Figure 3 and Figure 4 A cross-sectional view of the VV line in the diagram.

[0149] like Figure 45As shown, in the semiconductor photodetector 400 according to the fourth embodiment, a recess 124 is formed in the i-type Si region 123 between the p-type Si region 221 and the n-type Si region 222, and a Ge layer 430 is formed to fill the recess 124 instead of the Ge layer 130. In the fourth embodiment, in the plan view, the light guiding layer of the light guiding portion 160 and the light absorbing layer of the photoelectric conversion portion 163 are located at the same height level, and the guided light is directly introduced into the light absorbing layer. That is, the semiconductor photodetector 400 utilizes butt-coupled light coupling. For example, the recess 124 can be located between 80 nm and 120 nm in depth. The thickness of the Si layer 120 is thinner in the portion where the recess 124 is formed than in the portion surrounding the recess 124.

[0150] Other structures are similar to those in the second embodiment.

[0151] The fourth embodiment has the same effects as the second embodiment. Since the Ge layer 430 includes a portion located between the p-type Si region 221 and the n-type Si region 222 in a direction parallel to the first and second directions, it is easy to apply an electric field from the p-type Si region 221 and the n-type Si region 222 to the region where the guided light intensity is high. Therefore, the operating speed can be improved.

[0152] Next, a method for manufacturing the semiconductor photodetector 400 according to the fourth embodiment will be described. Figure 46 and Figure 47 This is a cross-sectional view illustrating a method for manufacturing a semiconductor photodetector 400 according to the fourth embodiment.

[0153] First, as in the first embodiment, the process is performed until the opening 142 is formed in the Si oxide film 141A. Then the photoresist mask 153 is removed (see...). Figure 33 Note that a p-type Si region 221 can be formed by varying the position and shape of the opening 151P of the photoresist mask 151, and an n-type Si region 222 can be formed by varying the position and shape of the opening 152N of the photoresist mask 152. Then, as... Figure 46 As shown, the recess 124 is formed by etching the Si layer 120 using the Si oxide film 141A as a mask. For example, the recess 124 can be formed by ICP dry etching.

[0154] Then, a Ge layer 430 is formed on the Si layer 120 to fill the recess 124, such as Figure 47 As shown. The Ge layer 430 can be formed, for example, by an LPCVD process. For example, the Ge layer 430 is heteroepitaxially grown from the recess 124 into a mesa shape.

[0155] Subsequently, the process following the formation of the Si oxide film 141 is performed, as in the first embodiment.

[0156] The semiconductor photodetector 400 according to the fourth embodiment can be manufactured in this manner.

[0157] (Fifth Implementation)

[0158] Next, the fifth embodiment will be described. The main difference between the fifth embodiment and the third embodiment lies in the structure of the Si and Ge layers. Figure 48 This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the fifth embodiment. Figure 5 Same, Figure 48 Corresponding to along Figure 3 and Figure 4 Cross-sectional view of the VV line.

[0159] like Figure 48 As shown, in the semiconductor photodetector 500 according to the fifth embodiment, a recess 125 is formed in the portion of the i-type Si region 123 located between the p-type Si region 321 and the n-type Si region 322, in the portion of the p-type Si region 321 facing the second direction, and in the portion of the n-type Si region 322 facing the first direction. A Ge layer 530 is formed to fill the recess 125, replacing the Ge layer 130. That is, the semiconductor photodetector 500 utilizes docking-type optical coupling in the same manner as in the fourth embodiment. For example, the depth of the recess 125 can be between 80 nm and 120 nm. The thickness of the Si layer 120 is thinner in the portion where the recess 125 is formed than in the portion surrounding the recess 125.

[0160] The other structures are the same as those in the third embodiment.

[0161] The fifth embodiment has the same effects as the third embodiment. Since the Ge layer 530 includes a portion inserted between the p-type Si region 321 and the n-type Si region 322 in a direction parallel to the first and second directions, it is easy to apply an electric field from the p-type Si region 321 and the n-type Si region 322 to the region with high intensity of the guided light. Therefore, the operating speed can be improved.

[0162] (Sixth Implementation Method)

[0163] Next, the sixth embodiment will be described. The difference between the sixth embodiment and the third embodiment lies in the structure of the metal film. Figure 49 This is a cross-sectional view illustrating the structure of a semiconductor photodetector according to the sixth embodiment. Figure 5 Same, Figure 49 Corresponding to along Figure 3 and Figure 4A cross-sectional view of the VV line in the diagram.

[0164] like Figure 49 As shown, in the semiconductor photodetector 600 according to the sixth embodiment, an opening 641P extending to a p-type Si region 321 and an opening 641N extending to an n-type Si region 322 are formed in a Si oxide film 141. A metal film 643P, which is in ohmic contact with the p-type Si region 321 through the opening 641P, and a metal film 643N, which is in ohmic contact with the n-type Si region 322 through the opening 641N, are formed on the Si oxide film 141. The metal films 643P and 643N comprise, for example, aluminum (Al). The metal film 643P is an example of a third electrode, while the metal film 643N is an example of a fourth electrode.

[0165] A semiconductor photodetector 600 can be used in the receiver. In this receiver, circuitry 670 is connected to metal films 643P and 643N to apply a first voltage to metal film 643P and a second voltage lower than the first voltage to metal film 643N. Circuitry 670 includes, for example, a first inductor 671 connected between metal films 143P and 643N, a second inductor 672 connected between metal films 143N and 643N, and a DC power supply 673 connected between metal films 143P and 143N. The positive electrode of the DC power supply 673 is connected to metal film 143P, and the negative electrode is connected to metal film 143N. Metal film 143N is grounded, and an external terminal 674 is connected to metal film 143P.

[0166] In circuit 670, a DC voltage (bias) applied from DC power supply 673 to the gap between metal films 643P and 643N is also applied to the gap between metal films 143P and 143N. The high-frequency component of the modulation signal corresponding to the photoelectric conversion generated by Ge layer 130 flows between metal films 143P and 143N, and the modulation signal can be detected by external terminal 674. However, the first inductor 671 and the second inductor 672 are configured such that the high-frequency component corresponding to the modulation signal does not flow between metal films 643P and 643N. Therefore, the path of the modulation signal does not include the heterojunction interface between Si layer 120 and Ge layer 130. Therefore, in the sixth embodiment, a reduction in response characteristics, such as that seen in heterojunction PDs, can be avoided. Furthermore, the structure of the sixth embodiment can further enhance the electric field strength between p-type Si region 321 and n-type Si region 322, thereby improving the operating speed.

[0167] Next, a method for manufacturing the semiconductor photodetector 600 according to the sixth embodiment will be described. Figures 50 to 52This is a cross-sectional view illustrating a method for manufacturing a semiconductor photodetector 600 according to the sixth embodiment.

[0168] First, as in the first embodiment, the process until the Si oxide film 141 is formed is performed (see [link to previous embodiment]). Figure 37 Note that a p-type Si region 321 can be formed by varying the position and shape of the opening 151P of the photoresist mask 151, and an n-type Si region 322 can be formed by varying the position and shape of the opening 152N of the photoresist mask 152. Subsequently, as... Figure 50 As shown, a photoresist mask 656 is formed on a Si oxide film 141. The photoresist mask 656 includes an opening 156P that opens the region where an opening 141P is intended to be formed, an opening 156N that opens the region where an opening 141N is intended to be formed, an opening 656P that opens the region where an opening 641P is intended to be formed, and an opening 656N that opens the region where an opening 641N is intended to be formed. The photoresist mask 656 can be formed by coating, exposing, and developing a photoresist agent.

[0169] Then, as Figure 51 As shown, an opening 141P reaching the p-type Ge region 134, an opening 141N reaching the n-type Ge region 135, an opening 641P reaching the p-type Si region 321, and an opening 641N reaching the n-type Si region 322 are formed in the Si oxide film 141. For example, openings 141P, 141N, 641P, and 641N can be formed by dry etching. Then, the photoresist mask 656 is removed.

[0170] like Figure 52 As shown, openings 141P, 141N, 641P, and 641N are then filled to form a metal film 143 on the Si oxide film 141. The metal film 143 may be, for example, an aluminum film formed by a sputtering process. Afterward, a photoresist mask 657 is formed to cover the areas where metal films 143P, 143N, 643P, and 643N are intended to be formed. The photoresist mask 657 can be formed by coating, exposing, and developing a photoresist agent.

[0171] Then, the metal film 143 is dry-etched to form metal films 143P, 143N, 643P, and 643N. The photoresist mask 657 is then removed (see...). Figure 49 ).

[0172] The semiconductor photodetector 600 according to the sixth embodiment can be manufactured in this manner.

[0173] The semiconductor photodetector according to embodiments one through six is ​​suitable for integrated circuits, where, for example, a semiconductor device for processing electrical signals and the semiconductor photodetector are integrated on a Si substrate, enabling high-speed optical communication. For example, the semiconductor photodetector according to embodiments one through six is ​​suitable for high-speed optical communication between a computer's central processing unit (CPU) and memory, or high-speed optical communication between CPUs. It is particularly promising for next-generation high-capacity optical interconnect applications. It also holds promise for coherent communication applications used in long-distance, high-volume communication.

[0174] Note that in this disclosure, the materials of the first semiconductor layer and the second semiconductor layer are not limited to Si and Ge. For example, Si can be used. x Ge 1-x Layer (0≤x<1) or Ge 1-x Sn x The layer (0≤x<1) serves as the second semiconductor layer.

[0175] (Seventh Implementation)

[0176] Next, a seventh embodiment will be described. The seventh embodiment relates to a Si photonic coherent integrated device, which is an example of an integrated optical device including a semiconductor photodetector. Figure 53 This is a block diagram illustrating the structure of a Si photonic coherent integrated device according to the seventh embodiment.

[0177] like Figure 53 As shown, the Si photonic coherent integrated device 700 according to the seventh embodiment includes an input unit 710 configured to receive local light emission LO, an input unit 720 configured to receive signal light SI, and an output unit 730 configured to output signal light SO to be transmitted.

[0178] The Si photonic coherent integrated device 700 includes a polarization splitter element 721 connected to an input unit 720, two mixers 723A and 723B connected to the polarization splitter element 721, and a polarization rotation element 722 connected between the polarization splitter element 721 and the mixers 723B. The Si photonic coherent integrated device 700 also includes: a photodetector 724A configured to convert an optical signal output from the mixer 723A into an electrical signal; and a photodetector 724B configured to convert an optical signal output from the mixer 723B into an electrical signal. Each of the photodetectors 724A and 724B includes a plurality of semiconductor photodetectors having the same configuration as those of semiconductor photodetectors according to any one of the first to sixth embodiments. The mixers 723A and 723B also receive localized light emission LO input to the input unit 710.

[0179] The Si photonic coherent integrated device 700 includes a polarization multiplexing element 731 connected to an output unit 730, a silicon IQ modulator 733 connected to the polarization multiplexing element 731, and a polarization rotation element 732 disposed in the waveguide of the Q signal output from the silicon IQ modulator 733. A portion of the local light emission (LO) input is introduced into the silicon IQ modulator 733 through an input unit 710.

[0180] In the optical transmission device according to the seventh embodiment, each of the photodetectors 724A and 724B includes a semiconductor photodetector having the same structure as the semiconductor photodetector according to any one of the first to sixth embodiments.

[0181] According to this disclosure, both high operating speed and high photoresponse can be achieved simultaneously.

[0182] Although the preferred embodiments have been described in detail above, various modifications and substitutions can be made to the above embodiments without departing from the scope of the claims.

[0183] All examples and conditional language listed herein are intended for illustrative purposes to assist the reader in understanding the inventive concepts contributed by the inventors to the advancement of the art, and should be interpreted as not being limited to these specifically listed examples and conditions. The organization of such examples in this specification is not intended to indicate superiority or inferiority of the invention. Although embodiments of the invention have been described in detail, it should be understood that various changes, substitutions, and modifications can be made thereto without departing from the spirit and scope of the invention.

[0184] Cross-references to related applications

[0185] This application is based on and claims priority to Japanese Patent Application No. 2021-118455, filed with the Japan Patent Office on July 19, 2021, the entire contents of which are incorporated herein by reference.

Claims

1. A semiconductor photodetector, the semiconductor photodetector comprising: A first semiconductor layer having a first refractive index and a first band gap; A second semiconductor layer is formed on the first semiconductor layer, and the second semiconductor layer has a second refractive index and a second band gap; First electrode; as well as Second electrode, Wherein, the second refractive index is greater than the first refractive index, and The second bandgap is smaller than the first bandgap. in, The first semiconductor layer includes: p-type first region; n-type second region; and A non-conductive third region, located between the first region and the second region, and The second semiconductor layer includes: p-type fourth region, which is in ohmic contact with the first electrode; An n-type fifth region, which is in ohmic contact with the second electrode; and A non-conductive sixth region, located between the fourth and fifth regions, wherein... From the perspective of the third region, the first region is positioned more towards the first direction. Viewed from the third region, the second region is positioned more towards a second direction opposite to the first direction. From the perspective of the sixth region, the fourth region is positioned more towards the first direction. From the perspective of the sixth region, the fifth region is positioned more towards the second direction. In the plan view, the third region and the sixth region overlap with each other, and The sixth region is located between the fourth region and the first semiconductor layer, and between the fifth region and the first semiconductor layer.

2. The semiconductor photodetector according to claim 1, wherein, The thickness of the fourth region and the thickness of the fifth region are less than or equal to half the thickness of the second semiconductor layer, and The fourth region and the fifth region are separated from the first semiconductor layer in the thickness direction.

3. The semiconductor photodetector according to claim 1, wherein, A recess is formed in the region where the first semiconductor layer contacts the second semiconductor layer.

4. The semiconductor photodetector according to claim 1, wherein, In the plan view, Each of the first region, the second region, the fourth region, and the fifth region has a first edge and a second edge, the first edge being positioned toward the first direction and the second edge being positioned toward the second direction, and wherein... In the plan view, The second edge of the first region is positioned more towards the first direction relative to the second edge of the fourth region, and The first edge of the second region is positioned to face the second direction more directly than the first edge of the fifth region.

5. The semiconductor photodetector according to claim 1, wherein, In the plan view, The first region is separated from the fourth region in the first direction, and the second region is separated from the fifth region in the second direction.

6. The semiconductor photodetector according to claim 1, wherein, The first semiconductor layer is a Si layer, and The second semiconductor layer is Si x Ge 1-x Layer, where 0 ≤ x < 1.

7. The semiconductor photodetector according to claim 1, wherein, The first semiconductor layer is a Si layer, and The second semiconductor layer is Ge 1-x Sn x Layer, where 0 ≤ x < 1.

8. The semiconductor photodetector according to claim 1, further comprising: A photoelectric conversion unit having a first semiconductor layer and a second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer overlap each other in a plan view; as well as A light guide section is connected to the photoelectric conversion section, wherein... The propagation direction of the light guided from the light guide section to the photoelectric conversion section is perpendicular to the first direction and the second direction.

9. The semiconductor photodetector according to claim 1, further comprising: The third electrode is in ohmic contact with the first region; and The fourth electrode is in ohmic contact with the second region.

10. A receiver comprising: The semiconductor photodetector according to claim 9; as well as A circuit for applying a first voltage to the third electrode and a second voltage to the fourth electrode, the second voltage being lower than the first voltage.

11. The receiver according to claim 10, wherein The circuit includes: A first inductor is connected between the first electrode and the third electrode; A second inductor is connected between the second electrode and the fourth electrode; as well as A DC power supply is connected between the first electrode and the second electrode.

12. An integrated optical device, the integrated optical device comprising: The semiconductor photodetector according to claim 1.

Images