Data processing method and device

Abstract

The embodiment of the present application provides a data processing method and device, which relates to the field of communication technology and is used to reduce the number of times a memory persistence daemon is scheduled for execution. The scheme includes: receiving a first data operation request, the first data operation request includes data and a first address corresponding to the data, the first address being the storage address of the data in the data processing device; according to the first address, determining the target entry corresponding to the first address from the N entries in the log list, wherein the N entries are mapped one-to-one to the N cache lines in the LLC, and the log list is stored in a non-volatile fast storage medium; if the cache line corresponding to the address written by the data operation request before the first data operation request is the same as the cache line corresponding to the first address, then deleting the log in the target entry, and recording the log corresponding to the first data operation request on the target entry according to the first data operation request; and storing the data.

Description

[0001] This application is a divisional application of the invention patent application with application number 201810779536.6 submitted to the China Patent Office, application date July 16, 2018, and invention name “A data processing method and device”. Technical Field

[0002] The embodiments of the present application relate to the field of communication technologies, and in particular, to a data processing method and apparatus. Background Art

[0003] Storage class memory (SCM) refers to byte-level storage whose data persists after a power outage. It is also known as non-volatile memory. Compared to dynamic random access memory (DRAM), SCM offers the advantages of non-volatility and higher storage density. As SCM matures, existing computer system architectures face significant innovation.

[0004] Remote direct memory access (RDMA) bypasses the kernel software stack and directly reads and writes data in remote memory via direct memory access (DMA) via the hardware RDMA network interface card (RNIC). In distributed storage systems, combining RDMA with SCM is essential to fully utilize the media characteristics of SCM.

[0005] Although the SCM is non-volatile, the cache memories (cache) at all levels in current processors are volatile, meaning that after a power outage, the data in the cache will be lost. Therefore, to ensure high data reliability, cache data must be flushed back to the SCM in a timely manner to ensure data persistence. If accessing data stored in local memory, the cache line can be flushed back using the CLFLUSH instruction. If accessing data stored remotely via RDMA, after accessing the remote data, the remote central processing unit (CPU) must be notified to call the CLFLUSH instruction to flush the corresponding cache line back to the SCM. This entire process results in complex interaction procedures for accessing remote data and extremely high latency, making it impossible to fully utilize the characteristics of the SCM and RDMA.

[0006] like Figure 1As shown in the figure, if the CPU's data direct input / output (DDIO) is enabled, the client first requests to write data to the server using an RDMA Write operation. After receiving a response from the target server indicating that the requested data has been written to the server, the client then initiates a Persist operation request to the server using an RDMA Send operation, requesting that the server persist the data in memory.

[0007] but, Figure 1 When the client writes data to the server, it needs to call the network interface six times, transmit the data three times, and flush the CPU cache line once. If the operating system scheduling and other overhead involved are taken into account, then Figure 1 The latency in this case is tens of microseconds. In comparison, an RDMA write only takes 1 to 2 microseconds, while an SCM write can take up to 500 nanoseconds. This shows that the above solution completely undermines the benefits of SCM. Summary of the Invention

[0008] Embodiments of the present application provide a data processing method and apparatus for reducing the number of times a memory persistence daemon process is scheduled for execution.

[0009] In order to solve the above technical problems, the embodiments of the present application provide the following technical solutions:

[0010] In a first aspect, an embodiment of the present application provides a data processing method, the data processing method comprising: receiving a first data operation request including data and a first address corresponding to the data, wherein the first address is a storage address of the data in a data processing device;

[0011] determining, based on the first address, a target entry corresponding to the first address from N entries in a log list, wherein the N entries are mapped one-to-one to N cache lines in the LLC, one entry is used to record a log corresponding to a data operation request sent to the data processing device, N is an integer greater than or equal to 1, and the log list is stored in the non-volatile fast storage medium;

[0012] If the cache line corresponding to the address written by the data operation request before the first data operation request is the same as the cache line corresponding to the first address, the log in the target entry is deleted, and according to the first data operation request, the log corresponding to the first data operation request is recorded on the target entry, wherein the log corresponding to the first data operation request includes the data, the first address, and the operation type of the first data operation request; and the data is stored.

[0013] An embodiment of the present application provides a data processing method. In a data processing device having a non-volatile fast storage medium, a log record corresponding to a received first data operation request is stored in a log list stored in the non-volatile fast storage medium. Since the fast storage medium is non-volatile, when the data processing device is used, the first data operation request can be restored through the record in the log list, and the request initiator is required to re-initiate the corresponding memory operation. Since the embodiment of the present application only requires two network interface calls (e.g., for initiating a data transmission request and obtaining a transfer end marker) and one network transmission (e.g., sending data from a client to the data processing device), the number of times the memory persistence daemon is scheduled for execution is reduced compared to the prior art.

[0014] In addition, if the cache line corresponding to the first address is the same as the cache line corresponding to a certain address, the embodiment of the present application records the log corresponding to the first data operation request in the target entry determined by the first address. In this way, data operation requests for the same cache line can be continuously eliminated, thereby achieving the purpose of recording the last cache line operation. Because the log list is stored in a non-volatile fast storage medium, when the storage system suddenly loses power, it is only necessary to restore the corresponding cache line operation based on the contents of the log list.

[0015] In one possible implementation, if the cache line corresponding to the address written by the data operation request before the first data operation request is different from the cache line corresponding to the first address, then according to the first data operation request, a log corresponding to the first data operation request is recorded on the target entry.

[0016] In one possible implementation, if the length of the payload requested by the first data operation request is greater than the preset bytes, the portion of the payload requested by the first data operation request that is equal to the preset bytes is recorded in the target entry, and the portion of the payload requested by the first data operation request other than the preset bytes is recorded in the entry determined by the first address and the preset bytes.

[0017] In one possible implementation, determining a target entry corresponding to the first address from N entries based on the first address includes: determining a cache line corresponding to the first address; and determining the target entry from the N entries based on a mapping relationship between the N cache lines and the N entries and the cache line corresponding to the first address.

[0018] In one possible implementation, the log list includes a multi-level sub-log list, and the N entries included in the multi-level sub-log list are mapped one-to-one, and the multi-level sub-log list has different priorities. The method provided in the embodiment of the present application also includes: the cache line corresponding to the second data operation request is the same as the cache line corresponding to the first data operation request; when it is determined that the first entry corresponding to the second address records the log corresponding to the first data operation request, the log recorded on the first entry in the previous level sub-log list in the multi-level sub-log list is migrated to the first entry in the next level sub-log list adjacent to the previous level sub-log list in accordance with the preset priority order; the log corresponding to the second data operation request is recorded in the first entry in the sub-log list with the highest priority.

[0019] In a possible implementation, storing the data includes storing the data in a cache line corresponding to a first address in the data processing device through a direct memory access (DMA) method.

[0020] In one possible implementation, the method provided in an embodiment of the present application further includes: upon determining that the packet sequence number (PSN) of the first data operation request is not equal to the expected ePSN, sending a response operation request to the data sending device, the response operation request being used to instruct the data sending device to retransmit the data or to indicate a data transmission error. This facilitates timely retransmission of the required data by the data sending device when a write error occurs.

[0021] In a possible implementation, the method provided in the embodiment of the present application further includes: when the data processing device fails, requesting the data sending device to re-initiate the corresponding operation according to each entry in the log list.

[0022] In a second aspect, the present application provides an RNIC network card, which is connected to both a memory and a processor CPU, the RNIC network card includes a non-volatile memory, and the CPU includes a last-level cache LLC. The RNIC network card is used to: receive a first data operation request, the first data operation request includes data and a first address corresponding to the data, and the first address is the storage address of the data in the memory; according to the first address, determine a target entry corresponding to the first address from N entries in a log list, wherein the N entries are mapped one-to-one to N cache lines in the last-level cache LLC, and one entry is used to record a log corresponding to the data operation request sent to the RNIC network card, N is an integer greater than or equal to 1, and the log list is stored in a non-volatile fast storage medium; if the cache line corresponding to the address written by the data operation request before the first data operation request is the same as the cache line corresponding to the first address, then delete the log in the target entry, and according to the first data operation request, record the log corresponding to the first data operation request on the target entry, and store the data in the target entry.

[0023] In a third aspect, the present application provides a server, including an RNIC network card, a processor, and a memory, wherein the RNIC network card is connected to both the memory and the processor CPU, the RNIC network card includes a non-volatile memory, the CPU includes a last-level cache LLC, and the RNIC network card is used to:

[0024] receiving a first data operation request, where the first data operation request includes data and a first address corresponding to the data, where the first address is a storage address of the data in a memory;

[0025] Determine, according to the first address, a target entry corresponding to the first address from N entries in a log list, wherein the N entries are mapped one-to-one to N cache lines in a last-level cache (LLC), one entry is used to record a log corresponding to a data operation request sent to an RNIC, N is an integer greater than or equal to 1, and the log list is stored in a non-volatile fast storage medium;

[0026] If the cache line corresponding to the address written by the data operation request before the first data operation request is the same as the cache line corresponding to the first address, the log in the target entry is deleted, and according to the first data operation request, the log corresponding to the first data operation request is recorded on the target entry, and the data is stored in the target entry.

[0027] The RNIC network card and the server can implement the method in the first aspect or any possible implementation of the first aspect, and thus can also achieve the beneficial effects in the first aspect or any possible implementation of the first aspect.

[0028] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which a computer program or instruction is stored. When the computer program or instruction is run on a computer, the computer executes a data processing method as described in the first aspect or various possible implementations of the first aspect.

[0029] In a fifth aspect, the present application provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute the first aspect and one or more of the various possible implementations of the first aspect.

[0030] In a sixth aspect, an embodiment of the present application provides a chip, which includes a processor and an interface circuit, the interface circuit and the processor are coupled, the processor is used to run a computer program or instructions to implement a data processing method as described in the first aspect or various possible implementations of the first aspect, and the interface circuit is used to communicate with other modules outside the chip.

[0031] In the seventh aspect, an embodiment of the present application provides a storage system, which includes: a data sending device, and a data processing device as described in the second aspect to the various possible implementation methods of the second aspect, wherein the data sending device is used to send a first data operation request to the data processing device. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic diagram of data persistence provided in an embodiment of the present application;

[0033] Figure 2 A schematic diagram of a storage system provided in an embodiment of the present application;

[0034] Figure 3 A schematic diagram of the structure of a server provided in an embodiment of the present application;

[0035] Figure 4 A schematic diagram of a data processing method provided in an embodiment of the present application Figure 1 ;

[0036] Figure 5 A schematic diagram of a log queue provided in an embodiment of the present application;

[0037] Figure 6 A schematic diagram of a log list and cache line provided in an embodiment of the present application;

[0038] Figure 7 A schematic diagram of a data processing method provided in an embodiment of the present application Figure 2 ;

[0039] Figure 8A schematic diagram of a multi-level sub-log list and cache line provided in an embodiment of the present application;

[0040] Figure 9 A schematic diagram of a data processing method provided in an embodiment of the present application Figure 3 ;

[0041] Figure 10 A schematic diagram of the elimination of a multi-level sub-log list provided in an embodiment of the present application;

[0042] Figure 11 A schematic diagram of a data processing method provided in an embodiment of the present application Figure 4 ;

[0043] Figure 12 A schematic diagram of the structure of a data processing device provided in an embodiment of the present application Figure 1 ;

[0044] Figure 13 A schematic diagram of the structure of a data processing device provided in an embodiment of the present application Figure 2 . DETAILED DESCRIPTION

[0045] To facilitate a clear description of the technical solutions of the embodiments of the present application, in the embodiments of the present application, words such as "first" and "second" are used to distinguish between identical or similar items with substantially the same functions and effects. For example, the first data operation request and the second data operation request are merely used to distinguish between different data operation requests and do not limit their order. Those skilled in the art will understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily mean that they are different.

[0046] It should be noted that, in this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0047] The network architecture and business scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Ordinary technicians in this field will know that with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0048] In this application, "at least one" means one or more, and "more" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or plural.

[0049] like Figure 2 As shown, Figure 2 A storage system to which a data processing method according to an embodiment of the present application is applied is shown. The storage system includes: at least one client and at least one server, wherein: Figure 2 A server 101 and a client 102 are shown in FIG.

[0050] The at least one client can write data to the at least one server via remote direct memory access (RDMA).

[0051] The at least one client and the at least one server each include: a CPU and an RDMA network interface card (RNIC, referred to as RNIC network card).

[0052] The server's RNIC (Receiver Network Interface Card) contains queues such as the receive queue (rq), send queue (sq), and completion queue (cq). The receive queue temporarily stores messages received by the RNIC. The send queue temporarily stores outgoing message requests. The completion queue generates notification events when RDMA requests are completed.

[0053] Among them, such as Figure 3 Any server described in the embodiment of the present invention can also be called a node. At least one server is a network device that can provide services to the client. For example, server 101 can be a computer with server functions. Since the hardware structure of each server is the same, the embodiment of the present invention takes server 101 as an example to introduce Figure 2The hardware architecture of each server in the storage system is shown in Figure 3 Server 101 includes memory 1011, processor 1012, system bus 1013, power supply 1014, input / output interface 1015, communication component 1016, and one or more network cards 1017. Memory 1011 can be used to store data, software programs, and modules. It primarily includes a program storage area and a data storage area. The program storage area can store the operating system and at least one application required for a function, while the data storage area can store data requested by clients. Processor 1012 executes the various functions and processes data of server 101 by running or executing software programs and / or modules stored in memory 1011 and accessing data stored in memory 1011. System bus 1013 includes an address bus, a data bus, and a control bus for transmitting data and instructions. Power supply 1014 provides power to the various components of server 101. Input / output interface 1015 provides an interface between processor 1012 and peripheral interface modules. Communication component 1016 facilitates wired or wireless communication between server 101 and other devices. One or more network cards 1017 are used to establish a session channel between the network cards of server 101 and client 102 to facilitate service transmission. In a communication system, server 101 undertakes key tasks such as data storage, forwarding, and publishing. It is an indispensable component of various client / server (C / S) or browser / server (B / S) models.

[0054] like Figure 4 As shown, Figure 4 A data processing method provided in an embodiment of the present application is shown. The method is applied to a data processing device having a non-volatile fast storage medium. The method includes:

[0055] S101: A data processing device receives a first data operation request, where the first data operation request includes data and a first address corresponding to the data, where the first address is a storage address of the data in the data processing device.

[0056] For example, the data processing device in the embodiment of the present application may be as follows: Figure 2 The server shown, or Figure 2 Specifically, the data processing device can be Figure 2 The RNIC network card in the server is shown.

[0057] Exemplarily, the first address may be a physical address (PA) corresponding to the data, where PA is also called an actual address or an absolute address.

[0058] Specifically, the data processing device may receive a first data operation request sent by the data sending device in an RDMA manner.

[0059] S102: The data processing device records a log (Log) corresponding to the first data operation request in a log list (Log List) according to the first data operation request.

[0060] The log corresponding to the first data operation request includes data, a first address, and an operation type of the first data operation request; and the log list is stored in the non-volatile fast storage medium. For example, the non-volatile fast storage medium may be a magnetic random access memory (MRAM).

[0061] Exemplarily, the operation type may be a write operation. Exemplarily, the log corresponding to the first data operation request includes:<opcode,PA,data…> .

[0062] For example, the log list in the embodiment of the present application includes N entries, each of which is used to record a log entry corresponding to a first data operation request. Each of the N entries corresponds to a cache line, meaning that the data processing device has N cache lines. There is a one-to-one mapping between the N cache lines and the N entries.

[0063] The log list in the embodiment of the present application can also be called a log queue. When the log list is a LogQueue, only queue entry and queue exit operations can be performed. Unlike a Log Queue, any entry in the Log List can be replaced, rather than only queue entry and queue exit operations.

[0064] Specifically, when the log list is a Log Queue, in the embodiment of the present application, when recording the log corresponding to the first data operation request in the Log Queue, an entry can be selected from the idle entries in the Log Queue in the order of enqueuing and dequeuing to record the log corresponding to the first data operation request, or an entry can be selected in the queue order of the Log Queue to record the log corresponding to the first data operation request. This embodiment of the present application does not limit this. For example, Figure 5 As shown, Figure 5 The Log Queue includes five entries (for example, entry 1 to entry 5), wherein entry 1, entry 2, and entry 3 all record corresponding logs. The data processing device may record the log corresponding to the first data operation request in entry 4.

[0065] In the embodiment of the present application, by recording the first data operation request in the Log Queue, when the storage system fails, the RDMA Write operation request (referring to the data operation request for writing data sent by the data sending device to the data processing device in RDMA mode) can be restored or the RDMA Write operation request can be canceled through the log recorded in the Log Queue, and the data sending device can be required to re-initiate the corresponding memory operation.

[0066] S103: The data processing device stores the data.

[0067] As an example, step S103 in the embodiment of the present application can be specifically implemented in the following manner: the data processing device stores the data in a cache line corresponding to the first address among multiple cache lines included in the LLC in the data processing device through direct memory access (DMA).

[0068] As a possible implementation, before step S103, the method provided in the embodiment of the present application further includes: the data processing device feeds back a response message (eg, an Ack response) to the data sending device, where the response message is used to indicate that the data storage is successful.

[0069] In the above solution, when the Log Queue is full (i.e., N entries all contain logs corresponding to data operation requests), the cache lines for the memory operations corresponding to all entries in the Log Queue must be flushed back to the SCM before the Log Queue can be filled again. Otherwise, an entry may be replaced before persistence, resulting in the risk of data loss. Therefore, the above solution only reduces the number of times the memory persistence daemon is scheduled for execution. That is, for N data operation requests, the memory persistence daemon is scheduled for execution once, rather than executing the memory persistence daemon once for each data operation request.

[0070] Furthermore, if the RNIC's bandwidth utilization is high, a large Log Queue (i.e., increasing the size of the MRAM) is required to achieve significant buffering and merging. However, an overly large Log Queue means that when the Log Queue fills up, it takes a long time to flush the corresponding cache lines in each entry back to the SCM. This long wait directly leads to long RDMA operation latencies and may even cause RDMA operation retransmissions or failures. Since the data that truly needs to be persisted is in the LLC, for example, if the memory addresses of two consecutive memory operations correspond to the same cache line, the previous operation does not need to be persisted. The CPU's cache consistency principle ensures that the subsequent operation automatically flushes the result of the previous operation to memory, without the CPU having to explicitly call a cache line flush instruction. Therefore, the RNIC does not need to record operations on the SCM, only operations on the LLC. Backing up the LLC within the RNIC ensures crash consistency.

[0071] Based on the above analysis, the embodiment of the present application can eliminate the entries in the log list in the following manner. Figure 6 As shown, each Entry in the Log List records an RDMA Write operation request.

[0072] like Figure 6 As shown, assuming that the CPU's Last Level Cache (LLC) has N cache lines, then there are N corresponding entries in the Log List. Assume that the target physical address of the RDMA Write operation request is , the LLC replacement algorithm of the CPU is: .

[0073] Given a target physical address , Corresponding to the Eth cache line of LLC, arrive The mapping relationship is If the target physical address of the RDMA Write operation request is , which uses the same mapping relationship Map the RDMAWrite operation request to entry E in the Log List.

[0074] Therefore, in order to avoid different data operation requests requesting to write addresses corresponding to the same cache line, in this case, the entries in the log list can be replaced as a possible implementation method, such as Figure 7 As shown, step S102 provided in the embodiment of the present application can be implemented in the following manner:

[0075] S1021. The data processing device determines a target entry corresponding to the first address from N entries according to the first address.

[0076] S1022: The data processing device records a log corresponding to the first data operation request in a target entry according to the first data operation request.

[0077] Specifically, if the first address and the data address requested to be written before the first data operation request correspond to the same cache line, the data processing device deletes the log in the target entry corresponding to the data address requested to be written before the first data operation request, and records the log corresponding to the first data operation request in the target entry.

[0078] For example, assuming that the size of a cache is 64 bytes and the size of an entry is also 64 bytes, if the length of the payload requested by the first data operation request is greater than a preset byte (e.g., 64 bytes), the portion of the payload requested by the first data operation request that is equal to the preset byte is recorded in the target entry, and the portion of the payload requested by the first data operation request excluding the preset byte is recorded in the entry determined by the first address and the preset byte, until the entire payload requested by the first data operation request is recorded in the log list.

[0079] For example, if the Payload Length of the first data operation request is greater than 64 Bytes, then , repeat Determine the target entry and store the remaining payload of the first data operation request in The target entry is determined until all the payloads of the first data operation request are processed. For example, the payload length of the first data operation request is 192, where The corresponding entry is entry 1, then Byte 0 to 63 of the Payload of the first data operation request can be stored in entry 1, and then The entry determined is entry 5, then 64~127 bytes are stored in entry 5, and then according to The determined entry is entry 6, and 128 to 191 bytes are stored in entry 5.

[0080] Specifically, S1021 in the embodiment of the present application can be implemented as follows: a data processing device determines a cache line corresponding to the first address. The data processing device determines the target entry from the N entries based on a mapping relationship between the N cache lines and the N entries and the cache line corresponding to the first address.

[0081] It can be understood that S1021 and S1022 in the embodiment of the present application are also applicable to the case when the log list is a log queue.

[0082] Assume that the first RDMA Write operation request corresponds to the Eth entry in the Log List. According to the above solution, if the second RDMA Write operation request corresponds to the same cache as the first RDMA Write operation request, the log corresponding to the first RDMA Write operation request recorded in the Eth entry needs to be deleted, and the log corresponding to the second RDMA Write operation request needs to be recorded in the Eth entry. If the storage system suddenly crashes at this time, because the second RDMA Write operation request was only recorded in the RNIC and not yet written to the LLC, the log corresponding to the deleted first RDMA Write operation request in the Eth entry will no longer have the opportunity to be redone or undone, and the corresponding SCM operation will not be persisted.

[0083] To this end, the Log List in the embodiment of the present invention may include multiple levels of sub-Log Lists, such as Figure 8As shown, the entries included in each sub-log list in the multi-level sub-log list are mapped one-to-one, wherein the multi-level sub-log lists have different priorities (meaning that the priorities of each sub-log list in the multi-level sub-log list are different). Assuming that there are P levels of log lists, the sub-log list numbered 0 has the highest priority, and the sub-log list numbered P-1 has the lowest priority. After receiving the first data operation request, the data processing device, based on the elimination mechanism, first migrates the log recorded in the Eth entry of the P-2 sub-log list to the Eth entry of the P-1 log list. Then, it migrates the log recorded in the Eth entry of the 0th log list to the Eth entry of the 1st log list. Finally, the log corresponding to the first data operation request is recorded in the Eth entry of the 0th log list.

[0084] It should be noted that if no log exists for a certain entry during the migration process, the logs of all entries one level after the entry do not need to be migrated.

[0085] Specifically, such as Figure 9 As shown, the method provided in the embodiment of the present application also includes:

[0086] S104: The data processing device receives a second data operation request, where the cache line corresponding to the second data operation request is the same as the cache line corresponding to the first data operation request.

[0087] S105. When the data processing device determines that the log corresponding to the first data operation request is recorded in the first entry corresponding to the second address, the log recorded in the first entry in the previous sub-log list in the multi-level sub-log list is migrated to the first entry in the next sub-log list adjacent to the previous sub-log list in accordance with the preset priority order.

[0088] The preset priority order is from high to low priority.

[0089] S106: The data processing device adds the log record corresponding to the second data operation request to the first entry in the sub-log list with the highest priority.

[0090] It can be understood that when the preset priority order is from low to high priority, the data processing device records the log corresponding to the second data operation request in the first entry in the sub-log list with the lowest priority.

[0091] For example, Figure 10As shown, before receiving the second data operation request, as shown in Figure 10 The logs recorded in the second entry of each level of sub-LogList are as follows: Figure 10 As shown, after receiving the second data operation request, since the second data operation request and the first data operation request correspond to the cache line 3 of the response, the logs recorded in the second entry in the sub-Log Lists of each level are migrated backward respectively until log 4 is eliminated. In this case, the second entry in the sub-LogList of level 0 will be empty, so the log 5 corresponding to the second data operation request can be written into the second entry in the sub-LogList of level 0.

[0092] As a possible implementation, before step S102, the embodiment of the present application further includes: if the data processing device determines that the packet sequence number (PSN) of the first data operation request is not equal to the expected ePSN, the data processing device sends a response operation request to the data sending device, wherein the response operation request is used to instruct the data sending device to retransmit the data or to indicate a data transmission error. This facilitates the data sending device to promptly retransmit the data to be written when an error occurs in writing data.

[0093] For example, the data sending device may be Figure 2 The client in .

[0094] It can be understood that, in the embodiment of the present application, when the data processing device determines that the packet sequence number PSN of the first data operation request is equal to the expected ePSN, S102 is executed.

[0095] like Figure 11 As shown, after step S103, the embodiment of the present application further includes:

[0096] S107: When the data processing device fails, the data processing device requests the data sending device to re-initiate the corresponding operation according to each entry in the log list, so as to restore the corresponding cache line operation according to the content in the log list.

[0097] The above mainly introduces the scheme of the embodiment of the present application from the perspective of the interaction between various network elements. It can be understood that, in order to realize the above functions, each network element, such as a data processing device, includes a hardware structure and / or software module corresponding to the execution of each function. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in a hardware or computer software-driven hardware manner depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0098] In the embodiment of the present application, the data processing device can be divided into functional units according to the above method example. For example, each functional unit can be divided corresponding to each function, or two or more functions can be integrated into one processing unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. It should be noted that the division of units in the embodiment of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation.

[0099] The following is an example of dividing each functional module into corresponding functional modules:

[0100] In the case of an integrated unit, Figure 12 A possible structural diagram of a data processing device involved in the above embodiment is shown, wherein the data processing device may be a server or a chip used in a server. The data processing device includes: a receiving unit 201 , a processing unit 202 and a storage unit 203 .

[0101] The receiving unit 201 is used to support the data processing device to execute steps S101 and S104 in the above embodiment. The processing unit 202 is used to support the data processing device to execute steps S102, S1022, S105 and S106 in the above embodiment.

[0102] The storage unit 203 is used to support the data processing device to execute step 103 in the above embodiment.

[0103] Optionally, the data processing device further includes: a determining unit 204 and a sending unit 205, wherein the determining unit 204 is configured to support the data processing device in executing step S1021 in the above embodiment, and the sending unit 205 is configured to support the data processing device in executing step S107 in the above embodiment. All relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module and will not be repeated here.

[0104] In the case of an integrated unit, Figure 13 A schematic diagram of a possible logical structure of the data processing device involved in the above embodiments is shown. The data processing device can be the terminal in the above embodiments, or a chip used in a terminal. The data processing device includes a processing module 212 and a communication module 213. The processing module 212 is used to control and manage the operations of the data processing device. For example, the processing module 212 is used to perform message or data processing steps on the data processing device side, and the communication module 213 is used to perform message or data processing steps on the data processing device side.

[0105] For example, as a possible implementation, the processing module 212 is configured to support the data processing apparatus in executing S102, S1021, S1022, S105, and S106 in the above-described embodiments. The communication module 213 is configured to support the data processing apparatus in executing S101, S104, and S107 in the above-described embodiments, and / or other processes executed by the data processing apparatus for the techniques described herein.

[0106] Optionally, the data processing device may further include a storage module 211 for storing program codes and data of the data processing device, for example, for executing S103.

[0107] The processing module 212 may be a processor or controller, such as a central processing unit (CPU), a general-purpose processor (GPOR), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic device (PLD), a transistor logic device (TLD), a hardware component, or any combination thereof. It may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the present disclosure. A processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like. The communication module 213 may be a transceiver, a transceiver circuit, or a communication interface. The storage module 211 may be a memory.

[0108] When the processing module 212 is the processor 1012, the communication module 213 is the communication component 1016, and the storage module 211 is the memory 1011, the data processing device involved in this application can be Figure 3 Device shown.

[0109] In one aspect, a computer-readable storage medium is provided. The computer-readable storage medium stores instructions that, when executed, cause a server or a chip used in the server to execute S101, S102, S1021, S1022, S103, S104, S105, S106, and S107 in the embodiments, and / or other processes performed by the server or a chip used in the server for the techniques described herein.

[0110] The aforementioned readable storage medium may include: a USB flash drive, a mobile hard disk, a read-only memory, a random access memory, a magnetic disk, an optical disk, or other media that can store program codes.

[0111] In one aspect, a computer program product including instructions is provided. The computer program product stores the instructions, which, when executed, cause a server or a chip used in the server to perform S101, S102, S1021, S1022, S103, S104, S105, S106, and S107 in the embodiments, and / or other processes performed by the server or a chip used in the server for the techniques described herein.

[0112] In one aspect, a chip is provided for use in a server. The chip includes one or more (including two) processors and an interface circuit. The interface circuit and the one or more (including two) processors are interconnected via a circuit. The processor is configured to execute instructions to perform S101, S102, S1021, S1022, S103, S104, S105, S106, and S107 in the embodiments and / or other processes executed by the server for the technologies described herein.

[0113] In the above embodiments, all or part of the embodiments can be implemented using software, hardware, firmware, or any combination thereof. When implemented using a software program, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions according to the embodiments of the present application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that can be accessed by a computer or can include one or more data storage devices such as servers and data centers that can be integrated with the medium. Available media may be magnetic media (eg, floppy disks, hard disks, magnetic tapes), optical media (eg, DVDs), or semiconductor media (eg, solid state disks (SSDs)).

[0114] Although the present application is described herein in conjunction with various embodiments, in the process of implementing the claimed application, those skilled in the art may understand and implement other variations of the disclosed embodiments by reviewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple situations. A single processor or other unit may implement several functions listed in the claims. The fact that certain measures are recorded in different dependent claims does not mean that these measures cannot be combined to produce good results.

[0115] Although the present application has been described with reference to specific features and embodiments thereof, it is apparent that various modifications and combinations may be made thereto without departing from the spirit and scope of the present application. Accordingly, this specification and the drawings are merely illustrative of the present application as defined by the appended claims and are deemed to cover any and all modifications, variations, combinations or equivalents within the scope of the present application. Obviously, those skilled in the art may make various modifications and variations to the present application without departing from the spirit and scope of the present application. Thus, the present application is intended to include such modifications and variations as fall within the scope of the claims of the present application and their equivalents.

Claims

1. A data processing method, characterized in that: The method comprises: receiving a first data operation request, wherein the first data operation request includes data and a first address corresponding to the data, where the first address is a storage address of the data in a data processing device; Determining, based on the first address, a target entry corresponding to the first address from N entries in a log list, wherein the N entries are mapped one-to-one to N cache lines in a last-level cache (LLC) in the data processing device, one entry is used to record a log corresponding to a data operation request sent to the data processing device, N is an integer greater than or equal to 1, and the log list is stored in a non-volatile fast storage medium; If the cache line corresponding to the address written by the data operation request before the first data operation request is the same as the cache line corresponding to the first address, deleting the log in the target entry and recording the log corresponding to the first data operation request in the target entry according to the first data operation request, wherein the log corresponding to the first data operation request includes the data, the first address, and the operation type of the first data operation request; The data is stored.

2. A data processing method according to claim 1, characterized in that: If the cache line corresponding to the address written by the data operation request before the first data operation request is different from the cache line corresponding to the first address, then according to the first data operation request, a log corresponding to the first data operation request is recorded on the target entry.

3. A data processing method according to claim 2, characterized in that: If the length of the payload requested by the first data operation request is greater than the preset bytes, the part of the payload requested by the first data operation request that is equal to the preset bytes is recorded in the target entry, and the part of the payload requested by the first data operation request other than the preset bytes is recorded in other entries determined by the first address and the preset bytes.

4. A data processing method according to claim 2 or 3, characterized in that: The determining, according to the first address, a target entry corresponding to the first address from the N entries includes: Determining a cache line corresponding to the first address; The target entry is determined from the N entries according to a mapping relationship between the N cache lines and the N entries and a cache line corresponding to the first address.

5. A data processing method according to claim 1, characterized in that: The log list includes a multi-level sub-log list, wherein N entries included in the multi-level sub-log list are mapped one to one, and the multi-level sub-log list has different priorities. The method further includes: receiving a second data operation request, where the cache line corresponding to the second data operation request is the same as the cache line corresponding to the first data operation request; When it is determined that the log corresponding to the first data operation request is recorded in the first entry corresponding to the second address, the log recorded in the first entry of the previous sub-log list in the multi-level sub-log list is migrated to the first entry of the next sub-log list adjacent to the previous sub-log list in sequence according to a preset priority order; The log record corresponding to the second data operation request is recorded in the first entry of the sub-log list with the highest priority.

6. A data processing method according to claim 1, characterized in that: The storing of the data comprises: The data is stored in a cache line corresponding to the first address in the data processing device through a direct memory access (DMA) method.

7. A data processing method according to any one of claims 1-3, 5-6, characterized in that: The method further comprises: If it is determined that the packet sequence number PSN of the first data operation request is not equal to the expected ePSN, a response operation request is sent to the data sending device, where the response operation request is used to instruct the data sending device to retransmit the data, or to indicate that the data transmission is wrong.

8. A data processing method according to any one of claims 1-3, 5-6, characterized in that: The method further comprises: When the data processing device fails, the data sending device is requested to re-initiate corresponding operations according to each entry in the log list.

9. An RNIC network card, characterized in that: The RNIC network card is connected to both the memory and the processor CPU. The RNIC network card includes a non-volatile memory. The CPU includes a last-level cache LLC. The RNIC network card is used to: receiving a first data operation request, where the first data operation request includes data and a first address corresponding to the data, where the first address is a storage address of the data in the memory; Determining, based on the first address, a target entry corresponding to the first address from N entries in a log list, wherein the N entries are mapped one-to-one to N cache lines in the last-level cache (LLC), one entry is used to record a log corresponding to a data operation request sent to the RNIC, N is an integer greater than or equal to 1, and the log list is stored in the non-volatile fast storage medium; If the cache line corresponding to the address written by the data operation request before the first data operation request is the same as the cache line corresponding to the first address, the log in the target entry is deleted, and according to the first data operation request, the log corresponding to the first data operation request is recorded on the target entry, and the data is stored in the target entry.

10. A server, characterized in that: The system comprises an RNIC network card, a processor, and a memory. The RNIC network card is connected to both the memory and the processor CPU. The RNIC network card includes a non-volatile memory, and the CPU includes a last-level cache LLC. The RNIC network card is used to: receiving a first data operation request, where the first data operation request includes data and a first address corresponding to the data, where the first address is a storage address of the data in the memory; Determining, based on the first address, a target entry corresponding to the first address from N entries in a log list, wherein the N entries are mapped one-to-one to N cache lines in the last-level cache (LLC), one entry is used to record a log corresponding to a data operation request sent to the RNIC, N is an integer greater than or equal to 1, and the log list is stored in the non-volatile fast storage medium; If the cache line corresponding to the address written by the data operation request before the first data operation request is the same as the cache line corresponding to the first address, the log in the target entry is deleted, and according to the first data operation request, the log corresponding to the first data operation request is recorded on the target entry, and the data is stored in the target entry.

Images