Distributed optical switch interconnect integrated chip and interconnect system

Abstract

The application relates to a distributed optical switching interconnection integrated chip and an interconnection system, which are suitable for the technical fields of on-chip high-performance computing systems, data center optical switching interconnections and optical communication networks. The technical scheme of the application is as follows: the integrated chip has a plurality of directly or indirectly connected nodes, each node comprising: an optical switching routing connection unit, which has a plurality of internal input / output ports on one side and a plurality of external input / output ports on the other side; a laser array, which is connected with the internal input ports of the optical switching routing connection unit and is used for converting electrical signals into optical signals and sending the optical signals to the optical switching routing connection unit; a detector array, which is connected with the internal output ports of the optical switching routing connection unit and is used for converting the optical signals output by the optical switching routing connection unit into electrical signals; the external input / output ports of the optical switching routing connection unit are the input / output ports of the node; and the output ports of the node are connected with the input ports of another node through optical waveguides.

Description

Technical Field

[0001] This invention relates to a distributed optical switching interconnect integrated chip and interconnect system, applicable to the fields of on-chip high-performance computing systems, data center optical switching interconnects, and optical communication network technologies. Background Technology

[0002] With the rapid growth of applications such as cloud computing, data centers, the Internet of Things, virtual reality, and high-definition short videos, the global data volume is exploding, requiring continuous expansion of high-performance computing and data center infrastructure. High-capacity, high-speed switching chips are one of the core technologies in this field.

[0003] Currently, optical interconnect technology has been widely adopted for data transmission between servers in data centers and high-performance computing. Research on optical interconnect between servers and on-chip optical interconnect mainly focuses on optical information transmission and reception in optical interconnect networks. However, network switching is still based on electrical switching chips. On the one hand, it requires high-energy-consuming and high-latency photoelectric-optical conversion, which requires the optoelectronic fusion packaging and integration of electrical switching chips and external optical transceiver array chips through Co-Packaged Optics (CPO). On the other hand, it requires top-level semiconductor manufacturing processes.

[0004] Currently, the switching capacity of top-tier electrical switching chips ranges from 25.6 to 51.2 Tbps, requiring the use of advanced 5-7nm semiconductor processes. As Moore's Law approaches its limits, further increases in the capacity of electrical switching chips are severely constrained. Optical switching technology has emerged as a means to continue improving the performance of data centers and high-performance computing systems in the post-Moore's Law era.

[0005] Furthermore, to handle massive amounts of data, data processing models and algorithms, such as those for artificial intelligence, are constantly being upgraded, placing increasingly higher demands on the computing power of computing systems. Due to the limitations of Moore's Law, it is impossible to integrate more and more transistors onto a single chip to maintain continuous improvements in computing power. Wafer-level systems-on-a-chip (SoCs) that integrate multiple independently manufactured modular functional chips based on advanced wafer-level packaging technology are an important means of continuing Moore's Law. In this context, the bottleneck to improving the performance of high-performance computing systems lies not in the performance limitations of a single computing node, but in the capacity for information transmission and exchange between multiple computing nodes. Therefore, high-capacity on-chip interconnects between chips will become crucial for building more powerful computing systems. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide a distributed optical switching interconnect integrated chip and an interconnection system between communication or computing nodes based on the above-mentioned problems.

[0007] The technical solution adopted in this invention is: a distributed optical switching interconnect integrated chip, characterized in that it has multiple directly or indirectly connected nodes, each node comprising:

[0008] The optical switching routing connection unit has multiple internal input / output ports on one side and multiple external input / output ports on the other side;

[0009] A laser array is connected to the internal input port of the optical switching routing connection unit, and is used to convert electrical signals into optical signals and send them to the optical switching routing connection unit.

[0010] The detector array is connected to the internal output port of the optical switching routing connection unit and is used to convert the optical signal output by the optical switching routing connection unit into an electrical signal.

[0011] The external input / output ports of the optical switching routing connection unit are the input / output ports of the node to which it is located, and the output port of the node is connected to the input port of another node through an optical waveguide.

[0012] Each node has two optical switching routing connection units, namely a laser-side routing connection unit and a detector-side routing connection unit. The optical switching routing connection unit has minimal loss between any pair of internal ports and external ports only at a specific wavelength.

[0013] The laser-side routing connection unit has an internal input port and an external output port on each side; the detector-side routing connection unit has an internal output port and an external input port on each side.

[0014] The optical switching routing connection unit adopts a cyclic addressing array waveguide grating router or an etched diffraction grating router.

[0015] Each unit of the laser array contains a wavelength-switchable / tunable laser and integrates an extracavity high-speed modulator.

[0016] The laser array includes:

[0017] An intracavity wavelength router has minimal loss at only one specific wavelength for any pair of input / output ports.

[0018] The port selects a semiconductor optical amplifier array, one end of which is made into a reflective surface, and the other end is connected to the input end of the intracavity wavelength router;

[0019] A wavelength-selective semiconductor optical amplifier array, one end of which is connected to the output of the intracavity wavelength router, and the other end is provided with a partial reflector;

[0020] An optical resonant cavity is formed between the reflector of any port selectable semiconductor optical amplifier and the partial reflector of any wavelength selectable semiconductor optical amplifier;

[0021] By applying current to the port-selective semiconductor optical amplifier and the wavelength-selective semiconductor optical amplifier corresponding to any pair of input-output ports of the intracavity wavelength router, laser light of a specific wavelength corresponding to the input-output port combination is output at part of the reflector end of the corresponding optical resonant cavity.

[0022] The laser array can send an optical signal of a specified wavelength to an internal input port on one side of the optical switching routing connection unit according to the input electrical signal. The internal input port and the specified wavelength are adapted to the external output port of the corresponding output target on the other side, so that the optical signal is output from the port of the corresponding output target.

[0023] The external input port on one side of the optical switching routing connection unit receives an optical signal of arbitrary wavelength from an external input. The optical signal is output from the internal output terminal on the other side of the optical switching routing connection unit, which is adapted to the external input port and the arbitrary wavelength, to the detector array. The detector array converts the optical signal into an electrical signal.

[0024] The optical waveguide is a planar optical waveguide or optical fiber, used for intra-chip node connection or inter-chip node connection.

[0025] All nodes in this network unit are arranged in a ring, and the nodes are connected to each other via optical waveguides arranged along the ring.

[0026] The laser array is electrically connected to the laser driver, the detector array is electrically connected to the detector driver, and the laser driver and the detector driver are jointly electrically connected to the electrical packet switching chip.

[0027] A distributed optical switching interconnect integrated chip is characterized in that: it comprises a plurality of such distributed optical switching interconnect integrated chips as on-chip interconnect network units to form a multi-unit extended integrated chip, wherein each node of the interconnect network unit includes at least one cross-unit node, and the cross-unit node is directly or indirectly connected to the cross-unit nodes on the other interconnect network units via optical waveguides.

[0028] Several distributed optical switching interconnection network units are arranged in a ring. The innermost node in the distributed optical switching interconnection network unit is the cross-unit node I, and the outermost node is the cross-unit node II. The cross-unit nodes I of each interconnection network unit are connected by optical waveguides arranged along the ring. The cross-unit nodes II of each interconnection network unit are connected by optical waveguides arranged along the ring.

[0029] Several identical distributed optical switching interconnection network units are arranged in a ring. Each node in the distributed optical switching interconnection network unit is a cross-unit node. Cross-unit nodes at the same position in each interconnection network unit are connected by optical waveguides arranged along the ring to form multiple fully connected networks. Waveguide crossing between multiple fully connected networks is avoided through multi-layer waveguides and inter-layer coupling structures.

[0030] The high-speed data input / output electrical ports, on-chip switching network control ports, bias current / voltage ports, etc. of the chip are preferably packaged in BGA. The external electrical interface corresponding to each on-chip node is connected to the electrical input / output ports of external computing, storage, and I / O chips or chip clusters through wafer-level advanced packaging technology to form an on-chip multi-chip optical switching interconnect computing system.

[0031] The distributed optical switching interconnect integrated chip includes optical fiber input / output ports, which are connected to some lasers and detectors on the chip through an optical coupling structure for inter-chip optical switching interconnect expansion.

[0032] A distributed optical switching interconnect system is characterized in that it includes the aforementioned distributed optical switching interconnect integrated chip, peripheral electrical computing or communication chips or chip clusters, and the input and output ports of the electrical chips are electrically interconnected with the input and output ports of the distributed optical switching interconnect integrated chip through wafer-level advanced packaging.

[0033] The modulators and detectors of the distributed optical switching network nodes are connected to the transmit / receive driver chip via high-speed input / output electrical ports, and then connected to the electrical packet switching chip, which is contained within the transceiver controller of the computing chip in the on-chip computing system.

[0034] A distributed optical switching interconnect system is characterized in that it includes network units with the same architecture as the distributed optical switching interconnect integrated chip, and the nodes within the network units and the nodes across units are connected by optical fibers.

[0035] The modulators and detectors of the distributed optical switching network nodes are connected to the transmit / receive driver chip via high-speed input / output electrical ports, and then connected to the electrical packet switching chip, which is contained within the transceiver controller of the computing chip in the on-chip computing system.

[0036] The beneficial effects of this invention are: This invention realizes optical switching interconnection between peripheral electrical computing or communication chips or chip clusters through optical switching routing integrated chips. The input and output ports of the electrical chips only need to be electrically interconnected with the input and output ports of the distributed optical switching interconnection integrated chip. There is no need for electrical switching chips, nor is it necessary to integrate the electrical switching chips with external optical transceiver array chips through CPO optoelectronic fusion packaging. Thus, it is possible to realize the transmission and reception of optical signals using optical switching integrated chips and technology.

[0037] In this invention, the node can determine the optical signal output port as needed. On the one hand, it can realize the on-demand expansion of the switching system without replacing the existing switching system units and is not limited by the number of ports of the optical signal transceiver switching unit. On the other hand, it can realize mutual protection between optical signal transceiver switching units of different paths.

[0038] This invention arranges optical switching interconnect network units and nodes in units in a ring shape, and uses optical waveguides arranged along the ring to achieve connections between units and nodes. This non-intersecting ring interconnect waveguide wiring eliminates the connection structure of intersecting waveguides, reduces connection loss, and significantly improves the utilization rate of chip area.

[0039] This invention integrates a laser array, a detector array, an optical switching and routing connection unit, and an inter-node interconnection network into a single integrated chip. Nodes are directly interconnected via planar optical waveguides, eliminating the need for fiber optic connections. Optical switching / routing is completed within the distributed optical switching integrated chip, eliminating the need for electrical switching chips fabricated using advanced semiconductor processes. The distributed optical switching interconnection integrated chip in this invention features pure electrical input / output, offering advantages such as small size and low power consumption. It can be used in on-chip multi-core computing systems and data center optical switching interconnections. Attached Figure Description

[0040] Figure 1 This is a schematic diagram of the architecture of Example 1.

[0041] Figure 2 This is a schematic diagram of the architecture of Example 2.

[0042] Figure 3 This is a schematic diagram of the architecture of Example 3.

[0043] Figure 4 This is a schematic diagram of the architecture of Example 4.

[0044] Figure 5 This is a schematic diagram of the node structure in Example 5.

[0045] Figure 6 This is a schematic diagram of the laser array structure in Example 6.

[0046] Figure 7 This is a schematic diagram of the structure of the laser array and the laser side routing connection unit in Example 7.

[0047] Figure 8 This is a system block diagram of Example 8.

[0048] Figure 9 This is a bottom view of the integrated chip BGA package example in Example 9.

[0049] Figure 10 This is a schematic diagram of the on-chip optical switching interconnect computing system structure in Example 10.

[0050] 1. Distributed optical switching interconnect integrated chip; 101. BGA ball grid; 2. Laser array; 201. Wavelength switchable laser; 202. Modulator; 203. Tunable laser; 204. Port-selective semiconductor optical amplifier; 205. Intracavity wavelength router; 206. Wavelength-selective semiconductor optical amplifier; 3. Detector array; 301. Detector; 4. Optical switching routing connection unit; 401. Laser-side routing connection unit; 402. Detector-side routing connection unit; 5. Optical waveguide; 6. Coupled grating or interlayer coupler; 7. Cross-unit node I; 8. Cross-unit node II; 9. Laser driver; 10. Detector driver; 11. Electrical packet switching chip; 12. Electrical computing chip or chip cluster. Detailed Implementation

[0051] Example 1: As Figure 1 As shown, this embodiment is a distributed optical switching interconnect integrated chip. The integrated chip encapsulates a distributed optical switching interconnect network unit. The network unit has 8 nodes, and each node includes an optical switching routing connection unit, a laser array, and a detector array, etc.

[0052] In this example, the optical switching routing connection unit has 8 internal input / output ports on one side (serving as both internal input and internal output ports) and 8 external input / output ports on the other side. The optical switching routing connection unit exhibits minimal loss between any pair of internal and external ports only at a specific wavelength. In this embodiment, the optical switching routing connection unit employs an 8x8 cyclically addressed array waveguide grating router (AWGR) or an etched diffraction grating router (EDGR).

[0053] In this embodiment, the seven laser units on the laser array are connected one-to-one with the seven internal input ports on the optical switching routing connection unit through optical waveguides or coupling structures. The laser units are used to convert electrical signals into optical signals and send them to the optical switching routing connection unit.

[0054] In this example, the seven detector units on the detector array are connected one-to-one with the seven internal output ports on the optical switching routing connection unit through optical waveguides or coupling structures. The detector units are used to convert the optical signals output by the optical switching routing connection unit into electrical signals.

[0055] In this embodiment, the external input / output ports of the optical switching routing connection unit are the input / output ports of its respective node. The seven output ports of the node are connected to the input ports of the other seven nodes in the optical switching interconnection network unit via optical waveguides, and the seven input ports of the node are connected to the output ports of the other seven nodes in the optical switching interconnection network unit via optical waveguides. In this example, the optical waveguide can be an on-chip integrated planar optical waveguide or an optical fiber.

[0056] In this embodiment, the laser array can send an optical signal of a specified wavelength to the internal input port of the optical switching routing connection unit according to the input electrical signal. The internal input port and the specified wavelength are adapted to the output of the external output port of the corresponding output target on the other side (there is minimal loss between the internal input port and the external output port of the corresponding output target at the specified wavelength), so that the optical signal is output from the port of the corresponding output target.

[0057] When multiple signals are sent to the same output target, optical signals of different wavelengths are input into multiple internal input ports, and finally the multiple optical signals of different wavelengths are combined at the external output port corresponding to the output target.

[0058] In this example, the external input port on one side of the optical switching routing connection unit receives an optical signal of arbitrary wavelength from an external input. The optical signal is output from the internal output port on the other side of the optical switching routing connection unit, which is adapted to the external input port and the arbitrary wavelength, to the detector array (there is minimal loss between the external input port and the internal output port at the arbitrary wavelength). The detector array converts the optical signal into an electrical signal.

[0059] When an external input port receives optical signals with multiple wavelengths simultaneously, the optical switching routing connection unit outputs the signals of different wavelengths from multiple internal output ports to the detector array.

[0060] Example 2: Figure 2 As shown, this embodiment has a structure that is basically the same as that of embodiment 1. The only difference is that each node in this embodiment has two optical switching routing connection units, namely a laser-side routing connection unit and a detector-side routing connection unit.

[0061] In this example, the laser-side routing connection unit has 8 internal input ports on one side and 8 external output ports on the other side; the detector-side routing connection unit has 8 internal output ports on one side and 8 external input ports on the other side.

[0062] In this embodiment, the seven laser units on the laser array are connected one-to-one with the seven internal input ports on the laser-side routing connection unit through optical waveguides or coupling structures. The laser units are used to convert electrical signals into optical signals and send them to the laser-side routing connection unit.

[0063] In this example, the seven detector units on the detector array are connected one-to-one with the seven internal output ports on the detector-side routing connection unit through optical waveguides or coupling structures. The detector units are used to convert the optical signals output by the detector-side routing connection unit into electrical signals.

[0064] Example 3: As Figure 3 As shown, this embodiment has the same structure as embodiment 2, except that the eight nodes in this embodiment are evenly distributed in a ring, and the nodes are connected by on-chip planar optical waveguides arranged along the ring.

[0065] This example demonstrates how physically non-intersecting ring-shaped interconnect waveguide wiring can be implemented on a silicon photonics chip, thereby eliminating, on the one hand, the need for... Figure 2 The diagram shows a complex interconnected structure with many cross-waveguides, which reduces connection losses and significantly improves chip area utilization.

[0066] In this embodiment, the output port of the node and the interconnect waveguide are located in different waveguide layers and are connected to the input port of the interconnect waveguide through a coupling grating or interlayer coupler; the input port of the node and the interconnect waveguide are located in different waveguide layers and are connected to the output port of the interconnect waveguide through a coupling grating or interlayer coupler.

[0067] Due to the high refractive index difference of silicon waveguides, the waveguide cabling can be very tight, with a spacing of less than 10 μm. Each node includes eight wavelength / port switchable lasers, eight high-speed modulators, eight high-speed detectors, and two 8x8 cyclically addressed wavelength routers (which can be arrayed waveguide grating routers (AWGR) or etched diffraction grating routers (EDGR)) for the transmitter and receiver, respectively. Each node integrates optical signal transmission, reception, and switching routing functions. The eight output ports of the wavelength routers can be connected to the other seven nodes via optical waveguides to form a fully connected network of eight nodes. The remaining port can be reserved for testing and for inter-chip interconnection via fiber optic coupling. If the modulator rate is 100 Gbps, the maximum bandwidth of each waveguide connection can reach 800 Gbps (8 x 100 Gbps), and the bandwidth of any connection can be arbitrarily allocated between 0 and 800 Gbps by switching the laser wavelength / port, thus dynamically scheduling bandwidth resources according to network demand. The total switching capacity of the entire eight-node network reaches 6.4 Tbps. Because this network unit eliminates the central optical switching node, it eliminates photoelectric-optical conversion, reducing link loss, power consumption, and latency.

[0068] Example 4: Figure 4As shown, this embodiment is a distributed optical switching interconnect integrated chip, on which a distributed optical switching interconnect network is packaged. The network has eight distributed optical switching interconnect network units as in embodiment 3, and the eight optical switching interconnect network units are evenly distributed in a ring.

[0069] In this embodiment, the node on the inner side of the network unit ring in each switching interconnection network unit is cross-unit node I, and the node on the outer side of the network unit ring is cross-unit node II. Both cross-unit nodes I and II have a 16x16 optical switching routing connection unit, as well as a laser array and detector array adapted to the 16x16 optical switching routing connection unit. The 16x16 optical switching routing connection unit enables both cross-unit nodes I and II to have 16 output ports and 16 input ports.

[0070] In this example, the seven output ports of cross-unit node I are connected to the input ports of the other seven nodes on the same network unit via optical waveguides arranged in a ring. The seven input ports of cross-unit node I are connected to the output ports of the other seven nodes on the same network unit via optical waveguides arranged in a ring. Additionally, seven output ports of cross-unit node I are connected to the input ports of cross-unit node I on the other seven network units via optical waveguides arranged in a ring.

[0071] In this embodiment, 7 output ports in the cross-unit node are used for full connectivity within the network unit, 7 output ports are used for full connectivity between network units, and the remaining 2 ports are used for inter-chip interconnection of the multi-chip expansion system via fiber optic coupling.

[0072] This example constructs a 64-node distributed optical switching interconnection network. Connections between any two nodes can be established through direct connection, a one-hop connection via one intermediate node, or a two-hop connection via two intermediate nodes. Furthermore, multiple shortest paths or non-shortest paths can be selected and protected between any two nodes. The entire network contains 640 lasers and 640 detectors, expanding the total switching capacity to 64Tbps at a single-channel rate of 100Gbps.

[0073] By using fiber optic connections (conventional fiber optic networks) or SiN / SOI multilayer waveguides and interlayer coupling structures (on-chip networks), an 8-node fully connected passive interconnect network can be further constructed between nodes at the same location in each network unit. Simultaneously, all 8x8 nodes are upgraded to 16x16 nodes, with all nodes being completely symmetrical. This increases the number of directly connected nodes per node to 14 (22.2%), and the number of one-hop nodes to 49 (77.8%), completely eliminating two-hop connections and increasing the total network switching capacity of 64 nodes to 102.4T. Compared to the commonly used Spine-Leaf architecture in current data centers, a Spine-Leaf network with 8 nodes per group (64 nodes in total) has 0 directly connected and two-hop connected nodes per node, 7 one-hop connected nodes through one centralized switching node (11.1%), and 56 three-hop connected nodes through three centralized switching nodes (88.9%). Therefore, the distributed switching architecture of this embodiment has shorter paths, lower latency, fewer photoelectric conversions and thus lower power consumption, rich path selection to avoid congestion and provide fault protection, and can be infinitely expanded to multiple chips.

[0074] Example 5: Figure 5 As shown, this embodiment is basically the same as embodiments 1, 2, 3, and 4. The only difference is that in this embodiment, the laser unit (including wavelength switchable laser and modulator) in the laser array of the node and the detector in the detector array are connected to the laser driver and the detector driver through high-speed input / output electrical ports. The laser driver and the detector driver are connected to the electrical packet switching chip (EPS). The EPS provides the uploading and downloading of local data of the corresponding node, and also provides electrical domain packet switching routing and forwarding of non-local data.

[0075] EPS can reside within the top-of-the-line switch (TOR) of a data center server, or it can be integrated into the transceiver controller of a computing chip / core in an on-chip computing system. For Figure 4 The interconnection between non-directly connected nodes across network units in the illustrated embodiment achieves one-hop or two-hop interconnection through forwarding by intermediate node EPS. It utilizes the low-capacity transceiver controllers or electrical switching chips (such as server set-top switches TOR) that already exist in the intermediate transceiver nodes. This combines the advantages of optical switching and electrical switching, providing both high-capacity optical circuit switching (OCS) or optical burst switching (OBS) at the wavelength granularity (elephant level) and electrical packet switching at the packet granularity (mouse level). At the same time, it avoids the problems of lacking optical storage and packet header parsing in all-optical switching networks.

[0076] Due to the multi-path high protection characteristics of the on-chip distributed switching network architecture in this embodiment, the failure of a single or partial component can be avoided by adaptive intelligent control software without affecting the operation of the entire chip network, thus reducing the manufacturing difficulty and cost of large-scale integrated chips.

[0077] This embodiment uses a distributed optical switching interconnect chip networking scheme based on modular network units (such as an 8-node fully connected network), which reduces the design and manufacturing difficulty of large-scale integrated high-capacity optical switching chips. For example, Figure 4 In this embodiment, the 64-node, 640-pair optical switching network is divided into eight 8-node, 64-port modular optical switching network units. Each node requires only 8 or 16 units of laser, modulator, and detector arrays, as well as 8x8 or 16x16 wavelength routers, thereby significantly reducing the development difficulty of unit arrays and wavelength routers. Scalable integration is achieved through symmetrical parallel expansion, reducing the difficulty of network design and testing, improving network scalability, and also reducing the complexity of routing algorithms and system control software.

[0078] Example 6: This example is basically the same in structure as Examples 1-5, except that the laser array in this example consists of multiple high-speed tunable lasers, each of which includes a tunable laser and a modulator. The tunable laser and modulator are monolithically integrated on a single chip, and the modulator can be of various forms such as electro-absorption modulation (EA), MZ, and micro-ring modulation.

[0079] Example 7: This example is basically the same in structure as Examples 1-5, except that the laser array in this example includes an intracavity wavelength router, a port-selective semiconductor optical amplifier, and a wavelength-selective semiconductor optical amplifier. Any pair of input / output ports of the intracavity wavelength router has minimal loss only at a specific wavelength. One end of the port-selective semiconductor optical amplifier is a reflective surface, and the other end is connected to the input end of the intracavity wavelength router. One end of the wavelength-selective semiconductor optical amplifier is connected to the output end of the intracavity wavelength router, and the other end is provided with a partial reflector. An optical resonant cavity is formed between the reflective surface of any port-selective semiconductor optical amplifier and the partial reflector of any wavelength-selective semiconductor optical amplifier.

[0080] In this embodiment, by applying current to the port-selective semiconductor optical amplifier and the wavelength-selective semiconductor optical amplifier corresponding to any pair of input-output port combinations of the intracavity wavelength router, a laser of a specific wavelength corresponding to the input-output port combination is output at part of the reflector end of the corresponding optical resonant cavity.

[0081] The laser array in this example is a core technology for achieving nanosecond-level high-speed optical switching, simultaneously realizing both multi-wavelength transmission and switching routing functions.

[0082] Figure 7 In this embodiment, the transmit routing unit, consisting of a laser array and a laser-side routing connection unit, comprises an inner cavity portion and an outer cavity portion. Each portion includes an 8x8 cyclically addressed etched diffraction grating router (EDGR) (or arrayed waveguide grating router AWGR), and the two portions are mirror images of each other. By selectively opening a port-selective semiconductor optical amplifier array, each port on one side of the wavelength-selective semiconductor optical amplifier array will output a laser wavelength that corresponds to the wavelength with minimum loss between the selectively opened port-selective semiconductor optical amplifier and the corresponding wavelength-selective semiconductor optical amplifier.

[0083] The eight lasers of different wavelengths output from the inner cavity are high-speed modulated by the modulator and then multiplexed by the external EDGR before being output at one output port. The position of this output port in its array corresponds to the position of the semiconductor optical amplifier in its array.

[0084] In this embodiment, by using an 8x8 cyclic addressing EDGR (or AWGR), the transmit routing unit can select any one of the eight wavelengths to be emitted from the eight laser output ports by switching wavelength-selective semiconductor optical amplifiers. The wavelength automatically adapts to the selected laser output port, while the set of eight wavelengths remains unchanged. Finally, after multiplexing by the external EDGR, the output is emitted at the output port of the selected external wavelength router.

[0085] Example 8: As Figure 8 As shown, this embodiment is an on-chip computer system, comprising a distributed wavelength routing optical switching interconnect integrated chip and peripheral electrical computing or communication chips or chip clusters as described in any of embodiments 1 to 7. The distributed optical switching interconnect integrated chip is responsible for providing optical switching routing, and the peripheral electrical computing or communication chips or chip clusters include CPU chips, memory chips, I / O chips, electrical switching chips, driver chips, etc. The input and output ports of the electrical chips are electrically interconnected with the input and output ports of the distributed optical switching interconnect integrated chip through wafer-level advanced packaging.

[0086] Example 9: This example has a structure that is basically the same as any one of Examples 1 to 7, except that in this example, the optical switching routing connection unit, laser array, detector array, and on-chip node interconnection waveguide network are all packaged and integrated into a single BGA packaged integrated chip. Figure 9Bottom view of the BGA packaged integrated chip. In this example, all optical switching interconnects are completed internally on the chip. The external interface is a BGA ball grid array, all of which are electrical interfaces, requiring no input / output fiber optic ports. The external electrical interfaces are ball grid arrays including high-speed data input / output ports, power ports, wavelength switching signal ports, etc. The electrical interfaces of the optical switching interconnect chip are interconnected with the electrical interfaces of the electrical chip through wafer-level advanced packaging.

[0087] Example 10: As Figure 10 As shown, this embodiment is an on-chip optical switching interconnect computing system that integrates an electronic computing (CPU) or communication chip or chip cluster, a laser driver array, a detector driver array, and a distributed wavelength routing optical switching interconnect integrated chip as described in any one of embodiments 1 to 7.

[0088] The laser driver array provides laser DC bias current, high-speed wavelength switching drive, and high-speed signal modulation drive functions. The laser DC bias current and wavelength switching drive are electrically connected to the laser electrodes via bonding. The high-speed drive is electrically connected to the modulator at high speed. The detector driver array integrates small-signal amplification, limiting amplification, and clock recovery functions. After receiving a high-speed optical signal, the detector converts it into a high-speed electrical signal through the photoelectric effect and inputs it to the detector driver array via a high-speed link. After being input to the detector driver array, the high-speed electrical signal is first amplified by a low-noise amplifier, then input to a limiting amplifier for limiting amplification to a specified amplitude, and finally the signal quality is restored by the clock recovery module before being output to the electrical chip through the high-speed electrical interface of the optical chip.

[0089] The on-chip optical switching interconnect computing system may include shared memory for storing node information, embedding routing algorithms, and sharing node routing information. This shared memory is electrically interconnected with all CPUs, allowing each CPU to read its own node information, update specific or common routing algorithms, and obtain shared routing information. CPUs coordinate routing information and instructions with each other through the shared memory.

[0090] The network architecture of the distributed optical switching interconnect integrated chip and on-chip optical switching interconnect computing system of the present invention can also be used in non-on-chip computing or communication systems. Nodes within modular network units and between nodes across units are connected by optical fibers.

[0091] The above embodiments are only used to explain the inventive concept of the present invention, and are not intended to limit the protection of the present invention. Any non-substantial modifications made to the present invention using this concept should fall within the protection scope of the present invention.

Claims

1. A distributed optical switched interconnect integrated chip, comprising: A multi-chip is composed of several distributed optical switching interconnection network units, each of which has a plurality of nodes connected directly or indirectly, each node comprising: an optical switching routing unit having a plurality of internal input / output ports on one side and a plurality of external input / output ports on the other side; a laser array connected to the internal input ports of the optical switching routing unit for converting electrical signals into optical signals and sending them to the optical switching routing unit; a detector array connected to the internal output ports of the optical switching routing unit for converting optical signals output by the optical switching routing unit into electrical signals; the external input / output ports of the optical switching routing unit are the input / output ports of the node in which the unit is located, and the output ports of the node are connected to the input ports of another node through optical waveguides; all the nodes on the network unit are arranged in a ring, and the nodes are connected through optical waveguides arranged along the ring; several distributed optical switching interconnection network units are arranged in a ring, and each of the network units has at least one cross-unit node, which is directly or indirectly connected to the cross-unit nodes on the other network units through optical waveguides, and the cross-unit nodes at the same position in the network units are connected through optical waveguides arranged along the ring.

2. The distributed optical switch interconnect integrated chip of claim 1, wherein: Each node has two optical switching routing units, i.e. a laser-side routing unit and a detector-side routing unit, and any pair of internal ports and external ports of the optical switching routing units has minimum loss at only one specific wavelength. The laser-side routing unit has internal input ports and external output ports on the two sides, respectively, and the detector-side routing unit has internal output ports and external input ports on the two sides, respectively.

3. The distributed optical cross-connect integrated chip of claim 1 or 2, wherein: The optical switching routing unit uses a cyclic address arrayed waveguide grating router or an etched diffraction grating router.

4. The distributed optical cross-connect integrated chip of claim 1 or 2, wherein: Each unit of the laser array comprises a wavelength-switchable / tunable laser and integrates an extra-cavity high-speed modulator.

5. The distributed optical cross-connect integrated chip of claim 1 or 2, wherein, The laser array comprises: an intra-cavity wavelength router having minimum loss at only one specific wavelength for any pair of input / output port combinations; a port-selection semiconductor optical amplifier array having a reflective surface on one end and connected to the input end of the intra-cavity wavelength router on the other end; a wavelength-selection semiconductor optical amplifier array having the output end of the intra-cavity wavelength router connected on one end and a partial reflector arranged on the other end; an optical resonant cavity is formed between the reflective surface of any port-selection semiconductor optical amplifier and the partial reflector of any wavelength-selection semiconductor optical amplifier; by applying current to the corresponding port-selection semiconductor optical amplifier and wavelength-selection semiconductor optical amplifier of any pair of input / output port combinations of the intra-cavity wavelength router, a laser of a specific wavelength corresponding to the input / output port combination is output at the partial reflector end of the corresponding optical resonant cavity.

6. The distributed optical switching interconnection integrated chip according to claim 1 or 2, characterized in that: The laser array can send optical signals of specified wavelength to the internal input port on one side of the optical switching routing connection unit according to the input electrical signal, the internal input port and the specified wavelength are matched with the external output port of the corresponding output target on the other side, so that the optical signal is output from the port of the corresponding output target; The external input port on one side of the optical switching routing connection unit receives external input optical signals of arbitrary wavelength, which are output from the internal output port of the optical switching routing connection unit on the other side matched with the external input port and the arbitrary wavelength to the detector array, and the detector array converts the optical signal into an electrical signal.

7. The distributed optical switch interconnect integrated chip of claim 1 or 2, wherein: The optical waveguide uses a planar optical waveguide or an optical fiber for intra-chip node connection or inter-chip node connection.

8. The distributed optical switch interconnect integrated chip of claim 1 or 2, wherein: The laser array is electrically connected to a laser driver, and the detector array is electrically connected to a detector driver, and the laser driver and the detector driver are electrically connected to an electrical packet switching chip.

9. The distributed optical switch interconnect integrated chip of claim 1 or 2, wherein: The nodes in the optical switching interconnection network unit are arranged in a ring shape, and the nodes are connected by non-crossing on-chip planar optical waveguides arranged along the ring.

10. The distributed optical switch interconnect integrated chip of claim 1 or 2, wherein: The output port of the node and the interconnection waveguide are located in different waveguide layers, and are connected to the input port of the interconnection waveguide through a coupling grating or an interlayer coupler, and the input port of the node and the interconnection waveguide are located in different waveguide layers, and are connected to the output port of the interconnection waveguide through a coupling grating or an interlayer coupler.

11. The distributed optical switch interconnect integrated chip of claim 1 or 2, wherein: A plurality of distributed optical switching interconnection network units are arranged in a ring shape, the inner side node in the distributed optical switching interconnection network unit is a cross-unit node I, and the outer side node is a cross-unit node II, and the cross-unit nodes I of each interconnection network unit are connected by optical waveguides arranged along the ring.

12. The distributed optical switch interconnect integrated chip of claim 1 or 2, wherein: A plurality of identical distributed optical switching interconnection network units are arranged in a ring shape, each node in the distributed optical switching interconnection network unit is a cross-unit node, and the cross-unit nodes at the same position in each interconnection network unit are connected by optical waveguides arranged along the ring, forming a plurality of fully connected networks, and avoiding waveguide crossing between the plurality of fully connected networks through multi-layer waveguides and interlayer coupling structures.

13. The distributed optical switch interconnect integrated chip of claim 1 or 2, wherein: The high-speed data input / output electrical ports, on-chip switching network control ports, and bias current / voltage ports of the chip are packaged by BGA, and the external electrical interface corresponding to each on-chip node is connected to the electrical input / output ports of the external computing, storage, and I / O electrical chip or chiplet group through wafer-level advanced packaging technology, forming an on-chip multi-chiplet optical switching interconnection computing system.

14. The distributed optical switch interconnect integrated chip of claim 1 or 2, wherein: The distributed optical switching interconnection integrated chip includes optical fiber input / output ports, which are connected to part of the lasers and detectors in the chip through optical coupling structures, and are used for inter-chip optical switching interconnection expansion.

15. A distributed optical switched interconnection system, characterized by: The distributed optical switching interconnection integrated chip, the peripheral electrical computing or communication chip or chiplet group, and the input / output ports of the electrical computing or communication chip are electrically interconnected through wafer-level advanced packaging.

16. The distributed optical cross-connect system of claim 15, wherein: The modulators and detectors of the distributed optical switched interconnect integrated chip are connected to a transmit / receive driver chip through high speed input / output electrical ports, and then connected to an electrical packet switch chip, which is contained in a transceiver controller of a computing chip in a system on chip.

17. A distributed optical switched interconnect system, comprising: The network unit contains the same architecture as the distributed optical switched interconnect integrated chip in any one of claims 1-14, and the nodes in the network unit are connected through optical fibers, and the nodes across the units are connected through optical fibers.

18. The distributed optical cross-connect system of claim 17, wherein: The modulators and detectors of the distributed optical switched interconnect integrated chip are connected to a transmit / receive driver chip through high speed input / output electrical ports, and then connected to an electrical packet switch chip, which is contained in a data center server top-of-rack switch.

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