Charging circuit, charging method, control device, charging and discharging system

Abstract

This invention provides a slow-charging circuit, a slow-charging method, a control device, and a charging / discharging system. The slow-charging circuit is used to slow-charge capacitors in a power conversion circuit and includes: a first slow-charging circuit and a second slow-charging circuit; the first slow-charging circuit is connected in series on a first side of the power conversion circuit, and the second slow-charging circuit is connected in series on a second side of the power conversion circuit; the first slow-charging circuit includes a first relay and a first slow-charging branch connected in parallel; the first slow-charging branch includes a second relay and a first diode connected in series; the second slow-charging circuit includes a third relay and a second slow-charging branch connected in parallel; the second slow-charging branch includes a slow-charging resistor, a second diode, and a fourth relay connected in series; the negative terminal of the second diode in the second slow-charging branch is connected to the slow-charging resistor; the negative terminal of the first diode is connected to the negative terminal of the second diode. This invention offers lower slow-charging costs compared to existing technologies.

Description

Technical Field

[0001] This invention belongs to the field of circuit technology, and more specifically, relates to a slow charging circuit, a slow charging method, a control device, and a charging and discharging system. Background Technology

[0002] In power conversion circuits, capacitors are typically used as filtering and energy storage devices. When the power conversion circuit is connected to a power source, the capacitor is essentially short-circuited, generating a large instantaneous current that can damage the components in the power conversion circuit. To address this issue, existing technologies usually add a slow-charging circuit on the input side of the power conversion circuit to pre-charge the capacitor. However, in practical applications, the inventors of this application have found that in some application scenarios, or in some power conversion circuits, to achieve slow charging of the capacitor, it is also necessary to control the switching transistors of the power conversion circuit while using the aforementioned slow-charging circuit. This results in a high slow-charging control cost for existing solutions when applied to such scenarios. Summary of the Invention

[0003] The purpose of this invention is to provide a slow-charging circuit, slow-charging method, control device, and charging / discharging system to solve the technical problem of high slow-charging control costs in some application scenarios in the prior art.

[0004] To achieve the above objectives, a first aspect of the present invention provides a slow-charging circuit for slow-charging a capacitor in a power conversion circuit, wherein the power conversion circuit is a flying capacitor three-level circuit; the slow-charging circuit includes:

[0005] A first slow charging circuit and a second slow charging circuit; the first slow charging circuit is connected in series on the first side of the power conversion circuit, and the second slow charging circuit is connected in series on the second side of the power conversion circuit.

[0006] The first slow-charge circuit includes a first relay and a first slow-charge branch connected in parallel;

[0007] The first slow-charge branch includes a second relay and a first diode connected in series; the conduction direction of the first diode is the direction of the input current on the first side when the power conversion circuit draws power from the first side;

[0008] The second slow-charge circuit includes a third relay and a second slow-charge branch connected in parallel;

[0009] The second slow-charge branch includes a slow-charge resistor, a second diode, and a fourth relay connected in series; the conduction direction of the second diode is the direction of the input current on the second side when the power conversion circuit draws power from the second side, and the negative terminal of the second diode is connected to the slow-charge resistor in the second slow-charge branch;

[0010] The negative terminal of the first diode is connected to the negative terminal of the second diode to ensure that the slow charging current flows from the negative terminal of the first slow charging circuit into the second slow charging circuit, thereby enabling the first slow charging circuit and the second slow charging circuit to share the slow charging resistor.

[0011] In one possible implementation, the first buffer charging circuit further includes:

[0012] A first fuse connected in series with the first relay and a second fuse connected in series with the second relay.

[0013] In one possible implementation, the second slow-charge branch further includes a third fuse connected in series with the third relay and a fourth fuse connected in series with the fourth relay.

[0014] A second aspect of the present invention provides a slow-charging method applied to the slow-charging circuit described above, the slow-charging method comprising:

[0015] When it is detected that the power conversion circuit needs to draw power from the first side for capacitor slow charging, the second relay is controlled to activate.

[0016] When the difference between the capacitor voltage on the second side and the capacitor voltage on the first side is detected to be within a first preset range, the third relay is controlled to engage, the first relay is controlled to engage, and the second relay is controlled to disengage.

[0017] Wherein, the capacitor voltage on the first side refers to the voltage of the capacitor connected between the positive and negative terminals of the first side, and the capacitor voltage on the second side refers to the voltage of the capacitor connected between the positive and negative terminals of the second side.

[0018] In one possible implementation, the caching method further includes:

[0019] When it is detected that the power conversion circuit needs to draw power from the second side for capacitor slow charging, the fourth relay is controlled to activate and the first relay is controlled to activate.

[0020] When the difference between the capacitor voltage on the first side and the capacitor voltage on the second side is detected to be within a second preset range, the third relay is controlled to engage.

[0021] In one possible implementation, the caching method further includes:

[0022] The switching transistor of the power conversion circuit is controlled so that the difference between the capacitor voltage on the second side and the capacitor voltage on the first side is within the first preset range.

[0023] In one possible implementation, after controlling the fourth relay to engage, if the capacitor voltage on the first side is zero, then the first relay is engaged when the capacitor voltage on the second side reaches a preset voltage. In another possible implementation, after controlling the fourth relay to engage, if the capacitor voltage on the first side is not zero, then the first relay is engaged when the difference between the capacitor voltage on the second side and the capacitor voltage on the first side is within a third preset range.

[0024] A third aspect of the present invention also provides a control device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the above-described slack charging method.

[0025] A fourth aspect of the present invention also provides a charging and discharging system, comprising:

[0026] The power conversion circuit, the aforementioned slow charging circuit, and the control equipment.

[0027] The beneficial effects of the slow-charging circuit, slow-charging method, control device, and charging / discharging system provided by this invention are as follows:

[0028] The reason existing technologies require controlling the switching transistor when performing slow charging on capacitors in power conversion circuits is that the current direction during slow charging is inconsistent with the conduction direction of the diodes in the power conversion circuit, causing the slow charging current to only pass through the switching transistor. Considering this, this invention provides slow charging circuits on both sides of the power conversion circuit and connects the first and second slow charging circuits. Based on this, if there is power on the first side, during capacitor slow charging, the slow charging current can flow from the first slow charging circuit into the second slow charging circuit, and then through the aforementioned diode. At this point, the slow charging current can directly pass through the aforementioned diode, thereby charging the capacitor in the power conversion circuit, thus achieving capacitor slow charging without controlling the switching transistor. In other words, the slow charging solution provided by this invention does not require controlling the switching transistor during capacitor slow charging, thereby reducing the control cost during capacitor slow charging.

[0029] Furthermore, analysis of the slow-charging circuit provided by this invention reveals that it can also support slow charging of bidirectional power conversion circuits. Compared to the prior art method of setting two identical second slow-charging circuits for bidirectional slow charging, this invention reduces the use of slow-charging resistors by having the first and second slow-charging circuits share a common slow-charging resistor. Moreover, in the prior art, to achieve slow charging of bidirectional power conversion circuits, it is usually necessary to set up corresponding resistor branches in the bidirectional power conversion circuit (see reference...). Figure 6 The present invention reduces the number of such branches by directly connecting the first and second slow charging circuits (D5-K7-RL branch in the circuit). From the aforementioned perspective, the present invention also effectively reduces the cost of capacitor slow charging. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a schematic diagram of the structure of a slow-charging circuit provided in an embodiment of the present invention;

[0032] Figure 2 This is a schematic diagram illustrating the specific application of a slow-charging circuit provided in an embodiment of the present invention;

[0033] Figure 3 This is a schematic flowchart of a slack charging method provided in an embodiment of the present invention;

[0034] Figure 4 This is a schematic diagram of a conventional slow-charge circuit provided in an embodiment of the present invention;

[0035] Figure 5 This is a schematic diagram of the current flow direction of the prior art in the slow charging process provided by an embodiment of the present invention;

[0036] Figure 6 This is a schematic diagram of the current flow direction of the slow charging system provided in an embodiment of the present invention;

[0037] Figure 7 A schematic flowchart of a slack charging method provided in another embodiment of the present invention;

[0038] Figure 8 This is a schematic diagram of the structure of a control device provided in an embodiment of the present invention. Detailed Implementation

[0039] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and are not intended to limit the present invention.

[0040] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0041] Please refer to Figure 1 , Figure 1 This is a schematic diagram of a slow-charging circuit according to an embodiment of the present invention. The slow-charging circuit is used to slow-charge the capacitor in a power conversion circuit, which is a flying capacitor three-level circuit. The slow-charging circuit includes:

[0042] A first slow charging circuit and a second slow charging circuit. The first slow charging circuit is connected in series on the first side of the power conversion circuit, and the second slow charging circuit is connected in series on the second side of the power conversion circuit.

[0043] The first slow charging circuit includes a first relay K1 and a first slow charging branch connected in parallel.

[0044] The first slow-charge branch includes a second relay K2 and a first diode D1 connected in series. The conduction direction of the first diode D1 is the direction of the input current on the first side when the power conversion circuit draws power from the first side.

[0045] The second slow charging circuit includes a third relay K3 and a second slow charging branch connected in parallel.

[0046] The second slow-charge branch includes a slow-charge resistor R1, a second diode D2, and a fourth relay K4 connected in series. The conduction direction of the second diode D2 is the direction of the input current on the second side when the power conversion circuit draws power from the second side. In the second slow-charge branch, the negative terminal of the second diode D2 is connected to the slow-charge resistor.

[0047] The negative terminal of the first diode D1 is connected to the negative terminal of the second diode D2 to ensure that the slow charging current flows from the negative terminal of the first slow charging circuit into the second slow charging circuit, thereby realizing that the first slow charging circuit and the second slow charging circuit share the slow charging resistor R1.

[0048] In this embodiment, Figure 1The dashed box portions represent the first and second slow-charging circuits, respectively. When the first side of the power conversion circuit is energized (i.e., when the power conversion circuit draws power from the first side for capacitor slow-charging), the first diode D1 ensures that the slow-charging current flows from the negative terminal of the first slow-charging circuit into the second slow-charging circuit. Thus, the first and second slow-charging circuits can share the slow-charging resistor R1. In other words, this embodiment of the invention changes the direction of the slow-charging current by setting two slow-charging circuits and connecting them, thereby minimizing the problems present in the prior art.

[0049] In addition, setting up two slow charging circuits can also support the power conversion circuit to draw power from the second side for capacitor slow charging. That is, the slow charging circuit in this embodiment of the invention also supports a bidirectional slow charging scheme.

[0050] Specifically, the power conversion circuit is a bidirectional flying capacitor three-level circuit, that is, a bidirectional DC / DC circuit. Based on this, you can refer to... Figure 2 In practical applications, the power conversion circuit may also include DC fuses, EMI filter circuits, etc., as needed. When the power conversion circuit is a bidirectional DC / DC circuit, the first side of the power conversion circuit can be the bus side for connecting to the DC bus, and the second side of the power conversion circuit can be the battery side for connecting to the battery. Of course, the power conversion circuit described in the embodiments of the present invention also supports other connection methods, which are not limited here.

[0051] In one possible implementation, the first buffer charging circuit further includes:

[0052] A first fuse connected in series with a first relay and a second fuse connected in series with a second relay.

[0053] In this embodiment, reference can be made to Figure 2 Furthermore, a first fuse F1 and a second fuse F2 can be set in the first slow charging circuit to achieve circuit protection.

[0054] In one possible implementation, the second slow-charge branch also includes a third fuse connected in series with the third relay and a fourth fuse connected in series with the fourth relay.

[0055] In this embodiment, similar to the above embodiments, a third fuse F3 and a fourth fuse F4 can also be provided in the second slow charging circuit to achieve circuit protection.

[0056] The reason why existing technologies still require controlling the switching transistor when performing slow charging on capacitors in power conversion circuits is that the current direction during slow charging is inconsistent with the conduction direction of the diodes in the power conversion circuit, causing the slow charging current to only pass through the switching transistor. Considering this, this invention provides slow charging circuits on both sides of the power conversion circuit, connecting the first and second slow charging circuits. Based on this, if there is power on the first side, during capacitor slow charging, the slow charging current can flow from the first slow charging circuit into the second slow charging circuit, and then through the aforementioned diode. At this point, the slow charging current can directly pass through the aforementioned diode, thereby charging the capacitor in the power conversion circuit, thus achieving capacitor slow charging without controlling the switching transistor. In other words, the slow charging solution provided by this invention does not require controlling the switching transistor during capacitor slow charging, thereby reducing the control cost during capacitor slow charging.

[0057] Furthermore, analysis of the slow-charging circuit provided in the embodiments of the present invention reveals that it can also support slow charging of bidirectional power conversion circuits. Compared to the prior art method of setting two identical second slow-charging circuits for bidirectional slow charging, the embodiments of the present invention reduce the use of slow-charging resistors by having the first and second slow-charging circuits share a common slow-charging resistor. Moreover, in the prior art, to achieve slow charging of bidirectional power conversion circuits, it is usually necessary to set corresponding resistor branches in the bidirectional power conversion circuit (see reference...). Figure 6 The present invention reduces the number of such branches by directly connecting the first and second slow charging circuits (e.g., the D5-K7-RL branch in the example). From the aforementioned perspective, the present invention also effectively reduces the cost of capacitor slow charging.

[0058] Please refer to Figure 3 In a second aspect, the present invention provides a slow-charging method applied to the slow-charging circuit described above, the slow-charging method comprising:

[0059] S101: When it is detected that the power conversion circuit needs to draw power from the first side for capacitor slow charging, the second relay is controlled to be energized.

[0060] S102: When the difference between the capacitor voltage on the second side and the capacitor voltage on the first side is detected to be within a first preset range, control the third relay to activate, control the first relay to activate, and control the second relay to deactivate.

[0061] The capacitor voltage on the first side refers to the voltage of the capacitor connected between the positive and negative terminals on the first side, and the capacitor voltage on the second side refers to the voltage of the capacitor connected between the positive and negative terminals on the second side.

[0062] In this embodiment, the capacitor connected between the positive and negative terminals of the first side can be at least two capacitors connected in series, or it can be a single capacitor; this is not limited here. If the capacitor connected between the positive and negative terminals of the first side is a single capacitor, then the capacitor voltage on the first side is the voltage of that single capacitor. If the capacitor connected between the positive and negative terminals of the first side is at least two capacitors, then the capacitor voltage on the first side is the sum of the voltages of those at least two capacitors. The capacitor voltage on the second side is defined similarly and will not be repeated here.

[0063] In this embodiment, it should be noted that the relay in the slow charging circuit is in the off state by default before the capacitor slow charging begins (the same applies to subsequent embodiments, and will not be described again).

[0064] In this embodiment, with Figure 2 Taking the application scenario in the example, when there is power on the first side of the power conversion circuit, power will be drawn from the first side for capacitor slow charging, corresponding to... Figure 2 The capacitor is slowly charged from the bus side. Based on this, Figure 4 This illustrates a slow charging circuit diagram in the prior art. Figure 4 Based on the slow-charging circuit, the existing slow-charging method involves controlling relays K2 and K3 to slow-charge the capacitor. When the capacitor is slow-charged to a certain extent (for example, when the capacitor voltage reaches a preset voltage range), relay K1 is activated to complete the slow-charging. According to this scheme, the current flow during slow-charging is as follows: Figure 5 As shown, according to Figure 5 It is known that if capacitor slow charging is required, the switching transistor Q2 needs to be controlled, which will increase the control cost during capacitor slow charging.

[0065] According to the solution of this embodiment of the invention, it is only necessary to control the second relay K2 to close, and when the capacitor voltage on the second side is detected (i.e., Figure 2 When the difference between the voltage of C4 and the voltage of the first-side capacitor (i.e., the voltage of C2 plus the voltage of C3) reaches a first preset range, the third relay K3 is activated, the second relay K2 is deactivated, and the first relay K1 is activated to complete the slow charging. At this time, during capacitor slow charging, since there is a connection between the first and second slow charging circuits, when there is current input on the first side (or the bus side), capacitors C2, C3, and C4 can be directly slow-charged. Furthermore, the slow charging current of the flying capacitor C1 does not need to pass through the switching transistor Q2. (Refer to...) Figure 6 According to the embodiment of the present invention, the current flow direction when charging C1 is c->b->a->d. At this time, the slow charging of the capacitor in the power conversion circuit can be completed without controlling the switching transistor Q2. Therefore, this embodiment effectively reduces the control cost of capacitor slow charging.

[0066] in, Figure 5 and Figure 6 The circuit structures in are all similar to Figure 2 The corresponding bidirectional DC / DC circuit.

[0067] Please refer to Figure 7 In one possible implementation, the caching method also includes:

[0068] S103: When it is detected that the power conversion circuit needs to draw power from the second side for capacitor slow charging, control the fourth relay to activate and control the first relay to activate.

[0069] S104: When the difference between the capacitor voltage on the first side and the capacitor voltage on the second side is detected to be within a second preset range, the third relay is controlled to activate.

[0070] In this embodiment, with Figure 2 Taking the application scenario as an example, when performing slow charging control in steps S103 and S104, the flow direction of the slow charging current can be referenced. Figure 6 In other words, the slow-charging circuit provided by this invention supports a bidirectional slow-charging scheme.

[0071] In one possible implementation, after the fourth relay is activated, if the voltage of the capacitor on the first side is zero, the first relay is activated when the voltage of the capacitor on the second side reaches a preset voltage.

[0072] In one possible implementation, after the fourth relay is activated, if the voltage of the capacitor on the first side is not zero, the first relay is activated when the difference between the voltage of the capacitor on the second side and the voltage of the capacitor on the first side is within a third preset range.

[0073] In this embodiment, after the fourth relay is activated, if there is no power on the first side, the second side is slowly charged to a preset voltage before the first relay is activated. If there is power on the first side, the second side is slowly charged to a voltage that is basically the same as that on the first side before the first relay is activated. That is, after the fourth relay is activated, the timing of activating the first relay can also be determined based on the capacitor voltage on the first side.

[0074] In one possible implementation, the caching method also includes:

[0075] The switching transistor of the power conversion circuit is controlled so that the difference between the capacitor voltage on the second side and the capacitor voltage on the first side is within a first preset range.

[0076] In this embodiment, Figure 2Taking an application scenario as an example, according to the solution of this invention, when the second side of the power conversion circuit is a battery, when the capacitor on the battery side is fully charged, the capacitor voltage is the bus voltage. When the bus side is energized, the bus voltage will be higher than the battery voltage. At this time, in order to ensure the safe operation of the battery, it may be necessary to control the difference between the capacitor voltage on the battery side and the battery voltage to be less than a preset difference, that is, the first preset range is (Ubat-e, Ubat+e), where Ubat is the battery voltage and e is the preset difference. Therefore, the embodiment of this invention can also control the switching transistor of the power conversion circuit to ensure that the difference between the capacitor voltage on the battery side and the capacitor voltage on the bus side is within the first preset range. It should be noted here that, unlike the prior art which controls the switching transistor to conduct during slow charging, regardless of whether this solution is adopted, the capacitor voltage on the battery side needs to be controlled. Therefore, controlling the capacitor voltage on the battery side here will not increase the control cost of slow charging. Based on this, Figure 2 For example, if it is necessary to control the capacitor voltage on the battery side, it can be done by controlling... Figure 5 or Figure 6 The implementation of Q3 and Q4 in the code.

[0077] Please refer to Figure 8In a third aspect, the present invention also provides a control device 300, comprising: one or more processors 301, one or more input devices 302, one or more output devices 303, and one or more memories 304. The processors 301, input devices 302, output devices 303, and memories 304 communicate with each other via a communication bus 305. The memories 304 are used to store computer programs, which include program instructions. The processors 301 are used to execute the program instructions stored in the memories 304. The processors 301 are configured to invoke the program instructions to execute the steps of the above-described method embodiments. It should be understood that in the embodiments of the present invention, the processor 301 may be a Central Processing Unit (CPU). The processor may also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor. Input device 302 may include a touchpad, a fingerprint sensor (for collecting the user's fingerprint information and fingerprint orientation information), a microphone, etc., while output device 303 may include a display (LCD, etc.), a speaker, etc. Memory 304 may include read-only memory and random access memory, and provides instructions and data to processor 301. A portion of memory 304 may also include non-volatile random access memory. For example, memory 304 may also store device type information. In specific implementations, the processor 301, input device 302, and output device 303 described in the embodiments of the present invention can execute the implementation methods described in the first and second embodiments of the caching method provided in the embodiments of the present invention.

[0078] A fourth aspect of the present invention also provides a charging and discharging system, comprising:

[0079] The power conversion circuit, slow charging circuit, and control equipment described above.

[0080] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A snubber circuit, comprising: The slow-charging circuit is used to slow-charge the capacitor in the power conversion circuit, which is a flying capacitor three-level circuit; the slow-charging circuit includes: A first slow charging circuit and a second slow charging circuit; the first slow charging circuit is connected in series on the first side of the power conversion circuit, and the second slow charging circuit is connected in series on the second side of the power conversion circuit. The first slow-charge circuit includes a first relay and a first slow-charge branch connected in parallel; The first slow-charge branch includes a second relay and a first diode connected in series; the conduction direction of the first diode is the direction of the input current on the first side when the power conversion circuit draws power from the first side; The second slow-charge circuit includes a third relay and a second slow-charge branch connected in parallel; The second slow-charge branch includes a slow-charge resistor, a second diode, and a fourth relay connected in series; the conduction direction of the second diode is the direction of the input current on the second side when the power conversion circuit draws power from the second side, and the negative terminal of the second diode is connected to the slow-charge resistor in the second slow-charge branch; The negative terminal of the first diode is connected to the negative terminal of the second diode to ensure that the slow charging current flows from the negative terminal of the first slow charging circuit into the second slow charging circuit, thereby enabling the first slow charging circuit and the second slow charging circuit to share the slow charging resistor.

2. The buffer charging circuit of claim 1, wherein, The first slow charging circuit also includes: A first fuse connected in series with the first relay and a second fuse connected in series with the second relay.

3. The buffer charging circuit of claim 1, wherein, The second slow-charge branch also includes a third fuse connected in series with the third relay and a fourth fuse connected in series with the fourth relay.

4. A method for the buffer charging circuit as claimed in claim 1, characterized by, The slack charging method includes: When it is detected that the power conversion circuit needs to draw power from the first side for capacitor slow charging, the second relay is controlled to activate. When the difference between the capacitor voltage on the second side and the capacitor voltage on the first side is detected to be within a first preset range, the third relay is controlled to engage, the first relay is controlled to engage, and the second relay is controlled to disengage. Wherein, the capacitor voltage on the first side refers to the voltage of the capacitor connected between the positive and negative terminals of the first side, and the capacitor voltage on the second side refers to the voltage of the capacitor connected between the positive and negative terminals of the second side.

5. The slow-filling method as described in claim 4, characterized in that, The slow-charging method further includes: When it is detected that the power conversion circuit needs to draw power from the second side for capacitor slow charging, the fourth relay is controlled to activate and the first relay is controlled to activate. When the difference between the capacitor voltage on the first side and the capacitor voltage on the second side is detected to be within a second preset range, the third relay is controlled to engage.

6. The method of claim 4, wherein the step of buffering comprises the step of: The slow-charging method further includes: ​ The switching transistor of the power conversion circuit is controlled so that the difference between the capacitor voltage on the second side and the capacitor voltage on the first side is within the first preset range.

7. The method of claim 5, wherein the step of buffering comprises the step of: After the fourth relay is activated, if the capacitor voltage on the first side is zero, the first relay is activated when the capacitor voltage on the second side reaches a preset voltage. ​ 8. The method of claim 5, wherein the step of buffering comprises the step of: After the fourth relay is activated, if the capacitor voltage on the first side is not zero, the first relay is activated when the difference between the capacitor voltage on the second side and the capacitor voltage on the first side is within a third preset range. ​ 9. A control device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method as described in any one of claims 4 to 8.

10. A charge-discharge system characterized by comprising: include: The power conversion circuit, the slow charging circuit as described in any one of claims 1 to 3, and the control device as described in claim 9.

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