A common-mode and gain-adjustable fully differential attenuator

Abstract

The present invention belongs to the technical field of analog integrated circuits, and specifically relates to a fully differential attenuator with adjustable common mode and gain. The attenuator structure of the present invention adopts a fully differential structure, thereby introducing a common mode feedback point. By changing the reference voltage VREF at the positive input terminal of the common mode feedback circuit, the output common mode voltage of the attenuator is adjusted; the connection mode of R1 and R2, on the one hand, makes the V1 point an AC ground, so that the gain is independent of the transconductance of MN1 and MN2, and on the other hand, retains the common mode feedback loop, thereby realizing adjustable common mode voltage. An additional branch is introduced to provide current for the load transistor. By changing the current magnitude of the first current source I1, the transconductance of the input pair transistors is adjusted, and by changing the magnitudes of the second current source I2 and the third current source I3, the transconductance of the load transistor is adjusted to achieve adjustable gain. The adjustable output common mode voltage and gain make the attenuator suitable for various working environments, and the fully differential structure makes the anti-interference ability stronger, especially suitable for the front end of electrocardiogram signal acquisition.

Description

Technical Field

[0001] The present invention belongs to the technical field of analog integrated circuits, and particularly relates to a fully differential attenuator with adjustable common mode and gain. Background Art

[0002] With the rapid development of the economic society and the rapid improvement of the scientific and technological level, people pay more and more attention to their own physical conditions, and the demand for portable medical electronic monitoring devices is gradually increasing. Portable medical electronic devices have advantages that traditional medical devices do not have. They are smaller in size, lower in price, lower in power consumption, and are more easily popularized among the population. People can monitor their physical conditions anytime and anywhere.

[0003] The amplitude of the electrocardiogram (ECG) signal is between 0.1 mV and 5 mV, and the typical value is 2 mV. The frequency is distributed between 0.5 Hz and 150 Hz. The regular beating of the heart will form a potential difference at different parts of the human body. Medical workers can judge people's heart health conditions by analyzing the potential signal, and can also predict heart diseases such as arrhythmia.

[0004] The front-end circuit for ECG signal acquisition often uses a capacitive positive feedback loop to cancel the parasitic capacitance of the signal input node, and uses an attenuator to reduce the size of the feedback capacitance to improve the feedback accuracy. Most traditional attenuators adopt a single-ended structure, which cannot use common-mode feedback and has non-adjustable gain, poor stability, and a small applicable range. For the traditional attenuator with a differential structure, its output common-mode voltage is determined by the gate-source voltage VGS and is relatively sensitive to changes in the external environment, resulting in unstable output common-mode voltage. Summary of the Invention

[0005] In view of the above existing problems or deficiencies, in order to solve the problems of small applicable range, non-adjustable output common-mode voltage, and non-adjustable gain existing in the existing attenuators, the present invention provides a fully differential attenuator with adjustable common mode and gain, which can be used for the front-end of ECG signal acquisition.

[0006] A fully differential attenuator with adjustable common mode and gain includes an attenuator main circuit and a common-mode feedback circuit.

[0007] The attenuator main circuit includes a first resistor R1, a second resistor R2, a first current source I1, a second current source I2, a third current source I3, a first PMOS transistor MP1, a second PMOS transistor MP2, a third PMOS transistor MP3, a fourth PMOS transistor MP4, a first NMOS transistor MN1, and a second NMOS transistor MN2.

[0008] One end of the first resistor R1 is connected to the drain terminal of the third PMOS transistor MP3, and the other end is connected to the gate terminal of the third PMOS transistor MP3; one end of the second resistor R2 is connected to the drain terminal of the fourth PMOS transistor, and the other end is connected to the gate terminal of the fourth PMOS transistor MP4.

[0009] One end of the first current source I1 is connected to the source terminals of the first PMOS and the second PMOS, and the other end is connected to the power supply signal VDD; one end of the second current source I2 is connected to the negative-phase output terminal VON of the attenuator, and the other end is connected to the power supply signal VDD; one end of the third current source I3 is connected to the positive-phase output terminal VOP of the attenuator, and the other end is connected to the power supply signal VDD.

[0010] The gate terminal of the first PMOS transistor MP1 serves as the positive-phase input terminal of the attenuator to receive the positive-phase input signal VIP, the source terminal is connected to the first current source I1, and the drain terminal is the negative-phase output terminal VON. The gate terminal of the second PMOS transistor MP2 serves as the negative-phase input terminal of the attenuator to receive the negative-phase input signal VIN, the source terminal is connected to the first current source I1, and the drain terminal is the positive-phase output terminal VOP.

[0011] The gate terminal and the drain terminal of the third PMOS transistor MP3 are respectively connected to both ends of the first resistor R1, and the source terminal is connected to the negative-phase output terminal VON; the gate terminal and the drain terminal of the fourth PMOS transistor MP4 are respectively connected to both ends of the second resistor R2, and the source terminal is connected to the positive-phase output terminal VOP; the gate terminals of the third PMOS transistor MP3 and the fourth PMOS transistor MP4 are connected, and the intersection point of R1, R2, MP3 and MP4 is V1.

[0012] The drain terminal of the first NMOS transistor MN1 is connected to the drain terminal of the third PMOS transistor MP3, and the drain terminal of the second NMOS transistor MN2 is connected to the drain terminal of the fourth PMOS transistor MP4. The gate terminal of the first NMOS transistor MN1 is connected to the gate terminal of the second NMOS transistor MN2 as the common-mode feedback point with a voltage of VCMFB; the source terminals of the first NMOS transistor MN1 and the second NMOS transistor MN2 are both grounded.

[0013] The common-mode voltage VOCM output by the attenuator main circuit is connected to the positive-phase input terminal of the common-mode feedback circuit, and VOCM is the common-mode voltage of the voltage of the positive-phase output terminal VOP and the voltage of the negative-phase output terminal VON.

[0014] The common-mode feedback circuit adopts a differential input and single-ended output operational amplifier structure. The negative-phase input terminal is connected to the reference voltage VREF, the positive-phase input terminal is connected to the common-mode voltage VOCM output by the attenuator main circuit, and the output terminal is connected to the gate terminals of the first NMOS transistor MN1 and the second NMOS transistor MN2, and the voltage of the output terminal is VCMFB.

[0015] In summary, the attenuator structure of the present invention adopts a fully differential structure, thereby introducing a common-mode feedback point. By changing the reference voltage VREF at the positive-phase input terminal of the common-mode feedback circuit, the output common-mode voltage of the attenuator is adjusted. The connection manner of R1 and R2 makes the V1 point an AC ground on the one hand, so that the gain is independent of the transconductance of MN1 and MN2, and on the other hand, it retains the common-mode feedback loop, thereby realizing adjustable common-mode voltage. An additional branch is introduced to provide current for the load transistor. By changing the current magnitude of the first current source I1, the transconductance of the input pair transistor is adjusted, and by changing the magnitudes of the second current source I2 and the third current source I3, the transconductance of the load transistor is adjusted to achieve adjustable gain. The adjustable output common-mode voltage and gain make the attenuator applicable to a variety of working environments. The fully differential structure makes the anti-interference ability stronger, especially suitable for the front-end circuit of electrocardiogram signal acquisition. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic diagram of the overall architecture of the present invention.

[0017] Figure 2 It is a schematic diagram of the overall architecture of the embodiment.

[0018] Figure 3 It is the 1 / 8 gain output curve of the present invention.

[0019] Figure 4 It is the 1 / 6 gain output curve of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0020] The present invention will be further described in detail below with reference to the embodiments.

[0021] Figure 2 It is a schematic diagram of the overall circuit architecture of this embodiment. The attenuator main circuit is used to obtain the common-mode voltage VOCM by adding resistors R3 and R4. One end of the third resistor R3 is connected to the negative-phase output terminal VON, and the other end is connected to the fourth resistor R4; one end of the fourth resistor R4 is connected to the positive-phase output terminal VOP, and the other end is connected to the third resistor R3; the voltage at the connection point of the third resistor and the fourth resistor is the output common-mode voltage VOCM of the attenuator main circuit. The common-mode feedback circuit adopts an operational amplifier.

[0022] The first resistor R1 is connected across the gate terminal and the drain terminal of the third PMOS transistor MP3, and the second resistor R2 is connected across the gate terminal and the drain terminal of the fourth PMOS transistor MP4. The intersection point of R1, R2, MP3, and MP4 is V1, and the V1 point is an AC ground, so that the gain of the attenuator is only the transconductance ratio of the third PMOS transistor MP3 to the first PMOS transistor MP1, independent of the first NMOS transistor NM1, and at the same time, the integrity of the feedback loop is retained.

[0023] The existence of the feedback loop can stabilize the common-mode voltage at the output terminal, making it determined near the reference voltage VREF. For example, when the output common-mode voltage VOCM increases, the voltage VCMFB at the output terminal of the common-mode feedback increases through the common-mode feedback circuit, causing the drain voltages of MN1 and MN2 transistors to decrease, resulting in a decrease in the voltage at point V1, thereby reducing the output common-mode voltage VOCM and forming a negative feedback loop.

[0024] One end of the first current source I1 is connected to the source terminals of the first PMOS and the second PMOS, and the other end is connected to the power supply signal VDD; one end of the second current source I2 is connected to the negative-phase output terminal of the attenuator, and the other end is connected to the power supply signal VDD; one end of the third current source I3 is connected to the positive-phase output terminal of the attenuator, and the other end is connected to the power supply signal VDD. IP1 is the current flowing through the input pair transistor MP1, and IP3 is the current flowing through the load transistor MP3. The relationship between them is: 2×IP1 = I1; IP1 + I2 = IP3.

[0025] The gain GAIN of the attenuator can be expressed as: GAIN = gm3 / gm1, where gm3 is the transconductance of the third PMOS transistor MP3, and gm1 is the transconductance of the first PMOS transistor MP1. Since the transconductance of the MOS transistor where μC OX is a process parameter, is the aspect ratio of the MOS transistor, and I is the current flowing through the source-drain terminals of the MOS transistor.

[0026] Figure 3 This is the 1 / 8 gain output curve of the present invention. When the aspect ratios of the third and fourth PMOS transistors are 8 times that of the first and second PMOS transistors, and at the same time the current IP3 flowing through the load transistor MP3 is 8 times the current IP1 flowing through the input pair transistor MP1, an attenuator gain of 1 / 8 can be obtained. By changing the ratio of the above parameters, different attenuator gains can be obtained. Figure 4 This is the 1 / 6 gain output curve of the present invention.

[0027] As can be seen from the above embodiments, the fully differential attenuator with adjustable common mode and gain provided by the present invention, through the connection method of resistors R1 and R2, on the one hand, makes point V1 an AC ground, so that the gain is independent of the transconductances of MN1 and MN2 transistors, and on the other hand, retains the common-mode feedback loop, and the feedback signal can be transmitted from the drains of MN1 and MN2 to the drains of MP3 and MP4, thereby realizing adjustable common-mode voltage. By introducing an additional current supply branch, the adjustment of the attenuator gain becomes intuitive and simple, realizing the function of adjustable gain. The above functions enable the attenuator to adapt to more working environments, especially suitable for the front-end circuit of electrocardiogram signal acquisition.

Claims

1. A fully differential attenuator with adjustable common mode and gain, characterized in that: It includes an attenuator main circuit and a common mode feedback circuit; The attenuator main circuit includes a first resistor R1, a second resistor R2, a first current source I1, a second current source I2, a third current source I3, a first PMOS transistor MP1, a second PMOS transistor MP2, a third PMOS transistor MP3, a fourth PMOS transistor MP4, a first NMOS transistor MN1, and a second NMOS transistor MN2; One end of the first resistor R1 is connected to the drain of the third PMOS transistor MP3, and the other end is connected to the gate of the third PMOS transistor MP3; one end of the second resistor R2 is connected to the drain of the fourth PMOS transistor, and the other end is connected to the gate of the fourth PMOS transistor MP4; One end of the first current source I1 is connected to the sources of the first PMOS transistor and the second PMOS transistor, and the other end is connected to the power supply signal VDD; one end of the second current source I2 is connected to the negative-phase output terminal VON of the attenuator, and the other end is connected to the power supply signal VDD; one end of the third current source I3 is connected to the positive-phase output terminal VOP of the attenuator, and the other end is connected to the power supply signal VDD; The gate of the first PMOS transistor MP1 is used as the positive-phase input terminal of the attenuator to receive the positive-phase input signal VIP, the source is connected to the first current source I1, and the drain is the negative-phase output terminal VON; the gate of the second PMOS transistor MP2 is used as the negative-phase input terminal of the attenuator to receive the negative-phase input signal VIN, the source is connected to the first current source I1, and the drain is the positive-phase output terminal VOP; The gate and the drain of the third PMOS transistor MP3 are respectively connected to both ends of the first resistor R1, and the source is connected to the negative-phase output terminal VON of the attenuator; the gate and the drain of the fourth PMOS transistor MP4 are respectively connected to both ends of the second resistor R2, and the source is connected to the positive-phase output terminal VOP of the attenuator; the gates of the third PMOS transistor MP3 and the fourth PMOS transistor MP4 are connected, and the intersection point of R1, R2, MP3, and MP4 is V1; The drain of the first NMOS transistor MN1 is connected to the drain of the third PMOS transistor MP3, and the drain of the second NMOS transistor MN2 is connected to the drain of the fourth PMOS transistor MP4; the gates of the first NMOS transistor MN1 and the second NMOS transistor MN2 are connected to each other as a common mode feedback point with a voltage of VCMFB; the sources of the first NMOS transistor MN1 and the second NMOS transistor MN2 are both grounded; The common mode voltage VOCM output by the attenuator main circuit is connected to the positive-phase input terminal of the common mode feedback circuit; The common mode feedback circuit adopts a differential input and single-ended output operational amplifier structure; the negative-phase input terminal is connected to the reference voltage VREF, the positive-phase input terminal is connected to the common mode voltage VOCM output by the attenuator main circuit, and the output terminal is connected to the gates of the first NMOS transistor MN1 and the second NMOS transistor MN2, and the voltage at the output terminal is VCMFB.

2. The fully differential attenuator with adjustable common mode and gain according to claim 1, characterized in that: The attenuator main body circuit is used to obtain the common-mode voltage VOCM by adding resistors R3 and R4. One end of the third resistor R3 is connected to the negative-phase output terminal VON, and the other end is connected to the fourth resistor R4. One end of the fourth resistor R4 is connected to the positive-phase output terminal VOP, and the other end is connected to the third resistor R3. The voltage at the connection point of the third resistor and the fourth resistor is the output common-mode voltage VOCM of the attenuator main body circuit.

3. The common-mode and gain-adjustable fully differential attenuator according to claim 1, wherein: The common-mode feedback circuit is an operational amplifier.

4. The common-mode and gain-adjustable fully differential attenuator according to claim 1, wherein: Applied to the front-end circuit of electrocardiogram signal acquisition.

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