Micro-nano pin led element and manufacturing method thereof

Abstract

The present application relates to a micro-nano pin LED element manufacturing method, comprising: preparing an LED wafer in which a first conductive semiconductor layer, a photoactive layer, and a second conductive semiconductor layer are sequentially stacked; forming an electrode layer or a polarization induction layer patterned in a manner that regions different in electrical polarity are adjacent on the second conductive semiconductor layer of the LED wafer; etching the LED wafer in a thickness direction in a manner that each element has a planar surface with a length and a width of nanometer or micrometer size and a thickness perpendicular to the planar surface is smaller than the length, to form a plurality of micro-nano pin LED pillars; and separating the plurality of micro-nano pin LED pillars from the LED wafer. The micro-nano pin LED element of the present application increases the light emitting area, and the area of the photoactive layer exposed on the surface is greatly reduced, thereby being able to prevent or minimize the effect of degradation caused by surface defects.

Description

Technical Field

[0001] This invention relates to LED elements, and more specifically to Micro-Nano FIN LED elements and methods for manufacturing the same. Background Technology

[0002] Micro-LEDs and Nano-LEDs possess excellent color accuracy and high efficiency, and are relatively environmentally friendly materials, making them suitable for use as core components of displays. In light of this market situation, research has been conducted in recent years on novel nanopillar LED structures or nanowire LEDs with swells formed through new manufacturing processes. Furthermore, to achieve high efficiency and high safety in the protective film coating the nanopillars, research is also underway on protective film materials or ligand materials that facilitate subsequent processes.

[0003] Based on this research in the field of materials, large-scale TV displays utilizing red, green, and blue Micro-LEDs have recently been commercialized. It is anticipated that in the future, full-color TVs using blue Micro-LEDs or Nano-LEDs to achieve blue subpixels, and red and green subpixels formed by quantum dots emitting light from these blue LEDs, will also be commercialized. Furthermore, it is expected that red, green, and blue Nano-LED TV displays will also be commercialized.

[0004] Micro-LED displays boast high performance, a very long theoretical lifespan, and extremely high efficiency. However, when developing 8K resolution displays, it requires a one-to-one correspondence between nearly 100 million sub-pixels and red, green, and blue Micro-LEDs. Therefore, the pick-and-place technology used in manufacturing Micro-LED displays, considering its high cost, high defect rate, and low production efficiency, is currently limited by technological constraints, making it difficult to manufacture truly high-resolution commercial displays, from smartphones to TVs. Furthermore, for Nano-LEDs, it is even more difficult to use the same pick-and-place technology as Micro-LEDs to individually configure each sub-pixel.

[0005] To overcome these difficulties, Korean Patent Publication No. 10-1436123 discloses a display manufactured using the following method: after immersing a subpixel in a solution mixed with nanopillar LEDs, an electric field is formed between two directional electrodes, causing multiple nanopillar LED elements to self-align on the electrodes, thereby forming a subpixel. However, the nanopillar LEDs used have a small light-emitting area and poor efficiency, resulting in the following problems: to achieve the desired efficiency, a large number of LEDs need to be installed, and the nanopillar LEDs themselves have a high probability of defects.

[0006] Specifically, it is known that nanopillar-shaped LED devices are manufactured using the following methods: a top-down method is used to fabricate LED wafers by combining nanopatterning processes with dry / wet etching, or by directly growing them on a substrate using a bottom-up method. In such nanopillar-shaped LEDs, the long axis of the LED is aligned with the stacking direction, i.e., the stacking direction of each layer in the p-GaN / InGaN multiple quantum well (MQW) / n-GaN stacked structure. Therefore, the light-emitting area is narrow. Due to the narrow light-emitting area, surface defects have a significant impact on efficiency reduction, making it difficult to optimize the electron-positive aperture recombination rate. Consequently, the luminous efficiency is significantly lower than that of the original wafer.

[0007] Therefore, there is an urgent need to develop a novel LED component that can not only easily arrange elements using an electric field, but also has a large light-emitting area, can prevent or minimize efficiency reduction caused by surface defects, optimize the recombination speed of electrons and positive holes, has excellent luminous efficiency, and has high brightness. Summary of the Invention

[0008] Technical issues

[0009] The present invention was made to solve the above-mentioned problems. Its purpose is to provide a Micro-Nano FINLED element and a method for manufacturing the same, which can improve the light-emitting area, maintain high efficiency, and have high brightness.

[0010] Furthermore, another objective of the present invention is to provide a Micro-Nano FIN LED element and a method for manufacturing the same, which increases the light-emitting area and reduces the thickness of the photoactive layer exposed on the surface, thereby preventing efficiency degradation caused by surface defects.

[0011] Furthermore, another objective of the present invention is to provide a Micro-Nano FIN LED element and a method for manufacturing the same, which can minimize the decrease in electron-positive aperture recombination efficiency and the resulting decrease in luminous efficiency caused by the imbalance of electron and positive aperture speeds.

[0012] Furthermore, another object of the present invention is to provide a Micro-Nano FIN LED element and a method for manufacturing the same, which is well-suited for a method of self-aligning the element on the electrodes by means of an electric field.

[0013] Technical means

[0014] To address the aforementioned issues, the present invention provides a method for manufacturing a full-color LED display, comprising: step (1) preparing an LED wafer having a first conductive semiconductor layer, a photoactive layer, and a second conductive semiconductor layer sequentially deposited; step (2) forming an electrode layer or a polarization-inducing layer patterned in such a way that regions with different electrical polarities are adjacent on the second conductive semiconductor layer of the LED wafer; step (3) etching the LED wafer along the thickness direction such that each element has a plane with a length and width of nanometers or micrometers and a thickness perpendicular to the plane that is smaller than the length, to form a plurality of Micro-Nano FIN LED pillars; and step (4) separating the plurality of Micro-Nano FIN LED pillars from the LED wafer.

[0015] According to an embodiment of the present invention, in step (2), the polarization induction layer is formed by including the following steps: step 2-1), forming a first polarization induction layer on a second conductive semiconductor layer; step 2-2), etching the first polarization induction layer along the thickness direction according to a predetermined pattern; and step 2-3), forming a second polarization induction layer in the etched recessed portion.

[0016] Furthermore, step (3) includes: step 3-1), forming a mask pattern layer on the upper surface of the electrode layer or polarization induction layer in such a way that each element has a planar shape with a length and width of nanometers or micrometers; step 3-2), etching along the thickness direction to a portion of the thickness of the first conductive semiconductor layer according to the pattern of the mask pattern layer to form a plurality of Micro-Nano FIN LED pillars; step 3-3), forming an insulating film to cover the exposed side surfaces of each Micro-Nano FIN LED pillar; step 3-4), removing a portion of the insulating film formed on the upper surface of the first conductive semiconductor layer in such a way that the upper surface of the first conductive semiconductor layer between adjacent Micro-Nano FIN LED pillars is exposed and the insulating film covering the side surfaces of the Micro-Nano FIN LED pillars is not removed; step 3-5), further etching the exposed upper surface of the first conductive semiconductor layer along the thickness direction to form a plurality of Micro-Nano FIN LED pillars with a portion of the side surfaces of the first conductive semiconductor layer exposed; step 3-6), etching from each Micro-Nano FIN LED pillar... The first conductive semiconductor layer exposed on both sides of the LED pillar in the width direction is etched toward the central side; and in steps 3-7), the mask pattern layer and the insulating film covering the sides disposed on the upper part of the electrode layer or polarization induction layer are removed.

[0017] Furthermore, between steps (3) and (4), there is a step (5) to form a protective coating on the sides of the multiple Micro-Nano FINLED pillars.

[0018] Furthermore, in step (4), the lower surface of the first conductive semiconductor layer of the separated Micro-Nano FIN LED element has a protrusion with a predetermined width and thickness formed along the length direction of the element.

[0019] Moreover, the present invention relates to a Micro-Nano FIN LED element, which is a cylindrical element having a plane with a length and width of nanometers or micrometers and a thickness smaller than the length perpendicular to the plane, wherein a first conductive semiconductor layer, a photoactive layer, a second conductive semiconductor layer and an electrode layer or a polarization induction layer are sequentially deposited along the thickness direction.

[0020] According to one embodiment of the present invention, the polarization induction layer is configured such that the electrical polarities of the two ends of the element in the longitudinal direction are different from each other.

[0021] Moreover, the length is 1000-10000 nm and the thickness is 100-3000 nm.

[0022] Furthermore, the width can be greater than or the same as the thickness.

[0023] Furthermore, the length-to-thickness ratio of the element is 3:1 or higher.

[0024] Furthermore, the polarization induction layer is composed of a first polarization induction layer and a second polarization induction layer arranged adjacent to each other along the length direction of the element and having different electrical polarities. For example, the first polarization induction layer is ITO, and the second polarization induction layer is a metal or a semiconductor.

[0025] Furthermore, it also includes a protective coating formed on the side of the element in a manner that covers the exposed surface of the photoactive layer.

[0026] Moreover, the light-emitting area of ​​the Micro-Nano FIN LED element is more than twice the cross-sectional area of ​​the Micro-Nano FIN LED element.

[0027] Furthermore, the Micro-Nano FIN LED element is used as an electric field alignment assembly that enables the LED element to self-align on the electrodes through electric field-induced alignment.

[0028] Furthermore, either the first conductive semiconductor layer or the second conductive semiconductor layer comprises a p-type GaN semiconductor layer, and the other comprises an n-type GaN semiconductor layer. The thickness of the p-type GaN semiconductor layer is 10–350 nm, the thickness of the n-type GaN semiconductor layer is 100–3000 nm, and the thickness of the photoactive layer is 30–200 nm.

[0029] Furthermore, the lower surface of the first conductive semiconductor layer of the Micro-Nano FIN LED element has a protrusion with a predetermined width and thickness formed along the length direction of the element.

[0030] Furthermore, the width of the protrusion has a length that is less than 50% of the width of the Micro-Nano FIN LED element.

[0031] The terms used in this invention are defined below.

[0032] In the description of the configuration examples based on the present invention, when referring to the formation of each layer, region, pattern or structure on the substrate, each layer, region or pattern as "on", "upper", "under", "lower" or "under", "on" or "under" all include the meanings of "directly" and "indirectly".

[0033] Invention Effects

[0034] The Micro-Nano FIN LED element based on this invention offers advantages over existing cylindrical LED elements, including increased light-emitting area and higher brightness and luminous efficiency. Furthermore, the increased light-emitting area and significantly reduced area of ​​the exposed photoactive layer prevent or minimize performance degradation caused by surface defects. Consequently, the decrease in electron-orifice recombination efficiency due to imbalances in electron and orifice velocities, and the resulting decrease in luminous efficiency, is minimized. This makes it highly suitable for methods that use an electric field to self-align the element on the electrodes, enabling its widespread application as a component in various light sources. Attached Figure Description

[0035] Figures 1 to 3 This is a perspective view, a cross-sectional view based on the X-X' boundary line, and a cross-sectional view based on the Y-Y' boundary line of a Micro-Nano FIN LED element according to an embodiment of the present invention.

[0036] Figures 4 to 6 These are perspective views, cross-sectional views based on the X-X' boundary line, and cross-sectional views based on the Y-Y' boundary line of a Micro-Nano FIN LED element based on other embodiments of the present invention.

[0037] Figure 7a and Figure 7b These are schematic diagrams of a first columnar element having a first conductive semiconductor layer, a photoactive layer, and a second conductive semiconductor layer laminated along the thickness direction, and a second columnar element having a first conductive semiconductor layer, a photoactive layer, and a second conductive semiconductor layer laminated along the length direction.

[0038] Figure 8 and Figure 9 This is a schematic diagram of the manufacturing process of Micro-Nano FIN LED elements based on various embodiments of the present invention. Detailed Implementation

[0039] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, so that those skilled in the art can readily implement them. The present invention can be implemented in many different forms and is not limited to the embodiments described herein.

[0040] Reference Figures 1 to 6 As explained, the Micro-Nano FIN LED elements 100 and 100' based on an embodiment of the present invention are cylindrical elements. With the mutually perpendicular X, Y, and Z axes as references, the X-axis direction is set as the length, the Y-axis direction is set as the width, and the Z-axis direction is set as the thickness. The length is the major axis, and the thickness is the minor axis. The length is greater than the thickness. It is an element in which a first conductive semiconductor layer 10, a photoactive layer 20, a second conductive semiconductor layer 30, and an electrode layer 40 or a polarization induction layer 40' are laminated along the thickness direction.

[0041] More specifically, the Micro-Nano FIN LED elements 100 and 100' have a predetermined shape in an XY plane composed of length and width, with the thickness direction perpendicular to the plane, and the layers of the LED element are stacked along the thickness direction. This structure of the Micro-Nano FIN LED elements 100 and 100' has the advantage that even if the thickness of the photoactive layer 20 exposed on the side is thin, a wider light-emitting area can be ensured by the plane composed of length and width. Furthermore, as a result, the Micro-Nano FIN LED elements 100 and 100' based on an embodiment of the present invention have a light-emitting area that is more than twice the area of ​​the longitudinal section of the Micro-Nano FIN LED element. Here, the longitudinal section refers to a section parallel to the X-axis direction, which is the length direction; in the case of an element with a fixed width, this can be the aforementioned XY plane.

[0042] Specifically, refer to Figure 7a and Figure 7b To explain, Figure 7a The first columnar element 1 shown and Figure 7b The second columnar element 1' shown is a columnar element with the same length ℓ and thickness m, and the same thickness h of the photoactive layer, having a structure in which a first conductive semiconductor layer 2, a photoactive layer 3, and a second conductive semiconductor layer 4 are deposited. However, the first columnar element 1 has the first conductive semiconductor layer 2, the photoactive layer 3, and the second conductive semiconductor layer 4 deposited in the thickness direction, while the second columnar element 1' has each layer deposited in the length direction, resulting in a structural difference.

[0043] These two elements 1 and 1' have significant differences in their light-emitting areas. For example, when the length ℓ is set to 4000 nm, the thickness m to 600 nm, and the thickness h of the photoactive layer 3 to 100 nm, the ratio of the surface area of ​​the photoactive layer 3 of the first pillar element 1 to the surface area of ​​the photoactive layer 3 of the second pillar element 1' is 6.42 μm. 2 0.6597μm 2The first columnar element 1, as a Micro-Nano FIN LED element, has a light-emitting area 9.84 times larger. Furthermore, while the proportion of the surface area of ​​the photoactive layer 3 exposed to the outside in the entire light-emitting area of ​​the photoactive layer is similar for the first columnar element 1 and the second columnar element 1', the absolute value of the unexposed surface area of ​​the photoactive layer 3 is much larger, thus reducing the impact on excitons on the exposed surface area. Therefore, the first columnar element 1, as a Micro-Nano FIN LED element, has a much smaller impact on excitons due to surface defects compared to the second columnar element 1', which is a horizontally arranged columnar element. In terms of luminous efficiency and brightness, the first columnar element 1, as a Micro-Nano FIN LED element, is significantly superior to the second columnar element 1', which is a horizontally arranged columnar element. Furthermore, in the case of the second pillar element 1', it is formed by etching a wafer in which a conductive semiconductor layer and a photoactive layer are deposited along the thickness direction. As a result, the relatively long element length corresponds to the wafer thickness. In order to increase the element length, it is inevitable to increase the etching depth. However, the greater the etching depth, the higher the possibility of defects on the element surface. As a result, although the area of ​​the exposed photoactive layer is smaller in the second pillar element 1' compared to the first pillar element 1, the possibility of surface defects is greater. Considering the decrease in luminous efficiency caused by the increased possibility of surface defects, the first pillar element 1 is significantly superior in terms of luminous efficiency and brightness.

[0044] Furthermore, the first columnar element 1 has a shorter travel distance for electrons injected into either the first conductive semiconductor layer 2 or the second conductive semiconductor layer 4 compared to the other. This reduces the probability of electrons being trapped due to defects in the wall during their movement, minimizing light emission loss and effectively minimizing light emission loss caused by the imbalance between electron and positive aperture velocities. Moreover, in the case of the second columnar element 1', the stronger light path variation caused by the cylindrical structure results in resonance of the light path generated by the electron-positive aperture along the length direction, leading to light emission at both ends of the length. When the element is laid flat, the strong side-emitting profile results in poor front-facing light emission efficiency. However, in the case of the first columnar element 1, since light emission occurs on both the upper and lower surfaces, it has the advantage of achieving excellent front-facing light emission efficiency.

[0045] The Micro-Nano FIN LED elements 100 and 100' of the present invention, similar to the first columnar element 1 described above, have conductive semiconductor layers 10 and 30 and a photoactive layer 20 laminated along the thickness direction, configured such that the length is greater than the thickness, resulting in a further increased light-emitting area. Furthermore, even if the area of ​​the exposed photoactive layer 20 increases somewhat, since it is also a columnar shape with a thickness smaller than its length, the etching depth is shallower, reducing the possibility of defects occurring on the exposed surface of the photoactive layer 20, and helping to prevent or minimize the reduction in luminous efficiency caused by such defects.

[0046] The above plane in Figure 1 The shape is shown as a right-angled quadrilateral, but it is not limited to this. It can be any shape, from ordinary quadrilaterals such as equilateral quadrilaterals, parallelograms, and trapezoids to ellipses, etc., without restriction.

[0047] Furthermore, the length and width of the Micro-Nano FIN LED elements 100 and 100' based on an embodiment of the present invention have a size in micrometers or nanometers. For example, the length of the Micro-Nano FIN LED elements 100 and 100' can be 1000–10000 nm, and the width can be 250–1500 nm. The thickness can be 100–3000 nm. The aforementioned length and width vary depending on the shape of the plane. For example, in the case of an equilateral quadrilateral or parallelogram, one of the two diagonals can be the length and the other the width. In the case of a trapezoid, the longer of the height, top side, and bottom side is the length, and the shorter side perpendicular to the longer side is the width. Alternatively, in the case of an ellipse, the major axis of the ellipse is the length, and the minor axis is the width.

[0048] At this point, the length-to-thickness ratio of the Micro-Nano FIN LED elements 100 and 100' is 3:1 or more, more preferably 6:1 or more, which provides the advantage of making it easier to self-align the electrodes using an electric field. If the length is so small that the length-to-thickness ratio of the Micro-Nano FIN LED elements 100 and 100' is less than 3:1, it is difficult to self-align the elements on the electrodes using an electric field, and the elements may not be fixed on the electrodes, potentially causing electrical contact short circuits due to process defects. However, the length-to-thickness ratio can be 15:1 or less, which is beneficial for achieving the objectives of the present invention, such as optimizing the torque for self-alignment using an electric field.

[0049] Furthermore, the width of the aforementioned Micro-Nano FIN LED elements 100 and 100' can be greater than or equal to their thickness. Therefore, when the Micro-Nano FIN LED elements 100 and 100' are arranged on two different electrodes using an electric field, it is possible to prevent them from lying sideways or to minimize their size. If the Micro-Nano FIN LED elements are arranged sideways, even if one end and the other end are respectively in contact with two different electrodes, a short circuit caused by the exposed photoactive layer on the side of the element contacting the electrode may result in no light emission, potentially causing the original function to fail.

[0050] Furthermore, the aforementioned Micro-Nano FIN LED elements 100 and 100' can be elements with different sizes at both ends in the length direction. For example, they can be cylindrical elements with four corner planes of an equilateral trapezoid whose height is larger than the top and bottom sides. As a result of the length difference between the top and bottom sides, the positrons and anions that may accumulate at both ends in the length direction of the element may differ, thereby having the advantage of being easier to self-align by an electric field.

[0051] Furthermore, on the lower surface of the first conductive semiconductor layer 10 of the aforementioned Micro-Nano FIN LED elements 100, 100', a protrusion 11 with a predetermined width and thickness can be formed along the length direction of the element. The protrusion 11 will be explained in more detail later in the description of the manufacturing method. After etching the wafer along the thickness direction, in order to remove the etched LED components from the wafer, etching is performed horizontally from both sides of the lower end of the etched LED portion toward the inner side, which is the central portion. As a result, the protrusion 11 can be generated. The protrusion 11 helps to improve the front-side light emission extraction function of the Micro-Nano FIN LED elements 100, 100'. Moreover, when the Micro-Nano FIN LED elements 100, 100' self-align on the electrodes, the protrusion 11 helps to control the alignment so that the opposite side of the element with the protrusion 11 is located on the electrode. Furthermore, after the opposite side is located on the electrode, in order to make the element emit light, an electrode can be formed on one side of the element with the protrusion 11. The protrusion 11 increases the contact area with the formed electrode, thereby improving the mechanical bonding force between the electrode and the Micro-Nano FIN LED elements 100, 100'.

[0052] At this time, the width of the protruding portion 11 is 50% or less, more preferably 30% or less, of the width of the Micro-Nano FIN LED elements 100 and 100'. Thus, the separation of the Micro-Nano FIN LED element portion etched on the LED wafer becomes easier. If the protruding portion is formed to exceed 50% of the width of the Micro-Nano FIN LED elements 100 and 100', it may be difficult to remove the etched Micro-Nano FIN LED element portion from the LED wafer. Moreover, breakage and separation may occur in other portions that are not the desired portions, resulting in a decrease in mass productivity and / or quality, and may also cause a decrease in the length and quality uniformity of the plurality of generated Micro-Nano FIN LED elements. On the other hand, the width of the protruding portion 11 can be formed to be 10% or more of the width of the Micro-Nano FIN LED elements 100 and 100'. If the width of the protruding portion is less than 10% of the width of the Micro-Nano FIN LED elements 100 and 100', although it is easy to separate from the LED wafer, during the side etching described later (see Figure 8 of (g) / Figure 8 of (i), Figure 9 of (h) / Figure 9 of (i)), over-etching occurs and a part of the first conductive semiconductor layer 10 that should not be etched is also etched, and the effect of the above-mentioned protruding portion 11 may not be exerted. Moreover, separation may be caused by the wet etching solution, so the following problem may occur: it is necessary to separate the Micro-Nano FIN LED element 100 dispersed in the highly dangerous etching solution having a strong alkaline property from the wet etching solution and then perform cleaning. On the other hand, the thickness of the above-mentioned protruding portion 11 has a thickness of about 10 to 30% of the thickness of the first conductive semiconductor layer, whereby the first conductive semiconductor layer can be formed into a desired thickness and quality, which is more conducive to realizing the effect based on the above-mentioned protruding portion 11. Here, the thickness of the above-mentioned first conductive semiconductor layer 10 refers to the thickness based on the lower surface of the first conductive semiconductor layer where no protruding portion is formed.

[0053] As a specific example, the width of the protruding portion 11 is 50 to 300 nm, and the thickness is 50 to 400 nm.

[0054] Hereinafter, each layer included in the Micro-Nano FIN LED elements 100 and 100' will be described.

[0055] Micro-Nano FIN LED elements 100 and 100' include a first conductive semiconductor layer 10 and a second conductive semiconductor layer 30. The conductive semiconductor layer used can be the same as that commonly used in LED elements used in lighting and displays, without particular limitation. According to a preferred embodiment of the present invention, either the first conductive semiconductor layer 10 or the second conductive semiconductor layer 30 includes at least one n-type semiconductor layer, and the other conductive semiconductor layer includes at least one p-type semiconductor layer.

[0056] In the case where the first conductive semiconductor layer 10 includes an n-type semiconductor layer, the n-type semiconductor layer can be derived from having an In... x Al y Ga 1-x-y One or more of the following semiconductor materials are selected from combinations of N (0≤x≤1, 0≤y≤1, 0≤x+y≤1): InAlGaN, GaN, AlGaN, InGaN, AlN, InN, etc., and can be doped with a first conductive dopant (e.g., Si, Ge, Sn, etc.). According to a preferred embodiment of the present invention, the thickness of the first conductive semiconductor layer 10 can be 1 to 3 μm, but is not limited thereto.

[0057] When the second conductive semiconductor layer 30 includes a p-type semiconductor layer, the p-type semiconductor layer can be derived from the In... x Al y Ga 1-x-y One or more of the following semiconductor materials, selected from combinations of N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), such as InAlGaN, GaN, AlGaN, InGaN, AlN, InN, etc., may be doped with a second conductive dopant (e.g., Mg). According to a preferred embodiment of the present invention, the thickness of the second conductive semiconductor layer 30 may be 0.01 to 0.30 μm, but is not limited thereto.

[0058] According to an embodiment of the present invention, either the first conductive semiconductor layer 10 or the second conductive semiconductor layer 30 includes a p-type GaN semiconductor layer, and the other includes an n-type GaN semiconductor layer. The thickness of the p-type GaN semiconductor layer is 10–350 nm, and the thickness of the n-type GaN semiconductor layer is 1000–3000 nm. Therefore, the distance the electrons travel between the positive aperture injected into the p-type GaN semiconductor layer and the electrons injected into the n-type GaN semiconductor layer is as follows: Figure 4 As shown, it is shorter in length than a columnar element with a semiconductor layer and a photoactive layer, which reduces the probability of electrons and / or positive apertures being trapped due to defects in the wall during movement, thus minimizing light emission loss and helping to minimize light emission loss caused by the imbalance between electron and positive aperture velocities.

[0059] Next, the photoactive layer 20 is formed on top of the first conductive semiconductor layer 10, and can be formed in a single or multiple quantum well structure. The photoactive layer 20 can be a photoactive layer commonly found in LED elements used in lighting, displays, etc., and is not particularly limited. A cladding layer (not shown) doped with conductive dopants can be formed above and / or below the photoactive layer 20. This cladding layer can be composed of an AlGaN layer or an InAlGaN layer. Alternatively, materials such as AlGaN and AlInGaN can be used in the photoactive layer 20. When an electric field is applied to the element, electrons and positive holes moving from the conductive semiconductor layers located above and below the photoactive layer to the photoactive layer recombine in the photoactive layer, thereby emitting light. According to a preferred embodiment of the present invention, the thickness of the photoactive layer 20 is 30 to 300 nm, but is not limited thereto.

[0060] Next, on the second conductive semiconductor layer 30 described above, as Figures 1 to 3 As shown, an electrode layer 40 can be formed, or, as... Figures 4 to 6 As shown, a polarization-induced layer 40' can be formed.

[0061] First, let's describe the formation of the electrode layer 40. The electrode layer 40 can be any electrode layer commonly found in LED components used in lighting and displays, without particular limitation. The electrode layer 40 can be made of materials such as Cr, Ti, Al, Au, Ni, ITO, and their oxides or alloys, either alone or in mixtures. Preferably, it is made of a transparent material that minimizes light emission loss; for example, ITO could be used. Furthermore, the thickness of the electrode layer 40 can be 50–500 nm, but is not limited to this.

[0062] Next, the formation of the polarization induction layer 40' will be described. The polarization induction layer 40' has different electrical polarities at both ends along the length of the Micro-Nano FINLED element 100', making it easier for the layer to self-align based on the electric field. Furthermore, when using materials such as metals, conductivity can be improved, and it can also function as an electrode layer. The polarization induction layer 40' has a first polarization induction layer 41 disposed at one end along the length of the element, and a second polarization induction layer 42 disposed at the other end. The electrical polarities of the first polarization induction layer 41 and the second polarization induction layer 42 can be different. For example, the first polarization induction layer 41 can be ITO, and the second polarization induction layer 42 can be a metal or a semiconductor. Moreover, the thickness of the polarization induction layer 40' can be 50–500 nm, but is not limited to this. The first polarization induction layer 41 and the second polarization induction layer 42 can be formed by dividing the upper surface of the second conductive semiconductor layer 30 into two equal parts and arranging them with the same area, but is not limited to this. Alternatively, the area of ​​either the first polarization-induced layer 41 or the second polarization-induced layer 42 can be larger.

[0063] The first conductive semiconductor layer 10, photoactive layer 20, second conductive semiconductor layer 30, and electrode layer 40 or polarization induction layer 40' mentioned above are included as necessary structural elements of Micro-Nano FIN LED elements 100, 100'. Other phosphor layers, active layers, semiconductor layers, positive hole module layers and / or electrode layers may also be included above / below each layer.

[0064] On the other hand, according to one embodiment of the present invention, a protective coating 50 is further formed on the side surface of the Micro-Nano FIN LED elements 100 and 100' in such a way as to cover the exposed surface of the photoactive layer 20. The protective coating 50 is a film used to protect the exposed surface of the photoactive layer 20, and at least completely covers the exposed surface of the photoactive layer 20. For example, both sides, the front end, and the rear end of the Micro-Nano FIN LED elements 100 and 100' can be completely covered. The protective coating 50 preferably comprises one or more of silicon nitride (Si3N4), silicon oxide (SiO2), aluminum oxide (Al2O3), hafnium oxide (HfO2), zirconium oxide (ZrO2), yttrium oxide (Y2O3), titanium dioxide (TiO2), aluminum nitride (AlN), and calcium nitride (GaN), more preferably composed of the above components and transparent, but is not limited thereto. According to a preferred embodiment of the present invention, the thickness of the protective coating is 5 nm to 100 nm, but is not limited thereto.

[0065] Based on the above, the Micro-Nano FIN LED elements 100 and 100' of one embodiment of the present invention can be applied to electric field alignment components where LED elements are self-aligned on electrodes by electric field-induced alignment. The above-described electric field alignment components are constructed by a method of arranging elements on electrodes using an electric field formed by a voltage on the electrodes. For a detailed description of this, Korean Patent Publications Nos. 10-1490758 and 10-1436123, made by the inventors of this application, can be referenced as part of this invention.

[0066] The aforementioned Micro-Nano FIN LED elements 100 and 100' are manufactured using the manufacturing methods described later, but are not limited thereto.

[0067] Reference Figure 8 and Figure 9 To illustrate, the Micro-Nano FIN LED elements 100 and 100' are manufactured by the following steps: Step (1), preparing an LED wafer 51 on which a first conductive semiconductor layer 10, a photoactive layer 20, and a second conductive semiconductor layer 30 are sequentially deposited; Step (2), forming an electrode layer 40 or a polarization induction layer 40' patterned in such a way that regions with different electrical polarities are adjacent on the second conductive semiconductor layer 30 of the LED wafer 51; Step (3), each element having a plane with a length and width of nanometers or micrometers, etching the LED wafer 51 along the thickness direction in such a way that the thickness perpendicular to the plane is smaller than the length, to form a plurality of Micro-Nano FIN LED pillars 52; and Step (4), separating the plurality of Micro-Nano FIN LED pillars 52 from the LED wafer 51.

[0068] Reference Figure 8 The following describes a method for manufacturing a Micro-Nano FINLED element 100 on which an electrode layer 40 is formed on a second conductive semiconductor layer 30. As step (1) of the present invention, the step of preparing an LED wafer 51 on which a first conductive semiconductor layer 10, a photoactive layer 20 and a second conductive semiconductor layer 30 are sequentially deposited on a substrate (not shown) is performed.

[0069] The description of each layer of the LED chip 51 is the same as above, so the description is omitted here, and the description will focus on the parts that are not described.

[0070] First, the thickness of the first conductive semiconductor 10 within the LED chip 51 can be greater than the thickness of the first conductive semiconductor layer 10 in the Micro-NanoFIN LED element 100. Furthermore, each layer within the LED chip 51 can possess a c-plane crystal structure.

[0071] The LED chip 51 described above can undergo a cleaning process. This cleaning process can appropriately employ conventional chip cleaning solutions and procedures, without particular limitation in this invention. Examples of cleaning solutions include isopropanol, acetone, and hydrochloric acid, but these are not limited to these.

[0072] Next, as step (2) of the present invention, as follows Figure 8 As shown in (b), the step of forming an electrode layer 40 on the second conductive semiconductor layer 30 of the LED wafer 51 can be performed. The electrode layer 40 can be formed using conventional methods for forming electrodes on semiconductor layers; for example, it can be formed by sputter-based vapor deposition. The material of the electrode layer 40, as described above, can be ITO, for example, and it can be formed to a thickness of approximately 150 nm. After the vapor deposition process, the electrode layer 40 can be further subjected to a rapid thermal annealing process; for example, it can be treated at 600°C for 10 minutes. The thickness and material of the electrode layer can be appropriately adjusted, so no particular limitation is made in this invention.

[0073] Next, as step (3) of the present invention, the following steps are performed: each element has a plane with a length and width of nanometer or micrometer, and the LED chip 51 is etched along the thickness direction in such a way that the thickness perpendicular to the plane is smaller than the length, to form a plurality of Micro-Nano FIN LED pillars 52.

[0074] The above step (3) specifically includes the following steps to be performed: Step 3-1), forming a mask pattern layer 61 on the upper surface of the electrode layer 40 in such a way that each element is a plane with a predetermined pattern having a length and width of nanometers or micrometers. Figure 8 (c)); Step 3-2), according to the pattern of the mask pattern layer 61, a portion of the thickness of the first conductive semiconductor layer 10 is etched along the thickness direction to form multiple Micro-Nano FIN LED pillars 52 ( Figure 8 (d)); Step 3-3), to form an insulating film 62 in such a way as to cover the exposed sides of each Micro-Nano FIN LED pillar 52. Figure 8 (e)); Steps 3-4), so that the upper surface of the first conductive semiconductor layer 10 between adjacent Micro-Nano FIN LED pillars 52 ( Figure 8 In a manner in which the insulating coating on the side of the Micro-Nano FIN LED pillar 52 exposed and covered by (f) portion A) is not removed, a portion of the insulating coating 62 formed on the upper part of the first conductive semiconductor layer 10 is removed. Figure 8(f)); Steps 3-5), through the upper part of the exposed first conductive semiconductor layer ( Figure 8 (f) of portion A), the first conductive semiconductor layer 10 is further etched along the thickness direction to form a portion of the side surface of the first conductive semiconductor layer 10. Figure 8 Multiple Micro-Nano FIN LED pillars exposed in part B of (g) Figure 8 (g)); Steps 3-6), for the first conductive semiconductor layer 10 exposed in each Micro-Nano FINLED pillar, the first conductive semiconductor layer 10 is etched from both sides in the width direction toward the side serving as the central side. Figure 8 (i)); and steps 3-7), the mask pattern layer 61 disposed on the upper part of the electrode layer 40 and the insulating film 62 covering the side are removed ( Figure 8 (j)).

[0075] First, as in step 3-1, the following steps can be performed: a mask pattern layer 61 is formed on the upper surface of the electrode layer 40 in such a way that each element is a plane with a predetermined pattern having a length and width of nanometers or micrometers. Figure 8 (c)).

[0076] The aforementioned mask pattern layer 61 is a layer patterned in a manner that forms the desired planar shape of the LED element to be constructed, and can be formed using known methods and materials used in LED wafer etching. As an example of the aforementioned mask pattern layer 61, it can be a SiO2 hard mask pattern layer. The method for forming a SiO2 hard mask pattern layer can be briefly described by including the following steps: forming an unpatterned SiO2 hard mask layer on the electrode layer 40; forming a metal layer on the SiO2 hard mask layer; forming a predetermined pattern on the metal layer; etching the metal layer and the SiO2 hard mask layer along the thickness direction according to the pattern; and removing the metal layer.

[0077] The aforementioned mask layer is the layer from which the mask pattern layer 61 is derived. For example, it can be formed by vapor deposition of SiO2. The thickness of the aforementioned mask layer can be formed to be 0.5–3 μm, and for example, it can be 1.2 μm. Furthermore, for example, the aforementioned metal layer can be an aluminum layer, which can be formed by vapor deposition. The predetermined pattern formed on the formed metal layer is used to form the mask pattern layer and is formed using conventional methods. For example, the pattern is formed by photolithography using a photosensitive material or by known methods such as nanoimprint lithography, laser interference lithography, or electron beam lithography. Then, the step of etching the metal layer and the SiO2 hard mask layer according to the formed pattern is performed. For example, the aforementioned metal layer can be formed by ICP (inductively coupled plasma), and the SiO2 hard mask layer or the imprinted polymer layer can be etched by a dry etching method such as RIE (reactive ion etching).

[0078] Next, a step can be performed to remove the metal layer, other photosensitive material layer, or polymer layer left by the imprinting process that is present on top of the etched SiO2 hard mask layer. This removal can be performed using conventional wet or dry etching methods, depending on the material; specific details of this are omitted in this invention.

[0079] Figure 8 (c) is a top view of the SiO2 hard mask layer 61 patterned on the electrode layer 40, which is then used as a step 3-2), as follows. Figure 8 As shown in (d), the following steps are performed: A portion of the thickness of the first conductive semiconductor layer 10 is etched along the thickness direction of the LED wafer 51 according to the above pattern to form a plurality of Micro-Nano FIN LED pillars 52. The etching can be performed using a conventional dry etching method such as ICP.

[0080] Then, as in step 3-3), such as Figure 8 As shown in (e), the following steps are performed: an insulating film 62 is formed to cover the exposed sides of each Micro-NanoFIN LED pillar 52. The insulating film 62 covering the sides can be formed by vapor deposition, and its material can be, for example, SiO2, but is not limited to this. The aforementioned insulating film 62 can function as a side mask, specifically, as... Figure 8 As shown in (i), the side portion of the first conductive semiconductor layer 10 is etched from the side direction in order to separate the Micro-Nano FIN LED pillar 52. Figure 8In the process of part B of (g), the portion of the first semiconductor layer 10 to become the Micro-NanoFIN LED element 100 is not etched, thereby performing the function of preventing damage caused by the etching process. The thickness of the insulating coating 62 can be 100 to 600 nm, but is not limited thereto.

[0081] Next, as in steps 3-4), such as Figure 8 As shown in (f), the following steps are performed: to make the upper surface of the first conductive semiconductor layer 10 between adjacent Micro-NanoFIN LED pillars 52 ( Figure 8 In (f) of A), the insulating coating 62 exposed and covering the side of the Micro-Nano FIN LED pillar 52 is not removed, but a portion of the insulating coating 62 formed on the upper part of the first conductive semiconductor layer 10 is removed. The removal of the insulating coating 62 can be performed by a suitable etching method, taking into account the material. For example, the insulating coating 62 of SiO2 can be removed by dry etching such as RIE.

[0082] Next, as in steps 3-5), such as Figure 8 As shown in (g), the following steps are performed: the upper part of the exposed first conductive semiconductor layer 10 is exposed along the thickness direction. Figure 8 (f) A) is further etched to form a plurality of Micro-Nano FIN LED pillars with a portion of the side surface of the first conductive semiconductor layer 10 exposed. As described above, the exposed side surface portion (B) of the first conductive semiconductor layer 10 is a portion formed by side etching in a direction parallel to the substrate in the steps described later. As an example, the process of further etching the first conductive semiconductor layer 10 along the thickness direction can be carried out by a dry etching method such as ICP.

[0083] Then, as in steps 3-6), such as Figure 8 As shown in (i), the following steps are performed: For the portion of the first conductive semiconductor layer exposed on the side ( Figure 8 (g) of B) Side etching is performed along a direction parallel to the substrate. The side etching described above can be performed by wet etching, for example, by using a tetramethylammonium hydroxide (TMAH) solution at a temperature of 60 to 100°C.

[0084] Afterwards, following wet etching along the lateral direction (as in steps 3-7), as... Figure 8As shown in (j), the following steps are performed: the mask pattern layer 61 disposed on the upper part of the electrode layer 40 and the insulating coating 62 covering the side are removed. The mask pattern layer 61 and the insulating coating 62 disposed on the upper part can both be made of SiO2 and can be removed by wet etching. As an example, the above wet etching can be performed using BOE (Buffer Oxide Etching).

[0085] According to an embodiment of the present invention, between steps (3) and (4) above, as step (5), a step of forming a protective coating 50 on the sides of a plurality of Micro-Nano FIN LED pillars can be performed. The protective coating 50 can be as follows: Figure 8 As shown in (k), as an example, it is formed by vapor deposition with a thickness of 10-100 nm, and as another example, it can be formed to a thickness of 40 nm. For the material, as an example, alumina can be used. When using alumina, as an example of the above-mentioned vapor deposition, the ALD (Atomic Layer Deposition) process can be used. Furthermore, in order to form the vapor-deposited protective coating 50 only on the sides of the multiple Micro-Nano FIN LED pillars, the protective coating 50 on the remaining portions, excluding the sides, can be removed by etching, as an example, by ICP dry etching. On the other hand, Figure 8 As shown in (l), the protective coating 50 covers the entire side, but on the side, all or part of the remaining portion other than the photoactive layer may not have the protective coating 50 formed.

[0086] Next, as in step (4) of the present invention, as Figure 8 As shown in (m), the step of separating the plurality of Micro-Nano FIN LED pillars 52 from the LED wafer can be performed. The separation can be performed by cutting with a cutter or by removing the adhesive film, and is not particularly limited in this invention.

[0087] Moreover, refer to Figure 9 This describes a method for manufacturing a Micro-Nano FIN LED element 100' having a polarization induction layer 40' formed on a second conductive semiconductor layer 30.

[0088] The manufacturing method of the Micro-Nano FIN LED element 100' with polarization induction layer 40' is different from the manufacturing method of the Micro-Nano FIN LED element 100 with electrode layer 40, except for step (2) of forming polarization induction layer 40' instead of electrode layer 40. All other steps are the same.

[0089] Reference Figure 9 Explain step (2), such as Figure 9 (b) and Figure 9 (c1) and Figure 9 As shown in (c2), the step of forming a polarization induction layer 40' on the second conductive semiconductor layer 30 of the LED wafer 51 is performed. Specifically, the polarization induction layer 40' is patterned on the second conductive semiconductor layer 30 of the LED wafer 51 in such a way that regions with different electrical polarities are adjacent to each other. More specifically, step (2) includes the following steps: step 2-1), forming a first polarization induction layer 41 on the second conductive semiconductor layer 30 (… Figure 9 (b)); Step 2-2), etch the first polarization induction layer 41 (not shown) along the thickness direction according to the predetermined pattern; and Step 2-3), form the second polarization induction layer 42 in the etched recessed portion ( Figure 9 (c1) and Figure 9 (c2)). The following is about (c2). Figure 8 The different steps (2) of the manufacturing method shown are explained below. Figure 9 The remaining explanations can be referenced for... Figure 8 Explanation.

[0090] The above step (2) is the step of forming a polarization induction layer 40' on the second conductive semiconductor layer 30. More specifically, it can be manufactured by the following refined steps.

[0091] First, as step 2-1, the step of forming a first polarization induction layer 41 on the second conductive semiconductor layer 30 can be performed. Figure 9 (b) The first polarization induction layer 41 described above is a conventional electrode layer formed on a semiconductor layer. For example, Cr, Ti, Ni, Au, ITO, etc. can be used. From the perspective of transparency, ITO is preferred. The first polarization induction layer 41 can be formed by conventional methods of forming electrodes. For example, it can be formed by sputtering-based vapor deposition. For example, when ITO is used, it is vapor deposited with a thickness of about 150 nm. After the vapor deposition process, it is further subjected to a rapid thermal annealing process, which can be performed at 600°C for 10 minutes. The thickness, material, etc. of the first polarization induction layer 41 can be appropriately adjusted, and no particular limitation is made in this invention.

[0092] Next, as step 2-2), the first polarization induction layer 41 can be etched along the thickness direction according to a predetermined pattern. This step prepares the area to be formed for the second polarization induction layer 42 (described later), and the pattern can be determined by considering the area ratio and arrangement of the first polarization induction layer 41 and the second polarization induction layer 42 within the device. As an example, the pattern can be as follows: Figure 9As shown in (d), the first polarization-inducing layer 41 and the second polarization-inducing layer 42 are formed in a side-by-side alternating configuration. The above pattern can be formed using conventional photolithography or nanoimprint lithography, etc., but detailed descriptions of this are omitted in this invention.

[0093] The etching described above can be performed using a suitable, known etching method, taking into account the material of the first polarization induction layer 41. For example, if the first polarization induction layer 41 is ITO, wet etching can be used. In this case, the etching thickness can extend to the upper surface of the second conductive semiconductor layer 30; that is, the entire ITO can be etched along the thickness direction, but this is not a limitation. Specifically, only a portion of the ITO can be etched along the thickness direction, forming the second polarization induction layer 42 in the etched recessed portion. In this case, a two-layer structure is formed on the upper layer at one end of the element, consisting of a first polarization induction layer 41 and a second polarization induction layer 42 deposited with ITO.

[0094] Next, as in steps 2-3, a step of forming a second polarization induction layer 42 in the etched recessed portion can be performed. Figure 9 (c1) and Figure 9 (c2)). The second polarization inducing layer 42 can be made of a material with a different electrical polarity than the selected first polarization inducing layer 41. It can be made of materials commonly used in LEDs and is not particularly limited. For example, it can be a metal or a semiconductor, specifically nickel or chromium. The formation method can be vapor deposition or the like. Well-known methods can be used depending on the material and are not particularly limited in this invention.

[0095] The above describes one embodiment of the present invention, but the concept of the present invention is not limited to the embodiment disclosed in the specification. Those skilled in the art can easily make other embodiments within the scope of the same concept by adding, changing, deleting, or supplementing structural elements, and these are also included within the scope of the present invention.

Claims

1. A manufacturing method of a Micro-Nano FIN LED element, characterized by, Comprising: Step (1), preparing an LED wafer in which a first conductive semiconductor layer, a photoactive layer, and a second conductive semiconductor layer are sequentially stacked; Step (2), forming an electrode layer or a polarization-inducing layer patterned in a manner in which regions different in electrical polarity are adjacent on the second conductive semiconductor layer of the LED wafer; Step (3), etching the LED wafer in the thickness direction in a manner in which each element has a planar shape in which the length and the width are nanometer or micrometer size and the thickness perpendicular to the planar shape is smaller than the length, to form a plurality of Micro-Nano FIN LED pillars; and Step (4), separating the plurality of Micro-Nano FIN LED pillars from the LED wafer.

2. The Micro-Nano FIN LED element manufacturing method according to claim 1, wherein in the step (2), the polarization-inducing layer is formed by including: Step 2-1), forming a first polarization-inducing layer on the second conductive semiconductor layer; Step 2-2), etching the first polarization-inducing layer in the thickness direction in accordance with a predetermined pattern; and Step 2-3), forming a second polarization-inducing layer on the etched recessed portion.

3. The Micro-Nano FIN LED element manufacturing method according to claim 1, wherein the step (3) includes: Step 3-1), forming a mask pattern layer on the upper face of the electrode layer or the polarization-inducing layer in a manner in which each element has a planar shape in which the length and the width are nanometer or micrometer size; Step 3-2), etching to a portion of the thickness of the first conductive semiconductor layer in the thickness direction in accordance with the pattern of the mask pattern layer, to form a plurality of Micro-Nano FIN LED pillars; Step 3-3), forming an insulating coating film in a manner in which the exposed side face of each Micro-Nano FIN LED pillar is covered; Step 3-4), removing a portion of the insulating coating film formed on the upper portion of the first conductive semiconductor layer in a manner in which the upper face of the first conductive semiconductor layer between adjacent Micro-Nano FIN LED pillars is exposed and the insulating coating film covering the side face of the Micro-Nano FIN LED pillar is not removed; Step 3-5), further etching the exposed upper portion of the first conductive semiconductor layer in the thickness direction, to form a plurality of Micro-Nano FIN LED pillars in which a portion of the side face of the first conductive semiconductor layer is exposed; Step 3-6), etching the first conductive semiconductor layer from both side faces in the width direction of the exposed first conductive semiconductor layer of each Micro-Nano FIN LED pillar toward the central side; and Step 3-7), removing the mask pattern layer disposed on the upper portion of the electrode layer or the polarization-inducing layer and the insulating coating film covering the side face.

4. The Micro-Nano FIN LED element manufacturing method according to claim 1, wherein ​ Between the step (3) and step (4), a step (5) of forming a protective film on the side of the plurality of Micro-Nano FIN LED pillars is further included.

5. The Micro-Nano FIN LED element manufacturing method according to claim 1, wherein In the step (4), the lower surface of the first conductive semiconductor layer of the separated Micro-Nano FIN LED element is formed with a protrusion having a predetermined width and thickness along the length direction of the element.

6. A Micro-Nano FIN LED element, which is a pillar-shaped element having a planar surface with a length and a width of nanometer or micrometer size and a thickness perpendicular to the planar surface smaller than the length, and sequentially stacked along the thickness direction with a first conductive semiconductor layer, a photoactive layer, a second conductive semiconductor layer, and an electrode layer or a polarization-inducing layer, either of the first conductive semiconductor layer and the second conductive semiconductor layer includes a p-type GaN semiconductor layer, and the other includes an n-type GaN semiconductor layer, the thickness of the p-type GaN semiconductor layer is 10-350 nm, the thickness of the n-type GaN semiconductor layer is 100-3000 nm, and the thickness of the photoactive layer is 30-200 nm.

7. The Micro-Nano FIN LED element according to claim 6, wherein the polarization-inducing layer is configured such that the electrical polarity of the two ends in the length direction of the element are different from each other.

8. The Micro-Nano FIN LED element according to claim 6, wherein the length is 1000-10000 nm, and the thickness is 100-3000 nm.

9. The Micro-Nano FIN LED element according to claim 6, wherein the ratio of the length to the thickness of the element is 3:1 or more.

10. The Micro-Nano FIN LED element according to claim 6, wherein the polarization-inducing layer is configured with a first polarization-inducing layer and a second polarization-inducing layer adjacently arranged along the length direction of the element and having different electrical polarities from each other.

11. The Micro-Nano FIN LED element according to claim 10, wherein the first polarization-inducing layer is ITO, and the second polarization-inducing layer is a metal or a semiconductor.

12. The Micro-Nano FIN LED element according to claim 6, wherein the light-emitting area of the Micro-Nano FIN LED element is more than 2 times the longitudinal cross-sectional area of the Micro-Nano FIN LED element.

13. The Micro-Nano FIN LED element according to claim 6, wherein the Micro-Nano FIN LED element is an electric-field alignment component application in which the LED element is self-aligned on the electrode by electric-field-induced alignment. 14.The Micro-Nano FIN LED element according to claim 6, wherein a lower surface of the first conductive semiconductor layer of the Micro-Nano FIN LED element is formed with a protrusion having a predetermined width and thickness along a length direction of the element. 15.The Micro-Nano FIN LED element according to claim 14, wherein the width of the protrusion has a length of 50% or less with respect to the width of the Micro-Nano FIN LED element. ​ ​

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