Wide range voltage adaptive frequency detection circuit and method with isolation

Abstract

The technical scheme of the present application is to provide a wide-range voltage adaptive frequency detection circuit with isolation, characterized in that it comprises at least three isolated amplification units with different amplification gains, a chip selection signal processing unit, a channel chip selection unit, a central processing unit, a voltage detection unit and a frequency detection unit. Another technical scheme of the present application is to provide a wide-range voltage adaptive frequency detection method. The present application can well meet the requirements of IEEE 1547.1-2018 regulations for good control and detection of high and low voltages, realize the detection of arbitrary voltage and frequency, and no longer be limited by voltage. Moreover, in the technical scheme of the present application, the detection output signal end and the high-voltage detection point are insulated and isolated, accurate detection of high and low voltage frequencies is realized, and insulation between the detection end and the high-voltage end being detected is realized, that is, the requirements of the new regulations are met, and the stable operation of the grid-connected inverter is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to a frequency sampling circuit for sampling the output end and grid end of a photovoltaic inverter, belonging to the technical field of photovoltaic systems and photovoltaic inverters. BACKGROUND

[0002] Since photovoltaic power generation uses solar energy to generate electricity without pollution, it is favored by countries, and more and more photovoltaic power stations and energy storage power stations are being built. With the increasing power generation of photovoltaic power stations, the input voltage and output voltage are also increasing, and the commonly used input voltage has reached 1500VDC input, and the commonly used output voltage has reached 600Vac output, and the output frequency is usually 50HZ or 60HZ. Since the photovoltaic power station needs to be connected to the national grid, it is necessary to sample the voltage and frequency of the output end and grid end of the photovoltaic inverter to realize the same frequency and amplitude phase-locked grid connection. As the output voltage continues to increase, especially the IEEE 1547.1-2018 regulation 5.4.3 section under-voltage trip requires the voltage setting range to reach 0%-100%, which requires the output voltage and frequency sampling circuit to sample the range of 0%-100%. It becomes very difficult for a frequency sampling circuit to accurately sample the frequency within the range of -891V(-Va) to +891V(+Va), especially when the output voltage drops to 30% of the rated voltage (600*0.3*1.414=254.52V(+Vb)) or less. The current sampling circuit cannot sample the frequency signal, especially when the output voltage drops to 5% of the rated voltage (600*0.05*1.414=42.42V(+Vc)), and there is no way to meet the requirements of the regulation. The commonly used frequency sampling circuit can only accurately sample the frequency between -254.52V(-Vb) and -Va, +Vb and +Va. The output voltage frequency sampling between -Vb and 0V and +Vb and 0V cannot be achieved, and it is not isolated from high voltage. SUMMARY

[0003] The technical problem to be solved by the present application is that the current frequency sampling circuit is very difficult to accurately sample the frequency within the range of -891V(-Va) to +891V(+Va), and there is no way to meet the requirements of the regulation.

[0004] To solve the above technical problems, one technical solution of the present application provides a wide-range voltage adaptive frequency detection circuit with isolation, characterized by comprising at least three isolation amplification units with different amplification gains, a chip selection signal processing unit, a channel chip selection unit, a central processing unit, a voltage detection unit, and a frequency detection unit, wherein:

[0005] The detected voltage frequency signal is synchronously input to all the isolation amplification units, and the outputs of the isolation amplification units are connected to the voltage detection unit and the frequency detection unit via the channel chip selection unit;

[0006] The central processing unit samples the voltage of the detected voltage frequency signal through the voltage detection unit and samples the frequency of the detected voltage frequency signal through the frequency detection unit; the central processing unit sends an instruction to the chip selection signal processing unit according to the sampled voltage, so that the chip selection signal processing unit generates a corresponding chip selection signal;

[0007] According to the size of the voltage value of the detected voltage frequency signal, the channel chip selection unit selects the isolation amplification unit with a corresponding amplification gain according to the received chip selection signal, and the smaller the voltage value of the detected voltage frequency signal is, the greater the amplification gain of the selected isolation amplification unit is, so that the selected isolation amplification unit amplifies the input detected voltage frequency signal and sends it to the voltage detection unit and the frequency detection unit via the channel chip selection unit.

[0008] Preferably, the at least three isolation amplification units are respectively realized by three independent isolation amplification circuits.

[0009] Preferably, the at least three isolation amplification units are three different isolation amplification channels in the same isolation amplification circuit.

[0010] Preferably, the at least three isolation amplification units are realized by at least two independent isolation amplification circuits, and different isolation amplification channels in all isolation amplification circuits are respectively used to realize different isolation amplification units.

[0011] Preferably, there are three isolation amplification units, which are respectively defined as a first isolation amplification unit with an amplification gain of gain one, a second isolation amplification unit with an amplification gain of gain two, and a third isolation amplification unit with an amplification gain of gain three, and gain one < gain two < gain three.

[0012] Preferably, the frequency detection unit comprises a low-pass filter unit, a NOT and low-pass filter unit, a comparison unit, and a level conversion unit, wherein:

[0013] The low-pass filter unit and the NOT and low-pass filter unit simultaneously input an external signal, the outputs of the low-pass filter unit and the NOT and low-pass filter unit are synchronously input to the comparison unit, and after the two signals are compared in the comparison unit, a square wave signal with the same frequency as the detected voltage frequency signal is obtained, which is sent to the level conversion unit to convert the square wave signal into a square wave signal with a level that can be accepted by the central processing unit.

[0014] Another technical solution of the present application is to provide a wide-range voltage adaptive frequency detection method, characterized in that the wide-range voltage adaptive frequency detection circuit is used, and the method comprises the following steps:

[0015] Step 1: the central processing unit enables the channel chip selection unit to select the isolation amplification unit with a large amplification gain through the chip selection signal processing unit; the selected isolation amplification unit amplifies the input detected voltage frequency signal and sends the amplified signal to the voltage detection unit and the frequency detection unit;

[0016] Step 2: the central processing unit samples the voltage of the detected voltage frequency signal through the voltage detection unit, samples the frequency of the detected voltage frequency signal through the frequency detection unit, and enters step 3;

[0017] Step 3: if the voltage obtained in the previous step belongs to high voltage, the selected isolation amplification unit is kept in the enabled state, and the next sampling is performed by returning to step 2; if the voltage obtained in the previous step belongs to medium voltage, step 4 is entered; if the voltage obtained in the previous step belongs to low voltage, step 7 is entered;

[0018] Step 4: the central processing unit enables the channel chip selection unit to select the isolation amplification unit with an intermediate amplification gain through the chip selection signal processing unit; the selected isolation amplification unit amplifies the input detected voltage frequency signal and sends the amplified signal to the voltage detection unit and the frequency detection unit, and enters step 5;

[0019] Step 5: the central processing unit samples the voltage of the detected voltage frequency signal through the voltage detection unit, samples the frequency of the detected voltage frequency signal through the frequency detection unit, and enters step 6;

[0020] Step 6: if the voltage obtained in the previous step belongs to high voltage, step 1 is returned to; if the voltage obtained in the previous step belongs to medium voltage, the selected isolation amplification unit is kept in the enabled state, and the next sampling is performed by returning to step 5; if the voltage obtained in the previous step belongs to low voltage, step 7 is entered;

[0021] Step 7: the central processing unit enables the channel chip selection unit to select the isolation amplification unit with an amplification gain of three through the chip selection signal processing unit; the selected isolation amplification unit amplifies the input detected voltage frequency signal and sends the amplified signal to the voltage detection unit and the frequency detection unit, and enters step 8;

[0022] Step 8: the central processing unit samples the voltage of the detected voltage frequency signal through the voltage detection unit, samples the frequency of the detected voltage frequency signal through the frequency detection unit, and enters step 9;

[0023] Step 9, if the voltage obtained in the last step is high voltage, return to step 1; if the voltage obtained in the last step is medium voltage, return to step 4; if the voltage obtained in the last step is low voltage, keep the selected isolation amplification unit in the gating state, return to step 8, and proceed to the next sampling.

[0024] Preferably, further comprising: step 10, the central processing unit makes the channel chip selection unit close all input channels to protect the voltage detection unit and the frequency detection unit.

[0025] Then in the step 3, step 6 and step 9, further comprising the following judgment conditions:

[0026] If the voltage obtained in the last step exceeds the pre-set threshold, enter step 10.

[0027] Preferably, in the step 3, step 6 and step 9, if the voltage obtained in the last step is between -Vb to -Va or +Vb to +Va, it belongs to high voltage; if the voltage obtained in the last step is between -Vb to -Vc or +Vc to +Vb, it belongs to medium voltage; if the voltage obtained in the last step is between -Vc to 0 or 0 to +Vc, it belongs to low voltage, |Va|>|Vb|>|Vc|.

[0028] Preferably, the step 3 specifically comprises the following steps:

[0029] If the voltage obtained in the last step is between -Vb to -Va or +Vb to +Va, keep the selected isolation amplification unit in the gating state, return to step 2, and proceed to the next sampling; if the voltage obtained in the last step is not between -Vb to -Va and +Vb to +Va, and is not higher than +Va and not lower than -Va, enter step 4.

[0030] The step 6 specifically comprises the following steps:

[0031] If the voltage obtained in the last step is lower than -Vb or higher than +Vb, return to step 1; if the voltage obtained in the last step is between -Vb to -Vc or +Vc to +Vb, keep the selected isolation amplification unit in the gating state, return to step 5, and proceed to the next sampling; if the voltage obtained in the last step jumps out of -Vb to -Vc or +Vc to +Vb, and does not exceed +Vb and does not lower than -Vb, enter step 7.

[0032] The step 9 specifically comprises the following steps:

[0033] If the voltage obtained in the previous step is lower than -Vb or higher than +Vb, return to step 1; if the voltage obtained in the previous step is between -Vb and -Vc or between +Vc and +Vb, return to step 4; if the voltage obtained in the previous step jumps out of -Vb to -Vc or between +Vc and +Vb, and does not exceed +Vb or is not lower than -Vb, then keep the selected isolation amplifier unit in the selected state, return to step 8, and perform the next sampling.

[0034] The isolated, wide-range voltage adaptive frequency detection circuit disclosed in this invention can well meet the requirements of IEEE 1547.1-2018 regulations for effective control and detection of both high and low voltages. It achieves detection of arbitrary voltage and frequency, no longer limited by voltage; that is, the values ​​of Va, Vb, and Vc are not limited to the voltage values ​​specified in the background art. Furthermore, in the technical solution of this invention, the detection output signal terminal and the high-voltage detection point are insulated from each other, achieving accurate detection of both high and low voltage frequencies. This also ensures insulation isolation between the detection terminal and the high-voltage terminal being detected, thus meeting the requirements of the new regulations and improving the stable operation of the grid-connected inverter. Attached Figure Description

[0035] Figure 1 Schematic diagram of a wide-range voltage adaptive frequency detection circuit with isolation;

[0036] Figure 2 for Figure 1 Schematic diagram of the intermediate frequency detection unit;

[0037] Figure 3 for Figure 1 Schematic diagram of the second isolation amplifier unit;

[0038] Figure 4 The detection process of a wide-range voltage adaptive frequency detection circuit with isolation is illustrated. Detailed Implementation

[0039] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, it should be understood that after reading the teachings of this invention, those skilled in the art can make various alterations or modifications to the invention, and these equivalent forms also fall within the scope defined by the appended claims.

[0040] like Figure 1 As shown, the wide-range voltage adaptive frequency detection circuit with isolation disclosed in this embodiment includes a first isolation amplification unit, a second isolation amplification unit with two isolation amplification channels, a chip select signal processing unit, a channel chip select unit 1, a channel chip select unit 2, an MCU processing unit, a voltage detection unit, and a frequency detection unit.

[0041] CombinationFigure 4The working process of the frequency detection circuit is as follows: the detected voltage frequency signal VR, VS reaches the first isolation amplification unit and the second isolation amplification unit through the detection line at the same time. Since the voltage of the detected voltage frequency signal is unknown at the beginning, the MCU processing unit first sends a chip selection signal to the chip selection signal processing unit. The chip selection signal processing unit selects the channel 1 of the channel chip selection unit 1 according to the command of the MCU processing unit, so that the detected voltage frequency signal collected by the first isolation amplification unit is amplified by the first isolation amplification unit, and then enters the channel 1 through the 1 output pin of the first isolation amplification unit, and is output to the voltage detection unit and the frequency detection unit after passing through the channel chip selection unit 1. The detected voltage frequency signal amplified by the first isolation amplification unit is sent to the MCU processing unit after being processed by the voltage detection unit in proportion. The MCU processing unit obtains the detected voltage signal after processing according to the given proportion. Meanwhile, the MCU processing unit samples the frequency of the detected voltage frequency signal according to the processed signal after the detected voltage frequency signal amplified by the first isolation amplification unit is processed by the frequency detection unit. If the MCU processing unit finds that the detected voltage signal is greater than twice or more than the predetermined detection voltage, the MCU processing unit will turn off all chip selection signals to protect the following detection circuit. If the MCU processing unit finds that the detected voltage signal is between -Vb and -Va or +Vb and +Va, the channel 1 will keep detecting the signal. If the MCU processing unit finds that the detected voltage signal is not between -Vb and -Va or +Vb and +Va, and is not higher than +Va or lower than -Va, the MCU processing unit will send a chip selection signal to the chip selection signal processing unit. The chip selection signal processing unit selects the channel 1 of the channel chip selection unit 2 according to the command of the MCU processing unit, so that the gain 1 output end of the second isolation amplification unit is connected with the gain 1 input end to form a loop, that is, the first isolation amplification channel with the amplification gain of gain 1 in the second isolation amplification unit is selected, and the second isolation amplification unit works in the gain 1 state. The detected voltage frequency signal is processed by the second isolation amplification unit working in the gain 1 state, and then is output to the channel 2 of the channel chip selection unit 1 through the 2 output pin of the second isolation amplification unit. The detected voltage frequency signal processed by the second isolation amplification unit is input to the voltage detection unit and the frequency detection unit through the channel 2 of the channel chip selection unit 1. The detected voltage frequency signal processed by the second isolation amplification unit working in the gain 1 state is sent to the MCU processing unit after being processed by the voltage detection unit in proportion. The MCU processing unit obtains the detected voltage signal after processing according to the given proportion. Meanwhile, the MCU processing unit samples the frequency of the detected voltage frequency signal according to the processed signal after the detected voltage frequency signal processed by the second isolation amplification unit working in the gain 1 state is processed by the frequency detection unit.MCU processing unit if found to be detected voltage signal in - Vb to -100V (-Vc) or between +100V (+Vc) to +Vb, MCU processing unit will issue chip select signal to chip select signal processing unit, chip select signal processing unit according to the command of MCU processing unit through chip select signal 2 gating channel chip select unit 2 channel 1, until the voltage range of the detected voltage signal jumps out of -Vb to -Vc or +Vc to +Vb, and does not exceed +Vb nor lower than -Vb. MCU processing unit then sends chip select signal to chip select signal processing unit again, chip select signal processing unit according to the command of MCU processing unit through chip select signal 2 gating channel chip select unit 2 channel 2, so that the gain 2 output end of the second isolation amplification unit is connected with the gain 2 input end to form a loop, that is, the second isolation amplification unit with the amplification gain of gain 2 is selected, so that the second isolation amplification unit works in the state of gain 2. After the second isolation amplification unit working in the state of gain 2 processes the detected voltage frequency signal, the signal is output to channel 2 of channel chip select unit 1 through the 2 unit output pin of the second isolation amplification unit. After the detected voltage frequency signal processed by the second isolation amplification unit working in the state of gain 2 passes through channel 2 of channel chip select unit 1, it is output to voltage detection unit and frequency detection unit. After the detected voltage frequency signal processed by the second isolation amplification unit working in the state of gain 2 passes through the voltage detection unit, it is sent to the MCU processing unit. After the MCU processing unit processes the signal according to the given ratio, the detected voltage signal is obtained. At the same time, after the detected voltage frequency signal is processed by the frequency detection unit, the MCU processing unit samples the frequency of the detected signal according to the processed signal.

[0042] The gain of the first isolation amplification unit is the smallest, corresponding to the sampling of high voltage and frequency; the gain 1 of the second isolation amplification unit is in the middle, corresponding to the sampling of intermediate voltage and frequency signal; the gain 2 of the second isolation amplification unit is the largest, corresponding to the sampling of minimum voltage and frequency signal. Through the chip select function of MCU processing unit, MCU processing unit can sample the voltage and frequency of the detected voltage frequency signal under high voltage, medium voltage and low voltage conditions. The first isolation amplification unit and the second isolation amplification unit both use isolation amplification operational amplifier (for example, isolation gain amplifier, or isolation linear photocoupler, or isolation amplifier with the same function, or combination of isolator and amplifier), which isolates the detected voltage frequency signal from the detection output signal, ensuring the safety of MCU processing unit detection.

[0043] The aforementioned channel chip select unit 1 and channel chip select unit 2 can be low-voltage multiplexed switches or other controllable conduction devices. The aforementioned chip select signal processing unit can be a logic control chip, a chip select analog circuit composed of analog resistors, capacitors, MOSFETs, or transistors, or a digital logic circuit. The aforementioned voltage detection unit can be a differential amplifier circuit composed of differential operational amplifiers, or other circuits with the same amplification function. The aforementioned MCU processing unit can be a DSP, or a CPLD, FPGA, microcontroller, or other control logic detection device.

[0044] The aforementioned frequency detection unit can be composed of a low-pass filter, an operational amplifier, and a comparator, or it can be composed of a filter circuit, an amplifier circuit, and a comparator circuit with the same function. For example... Figure 2 As shown, in this embodiment, the frequency detection unit includes a low-pass filter unit, an inversion and low-pass filter unit, a comparison unit, and a level conversion unit. The frequency detection unit splits the input signal into two paths: one path enters the low-pass filter unit for low-pass filtering, and the required low-pass cutoff frequency can be preset; the other path enters the inversion and low-pass filter unit for signal inversion and the same low-pass filtering, and the required low-pass cutoff frequency can also be preset. The signals processed by the low-pass filter unit and the inversion and low-pass filter unit are simultaneously input to the comparison unit. After comparison, a square wave signal with the same frequency as the detected voltage signal is obtained. This square wave signal is sent to the level conversion unit, which converts it into a square wave signal whose level can be accepted by the MCU processing unit for further processing. The MCU processing unit detects the frequency of the detected signal based on the received square wave signal. Because current common frequency detection circuits do not perform separate gain processing, the comparator unit works well when the detected voltage is relatively high, but when the detected signal voltage is very low, below 30% of the grid-connected inverter output voltage, or close to 0V, the comparator unit's input voltage is extremely low, almost zero. Furthermore, the input of the comparator unit often experiences small voltage fluctuations due to various reasons. These fluctuations generate differential-mode voltages, causing continuous or abnormal changes in the comparator unit's output, rendering it unable to function properly. This invention adjusts the gain of the detection signal output through the first and second isolation amplification channels of the second isolation amplification unit, amplifying the output voltage to a suitable factor before sending it to the comparator unit. This allows the comparator unit to function well, solving the problem of failing to detect the frequency signal when the detected voltage is very low. Simultaneously, it adds isolation and chip select interruption functions, isolating the detected high voltage from the detection output signal, ensuring the safe operation of subsequent detection units, meeting the requirements of IEEE 1547.1-2018 regulations, and improving the stability of the photovoltaic power generation system.

[0045] As Figure 3 shown, in this embodiment, the second isolation amplification unit includes a second isolation unit (implemented based on the isolation amplification chip well known to those skilled in the art) shared by the first isolation amplification channel and the second isolation amplification channel, and an amplifier U1 (implemented based on the amplifier well known to those skilled in the art, the 5-pin of which is usually a non-inverting input terminal, the 6-pin is usually an inverting input terminal, and the 7-pin is usually an output terminal). The input terminal of the second isolation unit is connected to the detection voltage frequency signals VR and VS, and the output terminal of the second isolation unit is connected to the non-inverting input terminal and the inverting input terminal of the amplifier U1 via resistors R1 and R2, respectively. The non-inverting input terminal of the amplifier U1 is connected to the ground AGND via the parallel connection of resistor R3 and capacitor C1. The output terminal of the amplifier U1 is connected to the channel 2 of the channel selection unit 1 via resistor R6. The first isolation amplification channel is formed by the parallel connection of an amplification resistor R4 and a capacitor C2, and the second isolation amplification channel is formed by the parallel connection of an amplification resistor R5 and a capacitor C3. The specific values of the gain 1 and the gain 2 depend on the resistance values of the amplification resistor R4 and the amplification resistor R5. One end of the first isolation amplification channel is connected to the inverting input terminal of the amplifier U1, and the other end forms the aforementioned gain 1 output terminal. The output terminal of the amplifier U1 is connected to the channel 1 of the channel selection unit 2, which also serves as the aforementioned gain 1 input terminal and gain 2 input terminal. The other end of the first isolation amplification channel and the output terminal of the amplifier U1 are connected to the channel 1 of the channel selection unit 2. One end of the second isolation amplification channel is connected to the inverting input terminal of the amplifier U1, and the other end forms the aforementioned gain 2 output terminal. The other end of the second isolation amplification channel and the output terminal of the amplifier U1 are connected to the channel 2 of the channel selection unit 2. Figure 3 Only one preferred embodiment of the second isolation amplification unit is shown. Those skilled in the art can also implement the second isolation amplification unit in other circuit structures based on the technical inspiration given by the present application after reading the present application. Meanwhile, the second isolation amplification unit can also be implemented by two independent isolation amplification circuits, one of which has a gain 1 amplification gain, and the other of which has a gain 2 amplification gain.

Claims

1. A wide range voltage adaptive frequency detection circuit with isolation, characterized by, The circuit comprises a first isolation amplification unit, a second isolation amplification unit with two isolation amplification channels, a chip selection signal processing unit, a channel chip selection unit one, a channel chip selection unit two, a central processing unit, a voltage detection unit, and a frequency detection unit. The first isolation amplification unit and the two isolation amplification channels of the second isolation amplification unit have different amplification gains, wherein: The detected voltage frequency signal is synchronously input to all isolation amplification units. The outputs of the first isolation amplification unit and the second isolation amplification unit are connected to the voltage detection unit and the frequency detection unit through the channel chip selection unit one and the channel chip selection unit two. The output end of the channel chip selection unit one is connected to the voltage detection unit and the frequency detection unit. The central processing unit selects the two isolation amplification channels of the first isolation amplification unit and the second isolation amplification unit with corresponding amplification gains according to the size of the voltage value of the detected voltage frequency signal and the chip selection signal received by the channel chip selection unit one and the channel chip selection unit two. The smaller the voltage value of the detected voltage frequency signal, the greater the amplification gain of the two isolation amplification channels of the selected first isolation amplification unit or second isolation amplification unit. The central processing unit controls the chip selection signal processing unit to generate a chip selection signal one to select channel one of the channel chip selection unit one, so that the first isolation amplification unit amplifies the collected detected voltage frequency signal and outputs it to the voltage detection unit and the frequency detection unit through channel one of the channel chip selection unit one. The voltage of the detected voltage frequency signal is sampled by the voltage detection unit, and the frequency of the detected voltage frequency signal is sampled by the frequency detection unit. The central processing unit sends an instruction to the chip selection signal processing unit according to the size of the sampled voltage, so that the chip selection signal processing unit generates a corresponding chip selection signal two or keeps channel one of the channel chip selection unit one to detect the signal. When the chip selection signal processing unit generates a corresponding chip selection signal two, channel two of the channel chip selection unit two is selected, so that the two isolation amplification channels of the second isolation amplification unit with corresponding amplification gains amplify the collected detected voltage frequency signal and output it to the voltage detection unit and the frequency detection unit through channel two of the channel chip selection unit one. The frequency detection unit comprises a low-pass filter unit, a NOT and low-pass filter unit, a comparison unit, and a level conversion unit, wherein: The low-pass filter unit and the NOT and low-pass filter unit are simultaneously connected to the externally input signal. The outputs of the low-pass filter unit and the NOT and low-pass filter unit are synchronously connected to the comparison unit. After the comparison of the two signals in the comparison unit, a square wave signal with the same frequency as the detected voltage frequency signal is obtained, which is transmitted to the level conversion unit to convert the square wave signal into a square wave signal with a level that can be accepted by the central processing unit.

2. A wide-range voltage adaptive frequency detection method, characterized in that, The wide-range voltage adaptive frequency detection circuit comprises the following steps: The central processing unit selects two isolation amplification channels in the first isolation amplification unit and the second isolation amplification unit according to the size of the voltage value of the detected voltage frequency signal, and the channel chip select unit one and the channel chip select unit two select the two isolation amplification channels with corresponding amplification gain according to the received chip select signal; the smaller the voltage value of the detected voltage frequency signal is, the larger the amplification gain of the two isolation amplification channels in the selected first isolation amplification unit or second isolation amplification unit is: The central processing unit controls the chip select signal processing unit to generate a chip select signal one to select the channel one of the channel chip select unit one, so that the first isolation amplification unit amplifies the collected detected voltage frequency signal and outputs the amplified signal to the voltage detection unit and the frequency detection unit through the channel one of the channel chip select unit one, the voltage detection unit samples the voltage of the detected voltage frequency signal, and the frequency detection unit samples the frequency of the detected voltage frequency signal; The central processing unit sends an instruction to the chip select signal processing unit according to the size of the sampled voltage, so that the chip select signal processing unit generates a corresponding chip select signal two or keeps the channel one of the channel chip select unit one to detect the signal; When the chip select signal processing unit generates a corresponding chip select signal two, the channel chip select unit two is selected, so that the two isolation amplification channels of the second isolation amplification unit amplify the collected detected voltage frequency signal, and output the amplified signal to the voltage detection unit and the frequency detection unit through the channel two of the channel chip select unit one.

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