A single chip microcomputer IO port expansion circuit and expansion method thereof

Abstract

The present invention relates to an expansion circuit and an expansion method for a single-chip microcomputer IO port, comprising an MCU circuit, a BCD code switch SK1, a dip switch SW1, buttons KEY1-KEY4, PNP-type transistors Q1-Q8, and filter capacitors C1-C12. The MCU circuit includes a microcontroller chip IC1, the microcontroller chip being connected to one end of each switch element: the BCD code switch SK1, the dip switch SW1, and the buttons KEY1-KEY4; the other ends of the switch elements being connected to each transistor, which is connected to the I / O port of the microcontroller chip; the states of the BCD code switch SK1, the dip switch SW1, and the buttons SW1 being variable by external operation; the PNP-type transistors being used to expand the single-chip microcomputer I / O port, and the switch state being determined by controlling the PNP transistor base voltage. The expansion circuit of the present invention can be flexibly used with various switch controls, can reduce the number of single-chip microcomputer I / O ports, and to a certain extent reduces product cost.

Description

Technical Field

[0001] The present invention relates to the technical field of control circuits, and in particular to an expansion circuit for an IO port of a single-chip microcomputer and an expansion method thereof. Background Art

[0002] Currently, switch components such as buttons, dip switches, and BCD switches are commonly used as control elements in human-computer interaction in electronic products. When a product has a large number of switches, the requirement for a higher number of microcontroller I / O ports increases. The larger the number of microcontroller I / O ports, the larger the chip and the higher its cost.

[0003] There are three main methods for expanding I / O ports of single-chip microcomputers in the prior art:

[0004] The first method uses resistors to divide the voltage, and then uses the ADC port of the microcontroller to read different resistance values. For example, Chinese patent CN201698195U provides an expansion circuit for the IO port of a microcontroller. This method has three main disadvantages: the microcontroller application requires redundant ADC ports; the more buttons each ADC port controls, the more difficult it is to determine the value of the voltage divider resistor; and when multiple buttons are pressed simultaneously, it is even more difficult to distinguish them.

[0005] The second method is to expand the I / O port of the microcontroller by using an expansion chip. For example, Chinese patent CN201820221U provides an I / O interface expansion circuit for a microcontroller. Although this method can meet the requirements, as the number of controlled switches increases, the expansion chip occupies more space on the PCB, which increases the difficulty of PCB board layout and wiring.

[0006] The third method is to detect keys through a key matrix. This is a more economical way to expand the I / O port of the microcontroller. However, this method is not suitable for switches that always remain in the on state, such as dip switches and BCD code switches. Summary of the Invention

[0007] The object of the present invention is to overcome the above-mentioned shortcomings and provide an expansion circuit and expansion method for the IO port of a single-chip microcomputer. In a circuit with multiple switches such as dip switches, BCD code switches, and buttons, the number of MCU I / O ports is effectively reduced, and the layout and wiring of the PCB board are simplified, which saves PCB board space to a certain extent and reduces product cost.

[0008] The object of the present invention is achieved like this:

[0009] A circuit for expanding the I / O port of a single-chip microcomputer comprises an MCU circuit, a BCD code switch SK1, a DIP switch SW1, keys KEY1 to KEY4, PNP transistors Q1 to Q8, and filter capacitors C1 to C12. The MCU circuit comprises a microcontroller chip IC1, which is connected to one end of each switching element: the BCD code switch SK1, the DIP switch SW1, and the keys KEY1 to KEY4. The other ends of the switching elements are connected to each transistor, which is connected to the I / O port of the microcontroller chip. The states of the BCD code switch SK1, the DIP switch SW1, and the keys SW1 are variable depending on external operation. The PNP transistors are used to expand the I / O port of the single-chip microcomputer, and the switch states are determined by controlling the base voltage of the PNP transistors.

[0010] Furthermore, the internal common contact of the BCD code switch SK1: the KEYA port is connected to the filter capacitor C1, the filter capacitor C1 is grounded, and the four pins of the BCD code switch are Q11, Q12, Q13 and Q14 respectively; the internal common contact of the dip switch SW1: the KEYB port is connected to the filter capacitor C2, the filter capacitor C3 is grounded, and the 8-bit switches of the dip switch SW1 are Q21, Q22, Q23, Q24, Q25, Q26, Q27 and Q28 respectively; one end of the keys KEY1~KEY4 connected to the MCU circuit is a common contact: the KEYC port is connected to the filter capacitor C12, the filter capacitor C12 is grounded, and the other ends of the keys KEY1~KEY4 are Q31~Q34 respectively.

[0011] Furthermore, the emitter of the PNP transistor Q1 is connected to the Q11 terminal of the BCD code switch SK1, the collector is connected to the Q21 terminal of the dial switch SW1, the base is connected to the Port1 port, and the filter capacitor C3 is connected through the Port1 port; the emitter of the PNP transistor Q2 is connected to the Q12 terminal of the BCD code switch SK1, the collector is connected to the Q22 terminal of the dial switch SW1, the base is connected to the Port2 port, and the filter capacitor C4 is connected through the Port2 port; the emitter of the PNP transistor Q3 is connected to the Q13 terminal of the BCD code switch SK1, the collector is connected to the Q23 terminal of the dial switch SW1, the base is connected to the Port3 port, and the filter capacitor C5 is connected through the Port3 port; the emitter of the PNP transistor Q4 is connected to the Q14 terminal of the BCD code switch SK1, the collector is connected to the Q24 terminal of the dial switch SW1, the base is connected to the Port4 port, and the filter capacitor C5 is connected through the Port4 port Connect to the filter capacitor C6; the emitter of the PNP transistor Q5 is connected to the Q25 end of the dial switch SW1, the collector is connected to the Q31 end of the key KEY1, the base is connected to the Port5 port, and the filter capacitor C8 is connected through the Port5 port; the emitter of the PNP transistor Q6 is connected to the Q26 end of the dial switch SW1, the collector is connected to the Q32 end of the key KEY2, the base is connected to the Port6 port, and the filter capacitor C9 is connected through the Port6 port; the emitter of the PNP transistor Q7 is connected to the Q27 end of the dial switch SW1, the collector is connected to the Q33 end of the key KEY3, the base is connected to the Port7 port, and the filter capacitor C10 is connected through the Port7 port; the emitter of the PNP transistor Q8 is connected to the Q28 end of the dial switch SW1, the collector is connected to the Q34 end of the key KEY4, the base is connected to the Port8 port, and the filter capacitor C11 is connected through the Port8 port.

[0012] Furthermore, the MCU circuit includes a microcontroller chip IC1, a capacitor C16, a capacitor C17 and a crystal oscillator AXTL1. The capacitor C16 and the capacitor C17 are connected in parallel and in series with the crystal oscillator AXTL1 respectively and then connected to the microcontroller chip IC1, providing a basic clock signal for the microcontroller chip IC1.

[0013] Furthermore, the MCU circuit further includes capacitors C13, C14 and C15, which are connected in parallel to filter the power supply and input signals of the microcontroller chip IC1.

[0014] Furthermore, the MCU circuit also includes capacitor C20, capacitor C21, resistor R1 and resistor R2. Capacitor C20 and capacitor C21 are connected in parallel and in series with resistor R2, and are connected to the microcontroller chip IC1. The microcontroller chip IC1 is also connected to resistor R1. Resistor R1 and resistor 2 act as pull-up.

[0015] A method for expanding an expansion circuit of an IO port of a single-chip microcomputer includes the following contents:

[0016] Step 1: Configure the I / O ports of the microcontroller KEYA~KEYC as pull-up inputs, that is, the KEYA~KEYC ports are high level, and configure the Port1~Port8 ports as push-pull outputs;

[0017] Step 2: Write a low level to Port1, write a high level to Port2~Port8, and read the status of KEYA~KEYC. Port1 controls the base level of PNP transistor Q1. When writing a low level to Port1, the status of the switch pin connected to the collector and emitter of Q1 can be read.

[0018] Step 3. Write a low level to Port2, write a high level to Port1, Port3 to Port8, and read the status of KEYA to KEYC. Port2 controls the base level of PNP transistor Q2. When writing a low level to Port2, the status of the switch pin connected to the collector and emitter of Q2 can be read.

[0019] Step 4. Write a low level to Port3, write a high level to Port1, Port2, Port4~Port8, and read the status of KEYA~KEYC. Port3 controls the base level of PNP transistor Q3. When writing a low level to Port3, the status of the switch pin connected to the collector and emitter of Q3 transistor can be read.

[0020] Step 5. Write a low level to Port4, write a high level to Port1~Port3, Port5~Port8, and read the status of KEYA~KEYC. Port4 controls the base level of PNP transistor Q4. When writing a low level to Port4, the status of the switch pin connected to the collector and emitter of Q4 transistor can be read.

[0021] Step 6. Write a low level to Port5, write a high level to Port1~Port4, Port6~Port8, read the status of KEYA~KEYC and save it. Port5 controls the base level of PNP transistor Q5. When writing a low level to Port5, the status of the switch pin connected to the collector and emitter of Q5 transistor can be read.

[0022] Step 7. Write a low level to Port6, write a high level to Port1~Port5, Port7~Port8, and read the status of KEYA~KEYC. Port6 controls the base level of PNP transistor Q6. When writing a low level to Port6, the status of the switch pin connected to the collector and emitter of Q6 transistor can be read.

[0023] Step 8. Write a low level to Port7, write a high level to Port1~Port6 and Port8, and read the status of KEYA~KEYC. Port7 controls the base level of PNP transistor Q7. When writing a low level to Port7, the status of the switch pin connected to the collector and emitter of Q7 can be read.

[0024] Step 9. Write a low level to Port8, write a high level to Port1~Port7, and read the status of KEYA~KEYC. Port8 controls the base level of PNP transistor Q8. When a low level is written to Port8, the status of the switch pin connected to the collector and emitter of Q8 transistor can be read.

[0025] Furthermore, the judgment method in steps 2 to 9 is to write a low level to Port "n" and a high level to the other Ports, and read the switch pin status connected to the collector and emitter of Q "n" transistor; if the emitter of Q "n" transistor is disconnected from the internal common contact of the corresponding switch element, then the common contact port is high level, otherwise it is connected and the common contact port is low level; similarly, if the collector of Q "n" transistor is disconnected from the internal common contact of the corresponding switch element, then the common contact port is high level, otherwise it is connected and the common contact port is low level.

[0026] Compared with the prior art, the present invention has the following beneficial effects:

[0027] The MCU circuit of the present invention adopts an MCU microcontroller chip. The MCU microcontroller is connected to one end of a switch element (a button, a dip switch, a BCD code switch), the other end of the switch device is connected to a transistor, and the transistor is further connected to the I / O port of the MCU microcontroller chip. The expansion circuit of the present invention can be flexibly used with various switch controls, which can reduce the number of I / O ports of the single-chip computer and reduce product costs to a certain extent. The method of the present invention occupies less PCB space and simplifies PCB layout and wiring. The control program of the method of the present invention is simple and can be flexibly adjusted according to the number of switches. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a circuit structure diagram of the present invention.

[0029] Figure 2 1 is a circuit diagram of the MCU of the present invention.

[0030] Figure 3 Flow chart of the method of the present invention. DETAILED DESCRIPTION

[0031] To better understand the technical solution of the present invention, the following detailed description is provided with reference to the relevant illustrations. It should be understood that the following specific embodiments are not intended to limit the specific implementation of the technical solution of the present invention; they are merely examples of possible implementations of the technical solution of the present invention. It should be noted that references herein to the positional relationships of various components, such as component A being located above component B, are based on the relative positions of the components in the illustrations and are not intended to limit the actual positional relationships of the components.

[0032] Example 1:

[0033] See also Figure 1-Figure 2 , Figure 1 A schematic diagram of the circuit structure of the present invention is provided. As shown in the figure, the present invention relates to a circuit for expanding the IO port of a single-chip microcomputer. The circuit includes an MCU circuit, a BCD code switch SK1, an 8-bit DIP switch SW1, buttons KEY1-KEY4, PNP transistors Q1-Q8, and filter capacitors C1-C12. The MCU circuit includes a microcontroller chip IC1, which is connected to one end of each switching element: the BCD code switch SK1, the DIP switch SW1, and the buttons. The other ends of these switching elements are connected to each transistor, which is connected to the I / O port of the microcontroller chip. The states of the BCD code switch, DIP switch, and buttons are variable depending on external operation. The PNP transistors are used to expand the I / O port of the single-chip microcomputer, and the switch state is determined by controlling the base voltage of the PNP transistors.

[0034] The internal common contact of the BCD code switch SK1: the KEYA port is connected to the filter capacitor C1, the filter capacitor C1 is grounded, and the four pins of the BCD code switch are Q11, Q12, Q13 and Q14 respectively; the internal common contact of the dip switch SW1: the KEYB port is connected to the filter capacitor C2, the filter capacitor C3 is grounded, and the 8-bit switches of the dip switch SW1 are Q21, Q22, Q23, Q24, Q25, Q26, Q27 and Q28 respectively; one end of the keys KEY1~KEY4 connected to the MCU circuit is a common contact: the KEYC port is connected to the filter capacitor C12, the filter capacitor C12 is grounded, and the other ends of the keys KEY1~KEY4 are Q31~Q34 respectively.

[0035] The emitter of the PNP transistor Q1 is connected to the Q11 terminal of the BCD code switch SK1, the collector is connected to the Q21 terminal of the dial switch SW1, the base is connected to the Port1 port, and the filter capacitor C3 is connected through the Port1 port; the emitter of the PNP transistor Q2 is connected to the Q12 terminal of the BCD code switch SK1, the collector is connected to the Q22 terminal of the dial switch SW1, the base is connected to the Port2 port, and the filter capacitor C4 is connected through the Port2 port; the emitter of the PNP transistor Q3 is connected to the Q13 terminal of the BCD code switch SK1, the collector is connected to the Q23 terminal of the dial switch SW1, the base is connected to the Port3 port, and the filter capacitor C5 is connected through the Port3 port; the emitter of the PNP transistor Q4 is connected to the Q14 terminal of the BCD code switch SK1, the collector is connected to the Q24 terminal of the dial switch SW1, the base is connected to the Port4 port, and the filter capacitor C5 is connected through the Port4 port Capacitor C6; the emitter of the PNP transistor Q5 is connected to the Q25 end of the dial switch SW1, the collector is connected to the Q31 end of the key KEY1, the base is connected to the Port5 port, and the filter capacitor C8 is connected through the Port5 port; the emitter of the PNP transistor Q6 is connected to the Q26 end of the dial switch SW1, the collector is connected to the Q32 end of the key KEY2, the base is connected to the Port6 port, and the filter capacitor C9 is connected through the Port6 port; the emitter of the PNP transistor Q7 is connected to the Q27 end of the dial switch SW1, the collector is connected to the Q33 end of the key KEY3, the base is connected to the Port7 port, and the filter capacitor C10 is connected through the Port7 port; the emitter of the PNP transistor Q8 is connected to the Q28 end of the dial switch SW1, the collector is connected to the Q34 end of the key KEY4, the base is connected to the Port8 port, and the filter capacitor C11 is connected through the Port8 port.

[0036] The MCU circuit includes a microcontroller chip IC1, capacitors C13 to C17, capacitor C20, capacitor C21, a crystal oscillator AXTL1, resistors R1 and R2. Capacitors C13, C14 and C15 are connected in parallel to filter the power supply and input signals of the microcontroller chip IC1; capacitors C16 and C17 are connected in parallel and respectively connected in series with the crystal oscillator AXTL1 and then connected to the microcontroller chip IC1, providing a basic clock signal for the microcontroller chip IC1; capacitors C20 and C21 are connected in parallel and then connected in series with resistor R2 and connected to the microcontroller chip IC1. The microcontroller chip IC1 is also connected to resistor R1, and resistors R1 and 2 play a pull-up role.

[0037] See also Figure 3 , Figure 3 A flow chart of the present invention is drawn. As shown in the figure, the above-mentioned method for expanding the expansion circuit of the IO port of a single-chip microcomputer includes the following contents:

[0038] Step 1: Configure the I / O ports of the microcontroller KEYA~KEYC as pull-up inputs, that is, the KEYA~KEYC ports are high level, and configure the Port1~Port8 ports as push-pull outputs.

[0039] Step 2: Write a low level to Port1, write a high level to Port2~Port8, and read the status of KEYA~KEYC. Port1 controls the base level of PNP transistor Q1. When writing a low level to Port1, the status of the switch pin connected to the collector and emitter of Q1 can be read.

[0040] The specific judgment method is as follows:

[0041] 1. If the common contact KEYA port of the BCD code switch SK1 is disconnected from Q11, and the common contact KEYB port of the DIP switch SW1 is disconnected from Q21, the transistor Q1 does not work, that is, both KEYA and KEYB ports are high level;

[0042] 2. If the common contact KEYA port inside the BCD code switch SK1 is disconnected from Q11, and the common contact KEYB port of the DIP switch SW1 is connected to Q21, the emitter of the PNP transistor Q1 is disconnected, and the PN junction between the collector and the base is forward-conducted, that is, KEYA is high and KEYB port is low;

[0043] 3. If the common contact KEYA port inside the BCD code switch SK1 is connected to Q11, and the common contact KEYB port of the DIP switch SW1 is disconnected from Q21, the emitter of the transistor Q1 is turned on and the collector is disconnected, that is, KEYA is low level and KEYB port is high level;

[0044] 4. If the common contact KEYA port inside the BCD code switch SK1 is connected to Q11, and the common contact KEYB port of the dip switch SW1 is connected to Q21, then the emitter of the PNP transistor Q1 is forward biased, and the PN junction between the collector and the base is forward-biased, that is, the KEYA and KEYB ports are both low level.

[0045] Step 3. Write a low level to Port2, write a high level to Port1, Port3 to Port8, and read the status of KEYA to KEYC. Port2 controls the base level of PNP transistor Q2. When writing a low level to Port2, the status of the switch pin connected to the collector and emitter of Q2 can be read.

[0046] The specific judgment method is as follows:

[0047] 1. If the common contact KEYA port of the BCD code switch SK1 is disconnected from Q12, and the common contact KEYB port of the DIP switch SW1 is disconnected from Q22, the transistor Q2 does not work, that is, both KEYA and KEYB ports are high level;

[0048] 2. If the common contact KEYA port inside the BCD code switch SK1 is disconnected from Q12, and the common contact KEYB port of the DIP switch SW1 is connected to Q22, the emitter of the PNP transistor Q2 is disconnected, and the PN junction between the collector and the base is forward-conducted, that is, KEYA is high and KEYB is low;

[0049] 3. If the common contact KEYA port inside the BCD code switch SK1 is connected to Q12, and the common contact KEYB port of the DIP switch SW1 is disconnected from Q22, the emitter of the transistor Q2 is turned on and the collector is disconnected, that is, KEYA is low level and KEYB port is high level;

[0050] 4. If the common contact KEYA port inside the BCD code switch SK1 is connected to Q12, and the common contact KEYB port of the dip switch SW1 is connected to Q22, then the emitter of the PNP transistor Q2 is forward biased, and the PN junction between the collector and the base is forward-biased, that is, the KEYA and KEYB ports are both low level.

[0051] Step 4. Write a low level to Port3, write a high level to Port1, Port2, Port4~Port8, and read the status of KEYA~KEYC. Port3 controls the base level of PNP transistor Q3. When writing a low level to Port3, the status of the switch pin connected to the collector and emitter of Q3 transistor can be read.

[0052] The specific judgment method is as follows:

[0053] 1. If the common contact KEYA port of the BCD code switch SK1 is disconnected from Q13, and the common contact KEYB port of the DIP switch SW1 is disconnected from Q23, the transistor Q3 does not work, that is, both KEYA and KEYB ports are high level;

[0054] 2. If the common contact KEYA port inside the BCD code switch SK1 is disconnected from Q13, and the common contact KEYB port of the DIP switch SW1 is connected to Q23, the emitter of the PNP transistor Q3 is disconnected, and the PN junction between the collector and the base is forward-conducted, that is, KEYA is high and KEYB port is low;

[0055] 3. If the common contact KEYA port inside the BCD code switch SK1 is connected to Q13, and the common contact KEYB port of the DIP switch SW1 is disconnected from Q23, the emitter of the transistor Q3 is turned on and the collector is disconnected, that is, KEYA is low level and KEYB port is high level;

[0056] 4. If the common contact KEYA port inside the BCD code switch SK1 is connected to Q13, and the common contact KEYB port of the dial switch SW1 is connected to Q23, then the emitter of the PNP transistor Q3 is forward biased, and the PN junction between the collector and the base is forward-biased, that is, the KEYA and KEYB ports are both low level.

[0057] Step 5. Write a low level to Port4, write a high level to Port1~Port3, Port5~Port8, and read the status of KEYA~KEYC. Port4 controls the base level of PNP transistor Q4. When writing a low level to Port4, the status of the switch pin connected to the collector and emitter of Q4 transistor can be read.

[0058] The specific judgment method is as follows:

[0059] 1. If the common contact KEYA port inside the BCD code switch SK1 is disconnected from Q14, and the common contact KEYB port of the dial switch SW1 is disconnected from Q24, the transistor Q4 does not work, that is, both KEYA and KEYB ports are high level;

[0060] 2. If the common contact KEYA port inside the BCD code switch SK1 is disconnected from Q14, and the common contact KEYB port of the DIP switch SW1 is connected to Q24, the emitter of the PNP transistor Q4 is disconnected, and the PN junction between the collector and the base is forward-conducted, that is, KEYA is high and KEYB port is low;

[0061] 3. If the common contact KEYA port inside the BCD code switch SK1 is connected to Q14, and the common contact KEYB port of the DIP switch SW1 is disconnected from Q24, the emitter of the transistor Q4 is turned on and the collector is disconnected, that is, KEYA is low level and KEYB port is high level;

[0062] 4. If the common contact KEYA port inside the BCD code switch SK1 is connected to Q14, and the common contact KEYB port of the dip switch SW1 is connected to Q24, then the emitter of the PNP transistor Q4 is forward biased, and the PN junction between the collector and the base is forward-biased, that is, the KEYA and KEYB ports are both low level.

[0063] Step 6. Write a low level to Port5, write a high level to Port1~Port4, Port6~Port8, read the status of KEYA~KEYC and save it. Port5 controls the base level of PNP transistor Q5. When writing a low level to Port5, the status of the switch pin connected to the collector and emitter of Q5 transistor can be read.

[0064] The specific judgment method is as follows:

[0065] 1. If the common contact KEYB port of the DIP switch SW1 is disconnected from Q25, and the common contact KEYC port of the key KEY1 is disconnected from Q31, the transistor Q5 does not work, that is, both KEYB and KEYC ports are high level;

[0066] 2. If the common contact KEYB port of the DIP switch SW1 is disconnected from Q25, and the common contact KEYC port of the key KEY1 is connected to Q31, the emitter of the PNP transistor Q5 is disconnected, and the PN junction between the collector and the base is forward-conducted, that is, KEYB is high and KEYC is low;

[0067] 3. If the common contact KEYB of the DIP switch SW1 is connected to Q25, and the common contact KEYC of the key KEY1 is disconnected from Q31, the emitter of the transistor Q5 is turned on and the collector is disconnected, that is, KEYB is low level and KEYC is high level;

[0068] 4. If the common contact KEYB of the DIP switch SW1 is connected to Q25, and the common contact KEYC of the key KEY1 is connected to Q31, the emitter of the PNP transistor Q5 is forward biased, and the PN junction between the collector and the base is forward-biased, that is, the KEYB and KEYC ports are both low.

[0069] Step 7. Write a low level to Port6, write a high level to Port1~Port5, Port7~Port8, and read the status of KEYA~KEYC. Port6 controls the base level of PNP transistor Q6. When writing a low level to Port6, the status of the switch pin connected to the collector and emitter of Q6 transistor can be read.

[0070] The specific judgment method is as follows:

[0071] 1. If the common contact KEYB port of the DIP switch SW1 is disconnected from Q26, and the common contact KEYC port of the key KEY2 is disconnected from Q32, the transistor Q6 does not work, that is, both KEYB and KEYC ports are high level;

[0072] 2. If the common contact KEYB port of the DIP switch SW1 is disconnected from Q26, and the common contact KEYC port of the key KEY2 is connected to Q32, the emitter of the PNP transistor Q6 is disconnected, and the PN junction between the collector and the base is forward-conducted, that is, KEYB is high and KEYC is low;

[0073] 3. If the common contact KEYB of the DIP switch SW1 is connected to Q26, and the common contact KEYC of the key KEY2 is disconnected from Q32, the emitter of the transistor Q6 is turned on and the collector is disconnected, that is, KEYB is low level and KEYC is high level;

[0074] 4. If the common contact KEYB of the DIP switch SW1 is connected to Q26, and the common contact KEYC of the key KEY2 is connected to Q32, the emitter of the PNP transistor Q6 is forward biased, and the PN junction between the collector and the base is forward-biased, that is, the KEYB and KEYC ports are both low level.

[0075] Step 8. Write a low level to Port7, write a high level to Port1~Port6 and Port8, and read the status of KEYA~KEYC. Port7 controls the base level of PNP transistor Q7. When writing a low level to Port7, the status of the switch pin connected to the collector and emitter of Q7 can be read.

[0076] The specific judgment method is as follows:

[0077] 1. If the common contact KEYB port of the DIP switch SW1 is disconnected from Q27, and the common contact KEYC port of the key KEY3 is disconnected from Q33, the transistor Q7 does not work, that is, both KEYB and KEYC ports are high level;

[0078] 2. If the common contact KEYB port of the DIP switch SW1 is disconnected from Q27, and the common contact KEYC port of the key KEY3 is connected to Q33, the emitter of the PNP transistor Q7 is disconnected, and the PN junction between the collector and the base is forward-conducted, that is, KEYB is high and KEYC is low;

[0079] 3. If the common contact KEYB of the DIP switch SW1 is connected to Q27, and the common contact KEYC of the key KEY3 is disconnected from Q33, the emitter of the transistor Q7 is turned on and the collector is disconnected, that is, KEYB is low level and KEYC is high level;

[0080] 4. If the common contact KEYB of the DIP switch SW1 is connected to Q27, and the common contact KEYC of the key KEY3 is connected to Q33, the emitter of the PNP transistor Q7 is forward biased, and the PN junction between the collector and the base is forward-biased, that is, the KEYB and KEYC ports are both low.

[0081] Step 9. Write a low level to Port8, write a high level to Port1~Port7, and read the status of KEYA~KEYC. Port8 controls the base level of PNP transistor Q8. When writing a low level to Port8, the status of the switch pin connected to the collector and emitter of Q8 can be read.

[0082] The specific judgment method is as follows:

[0083] 1. If the common contact KEYB port of the DIP switch SW1 is disconnected from Q28, and the common contact KEYC port of the key KEY4 is disconnected from Q34, the transistor Q8 does not work, that is, both KEYB and KEYC ports are high level;

[0084] 2. If the common contact KEYB port of the DIP switch SW1 is disconnected from Q28, and the common contact KEYC port of the key KEY4 is connected to Q34, the emitter of the PNP transistor Q8 is disconnected, and the PN junction between the collector and the base is forward-conducted, that is, KEYB is high and KEYC is low;

[0085] 3. If the common contact KEYB of the DIP switch SW1 is connected to Q28, and the common contact KEYC of the key KEY4 is disconnected from Q34, the emitter of the transistor Q8 is turned on and the collector is disconnected, that is, KEYB is low level and KEYC is high level;

[0086] 4. If the common contact KEYB of the DIP switch SW1 is connected to Q28, and the common contact KEYC of the key KEY4 is connected to Q34, the emitter of the PNP transistor Q8 is forward biased, and the PN junction between the collector and the base is forward-biased, that is, the KEYB and KEYC ports are both low.

[0087] Switch SW1 common contact (KEYB port) and Figure 1 The on / off status of "Q28" and the key KEY4 (KEYC port) Figure 1 The first round of switch status determination and reading has been completed. Return to step 2) to continue the next round of switch status determination.

[0088] The above are only specific application examples of the present invention and do not constitute any limitation on the scope of protection of the present invention. Any technical solutions formed by equivalent transformation or equivalent replacement shall fall within the scope of protection of the present invention.

Claims

1. A circuit for expanding an IO port of a single-chip microcomputer, characterized in that: It includes an MCU circuit, multiple switching elements, multiple PNP transistors corresponding to the switching elements, and multiple filter capacitors. The MCU circuit includes a microcontroller chip IC1. The microcontroller chip is connected to one end of each switching element. The other end of the switching element is connected to each transistor. The transistor is connected to the I / O port of the microcontroller chip. The state of the switching element is uncertain due to external operation. The PNP transistor is used to expand the I / O port of the single-chip microcomputer. The switch state is determined by controlling the base voltage of the PNP transistor. The switch elements include a BCD code switch SK1, a dial switch SW1 and buttons KEY1 to KEY4, and PNP transistors Q1 to Q8 and filter capacitors C1 to C12 are provided corresponding to each switch element; The internal common contact of the BCD code switch SK1: the KEYA port is connected to the filter capacitor C1, the filter capacitor C1 is grounded, and the four pins of the BCD code switch are Q11, Q12, Q13 and Q14 respectively; the internal common contact of the dip switch SW1: the KEYB port is connected to the filter capacitor C2, the filter capacitor C3 is grounded, and the 8-bit switches of the dip switch SW1 are Q21, Q22, Q23, Q24, Q25, Q26, Q27 and Q28 respectively; one end of the keys KEY1~KEY4 connected to the MCU circuit is a common contact: the KEYC port is connected to the filter capacitor C12, the filter capacitor C12 is grounded, and the other ends of the keys KEY1~KEY4 are Q31~Q34 respectively; The emitter of the PNP transistor Q1 is connected to the Q11 terminal of the BCD code switch SK1, the collector is connected to the Q21 terminal of the dial switch SW1, the base is connected to the Port1 port, and the filter capacitor C3 is connected through the Port1 port; the emitter of the PNP transistor Q2 is connected to the Q12 terminal of the BCD code switch SK1, the collector is connected to the Q22 terminal of the dial switch SW1, the base is connected to the Port2 port, and the filter capacitor C4 is connected through the Port2 port; the emitter of the PNP transistor Q3 is connected to the Q13 terminal of the BCD code switch SK1, the collector is connected to the Q23 terminal of the dial switch SW1, the base is connected to the Port3 port, and the filter capacitor C5 is connected through the Port3 port; the emitter of the PNP transistor Q4 is connected to the Q14 terminal of the BCD code switch SK1, the collector is connected to the Q24 terminal of the dial switch SW1, the base is connected to the Port4 port, and the filter capacitor C5 is connected through the Port4 port Capacitor C6; the emitter of the PNP transistor Q5 is connected to the Q25 end of the dial switch SW1, the collector is connected to the Q31 end of the key KEY1, the base is connected to the Port5 port, and the filter capacitor C8 is connected through the Port5 port; the emitter of the PNP transistor Q6 is connected to the Q26 end of the dial switch SW1, the collector is connected to the Q32 end of the key KEY2, the base is connected to the Port6 port, and the filter capacitor C9 is connected through the Port6 port; the emitter of the PNP transistor Q7 is connected to the Q27 end of the dial switch SW1, the collector is connected to the Q33 end of the key KEY3, the base is connected to the Port7 port, and the filter capacitor C10 is connected through the Port7 port; the emitter of the PNP transistor Q8 is connected to the Q28 end of the dial switch SW1, the collector is connected to the Q34 end of the key KEY4, the base is connected to the Port8 port, and the filter capacitor C11 is connected through the Port8 port.

2. The expansion circuit for an IO port of a single-chip microcomputer according to claim 1, wherein: The MCU circuit includes a microcontroller chip IC1, capacitors C16 and C17, and a crystal oscillator AXTL1. The capacitors C16 and C17 are connected in parallel and in series with the crystal oscillator AXTL1, and then connected to the microcontroller chip IC1, providing a basic clock signal for the microcontroller chip IC1.

3. The expansion circuit for an IO port of a single-chip microcomputer according to claim 1, wherein: The MCU circuit further includes capacitors C13, C14 and C15, which are connected in parallel to filter the power supply and input signals of the microcontroller chip IC1.

4. The expansion circuit for an IO port of a single-chip microcomputer according to claim 1, characterized in that: The MCU circuit also includes capacitor C20, capacitor C21, resistor R1 and resistor R2. Capacitor C20 and capacitor C21 are connected in parallel and then in series with resistor R2, and are connected to the microcontroller chip IC1. The microcontroller chip IC1 is also connected to resistor R1. Resistors R1 and R2 act as pull-up.

5. A method for expanding an expansion circuit of a single-chip microcomputer IO port according to claim 1, characterized in that: Includes the following: Step 1: Configure the I / O ports of the microcontroller KEYA~KEYC as pull-up inputs, that is, the KEYA~KEYC ports are high level, and configure the Port1~Port8 ports as push-pull outputs; Step 2: Write a low level to Port1, write a high level to Port2~Port8, and read the status of KEYA~KEYC. Port1 controls the base level of PNP transistor Q1. When writing a low level to Port1, the status of the switch pin connected to the collector and emitter of Q1 can be read. Step 3. Write a low level to Port2, write a high level to Port1, Port3 to Port8, and read the status of KEYA to KEYC. Port2 controls the base level of PNP transistor Q2. When writing a low level to Port2, the status of the switch pin connected to the collector and emitter of Q2 can be read. Step 4. Write a low level to Port3, write a high level to Port1, Port2, Port4~Port8, and read the status of KEYA~KEYC. Port3 controls the base level of PNP transistor Q3. When writing a low level to Port3, the status of the switch pin connected to the collector and emitter of Q3 transistor can be read. Step 5. Write a low level to Port4, write a high level to Port1~Port3, Port5~Port8, and read the status of KEYA~KEYC. Port4 controls the base level of PNP transistor Q4. When writing a low level to Port4, the status of the switch pin connected to the collector and emitter of Q4 transistor can be read. Step 6. Write a low level to Port5, write a high level to Port1~Port4, Port6~Port8, read the status of KEYA~KEYC and save it. Port5 controls the base level of PNP transistor Q5. When writing a low level to Port5, the status of the switch pin connected to the collector and emitter of Q5 transistor can be read. Step 7. Write a low level to Port6, write a high level to Port1~Port5, Port7~Port8, and read the status of KEYA~KEYC. Port6 controls the base level of PNP transistor Q6. When writing a low level to Port6, the status of the switch pin connected to the collector and emitter of Q6 transistor can be read. Step 8. Write a low level to Port7, write a high level to Port1~Port6 and Port8, and read the status of KEYA~KEYC. Port7 controls the base level of PNP transistor Q7. When writing a low level to Port7, the status of the switch pin connected to the collector and emitter of Q7 can be read. Step 9. Write a low level to Port8, write a high level to Port1~Port7, and read the status of KEYA~KEYC. Port8 controls the base level of PNP transistor Q8. When a low level is written to Port8, the status of the switch pin connected to the collector and emitter of Q8 transistor can be read.

6. The method for expanding an expansion circuit of an IO port of a single-chip microcomputer according to claim 5, characterized in that: The judgment method for steps 2 to 9 is to write a low level to Port "n" and a high level to the other Ports, and read the status of the switch pin connected to the collector and emitter of the Q"n" transistor; if the emitter of the Q"n" transistor is disconnected from the internal common contact of the corresponding switch element, the common contact port is high level, otherwise it is connected and the common contact port is low level; similarly, if the collector of the Q"n" transistor is disconnected from the internal common contact of the corresponding switch element, the common contact port is high level, otherwise it is connected and the common contact port is low level.

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