A BIOS FW and DPS FW linkage update method, system, device, and medium

Abstract

The present application discloses a BIOS FW and DPS FW linkage update method, system, device, and medium, which are applied to the server field. The BIOS FW and DPS FW linkage update method provided by the present application is applied to a server, and the server is connected to an external controller. The bin files of the BIOS FW and DPS FW with the same best configuration (BKC) are packaged to ensure that the configurations of the BIOS FW and DPS FW are consistent. By keeping only one dual in-line memory module (DIMM) slot powered on before updating the BIOS FW, the memory training time is shortened, thereby shortening the cold restart time. Accurate and rapid updating of the BIOS FW and DPS FW is achieved. The beneficial effects of the BIOS FW and DPS FW linkage update system, device, and medium provided by the present application are the same as above.

Description

Technical Field

[0001] The present application relates to the server field, and in particular to a BIOS FW and DPS FW linkage update method, system, device, and medium. Background Art

[0002] A server is a type of computer that runs faster, has a higher load, and is more expensive than an ordinary computer. It provides computing or application services to other clients in the network, such as personal computers (PCs), smart phones, terminals such as automatic teller machines (ATMs), and even large devices such as train systems. The basic input and output system (BIOS) and non-volatile memory (DPS) are both indispensable parts of a server.

[0003] Both BIOS and DPS contain firmware (FW), which needs to be constantly updated in the server system. The configuration of the two needs to be consistent and a cold restart is required when updating. If the configuration of the two FWs is inconsistent, the DPS cannot be used normally, or even the entire server system crashes. In addition, since the memory needs to be trained during a cold restart, a cold restart usually takes a long time.

[0004] Currently, the BIOS FW and DPS FW are usually updated manually, which is prone to confusion, such as manually downloading inconsistent BIOS FW and DPS FW. In addition, since the memory needs to be trained during a cold restart, it takes a lot of time to update the BIOS FW and DPS FW.

[0005] Therefore, how to accurately and quickly update the BIOS FW and the DPS FW is a problem that needs to be solved urgently by those skilled in the art. Summary of the invention

[0006] The purpose of the present application is to provide a BIOS FW and DPS FW linkage update method, system, device, and medium to solve the problem of accurately and quickly updating the BIOS FW and DPS FW.

[0007] In order to solve the above technical problems, the present application provides a BIOS FW and DPS FW linkage update method, which is applied to a server, and the server is connected to an external controller. The method includes:

[0008] The bin files of BIOS FW and DPS FW with the same BKC are packaged as the first file and sent to the external controller;

[0009] Parsing the first file and storing it into a second file corresponding to the updateable BIOS FW and a third file corresponding to the DPS FW through an external controller;

[0010] Send the second file to the BIOS chip through an external controller and read the status of the BIOS FW. In response to the activation signal sent by the BIOS FW, trigger the electronic switch to retain the power supply of one DIMM slot and turn off the power supply of other DIMM slots, control the server to cold restart and perform DIMM training to complete the update of the BIOS FW;

[0011] Control the external controller to send the third file to the BIOS chip, trigger the electronic switch to turn on the power supply of all DIMM slots, control the server to cold restart and perform DIMM training to complete the update of the DPS FW.

[0012] Preferably, the external controller is composed of an STM32 series single-chip microcomputer;

[0013] Parsing and storing the first file as the second file corresponding to the updatable BIOS FW and the third file corresponding to the DPS FW through an external controller includes:

[0014] Parse the first file into the second file corresponding to the updatable BIOS FW and the third file corresponding to the DPS FW through the STM32 system and store them in the Flash.

[0015] Preferably, sending the second file to the BIOS chip through an external controller and reading the status of the BIOS FW, in response to the activation signal sent by the BIOS FW, triggering the electronic switch to retain the power supply of one DIMM slot and turn off the power supply of other DIMM slots, controlling the server to cold restart and performing DIMM training to complete the update of the BIOS FW includes:

[0016] Control the STM32 system to send the second file to the BIOS chip;

[0017] Read the BIOS FW status through the STM32 system;

[0018] In response to the activation signal sent by the BIOS FW, trigger the electronic switch, retain the power supply of one DIMM slot and turn off the power supply of other DIMM slots;

[0019] Send the cold restart signal to the BMC through the STM32 system;

[0020] Control the server to cold restart by powering on and off the server through the BMC;

[0021] Perform DIMM training to complete the update of the BIOS FW.

[0022] Preferably, it further includes:

[0023] Monitor the BMC behavior through the STM32 system;

[0024] If the BMC behavior is abnormal, control the power on and off of the server through the STM32 system to perform a cold restart of the server.

[0025] Preferably, packing the bin files of BIOS FW and DPS FW with the same BKC into a first file and sending it to an external controller includes:

[0026] Judge whether the BKC of BIOS FW and DPS FW is the same in the Linux OS;

[0027] If they are the same, pack the bin files of BIOS FW and DPS FW into a first file and send it to the external controller.

[0028] Preferably, the steps for obtaining the bin files of BIOS FW and DPS FW are as follows:

[0029] Download DPS FW and the BIOS source code embedded with Intel RC respectively;

[0030] Compile DPS FW and the BIOS source code into bin files respectively.

[0031] Preferably, after controlling the external controller to send a third file to the BIOS chip, turning on the power supply of all DIMM slots, controlling the server to perform a cold restart and performing DIMM training to complete the update of DPS FW, it further includes:

[0032] Execute DIMM training again to check the correspondence between BIOS FW and DPS FW;

[0033] If they correspond, display the version through the post interface;

[0034] If they do not correspond, give a warning prompt.

[0035] To solve the above technical problems, the present application also provides a BIOS FW and DPS FW linkage update system, which is applied to a server. The server is connected to an external controller. The system includes:

[0036] A packing module, which is used to pack the bin files of BIOS FW and DPS FW with the same BKC into a first file and send it to the external controller;

[0037] A parsing module, which is used to parse the first file through the external controller and store it as a second file corresponding to the updatable BIOS FW and a third file corresponding to DPS FW;

[0038] The first update module is used to send the second file to the BIOS chip through an external controller and read the status of the BIOS FW. In response to the activation signal sent by the BIOS FW, it triggers the electronic switch to retain the power supply of one DIMM slot, turn off the power supplies of other DIMM slots, control the server to perform a cold restart and execute DIMM training to complete the update of the BIOS FW.

[0039] The second update module is used to control the external controller to send the third file to the BIOS chip, trigger the electronic switch to turn on the power supplies of all DIMM slots, control the server to perform a cold restart and execute DIMM training to complete the update of the DPS FW.

[0040] To solve the above technical problems, the present application also provides a BIOS FW and DPS FW linkage update device, including a memory for storing computer programs.

[0041] A processor for implementing the steps of the BIOS FW and DPS FW linkage update method when executing the computer program.

[0042] To solve the above technical problems, the present application also provides a computer-readable storage medium with a computer program stored thereon. When the computer program is executed by the processor, it implements the steps of the BIOS FW and DPS FW linkage update method.

[0043] The BIOS FW and DPS FW linkage update method provided by the present application is applied to a server. The server is connected to an external controller. By packaging the bin files of the BIOS FW and DPS FW with the same best configuration (BKC), it ensures the consistency of the configurations of the BIOS FW and DPS FW, solves the problem that it is easy to make mistakes during manual updates of the BIOS FW and DPS FW, and avoids the abnormal use of DPS and the downtime of the entire server system caused by inconsistent configurations of the BIOS FW and DPS FW. By only retaining the power supply of one dual in-line memory module (DIMM) slot before updating the BIOS FW, it shortens the time of DIMM training, thereby shortening the cold restart time. Thus, it realizes the accurate and rapid update of the BIOS FW and DPS FW. Continuing to update the DPS FW after completing the update of the BIOS FW realizes the linkage update of the BIOS FW and DPS FW.

[0044] The beneficial effects of the BIOS FW and DPS FW linkage update system, device, and medium provided by the present application are the same as above. Brief Description of the Drawings

[0045] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0046] Figure 1 A flowchart of a BIOS FW and DPS FW linkage update method provided in an embodiment of the present application;

[0047] Figure 2 A flowchart of bin file packaging of BIOS FW and DPS FW provided in the application embodiment;

[0048] Figure 3 A flowchart of a BIOS FW and DPS FW joint update and verification provided by an embodiment of the present application;

[0049] Figure 4 A schematic diagram of a BIOS FW and DPS FW linkage update system provided in an embodiment of the present application;

[0050] Figure 5 This is a structural diagram of the BIOS FW and DPS FW linkage update device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0051] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0052] The core of this application is to provide a BIOS FW and DPS FW linkage update method, system, device, and medium to solve the problem of how to accurately and quickly update the BIOS FW and DPS FW.

[0053] BIOS is a set of programs fixed to a read-only memory (ROM) chip on the motherboard of the computer. It stores the most important basic input and output programs of the computer, the self-test program after power-on, and the system self-starting program. It can read and write specific information of system settings from CMOS. The main function is to provide the lowest-level and most direct hardware settings and control for the computer. BIOS also provides some system parameters to the operating system. Changes in system hardware are hidden by BIOS, and programs use BIOS functions instead of directly controlling hardware. The BIOS setup program is stored in the BIOS chip, which is a rectangular or square chip on the motherboard and can only be set when the computer is powered on.

[0054] As the fourth generation of Intel's non-volatile memory, DPS is a cache device built based on 3DXpoint storage media that can accelerate mechanical hard drives. It is compatible with the non-volatile memory (NVM e) storage protocol and consists of 3DXPoint memory media, Intel memory and storage controllers, Intel interconnect IP and Intel software. It can not only provide higher performance and responsiveness for traditional mechanical hard drives, but also make low-cost, high-capacity and high-speed storage possible. Its interface has been changed to E1.S, and the speed has been increased to 32GB / S. It is characterized by large capacity, fast speed and support for persistent data. DPS has 3 modes: memory mode, hard disk mode and hybrid mode.

[0055] BIOS and DPS are both indispensable parts of the server, and their FWs need to be constantly updated. This application keeps the FWs of the two in the same configuration while reducing the cold restart time during the update, solving the problem of how to accurately and quickly update the BIOS FW and DPS FW.

[0056] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0057] The BIOS FW and DPS FW linkage update method provided in the embodiment of the present application is applied to a server, and the server is connected to an external controller. A server is a type of computer, which runs faster, has a higher load, and is more expensive than an ordinary computer. The external controller is usually connected to the motherboard of the server or to other interfaces of the server. Figure 1 As shown, Figure 1 A flowchart of a BIOS FW and DPS FW linkage update method provided in an embodiment of the present application, the method comprising:

[0058] S10: Pack the bin files of the BIOS FW and DPS FW with the same BKC into a first file and send it to the external controller.

[0059] In practical applications, before packing the binary (bin) files of BIOS FW and DPS FW with the same BKC into the first file, it is necessary to obtain the bin file of BIOS FW and the bin file of DPS FW first. Generally, the methods for obtaining the bin file of BIOS FW and the bin file of DPS FW are as follows: Download the DPS FW and the BIOS source code embedded with Intel RC and compile them into bin files. Query the BKC to ensure that the DPS FW and the BIOS source code are of the same matching version to avoid server failures caused by inconsistent versions. In the Linux OS, judge whether the BKC of the BIOS FW and the DPS FW is the same through the packing code. If they are the same, pack the two bin files into one bin file; if they are different, abandon the packing. Send the packed first file to the external controller.

[0060] S11: Parse and store the first file as the second file corresponding to the updatable BIOS FW and the third file corresponding to the DPS FW through the external controller.

[0061] Specifically, parse the first file received through the external controller to obtain the bin file corresponding to the BIOS FW and the bin file corresponding to the DPS FW, that is, the second file and the third file. The second file and the third file are updatable and are stored in the external controller.

[0062] In addition, the external controller usually selects the STM32 series of single-chip microcomputers, and this chip supports SPI and extended Flash. The Serial Peripheral Interface (SPI) is a high-speed, full-duplex, synchronous communication bus and is widely used in the communication processes of analog-to-digital converters (ADCs), liquid crystal displays (LCDs), etc. with microcontroller units (MCUs), and its characteristic is speed. The Flash memory, also known as flash memory, combines the advantages of read-only memory (ROM) and random access memory (RAM). It not only has the performance of electronically erasable programmable (EEPROM) but also the advantage of being able to quickly read data (NVRAM), so that the data will not be lost due to power failure. Therefore, when using the STM32 series of single-chip microcomputers as the external controller, the second file and the third file are usually stored in the Flash.

[0063] S12: Send the second file to the BIOS chip through the external controller and read the status of the BIOS FW. In response to the pending activation signal sent by the BIOS FW, trigger the electronic switch to retain the power supply of one DIMM slot, turn off the power supply of other DIMM slots, control the server to perform a cold restart and execute DIMM training to complete the update of the BIOS FW.

[0064] Interact with the BIOS chip through an external controller, transfer the second file corresponding to the BIOS FW to the BIOS chip, then read the status of the BIOS FW. When the BIOS FW issues a signal to be activated, trigger the electronic switch to only supply power to one DIMM slot, such as CPU0DIMM0, and cut off the power supply to other DIMM slots. Control the server to perform a cold restart, usually power on and off the entire server system through the Baseboard Management Controller (BMC). Since only one DIMM slot is powered on before the server system restarts, after activating the BIOS FW, only one DIMM needs to be trained, thus saving the cold restart time. For example, generally, a single CPU can be fully equipped with 16 memory modules. Training 16 memory modules takes a lot of time, while using the method in the embodiment of the present application, only one memory module needs to be trained, saving a lot of time. When restarting, perform DIMM training, and the update of the BIOS FW takes effect during cold start, and the update of the BIOS FW is completed.

[0065] S13: Control the external controller to send the third file to the BIOS chip, trigger the electronic switch to turn on the power supply of all DIMM slots, control the server to perform a cold restart and execute DIMM training to complete the update of the DPS FW.

[0066] After the update of the BIOS FW is completed, the external controller transfers the third file corresponding to the DPS FW to the BIOS chip, triggers the electronic switch to turn on the power supply of all DIMM slots, the server system performs a cold restart and executes DIMM training, and the update of the DPS FW takes effect. During the cold restart process, the BIOS will update the DPS FW, and its implementation process is realized by internal microcode. The embodiment of the present application only describes the joint update mechanism of the BIOS FW and the DPS FW.

[0067] It should be noted that the embodiment of the present application does not limit the specific device of the external controller. The above STM32 series single-chip microcomputers are only taken as a preference. In addition, to further ensure the consistency of the BIOS FW and DPS FW configurations, verification can be performed again. The specific verification method will be described in detail in the following embodiments and will not be elaborated here. It should also be noted that the embodiment of the present application can also be designed as an automated processing tool, thereby saving time and labor costs. The specific design process will not be elaborated here.

[0068] The BIOS FW and DPS FW linkage update method provided by the embodiments of the present application is applied to a server. The server is connected to an external controller. By packaging the bin files of the BIOS FW and DPS FW with the same BKC, the configuration consistency of the BIOS FW and DPS FW is ensured, solving the problem that manual update of the BIOS FW and DPS FW is prone to confusion, and avoiding the abnormal use of DPS and the downtime of the entire server system caused by the inconsistent configuration of the BIOS FW and DPS FW. By keeping only one DIMM slot powered on before updating the BIOS FW, the time of DIMM training is shortened, thereby shortening the cold restart time. Accurate and rapid update of the BIOS FW and DPS FW is achieved. After completing the update of the BIOS FW, the DPS FW is continued to be updated to achieve the linkage update of the BIOS FW and DPS FW.

[0069] As a preferred embodiment of the embodiments of the present application, the external controller is composed of STM32 series single-chip microcomputers.

[0070] Parsing and storing the first file as the second file corresponding to the updatable BIOS FW and the third file corresponding to the DPS FW by the external controller includes:

[0071] Parsing the first file into the second file corresponding to the updatable BIOS FW and the third file corresponding to the DPS FW by the STM32 system and storing them in Flash.

[0072] Since the STM32 series single-chip microcomputers support SPI and extended Flash, the external controller in the embodiments of the present application is limited to be composed of STM32 series single-chip microcomputers. The Serial Peripheral Interface (SPI) is a high-speed, full-duplex, synchronous communication bus, which is widely used in the communication processes of analog-to-digital converters (ADCs), liquid crystal displays (LCDs), etc. with microcontroller units (MCUs), and its characteristic is fast. The Flash memory, also known as flash memory, combines the advantages of read-only memory (ROM) and random access memory (RAM). It not only has the performance of electronically erasable programmable (EEPROM), but also has the advantage of quickly reading data (NVRAM), so that the data will not be lost due to power failure.

[0073] The embodiments of the present application limit the external controller to be composed of STM32 series single-chip microcomputers. The STM32 chips support SPI and extended Flash, and can efficiently complete the tasks of parsing and storing bin files by the external controller.

[0074] As a preferred embodiment of the present application, an external controller is used to send a second file to the BIOS chip and read the status of the BIOS FW. In response to the activation signal sent by the BIOS FW, an electronic switch is triggered to retain the power supply for one DIMM slot and turn off the power supply for other DIMM slots. The server is controlled to perform a cold restart and DIMM training is executed to complete the update of the BIOS FW, including:

[0075] Control the STM32 system to send the second file to the BIOS chip;

[0076] Read the BIOS FW status through the STM32 system;

[0077] In response to the activation signal sent by the BIOS FW, trigger the electronic switch, retain the power supply for one DIMM slot, and turn off the power supply for other DIMM slots;

[0078] Send a cold restart signal to the BMC through the STM32 system;

[0079] Control the power on and off of the server through the BMC to perform a cold restart of the server;

[0080] Execute DIMM training to complete the update of the BIOS FW.

[0081] Specifically, since the update characteristics of the BIOS FW and the DPS FW both require a cold restart, and the BIOS FW can only take effect after a cold restart after the update. To improve the cold restart speed, the present application embodiment shortens the training time of the DIMM. The STM32 system interacts with the BIOS chip. After the STM single-chip microcomputer transfers the bin to the BIOS chip, the STM32 single-chip microcomputer reads the current BIOS FW status. After the BIOS FW sends an activation signal, the electronic switch is triggered to only retain the power supply for one DIMM slot and turn off the power supply for other slots. The cold restart signal is transmitted to the baseboard management controller (BMC) through the STM32 minimum system. The BMC is mainly used to upgrade the firmware of the machine and view the machine equipment when the machine is not powered on. In the present application embodiment, it is mainly used to control the power on and off of the server. The BMC controls the power on and off of the entire server system to perform a cold restart of the server and execute DIMM training to complete the update of the BIOS FW.

[0082] It should be noted that the specific model of the STM32 in the present application embodiment is not limited, as long as it can meet the above functional requirements. In addition, the electronic switch in the present application embodiment can realize the power supply control of the DIMM slot, and the specific device model is not limited. It should also be noted that the number of memories is not limited. Regardless of the number of memory sticks, only the power supply for one DIMM slot is retained before the cold restart.

[0083] The embodiment of the present application makes specific limitations on controlling the cold restart of the server on the basis of the external controller being composed of the STM32 series single chip. By powering on and off the server through the BMC and controlling the cold restart of the server, the entire process of linking the BIOS FW and the DPS FW can be automated, thereby saving time and labor costs.

[0084] As a preferred embodiment, the present application also includes:

[0085] Monitor BMC behavior through the STM32 system;

[0086] If the BMC behaves abnormally, the STM32 system will power on and off the server to perform a cold restart.

[0087] Specifically, the cold restart signal is transmitted to the BMC through the STM32 minimum system, and the BMC powers on and off the server system to control the cold restart of the server. However, the BMC is not completely reliable, so the STM32 single-chip microcomputer minimum system is required to monitor the BMC. If the BMC has abnormal behavior in controlling the power on and off of the server, such as powering off without receiving the cold restart signal, or still powering on after receiving the cold restart signal, which is inconsistent with the instruction transmitted by the STM32, the STM32 single-chip microcomputer minimum system is used as a redundant device for controlling the cold restart of the server, and powers on and off the server instead of the BMC to control the cold restart of the server, without affecting the update of the BIOS FW and the DPS FW.

[0088] In the embodiment of the present application, it is defined that the power-on and power-off behaviors of the BMC are monitored by the STM32 system. When the abnormal behavior of the BMC affects the update of the BIOS FW and the DPS FW, the STM32 is used as a redundant device to control the cold restart, thereby ensuring the update of the BIOS FW and the DPS FW, and improving the security and reliability of the server performing a cold restart.

[0089] As a preferred embodiment, the embodiment of the present application packages the bin files of the BIOS FW and the DPS FW with the same BKC into a first file and sends it to the external controller, including:

[0090] In Linux OS, determine whether the BKC of BIOS FW and DPS FW are the same;

[0091] If they are the same, the bin files of BIOS FW and DPS FW are packaged into the first file and sent to the external controller.

[0092] Query the BKC to ensure that the DPS FW and BIOS source codes are of the same matching version, and avoid server failures caused by inconsistent versions. In the Linux OS, judge whether the BKC of the BIOS FW and DPS FW is the same by packaging the code. If they are the same, package the two bin files into one bin file; if not, abandon the packaging. Send the first packaged file to the external controller for parsing into the second file corresponding to the updatable BIOS FW and the third file corresponding to the DPS FW.

[0093] In practical applications, usually package the second file and the third file into one bin file named bin3, name the bin file corresponding to the internal BIOS source code as bin1, and name the bin file corresponding to the internal DPS FW as bin2. As Figure 2 shown, Figure 2 FIG. is a flowchart of packaging bin files of a BIOS FW and a DPS FW provided by an application embodiment.

[0094] The application embodiment judges whether the configurations of the BIOS FW and DPS FW are consistent by judging whether the BKC is the same in the Linux OS, and packages the bin files of the BIOS FW and DPS FW with consistent configurations. It solves the problem that it is easy to make mistakes when manually updating the BIOS FW and DPS FW, and avoids the DPS from being unable to be used normally or the entire server system crashing due to inconsistent configurations of the BIOS FW and DPS FW.

[0095] As a preferred embodiment of the application, the steps for obtaining the bin files of the BIOS FW and DPS FW are as follows:

[0096] Download the DPS FW and the BIOS source code embedded with Intel RC respectively;

[0097] Compile the DPS FW and the BIOS source code into bin files respectively.

[0098] Before packaging the bin files of the BIOS FW and DPS FW with the same BKC into the first file, it is necessary to first obtain the bin file of the BIOS FW and the bin file of the DPS FW. The methods for obtaining the bin file of the BIOS FW and the bin file of the DPS FW are as follows: Download the DPS FW and the BIOS source code embedded with Intel RC and compile the DPS FW and the BIOS source code into bin files respectively. The bin file corresponding to the BIOS source code is the second file, and the bin file corresponding to the DPS FW is the third file. This is to prepare for packaging the bin files of the BIOS FW and DPS FW with the same BKC into the first file later.

[0099] The embodiments of the present application give specific limitations on the acquisition of the bin files of the BIOS FW and the DPS FW. Compiling the bin files of the BIOS FW and the DPS FW separately can facilitate subsequent packaging and parsing.

[0100] As a preferred embodiment, after the embodiments of the present application control the external controller to send the third file to the BIOS chip, turn on the power supply of all DIMM slots, control the server to cold restart and perform DIMM training to complete the update of the DPS FW, it further includes:

[0101] Perform DIMM training again to check the correspondence between the BIOS FW and the DPS FW;

[0102] If they correspond, display the version through the post interface;

[0103] If they do not correspond, give a warning prompt.

[0104] Since the BIOS FW and the DPS FW must maintain the same configuration, if the BIOS FW and the DPS FW are not in one-to-one correspondence, in the lightest case, the DPS cannot be used normally, and in the worst case, the entire server system will crash. In order to further determine whether the configurations of the BIOS FW and the DPS FW are the same, after the BIOS FW and the DPS FW are updated, perform DIMM training again to determine whether the BIOS FW and the DPS FW are in one-to-one correspondence. If they correspond, display the version information of the BIOS FW and the DPS FW through the post interface. If they do not correspond, give a warning prompt. As Figure 3 shown, Figure 3 It is a flowchart of the combined update and verification of the BIOS FW and the DPS FW provided by the embodiments of the present application.

[0105] It should be noted that the embodiments of the present application do not limit the specific form and content of the warning prompt. The information that the versions are not the same can be prompted through the post interface, or the operator can be prompted through a buzzer, an indicator light, etc. to correct the problem in time to avoid further losses.

[0106] After the combined update of the BIOS FW and the DPS FW, the embodiments of the present application detect again whether the configurations of the BIOS FW and the DPS FW correspond, display the corresponding ones through the post interface, and give a warning prompt for the non-corresponding ones, timely reminding the operator to handle them, further ensuring the reliability of the update of the BIOS FW and the DPS FW, and avoiding more losses caused by inconsistent versions after the update of the BIOS FW and the DPS FW.

[0107] In the above embodiments, the method for the associated update of BIOS FW and DPS FW has been described in detail. The present application also provides corresponding embodiments of the apparatus for the associated update of BIOS FW and DPS FW. It should be noted that the embodiments of the apparatus part of the present application are described from two perspectives. One is from the perspective of functional modules, and the other is from the perspective of hardware.

[0108] From the perspective of functional modules, as a preferred embodiment of the present application, as Figure 4 , Figure 4 is a schematic diagram of the system for the associated update of BIOS FW and DPS FW provided by the embodiments of the present application. The system for the associated update of BIOS FW and DPS FW provided by the embodiments of the present application is applied to a server, and the server is connected to an external controller. The system includes:

[0109] A packaging module, configured to package the bin files of BIOS FW and DPS FW with the same BKC into a first file and send it to the external controller;

[0110] An analysis module, configured to parse and store the first file as a second file corresponding to the updatable BIOS FW and a third file corresponding to the DPS FW through the external controller;

[0111] A first update module, configured to send the second file to the BIOS chip through the external controller and read the status of the BIOS FW. In response to the pending activation signal sent by the BIOS FW, trigger an electronic switch to retain the power supply of one DIMM slot, turn off the power supply of other DIMM slots, control the server to perform a cold restart and execute DIMM training to complete the update of the BIOS FW;

[0112] A second update module, configured to control the external controller to send the third file to the BIOS chip, trigger the electronic switch to turn on the power supply of all DIMM slots, control the server to perform a cold restart and execute DIMM training to complete the update of the DPS FW.

[0113] Since the embodiments of the system part correspond to the embodiments of the method part, for the embodiments of the system part, please refer to the description of the embodiments of the method part, which will not be elaborated here.

[0114] From the perspective of hardware, as a preferred embodiment of the present application, as Figure 5 shown, Figure 5 is a structural diagram of the apparatus for the associated update of BIOS FW and DPS FW provided by the embodiments of the present application. The apparatus for the associated update of BIOS FW and DPS FW provided by the embodiments of the present application includes: a memory 20, configured to store a computer program;

[0115] The processor 21 is used to implement the steps of the method for linking updating of BIOS FW and DPSFW mentioned in the above embodiment when executing a computer program.

[0116] The BIOS FW and DPS FW linkage update device provided in this embodiment may include but is not limited to a smart phone, a tablet computer, a laptop computer, or a desktop computer.

[0117] Among them, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 21 can be implemented in at least one hardware form of a digital signal processor (DSP), a field-programmable gate array (FPGA), and a programmable logic array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 21 may be integrated with a graphics processing unit (GPU), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 21 may also include an artificial intelligence (AI) processor, which is used to process computing operations related to machine learning.

[0118] The memory 20 may include one or more computer-readable storage media, which may be non-transitory. The memory 20 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 20 is at least used to store the following computer program 201, wherein, after the computer program is loaded and executed by the processor 21, it can implement the relevant steps of the BIOS FW and DPS FW linkage update method disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 202 may include Windows, Unix, Linux, etc. Data 203 may include but is not limited to bin files of BIOS FW and DPS FW, etc.

[0119] In some embodiments, the BIOS FW and DPS FW linkage update device may further include a display screen 22, an input / output interface 23, a communication interface 24, a power supply 25, and a communication bus 26.

[0120] Those skilled in the art can understand that Figure 5 the structure shown in does not constitute a limitation on the BIOS FW and DPS FW linkage update device, and it may include more or fewer components than those shown in the figure.

[0121] The BIOS FW and DPS FW linkage update device provided by the embodiments of the present application includes a memory and a processor. When the processor executes the program stored in the memory, it can implement the following method: the BIOS FW and DPS FW linkage update method.

[0122] Since the embodiments of the device part correspond to the embodiments of the method part, for the embodiments of the device part, please refer to the description of the embodiments of the method part, and will not be elaborated here for the time being.

[0123] Finally, the present application also provides an embodiment corresponding to a computer-readable storage medium. A computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps recorded in the above method embodiments are implemented.

[0124] It can be understood that if the methods in the above embodiments are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and executes all or part of the steps of the methods described in the various embodiments of the present application. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs that can store program codes.

[0125] The above has introduced in detail the BIOS FW and DPS FW linkage update method, system, device, and medium provided by this application. Each embodiment in the specification is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple. For the relevant parts, reference can be made to the description in the method section. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of this application, several improvements and modifications can still be made to this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

[0126] It should also be noted that in this specification, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of another identical element in the process, method, article or device including the said element.

Claims

1. A method for updating BIOS FW and DPS FW in linkage, characterized in that: Applied to a server, the server is connected to an external controller, and the method includes: Packaging the bin files of the BIOS FW and the DPS FW with the same BKC into a first file and sending it to the external controller; BKC is the best configuration; Parsing and storing the first file as a second file corresponding to the updatable BIOS FW and a third file corresponding to the DPS FW by the external controller; Sending the second file to the BIOS chip by the external controller and reading the status of the BIOS FW. In response to the activation signal sent by the BIOS FW, triggering an electronic switch to retain the power supply of one DIMM slot, turning off the power supply of other DIMM slots, controlling the server to cold restart and performing DIMM training to complete the update of the BIOS FW; Controlling the external controller to send the third file to the BIOS chip, triggering the electronic switch to turn on the power supply of all DIMM slots, controlling the server to cold restart and performing the DIMM training to complete the update of the DPS FW; The external controller is composed of an STM32 series single-chip microcomputer; The parsing and storing the first file as a second file corresponding to the updatable BIOS FW and a third file corresponding to the DPS FW by the external controller includes: Parsing the first file into a second file corresponding to the updatable BIOS FW and a third file corresponding to the DPS FW by the STM32 system and storing them in Flash; The sending the second file to the BIOS chip by the external controller and reading the status of the BIOS FW. In response to the activation signal sent by the BIOS FW, triggering an electronic switch to retain the power supply of one DIMM slot, turning off the power supply of other DIMM slots, controlling the server to cold restart and performing DIMM training to complete the update of the BIOS FW includes: Controlling the STM32 system to send the second file to the BIOS chip; Reading the BIOS FW status by the STM32 system; In response to the activation signal sent by the BIOS FW, triggering the electronic switch, retaining the power supply of one DIMM slot, and turning off the power supply of other DIMM slots; Sending a cold restart signal to the BMC by the STM32 system; Controlling the server to cold restart by powering on and off the server through the BMC; Performing DIMM training to complete the update of the BIOS FW.

2. The BIOS FW and DPS FW linkage update method according to claim 1, characterized in that It further includes: Monitoring the BMC behavior by the STM32 system; If the BMC behavior is abnormal, controlling the server to cold restart by powering on and off the server through the STM32 system.

3. The BIOS FW and DPS FW linkage update method according to claim 1, wherein The packaging the bin files of the BIOS FW and the DPS FW with the same BKC into a first file and sending it to the external controller includes: Judging whether the BKC of the BIOS FW and the DPS FW is the same in the Linux OS; If they are the same, package the bin files of the BIOS FW and the DPS FW into a first file and send it to the external controller.

4. The BIOS FW and DPS FW linkage update method according to claim 3, wherein The steps to obtain the bin files of the BIOS FW and the DPS FW are as follows: Download the DPS FW and the BIOS source code embedded with IntelRC respectively; Compile the DPS FW and the BIOS source code into bin files respectively.

5. The BIOS FW and DPS FW linkage update method according to any one of claims 1 to 4, characterized in that, After controlling the external controller to send the third file to the BIOS chip, turning on the power supply for all DIMM slots, controlling the server to cold reboot and performing the DIMM training to complete the update of the DPS FW, it further includes: Execute the DIMM training again to check the correspondence between the BIOS FW and the DPS FW; If they correspond, display the version through the post interface; If they do not correspond, give a warning prompt.

6. A BIOS FW and DPS FW linkage update system, characterized in that Applied to a server, the server is connected to an external controller, and the system includes: A packaging module, configured to package the bin files of the BIOS FW and the DPS FW with the same BKC (Best Configuration) into a first file and send it to the external controller; A parsing module, configured to parse and store the first file as a second file corresponding to the updatable BIOS FW and a third file corresponding to the DPS FW through the external controller; A first update module, configured to send the second file to the BIOS chip through the external controller and read the status of the BIOS FW. In response to the activation signal to be sent by the BIOS FW, trigger an electronic switch to keep the power supply for one DIMM slot and turn off the power supplies for other DIMM slots, control the server to cold reboot and perform DIMM training to complete the update of the BIOS FW; A second update module, configured to control the external controller to send the third file to the BIOS chip, trigger an electronic switch to turn on the power supplies for all DIMM slots, control the server to cold reboot and perform the DIMM training to complete the update of the DPS FW; The external controller is composed of an STM32 series single-chip microcomputer; The process of parsing and storing the first file as a second file corresponding to the updatable BIOS FW and a third file corresponding to the DPS FW through the external controller includes: Parse the first file into a second file corresponding to the updatable BIOS FW and a third file corresponding to the DPS FW through the STM32 system and store them in Flash; The process of sending the second file to the BIOS chip through the external controller and reading the status of the BIOS FW. In response to the activation signal to be sent by the BIOS FW, trigger an electronic switch to keep the power supply for one DIMM slot and turn off the power supplies for other DIMM slots, control the server to cold reboot and perform DIMM training to complete the update of the BIOS FW includes: Control the STM32 system to send the second file to the BIOS chip; Read the BIOS FW status through the STM32 system; In response to the activation signal to be sent by the BIOS FW, trigger the electronic switch, keep one DIMM slot powered, and turn off the power supply of other DIMM slots; Send the cold restart signal to the BMC through the STM32 system; Control the power on and off of the server through the BMC to cold restart the server; Execute DIMM training to complete the update of the BIOS FW.

7. A BIOS FW and DPS FW linkage update device, characterized in that, The server is connected to an external controller and includes a memory for storing computer programs; A processor for implementing the steps of the BIOS FW and DPSFW linkage update method according to any one of claims 1 to 5 when executing the computer program.

8. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, and when the computer program is executed by the processor, the steps of the BIOS FW and DPSFW linkage update method according to any one of claims 1 to 5 are implemented.

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