Detection device, method and electronic device

Abstract

This invention relates to a detection device, detection method, and electronic device, comprising: a storage module and a control module. The control module includes: a first control unit for acquiring first recorded data and controlling the storage module to store the first recorded data; a memory module for acquiring the first recorded data; a judgment unit for acquiring memory control commands and identifying whether the memory control commands are memory sleep commands or memory wake-up commands; a second control unit for controlling the memory module to enter self-refresh when the memory control command is a memory sleep command; a third control unit for controlling the memory module to exit self-refresh when the memory control command is a memory wake-up command, and reading second recorded data stored in the memory module after the memory module exits self-refresh; and a processing unit for outputting test results based on the first and second recorded data. The above-described detection device, method, and electronic device can prevent erroneous critical data retrieved from the memory module from affecting system operation.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a detection device, detection method and electronic device. Background Technology

[0002] Currently, on server, personal computer (PC), and consumer platforms, to reduce memory power consumption, when the system load is low, all or part of the memory enters a low-power sleep state. The memory then enters a self-refresh phase (Dynamic Random Access Memory (DRAM) needs to be refreshed periodically, otherwise data will be automatically lost). During this time, the memory controller can either enter a low-power state or remain running. When the system load increases, the sleeping memory is woken up. Before entering a low-power sleep state, the system stores critical information in memory. The memory maintains this stored critical information through self-refresh. When the memory is woken up and exits the low-power sleep state, it reads the critical information from memory for system use.

[0003] However, during dynamic memory refresh, issues such as improper refresh time or interval settings, or inherent defects in the memory storage units may lead to data flipping or loss, i.e., a memory self-refresh error. In this case, the memory cannot correctly store the data, causing errors in the data read from memory, resulting in the loss of critical system data, inability to continue running, and phenomena such as blue screens or system crashes. Summary of the Invention

[0004] Therefore, it is necessary to provide a detection device, detection method, and electronic device to address the problem in the prior art where system failures due to memory self-refresh errors result in the loss of critical data.

[0005] To achieve the above objectives, in one respect, the present invention provides a detection device, comprising: a storage module and a control module, wherein the control module is connected to a memory module and the storage module; the control module includes:

[0006] The first control unit is used to acquire first recorded data and control the storage module to store the first recorded data; the memory module is used to acquire the first recorded data.

[0007] The judgment unit is used to obtain memory control commands and identify whether the memory control commands are memory sleep commands or memory wake-up commands;

[0008] The second control unit is used to control the memory module to enter self-refresh when the memory control command is the memory sleep command;

[0009] The third control unit is configured to control the memory module to exit self-refresh when the memory control command is the memory wake-up command, and to read the second record data stored in the memory module after the memory module exits self-refresh; and

[0010] The processing unit is used to output test results based on the first recorded data and the second recorded data.

[0011] In one embodiment, the control module is also connected to a memory control module, and the control module obtains the first recorded data and the memory control command from the memory control module.

[0012] In one embodiment, the processing unit includes:

[0013] The first processing unit is used to determine whether the first record data and the second record data are the same;

[0014] The second processing unit is configured to read the first record data from the storage module and rewrite it into the memory module when the first record data and the second record data are different, until the first processing unit determines that the data read from the memory module is the same as the first record data.

[0015] In one embodiment, the processing unit includes:

[0016] The first processing unit is used to determine whether the first record data and the second record data are the same;

[0017] The third processing unit is used to output an alarm signal when the first recorded data and the second recorded data are different.

[0018] In one embodiment, a signal switch module is further included, the signal switch module having a first electrical connection terminal, a second electrical connection terminal and a third electrical connection terminal; the first electrical connection terminal is connected to the memory control module, the second electrical connection terminal is connected to the control module, and the third electrical connection terminal is connected to the memory module;

[0019] In the initial state, the second control unit controls the first electrical connection terminal and the third electrical connection terminal to be connected, and the first electrical connection terminal and the second electrical connection terminal are also connected; the memory module obtains the first recorded data and the memory sleep command from the memory control module and enters self-refresh; the first control unit obtains the first recorded data from the memory control module in real time and controls the storage module to store the first recorded data; the judgment unit obtains and identifies the memory sleep command.

[0020] When the judgment unit acquires and recognizes the wake-up memory command, the third control unit controls the first electrical connection terminal and the third electrical connection terminal to disconnect and the second electrical connection terminal and the third electrical connection terminal to connect; the memory module exits self-refresh, and the third control unit reads the second record data stored in the memory module after the memory module exits self-refresh;

[0021] When the first processing unit determines that the data read from the memory module is the same as the first recorded data, the second control unit re-controls the connection between the first electrical connection terminal and the third electrical connection terminal and the connection between the first electrical connection terminal and the second electrical connection terminal.

[0022] In one embodiment, the memory control module is connected to the memory module through the control module.

[0023] In one embodiment, an alarm module is also included, which is connected to the control module and is used to trigger an alarm when the alarm signal is received.

[0024] In one embodiment, a recovery switch module is further included, which is connected to the control module and is used to output a recovery trigger signal;

[0025] The processing unit further includes a fourth processing unit, which is used to read the first recorded data from the storage module and rewrite it into the memory module when the recovery trigger signal is received, until the first processing unit determines that the data read from the memory module is the same as the first recorded data.

[0026] In one embodiment, a power supply module is also included, which is connected to the storage module and the control module to supply power to the storage module and the control module.

[0027] In one embodiment, a circuit board is also included, on which both the storage module and the control module are disposed.

[0028] An electronic device includes a memory control module, a memory module, and a detection device as described in any of the preceding claims.

[0029] In one embodiment, the detection device is a data acquisition card independent of the memory control module or the detection device is integrated into the memory control module.

[0030] A detection method, applied to the detection apparatus as described in any of the preceding claims, the method comprising:

[0031] Acquire the first record data and control the storage module to store the first record data;

[0032] Determine whether the memory control command is a memory sleep command or a memory wake-up command;

[0033] When the memory control command is a memory sleep command, and the memory module enters self-refresh mode after acquiring the first recorded data;

[0034] When the memory control command is a wake-up memory command, the memory module is controlled to exit self-refresh, and the second record data stored in the memory module is read after the memory module exits self-refresh;

[0035] The test results are output based on the first and second recorded data.

[0036] In one embodiment, the step of outputting test results based on the first recorded data and the second recorded data includes:

[0037] Determine whether the first record data and the second record data are the same;

[0038] When the first record data and the second record data are different, the stored first record data is rewritten to the memory module until the data read from the memory module is the same as the first record data.

[0039] In one embodiment, the step of outputting test results based on the first recorded data and the second recorded data includes:

[0040] Determine whether the first record data and the second record data are the same;

[0041] An alarm signal is output when the first recorded data and the second recorded data are different.

[0042] The aforementioned detection device, method, and electronic device store first recorded data. After the memory module obtains the first recorded data, it controls the memory module to enter a low-power sleep state and performs a self-refresh to store the first recorded data. When waking up the memory, it controls the memory module to exit the self-refresh and reads the second recorded data stored in the memory module after exiting the self-refresh. Based on the first and second recorded data, a test result can be obtained as to whether the memory module has experienced a self-refresh error, allowing users to promptly know the operating status of the memory module and avoid retrieving erroneous critical data from the memory module that could affect system operation. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1 This is a structural block diagram of an electronic device provided in one embodiment;

[0045] Figure 2 This is a structural block diagram of an electronic device provided in another embodiment;

[0046] Figure 3 This is a structural block diagram of an electronic device provided in another embodiment;

[0047] Figure 4 This is a flowchart of a detection method provided in one embodiment.

[0048] Explanation of reference numerals in the attached figures:

[0049] 10. Memory control module; 20. Memory module; 30. Detection device; 31. Storage module; 32. Control module; 33. Signal switch module; 34. Alarm module; 35. Reset switch module; 36. Circuit board; 321. First control unit; 322. Judgment unit; 323. Second control unit; 324. Third control unit; 325. Processing unit. Detailed Implementation

[0050] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0051] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0052] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0053] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0054] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0055] In traditional technology, to reduce memory power consumption, when the system load is low, all or part of the memory enters a low-power sleep state, and the memory enters a self-refresh phase (DRAM needs to be refreshed periodically, otherwise the data will be automatically lost). During this time, the memory controller can either enter a low-power state or remain running. When the system load increases, the sleeping memory is woken up. Before the memory enters a low-power state, the system stores critical information in memory, and when the memory exits the low-power sleep state, it retrieves the information from memory for system use. However, during the self-refresh phase, data may be reversed or lost due to improper refresh time or interval settings, or defects in the memory's storage cells, causing changes to the critical data stored in memory. When the memory exits the low-power state, it retrieves the stored data from memory for system use. If the data stored in memory is important data such as system data or configuration parameters, and one or more bits of this data are lost or reversed, it may cause the system to malfunction, resulting in blue screens or system crashes. Based on this, this application provides a testing device that can perform functional tests on the stability and reliability of memory during the self-refresh phase, which greatly helps in the recovery of the operating system (OS).

[0056] Please see Figure 1This application provides a detection device 30, which includes a storage module 31 and a control module 32. The control module 32 is connected to a memory module 20 and a storage module 31. The control module 32 includes a first control unit 321, a judgment unit 322, a second control unit 323, a third control unit 324, and a processing unit 325. The first control unit 321 is used to acquire first recorded data and control the storage module 31 to store the first recorded data. The memory module 20 is used to acquire the first recorded data. The judgment unit 322 is used to acquire memory control commands and identify whether the memory control commands are memory sleep commands or memory wake-up commands. The second control unit 323 is used to control the memory module 20 to enter self-refresh when the memory control command is a memory sleep command. The third control unit 324 is used to control the memory module 20 to exit self-refresh when the memory control command is a memory wake-up command, and read the second recorded data stored in the memory module 20 after the memory module 20 exits self-refresh. The processing unit 325 is used to output test results based on the first recorded data and the second recorded data.

[0057] Specifically, the testing device 30 can be applied to electronic devices containing independent memory, such as server platforms, personal computer platforms, and consumer platforms. This electronic device includes at least a memory module. The memory module 20 can be Dynamic Random Access Memory (DRAM), such as Dual-Inline Memory Modules (DIMMs), memory chips, and other dynamic memory. Dual-Inline Memory Modules can include Registered DIMMs (RDIMMs), Unbuffered Dual In-Line Memory Modules (UDIMMs), and Small Outline Dual In-Line Memory Modules (SODIMMs). The memory module 20 can specifically use products from the DDR2, DDR3, DDR4, and DDR5 specification series. Since memory module 20 is a dynamic random access memory (RAM), it needs to be refreshed periodically to ensure that the data stored inside is not lost.

[0058] In this embodiment, the detection device 30 includes a storage module 31 and a control module 32. For example, the control module 32 may include a field-programmable gate array (FPGA) or a central processing unit (CPU), etc. The storage module 31 is connected to the control module 32 and is used to store recorded data.

[0059] The control module 32 is also connected to the memory module 20. The control module 32 includes a first control unit 321, a judgment unit 322, a second control unit 323, a third control unit 324, and a processing unit 325. The first control unit 321 is used to acquire first recorded data and control the storage module 31 to store the first recorded data. The memory module 20 is used to acquire the first recorded data. The first recorded data may be critical system data, etc. In this embodiment, the first recorded data originally written to the memory module 20 is not only written to the memory module 20 but also backed up in the storage module 31. Because the first recorded data is backed up in the storage module 31, it is not affected by the self-refresh of the memory module 20; therefore, the first recorded data stored in the storage module 31 is always accurate data.

[0060] The judgment unit 322 is used to acquire memory control commands and identify whether the memory control commands are memory sleep commands or memory wake-up commands. Memory control commands are used to control the working state of memory module 20. When memory module 20 receives a memory sleep command, also known as a self-refresh enter (SRE) command, memory module 20 enters a self-refresh state to maintain the data stored inside memory module 20; when memory module 20 receives a memory wake-up command, also known as a self-refresh exit (SRX) command, memory module 20 exits the self-refresh state.

[0061] The second control unit 323 is used to control the memory module 20 to enter self-refresh when the memory control command is a memory sleep command. The memory module 20 uses self-refresh to maintain the first record data stored internally. The third control unit 324 is used to control the memory module 20 to exit self-refresh and read the second record data stored after the memory module 20 self-refresh when the memory control command is a memory wake-up command. If the memory module 20 does not experience a self-refresh error that causes the loss or flipping of its internal stored data, the second record data stored after the memory module 20 self-refresh is the same as the first record data written into the memory module 20 before the self-refresh; otherwise, the data stored in the memory module 20 changes, and the second record data is different from the first record data.

[0062] The processing unit 325 outputs a test result regarding whether the data in the memory module 20 is erroneous based on the first and second recorded data. For example, the processing unit 325 can output the test result by comparing the first and second recorded data. If the first and second recorded data are the same, the test result is that the memory module 20 has not experienced a self-refresh error; if the first and second recorded data are different, the test result is that the memory module 20 has experienced a self-refresh error. Specifically, the processing unit 325 can compare the first recorded data stored in the storage module 31 with the second recorded data directly read from the memory module 20 by the third control unit 324; it can also be configured so that when the memory control command is a memory wake-up command, the third control unit 324 further controls the storage module 31 to store the second recorded data, and the processing unit 325 retrieves the first and second recorded data from the storage module 31 and compares them.

[0063] The aforementioned detection device 30 stores first recorded data. After the memory module 20 obtains the first recorded data, it controls the memory module 20 to enter a low-power sleep state and perform a self-refresh to store the first recorded data. When waking up the memory, it controls the memory module 20 to exit the self-refresh and reads the second recorded data stored in the memory module 20 after exiting the self-refresh. Based on the first and second recorded data, it outputs a test result indicating whether the memory module 20 has experienced a self-refresh error, allowing the user to promptly know the operating status of the memory module 20 and preventing the system from retrieving erroneous critical data from the memory module 20 that could affect system operation.

[0064] In some examples, the electronic device may also include a memory controller module. The memory controller module 10 may be a main control chip, a central processing unit (CPU), etc. The control module 32 is also connected to the memory controller module 10, and the control module 32 obtains first recorded data and memory control commands from the memory controller module 10.

[0065] Specifically, to save system power, the memory control module 10 can enter a sleep (STR, Suspend to RAM) state. The Advanced Configuration and Power Management Interface (ACPI) protocol defines the sleep state as S3. When entering S3, the memory control module 10 can store critical information in the memory module 20. Power continues to supply necessary devices such as the memory module 20 to ensure data integrity, while other devices are turned off, thus reducing system power consumption. When exiting S3, the memory control module 10 rereads the information from the memory module 20, restoring its operating state before entering S3. It should be noted that the sleep state of the memory control module 10 and the sleep state of the memory module 20 are not necessarily related. During normal operation, the memory control module 10 can also control the memory module 20 to enter a sleep state and wake it up after a period of time to read data from it. The data reread by the memory control module 10 from the memory module 20 during normal operation or after exiting S3 is the self-refreshed data from the memory module 20.

[0066] The memory control module 10 can be connected to the memory module 20 via the control module 32, thereby outputting first record data and memory control commands to the memory module 20. The control module 32 obtains the first record data from the memory control module 10. The control module 32 can be a controller system with the function of parsing commands issued by the memory control module 10.

[0067] For example, the judgment unit 322 in the control module 32 can obtain the memory control command status between the memory control module 10 and the memory module 20, and identify whether the memory control command is a memory sleep command or a memory wake-up command by obtaining the memory control command status.

[0068] In some examples, processing unit 325 includes a first processing unit and a second processing unit. The first processing unit is used to determine whether the first record data and the second record data are the same. The second processing unit is used to read the first record data from storage module 31 and rewrite it into memory module 20 when the first record data and the second record data are different, until the first processing unit determines that the data read from memory module 20 is the same as the first record data.

[0069] In some examples, the first processing unit can compare each bit in the first and second recorded data one by one. If any bit in the first and second recorded data differs, it is determined that the first and second recorded data are different, and the second processing unit rewrites the first recorded data from storage module 31 into memory module 20. In other examples, the first processing unit can be configured to determine that the first and second recorded data are different only when a preset bit in the first and second recorded data differs, and the second processing unit rewrites the first recorded data from storage module 31 into memory module 20. The preset bit can be a data bit that affects the normal operation of the system.

[0070] Since the first record data stored in storage module 31 is the correct data written into memory module 20 by memory control module 10 before memory module 20 self-refresh, rewriting the first record data after a self-refresh error in memory module 20 ensures that the erroneous data stored in memory module 20 is replaced with correct data. In this embodiment, after the second processing unit rewrites the first record data into memory module 20, the first processing unit can repeatedly determine whether the data read from memory module 20 is correct. For example, if rewriting to memory module 20 fails or if memory module 20 itself is defective, the data stored in memory module 20 may still be erroneous. By repeatedly determining whether the data read from memory module 20 is the same as the first record data, and by using the second processing unit to rewrite the correct data into memory module 20 once or multiple times, it can be ensured that the data read by memory control module 10 from memory module 20 is always the same as the data written into memory module 20, that is, the system can read the correct data and thus work normally.

[0071] In other examples, processing unit 325 includes a first processing unit and a third processing unit. The first processing unit is used to determine whether the first recorded data and the second recorded data are the same. The third processing unit is used to output an alarm signal when the first recorded data and the second recorded data are different.

[0072] In some examples, see Figure 2 or Figure 3 The detection device 30 may also include an alarm module 34. The alarm module 34 can be connected to the control module 32, specifically to the third processing unit. When the alarm module 34 receives an alarm signal, it can issue an alarm via light, text, or voice, thereby promptly notifying the operator that the memory module 20 has experienced a self-refresh error.

[0073] In some examples, please refer to Figure 1 and 2The detection device 30 also includes a signal switch module 33. The signal switch module 33 can be a high-speed signal switch with signal amplification function, or a data selector (MUX, multiplexer). The signal switch module 33 has a first electrical connection terminal A, a second electrical connection terminal B, and a third electrical connection terminal C. The first electrical connection terminal A is connected to the memory control module 10, the second electrical connection terminal B is connected to the control module 32, and the third electrical connection terminal C is connected to the memory module 20. In this embodiment, the control module 32 controls the operation of the memory module 20 by controlling the switching between the first electrical connection terminal A, the second electrical connection terminal B, and the third electrical connection terminal C of the signal switch module 33.

[0074] Specifically, in the initial state, the second control unit 323 controls the connection between the first electrical connection terminal A and the third electrical connection terminal C, that is, the connection between the memory control module 10 and the memory module 20, and controls the connection between the first electrical connection terminal A and the second electrical connection terminal B, that is, the connection between the control module 32 and the memory control module 10. The memory module 20 obtains the first recorded data and the memory sleep command from the memory control module 10, and enters self-refresh under the memory sleep command. The first control unit 321 obtains the first recorded data from the memory control module 10 and controls the storage module 31 to store the first recorded data. The judgment unit 322 obtains and identifies the memory sleep command. When storing data, the storage module 31 can record data in address order. For example, the storage module 31 may include a first storage unit, a second storage unit, a third storage unit, a fourth storage unit, etc., and the first recorded data can be stored in the first storage unit.

[0075] When the memory control module 10 sends a wake-up command to the memory module 20, the memory module 20 exits its self-refresh process upon receiving the command. The judgment unit 322 acquires and recognizes the wake-up command, and then the third control unit 324 controls the first electrical connection A and the third electrical connection C to disconnect, i.e., disconnect the memory control module 10 and the memory module 20, while the second electrical connection B and the third electrical connection C are connected, i.e., connect the control module 32 and the memory module 20. This allows the third control unit 324 to read the second record data stored in the memory module 20 after its self-refresh process has ended. The third control unit 324 can also further control the storage module 31 to store the second record data. When storing the second record data, the storage module 31 can record it according to address order, for example, by recording it in the second storage unit.

[0076] When the first processing unit determines that the data read from the memory module 20 is the same as the first recorded data, the second control unit 323 re-controls the connection between the first electrical connection terminal A and the third electrical connection terminal C, and the connection between the first electrical connection terminal A and the second electrical connection terminal B.

[0077] If the first processing unit determines that the data read from the memory module 20 is different from the first recorded data, the second control unit 323 will not switch the on / off states between the electrical connection terminals in the signal switch module 33. Furthermore, the third processing unit may output an alarm signal if the first processing unit determines that the data read from the memory module 20 is different from the first recorded data; alternatively, the second processing unit may rewrite the first recorded data stored in the storage module 31 into the memory module 20. Only when the data read from the memory module 20 is identical to the first recorded data will the second control unit 323 re-establish conduction between the first electrical connection terminal A and the third electrical connection terminal C, and between the first electrical connection terminal A and the second electrical connection terminal B, enabling the memory control module 10 to read the data stored in the memory module 20. The control module 32 then returns to the stage of detecting the memory control command status between the memory control module 10 and the memory module 20.

[0078] In this embodiment, since the connection between the memory control module 10 and the memory module 20 is only restored when the data read from the memory module 20 is the same as the first recorded data, the data read by the memory control module 10 from the memory module 20 always remains consistent with the data written to the memory module 20, thereby ensuring that the data read by the system is accurate and the system operates normally.

[0079] In some examples, see Figure 1 and Figure 2 The detection device 30 also includes a recovery switch module 35. After the detection device 30 alarms, the user can operate the recovery switch module 35 to recover from the self-refresh error of the memory module 20. The recovery switch module 35 is connected to the control module 32. After the user operates the recovery switch module 35, it will send a recovery trigger signal. The processing unit may also include a fourth processing unit, which, upon receiving the recovery trigger signal, reads the first record data from the storage module 31 and rewrites the first record data into the memory module 20 until the first processing unit determines that the data read from the memory module 20 is the same as the first record data.

[0080] In other examples, when the first processing unit determines that the second recorded data is different from the first recorded data, it is not necessary to restore the trigger signal. The second processing unit automatically writes the first recorded data stored in the storage module 31 into the memory module 20 until the data read from the memory module 20 is the same as the first recorded data. In this embodiment, when the detection device 30 detects a self-refresh error in the memory module 20, it automatically corrects the data in the memory module 20 to ensure that the data read by the memory control module 10 from the memory module 20 is correct.

[0081] In some examples, please refer to Figure 2 or Figure 3 The alarm module 34 may include an alarm indicator light, which illuminates to trigger an alarm. In other embodiments, the alarm module 34 may also trigger an alarm via voice alarm, SMS alarm, or other means. The recovery switch module 35 may include a recovery button, which can be operated by the user after the alarm module 34 triggers an alarm. When the recovery button is pressed, a recovery trigger signal is output to the control module 32, thereby controlling the control module 32 to rewrite the first record data to the memory module 20.

[0082] In some examples, please refer to Figure 2 or Figure 3 The detection device 30 also includes a circuit board 36. The storage module 31 and the control module 32 are both mounted on the circuit board 36. The detection device 30 may also include a housing (not shown), which houses the storage module 31 and the control module 32 on the circuit board 36, and encapsulates the storage module 31, the control module 32, and the circuit board 36 inside the housing. The alarm module 34 and the reset switch module 35 are mounted on the outer surface of the housing.

[0083] In some examples, the detection device 30 also includes a power supply module (not shown). The power supply module is connected to the storage module 31 and the control module 32 to supply power to the storage module and the control module 32. In this embodiment, the detection device 30 is an independent system, and the power supply module supplies power to the storage module 31 and the control module 32 independently, so that it is not affected by the memory control module 10, and the detection device 30 can stably detect the self-refresh error of the memory module 20.

[0084] This application also provides an electronic device. (See attached document.) Figure 1 The electronic device includes a memory control module 10, a memory module 20, and a detection device 30 as described in any of the above embodiments.

[0085] The aforementioned detection device 30 stores first recorded data. After the memory module 20 obtains the first recorded data, it controls the memory module 20 to enter a low-power sleep state and perform a self-refresh to store the first recorded data. When waking up the memory, it controls the memory module 20 to exit the self-refresh and reads the second recorded data stored in the memory. Based on the first and second recorded data, it outputs a test result indicating whether the memory module 20 has experienced a self-refresh error, allowing the user to promptly know the operating status of the memory module 20 and preventing the system from retrieving erroneous critical data from the memory module 20 that could affect system operation.

[0086] In one embodiment, the detection device 30 is either a data acquisition card independent of the memory control module 10 or integrated within the memory control module 10. However, even when integrated within the memory control module 10, the detection device 30 remains an independent system and is not affected by the memory control module 10.

[0087] This application also provides a detection method, which is applied to the detection device 30 in any of the above embodiments. See also Figure 4 The detection methods include:

[0088] Step S41: Obtain the first record data and control the storage module to store the first record data.

[0089] Step S42: Determine whether the memory control command is a memory sleep command or a memory wake-up command.

[0090] Specifically, the detection method can be applied to a detection device 30 in electronic devices containing independent memory, such as server platforms, personal computer platforms, and consumer platforms. This electronic device includes at least a memory module and a memory control module 10. The detection device 30 obtains first recorded data from the memory control module 10 and stores the first recorded data. Furthermore, the memory module 20 can obtain the first recorded data directly or indirectly from the memory control module 10 before its self-refresh.

[0091] Since memory module 20 is dynamic random access memory (RAM), it needs to be refreshed periodically to ensure that the data stored inside is not lost. Memory control commands are used to control the working state of memory module 20. When memory module 20 receives a memory sleep command, also known as a self-refresh enter (SRE) command, memory module 20 enters a self-refresh state to maintain the data stored inside memory module 20; when memory module 20 receives a memory wake-up command, also known as a self-refresh exit (SRE) command, memory module 20 exits the self-refresh state.

[0092] The detection device 30 can determine whether the memory control command is a memory sleep command or a memory wake-up command by detecting the control command status between the memory control module 10 and the memory module 20.

[0093] Step S43: When the memory control command is a memory sleep command, and after the memory module obtains the first record data, control the memory module to enter self-refresh.

[0094] Specifically, when the detection device 30 detects that the memory control command is a memory sleep command, it controls the memory module 20 to enter self-refresh mode. The memory module 20 uses self-refresh to maintain the first record of data stored internally.

[0095] Step S44: When the memory control command is a wake-up command, control the memory module to exit self-refresh, and obtain the second record data stored in the memory module after the memory module exits self-refresh.

[0096] Specifically, when the detection device 30 detects that the memory control command is a memory wake-up command, it controls the memory module 20 to exit self-refresh. The detection device 30 also acquires and stores the second record data stored after the memory module 20 exits self-refresh. If the memory module 20 does not experience a self-refresh error that causes data loss or flipping, the second record data stored after self-refresh is the same as the first record data written to the memory module 20 before self-refresh; otherwise, the data stored in the memory module 20 changes, and the second record data differs from the first record data.

[0097] Step S45: Output the test results based on the first and second recorded data.

[0098] Specifically, the detection device 30 outputs a test result regarding whether the data in the memory module 20 is erroneous based on the first recorded data and the second recorded data. For example, the detection device 30 can output the test result by comparing the first recorded data and the second recorded data. If the first recorded data and the second recorded data are the same, the test result is that the memory module 20 has not experienced a self-refresh error; if the first recorded data and the second recorded data are different, the test result is that the memory module 20 has experienced a self-refresh error.

[0099] The above detection method stores the first recorded data. After the memory module 20 obtains the first recorded data, it controls the memory module 20 to enter a low-power sleep state and performs a self-refresh to store the first recorded data. When waking up the memory, it controls the memory module 20 to exit the self-refresh and reads the second recorded data stored in the memory module 20. Based on the first and second recorded data, it outputs the test result of whether the memory module 20 has experienced a self-refresh error, allowing the user to know the operating status of the memory module 20 in a timely manner and preventing the system from retrieving erroneous critical data from the memory module 20, which could affect system operation.

[0100] In some examples, the control module 32 in the detection device 30 is also connected to the memory control module 10, and the control module 32 obtains the first recorded data and memory control commands from the memory control module 10. Step S42, determining whether the memory control command is a memory sleep command or a memory wake-up command, includes: obtaining the memory control command status between the memory control module 10 and the memory module 20; and determining whether the memory control module 10 has entered or exited a sleep state based on the memory control command status.

[0101] In some examples, step S45 specifically includes: determining whether the first record data and the second record data are the same; when the first record data and the second record data are different, rewriting the stored first record data into the memory module 20 until the data read from the memory module 20 is the same as the first record data.

[0102] In other examples, step S45 specifically includes: determining whether the first recorded data and the second recorded data are the same; and outputting an alarm signal when the first recorded data and the second recorded data are different.

[0103] In some examples, see Figure 2 The detection device 30 also includes a signal switch module 33. The signal switch module 33 has a first electrical connection terminal A, a second electrical connection terminal B, and a third electrical connection terminal C; the first electrical connection terminal A is connected to the memory control module 10, the second electrical connection terminal B is connected to the control module 32, and the third electrical connection terminal C is connected to the memory module 20. Step S43 includes: controlling the first electrical connection terminal A and the third electrical connection terminal C to be connected, and controlling the first electrical connection terminal A and the second electrical connection terminal B to be connected; and acquiring and storing the first recorded data. Step S44 includes: controlling the first electrical connection terminal A and the third electrical connection terminal C to be disconnected and controlling the second electrical connection terminal B and the third electrical connection terminal C to be connected, and acquiring the second recorded data stored after the memory module 20 self-refreshes. The detection method further includes: when the data read from the memory module 20 is the same as the first recorded data, controlling the first electrical connection terminal A and the third electrical connection terminal C to be connected.

[0104] In another specific embodiment, see Figure 3 The memory control module 10 is connected to the memory module 20 via the control module 32. The detection method further includes: forwarding the first record data to the memory module 20 before receiving a memory sleep command. The detection method also includes: when it is detected that the data read from the memory module 20 is the same as the first record data, forwarding the first record data read from the memory module 20 to the memory control module 10.

[0105] It should be understood that, although Figure 4The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 4 At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.

[0106] In the description of this specification, references to terms such as "some embodiments," "other embodiments," and "ideal embodiments" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0107] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0108] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A detection device, characterized in that, include: A storage module and a control module, wherein the control module is connected to the memory module and the storage module; The control module includes: The first control unit is used to acquire first recorded data and control the storage module to store the first recorded data; the memory module is used to acquire the first recorded data. The judgment unit is used to obtain memory control commands and identify whether the memory control commands are memory sleep commands or memory wake-up commands; The second control unit is used to control the memory module to enter self-refresh when the memory control command is the memory sleep command; The third control unit is configured to control the memory module to exit self-refresh when the memory control command is the memory wake-up command, and to read the second record data stored in the memory module after the memory module exits self-refresh; and The processing unit is used to output a test result based on whether the first recorded data and the second recorded data are the same; The control module is also connected to the memory control module, and the control module obtains the first recorded data and the memory control command from the memory control module.

2. The detection device according to claim 1, characterized in that, The processing unit includes: The first processing unit is used to determine whether the first record data and the second record data are the same; The second processing unit is configured to read the first record data from the storage module and rewrite it into the memory module when the first record data and the second record data are different, until the first processing unit determines that the data read from the memory module is the same as the first record data.

3. The detection device according to claim 1, characterized in that, The processing unit includes: The first processing unit is used to determine whether the first record data and the second record data are the same; The third processing unit is used to output an alarm signal when the first recorded data and the second recorded data are different.

4. The detection device according to claim 3, characterized in that, It also includes a signal switch module, which has a first electrical connection terminal, a second electrical connection terminal and a third electrical connection terminal; the first electrical connection terminal is connected to the memory control module, the second electrical connection terminal is connected to the control module, and the third electrical connection terminal is connected to the memory module; In the initial state, the second control unit controls the first electrical connection terminal and the third electrical connection terminal to be connected, and the first electrical connection terminal and the second electrical connection terminal are also connected. The memory module obtains the first recorded data and the memory sleep command from the memory control module and enters self-refresh; the first control unit obtains the first recorded data from the memory control module and controls the storage module to store the first recorded data; the judgment unit obtains and identifies the memory sleep command. When the judgment unit acquires and recognizes the wake-up memory command, the third control unit controls the first electrical connection terminal and the third electrical connection terminal to disconnect and the second electrical connection terminal and the third electrical connection terminal to connect. After the memory module exits self-refresh, the third control unit reads the second record data stored in the memory module. When the first processing unit determines that the data read from the memory module is the same as the first recorded data, the second control unit re-controls the connection between the first electrical connection terminal and the third electrical connection terminal and the connection between the first electrical connection terminal and the second electrical connection terminal.

5. The detection device according to claim 3, characterized in that, The memory control module is connected to the memory module through the control module.

6. The detection device according to any one of claims 3 to 5 further includes an alarm module, the alarm module being connected to the control module, and the alarm module being used to trigger an alarm when it receives the alarm signal.

7. The detection device according to any one of claims 3 to 5, characterized in that, It also includes a recovery switch module, which is connected to the control module and is used to output a recovery trigger signal; The processing unit further includes a fourth processing unit, which is used to read the first recorded data from the storage module and rewrite it into the memory module when the recovery trigger signal is received, until the first processing unit determines that the data read from the memory module is the same as the first recorded data.

8. The detection device according to claim 1, characterized in that, It also includes a power supply module, which is connected to the storage module and the control module to supply power to the storage module and the control module.

9. The detection device according to claim 1, characterized in that, It also includes a circuit board, on which both the storage module and the control module are mounted.

10. An electronic device, characterized in that, It includes a memory control module, a memory module, and a detection device as described in any one of claims 1 to 9.

11. The electronic device according to claim 10, characterized in that, The detection device is either a data acquisition card independent of the memory control module or the detection device is integrated into the memory control module.

12. A detection method, characterized in that, The method, applied to the detection apparatus as described in any one of claims 1 to 9, comprises: Acquire the first record data and control the storage module to store the first record data; Determine whether the memory control command is a memory sleep command or a memory wake-up command; When the memory control command is a memory sleep command, and after the memory module obtains the first recorded data, the memory module is controlled to enter self-refresh mode; When the memory control command is a wake-up memory command, the memory module is controlled to exit self-refresh, and the second record data stored in the memory module is read after the memory module exits self-refresh; The test result is output based on whether the first recorded data and the second recorded data are the same.

13. The detection method according to claim 12, characterized in that, The step of outputting test results based on whether the first recorded data and the second recorded data are the same includes: Determine whether the first record data and the second record data are the same; When the first record data and the second record data are different, the stored first record data is rewritten to the memory module until the data read from the memory module is the same as the first record data.

14. The detection method according to claim 12, characterized in that, The step of outputting test results based on whether the first recorded data and the second recorded data are the same includes: Determine whether the first record data and the second record data are the same; An alarm signal is output when the first recorded data and the second recorded data are different.

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