A serial port status setting circuit and method

Abstract

This invention discloses a serial port status setting circuit and method, relating to the field of computer technology. The circuit controls the enable switch state of the BIOS log printing serial port. The second row of pins of the connector is electrically connected to the first switch port, which is electrically connected to the GPIO pin of the CPU. The first row of pins of the connector is electrically connected to the third switch port and then connected to the first power supply. The third row of pins of the connector is electrically connected to one end of a resistor, the other end of the resistor is electrically connected to the second switch port, and the third row of pins is grounded. The fourth switch port is electrically connected to the second power supply. When the first and second row of pins are connected via a jumper, the GPIO pin receives a high level, and the BIOS log printing serial port is enabled. By implementing a serial port status setting circuit, the process of setting the BIOS log printing serial port is simplified, avoiding situations where the computer cannot boot normally, thus preventing the BIOS log printing serial port from being set.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a serial port status setting circuit and method. Background Technology

[0002] BIOS (Basic Input Output System) manages the lowest-level and most direct hardware settings of a computer. The BIOS is a program stored in the motherboard's ROM chip that records the most basic information about the machine, such as basic input / output programs, system configuration information, FRU information, and BIOS configuration. Its main function is to provide the lowest-level and most direct hardware settings and control for the machine. BIOS development engineers and test engineers often analyze problems by collecting BIOS serial port logs.

[0003] As the computer's self-test and boot program, the BIOS has a crucial impact on computer performance, especially for servers with high requirements for performance stability, efficiency, and security. If the BIOS serial port log printing function is enabled by default, it will significantly impact boot speed, reduce performance, and even pose a risk of exposing security information. Therefore, officially released BIOS versions typically disable the BIOS serial port log printing function. Enabling the serial port log printing function when it is disabled requires entering the BIOS interface and manually modifying the BIOS serial port debugging status using IPMI commands after booting. This process is cumbersome, prone to errors for ordinary users, and requires a certain level of understanding of BIOS Setup options and IPMI commands. Furthermore, if the computer fails to boot (black screen), ordinary users will be unable to access BIOS Setup for further configuration. Therefore, a serial port status setting circuit and method are urgently needed. It can enable the BIOS log printing serial port function through hardware circuitry, so that after connecting the serial cable, it can print BIOS logs. This makes up for the predicament of not being able to set the BIOS log printing serial port status to print BIOS logs when the computer cannot boot normally. It also eliminates the need to understand the corresponding BIOS_Setup options and IPMI commands in advance, making it more user-friendly and convenient for ordinary users. Summary of the Invention

[0004] To address the problems in existing technologies, such as the need to understand IPMI commands to manually modify the BIOS log printing serial port debugging status, and the difficulty in configuring the BIOS log printing serial port when the computer fails to boot, this invention provides a serial port status setting circuit and method. This circuit enables the BIOS log printing serial port function to be activated via hardware, overcoming the inability to configure the BIOS log printing serial port status for BIOS log printing when the computer fails to boot. Furthermore, it eliminates the need to understand the corresponding BIOS_Setup options and IPMI commands beforehand, making the operation more user-friendly and convenient for ordinary users. To solve one or more of the above-mentioned technical problems, the technical solution adopted by this invention is as follows:

[0005] In one aspect, a serial port status setting circuit is provided for controlling the enable switch status of the BIOS log printing serial port. The circuit includes: a connector, a controlled switch module, a CPU, a resistor, a first power supply, and a second power supply.

[0006] The connector includes: a first row of pins, a second row of pins, and a third row of pins; the controlled switch module includes: a first switch port, a second switch port, a third switch port, and a fourth switch port.

[0007] The second row of pins is electrically connected to the first switch port, and the second switch port is electrically connected to the GPIO pin of the CPU.

[0008] The first row of pins is electrically connected to the third switch port and then connected to the first power supply;

[0009] The third row of pins is electrically connected to one end of the resistor, the other end of the resistor is electrically connected to the second switch port, and the third row of pins is grounded.

[0010] The fourth switch port is electrically connected to the second power supply;

[0011] When the first row of pins is connected to the second row of pins via a jumper, the CPU's GPIO pin receives a high level; when the second row of pins is connected to the third row of pins via a jumper, the CPU's GPIO pin receives a low level.

[0012] Furthermore, the controlled switch module includes: a first transistor and a second transistor;

[0013] The first transistor includes a first electrode, a second electrode, and a third electrode; the second transistor includes a first electrode, a second electrode, and a third electrode.

[0014] After the first electrode of the first transistor is electrically connected to the first electrode of the second transistor, it serves as the first switch port. After the second electrode of the first transistor is electrically connected to the second electrode of the second transistor, it serves as the second switch port. The third electrode of the first transistor serves as the third switch port and is electrically connected to the first power supply. The third electrode of the second transistor serves as the fourth switch port and is electrically connected to the second power supply.

[0015] Furthermore, the outer layer of the jump cap is made of insulating material, while the inner layer is made of conductive material;

[0016] The jumper cap has two pin header interfaces for connecting two adjacent pin headers of the connector; when the jumper cap is connected to the pin headers of the connector, an electrical connection is formed between the two pin headers through the conductive material of the inner layer of the jumper cap.

[0017] Secondly, a serial port status setting method is provided, used in a serial port status setting circuit described in the first aspect above, to control the enable switch status of the serial port for BIOS log printing, the method comprising:

[0018] The BIOS self-test program detects the connector status of the serial port status setting circuit and obtains the corresponding serial port enable status.

[0019] Enable the serial port for BIOS log printing according to the corresponding serial port enable status.

[0020] Furthermore, the BIOS self-test program detects the connector status of the serial port status setting circuit to obtain the corresponding serial port enable status, including:

[0021] If the BIOS self-test program detects that the first and second rows of pins of the serial port status setting circuit are electrically connected, the serial port enable status is "enabled on".

[0022] If the BIOS self-test program detects that the second and third rows of pins of the serial port status setting circuit are electrically connected, the serial port enable status will be "enabled off".

[0023] The computer will start normally when the first row of pins, the second row of pins, and the third row of pins are not electrically connected to each other.

[0024] Furthermore, based on the corresponding serial port enable status, the BIOS log printing serial port is enabled, including:

[0025] When the serial port enable status is "enabled on", set the serial port status to be on for BIOS log printing;

[0026] When the serial port enable status is "Enable Off", set the BIOS log printing serial port status to "Off".

[0027] Furthermore, after setting the BIOS log printing serial port status to enabled, it also includes:

[0028] Connect the serial cable to the enabled BIOS log printing serial port to print BIOS logs.

[0029] Furthermore, enabling the BIOS log printing serial port also includes: normally booting the computer.

[0030] Furthermore, the method also includes the following prior to:

[0031] Power off the computer whose BIOS log printing serial port is located.

[0032] Use a jumper cap to connect the pin headers of the corresponding connector;

[0033] Power on the computer that hosts the BIOS log printing serial port.

[0034] Furthermore, the corresponding connector pins are connected using jumper caps, including:

[0035] Connect the first and second rows of pins of the connector using a jumper cap;

[0036] or,

[0037] Connect the second and third rows of pins of the connector using a jumper cap.

[0038] The beneficial effects of the technical solution provided by the embodiments of the present invention are as follows:

[0039] 1. By implementing the serial port status setting circuit disclosed in the embodiments of the present invention, hardware control of the BIOS log printing serial port enable switch is realized, which facilitates the user to set the BIOS log printing serial port, simplifies the process of setting the BIOS log printing serial port through BIOS_Setup and IPMI commands, and makes the operation more user-friendly;

[0040] 2. By transmitting level signals to the CPU's GPIO through two cascaded transistors, the CPU can be effectively protected from high-level surges that could damage its internal modules when powered on.

[0041] 3. By implementing a serial port status setting method, the serial port status circuit is organically combined with the enable setting of the BIOS log printing serial port, connecting the hardware and software settings. This allows users to control the enable / disable of the serial port through hardware operation, avoiding the situation where the BIOS log printing serial port settings cannot be performed due to the computer failing to boot normally. Attached Figure Description

[0042] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 This is a schematic diagram of a serial port status setting circuit provided in an embodiment of the present invention;

[0044] Figure 2 This is a schematic diagram of a serial port status setting circuit including a specific structure of a switch module provided in an embodiment of the present invention;

[0045] Figure 3 This is a schematic diagram of a serial port status setting method provided in an embodiment of the present invention. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0047] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The numbers in the accompanying drawings are only used to distinguish individual functional parts or modules and do not indicate logical relationships between parts or modules. The terms “comprising,” “including,” or “including,” and similar terms mean that the element or object preceding the term encompasses the element or object listed following the term and its equivalents, without excluding other elements or objects. The terms “connected,” “linked,” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. “Above,” “below,” “left,” “right,” etc., are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0048] For the component symbols involved in this application specification, the circuit diagram indicates the type of component and distinguishes each component, such as R1, R2, C, etc.; the corresponding formula represents the magnitude of the corresponding physical quantity of the component, which is distinguished by italics, for example: the resistance value corresponding to resistor R1 is R1.

[0049] The various embodiments according to this disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that in the drawings, the same reference numerals are assigned to components having substantially the same or similar structure and function, and repeated descriptions of them will be omitted.

[0050] Manually modifying the BIOS log printing serial port debugging status requires understanding IPMI commands, and there's the difficulty of configuring the BIOS log printing serial port when the computer fails to boot. This invention provides a serial port status setting circuit and method that enables the BIOS log printing serial port function through hardware circuitry. This overcomes the predicament of being unable to configure the BIOS log printing serial port status for BIOS log printing when the computer fails to boot; it also eliminates the need to understand the corresponding BIOS_Setup options and IPMI commands beforehand, making it more user-friendly and convenient for ordinary users.

[0051] In one embodiment, such as Figure 1 As shown, a serial port status setting circuit is used to control the enable switch status of the BIOS log printing serial port. The circuit includes: connector 1, controlled switch module 2, CPU, resistor R, and first power supply V. DD Second power supply V SS ;

[0052] Connector 1 includes: first row of pins pin1, second row of pins pin2, and third row of pins pin3; controlled switch module 2 includes first switch port 201, second switch port 202, third switch port 203, and fourth switch port 204.

[0053] The second row of pins, pin 2, is electrically connected to the first switch port 201, and the second switch port 202 is electrically connected to the GPIO pin of the CPU.

[0054] After the first pin 1 is electrically connected to the third switch port 203, it is connected to the first power supply V. DD ;

[0055] The third row of pins pin3 is electrically connected to one end of resistor R, the other end of resistor R is electrically connected to the second switch port 202, and the third row of pins pin3 is grounded;

[0056] The fourth switch port 204 is connected to the second power supply V. SS Electrical connection;

[0057] When pin 1 of the first pin row is connected to pin 2 of the second pin row via a jumper, the CPU's GPIO pin receives a high level; when pin 2 of the second pin row is connected to pin 3 of the third pin row via a jumper, the CPU's GPIO pin receives a low level. The controlled switch module 2 includes: a first transistor T1 and a second transistor T2; as shown... Figure 2 As shown.

[0058] The first transistor T1 includes a first transistor first electrode T 101 The first transistor's second electrode T 102 The third electrode of the first transistor T 103 The second transistor T2 includes the second transistor first electrode T 201 The second transistor, second electrode T 202 The second transistor's third electrode T 203 ;

[0059] First transistor, first electrode T 101 With the first electrode T of the second transistor 201 After electrical connection, as the first switch port 201, the second electrode T of the first transistor 102 With the second electrode T of the second transistor 202 After electrical connection, as the second switch port 202, the third electrode T of the first transistor 103 As the third switch port 203 is connected to the first power supply V DD Electrical connection, second transistor, third electrode T 203 As the fourth switch port 204 and the second power supply V SS Electrical connection. V DD It is a positive voltage, V SS It is a negative voltage.

[0060] In one embodiment, the first transistor T1 is an NMOS transistor, the second transistor T2 is a PMOS transistor, and the first electrode of the first transistor T1 is... 101 The gate of the first transistor, and the second electrode T of the first transistor. 102 The source of the first transistor, and the third electrode T of the first transistor. 103 The drain of the first transistor is T, and the first electrode of the second transistor is T. 201 The gate of the second transistor, the second electrode T of the second transistor 202 The source of the second transistor, and the third electrode T of the second transistor. 203 This is the drain of the second transistor.

[0061] When the first row of pins (pin1) and the second row of pins (pin2) are electrically connected via a jumper cap, the first power supply V... DDThe voltage applied to the gate of the first transistor T1 turns it on, and the high level is transmitted to the CPU via GPIO and stored in the CPU's register. The controller reads the level state of the BIOS log printing serial port from the register and sets the BIOS log printing serial port accordingly. When the second row of pins pin 2 and the third row of pins pin 3 are electrically connected via jumpers, the second power supply V... SS A voltage is applied to the gate of the second transistor T2, causing it to conduct. A low-level signal is transmitted to the CPU via GPIO and stored in the CPU's register. The controller reads the voltage level of the BIOS log printing serial port from the register and configures the BIOS log printing serial port accordingly. Specifically, when the controller reads a high level, it sets the BIOS log printing serial port to "enabled"; when it reads a low level, it sets it to "disabled".

[0062] When a high level is transmitted to the CPU's GPIO pin via the controlled switch module 2, a turn-on time is required for the transistor to conduct. This ensures that there is a delay between the moment the high level is transmitted to the CPU's GPIO pin and the CPU's power-on, thus guaranteeing the safe operation of the CPU.

[0063] The outer layer of the jump cap is made of insulating material, while the inner layer is made of conductive material.

[0064] The jumper cap has two pin header interfaces for connecting two adjacent pin headers of connector 1. When the jumper cap is connected to the pin headers of connector 1, an electrical connection is formed between the two pin headers through the inner conductive material of the jumper cap.

[0065] In another embodiment, a serial port status setting method, such as Figure 3 As shown, a serial port status setting circuit described in the first aspect above controls the enable switch status of the BIOS log printing serial port, the method including:

[0066] S1: The BIOS self-test program detects the connector status of the serial port status setting circuit and obtains the corresponding serial port enable status.

[0067] S2: Configure the BIOS log printing serial port to enable based on the corresponding serial port enable status.

[0068] Specifically, the BIOS self-test program detects the connector status of the serial port status setting circuit to obtain the corresponding serial port enable status, including:

[0069] If the BIOS self-test program detects that the first and second rows of pins of the serial port status setting circuit are electrically connected, the serial port enable status is "enabled on".

[0070] If the BIOS self-test program detects that the second and third rows of pins of the serial port status setting circuit are electrically connected, the serial port enable status will be "enabled off".

[0071] The computer will start normally when the first row of pins, the second row of pins, and the third row of pins are not electrically connected to each other.

[0072] Based on the corresponding serial port enable status, configure the BIOS log printing serial port to enable settings, including:

[0073] When the serial port enable status is "enabled on", set the serial port status to be on for BIOS log printing;

[0074] When the serial port enable status is "Enable Off", set the BIOS log printing serial port status to "Off".

[0075] When the first row of pins and the second row of pins are electrically connected via a jumper cap, the first power supply V DD The voltage applied to the gate of the first transistor T1 turns it on, and the high level is transmitted to the CPU via GPIO and stored in the CPU's register. When the second pin header pin2 and the third pin header pin3 are electrically connected via jumpers, the second power supply V... SS A voltage is applied to the gate of the second transistor T2, causing it to conduct. A low-level signal is transmitted to the CPU via GPIO and stored in the CPU's register. The controller reads the voltage level of the BIOS log printing serial port from the register and configures the BIOS log printing serial port accordingly. Specifically, when the controller reads a high level, it sets the BIOS log printing serial port to "enabled"; when it reads a low level, it sets it to "disabled".

[0076] After setting the BIOS log printing serial port status to enabled, it also includes:

[0077] Connect the serial cable to the enabled BIOS log printing serial port to print BIOS logs.

[0078] After enabling the BIOS log printing serial port, the following steps are also required: Powering on the computer normally.

[0079] A method for setting serial port status also includes:

[0080] Power off the computer whose BIOS log printing serial port is located.

[0081] Use a jumper cap to connect the pin headers of the corresponding connector;

[0082] Power on the computer that hosts the BIOS log printing serial port.

[0083] Use a jumper cap to connect the pin headers of the corresponding connector, including:

[0084] Connect the first and second rows of pins of the connector using a jumper cap;

[0085] or,

[0086] Connect the second and third rows of pins of the connector using a jumper cap.

[0087] All of the above-mentioned optional technical solutions can be combined in any way to form optional embodiments of the present invention, and will not be described in detail here.

[0088] Example 1

[0089] The following is combined Figure 1 2. A serial port status setting circuit is described to control the enable switch status of the BIOS log printing serial port. The circuit includes: connector 1, controlled switch module 2, CPU, resistor R, and first power supply V. DD Second power supply V SS ;

[0090] Connector 1 includes: first row of pins pin1, second row of pins pin2, and third row of pins pin3; controlled switch module 2 includes first switch port 201, second switch port 202, third switch port 203, and fourth switch port 204.

[0091] The second row of pins, pin 2, is electrically connected to the first switch port 201, and the second switch port 202 is electrically connected to the GPIO pin of the CPU.

[0092] After the first pin 1 is electrically connected to the third switch port 203, it is connected to the first power supply V. DD ;

[0093] The third row of pins, pin 3, is electrically connected to one end of resistor R, and the other end of resistor R is electrically connected to the second switch port 202. The third row of pins, pin 3, is grounded.

[0094] The fourth switch port 204 is connected to the second power supply V. SS Electrical connection;

[0095] When pin 1 of the first pin row is connected to pin 2 of the second pin row via a jumper, the CPU's GPIO pin receives a high level; when pin 2 of the second pin row is connected to pin 3 of the third pin row via a jumper, the CPU's GPIO pin receives a low level. The controlled switch module 2 includes: a first transistor T1 and a second transistor T2; as shown... Figure 2 As shown.

[0096] The first transistor T1 includes a first transistor first electrode T 101 The first transistor's second electrode T 102 The third electrode of the first transistor T 103 The second transistor T2 includes the second transistor first electrode T 201 The second transistor, second electrode T 202 The second transistor's third electrode T 203 ;

[0097] First transistor, first electrode T 101 With the first electrode T of the second transistor 201 After electrical connection, as the first switch port 201, the second electrode T of the first transistor 102 With the second electrode T of the second transistor 202 After electrical connection, as the second switch port 202, the third electrode T of the first transistor 103 As the third switch port 203 is connected to the first power supply V DD Electrical connection, second transistor, third electrode T 203 As the fourth switch port 204 and the second power supply V SS Electrical connection. V DD It is a positive voltage, V SS It is a negative voltage.

[0098] In one embodiment, the first transistor T1 is an NMOS transistor, the second transistor T2 is a PMOS transistor, and the first electrode of the first transistor T1 is... 101 The gate of the first transistor, and the second electrode T of the first transistor. 102 The source of the first transistor, and the third electrode T of the first transistor. 103 The drain of the first transistor is T, and the first electrode of the second transistor is T. 201 The gate of the second transistor, the second electrode T of the second transistor 202 The source of the second transistor, and the third electrode T of the second transistor. 203 This is the drain of the second transistor.

[0099] When the first row of pins (pin1) and the second row of pins (pin2) are electrically connected via a jumper cap, the first power supply V... DD The voltage applied to the gate of the first transistor T1 turns it on, and the high level is transmitted to the CPU via GPIO and stored in the CPU's register. The controller reads the level state of the BIOS log printing serial port from the register and sets the BIOS log printing serial port accordingly. When the second row of pins pin 2 and the third row of pins pin 3 are electrically connected via jumpers, the second power supply V... SSA voltage is applied to the gate of the second transistor T2, causing it to conduct. A low-level signal is transmitted to the CPU via GPIO and stored in the CPU's register. The controller reads the voltage level of the BIOS log printing serial port from the register and configures the BIOS log printing serial port accordingly. Specifically, when the controller reads a high level, it sets the BIOS log printing serial port to "enabled"; when it reads a low level, it sets it to "disabled".

[0100] When a high level is transmitted to the CPU's GPIO pin via the controlled switch module 2, a turn-on time is required for the transistor to conduct. This ensures that there is a delay between the moment the high level is transmitted to the CPU's GPIO pin and the CPU's power-on, thus guaranteeing the safe operation of the CPU.

[0101] The outer layer of the jump cap is made of insulating material, while the inner layer is made of conductive material.

[0102] The jumper cap has two pin header interfaces for connecting two adjacent pin headers of connector 1. When the jumper cap is connected to the pin headers of connector 1, an electrical connection is formed between the two pin headers through the inner conductive material of the jumper cap.

[0103] Example 2

[0104] The following is combined Figure 3 This paper describes a serial port status setting method for a serial port status setting circuit described in the first aspect above, which controls the BIOS log printing of the serial port enable switch status. The method includes:

[0105] S1: The BIOS self-test program detects the connector status of the serial port status setting circuit and obtains the corresponding serial port enable status.

[0106] S2: Configure the BIOS log printing serial port to enable based on the corresponding serial port enable status.

[0107] Example 3

[0108] A serial port status setting method, used in the serial port status setting circuit described in the first aspect above, controls the BIOS log printing of the serial port enable switch status, the method including:

[0109] S1: The BIOS self-test program detects the connector status of the serial port status setting circuit and obtains the corresponding serial port enable status.

[0110] S2: Configure the BIOS log printing serial port to enable based on the corresponding serial port enable status.

[0111] Specifically, the BIOS self-test program detects the connector status of the serial port status setting circuit to obtain the corresponding serial port enable status, including:

[0112] If the BIOS self-test program detects that the first and second rows of pins of the serial port status setting circuit are electrically connected, the serial port enable status is "enabled on".

[0113] If the BIOS self-test program detects that the second and third rows of pins of the serial port status setting circuit are electrically connected, the serial port enable status will be "enabled off".

[0114] The computer will start normally when the first row of pins, the second row of pins, and the third row of pins are not electrically connected to each other.

[0115] Based on the corresponding serial port enable status, configure the BIOS log printing serial port to enable settings, including:

[0116] When the serial port enable status is "enabled on", set the serial port status to be on for BIOS log printing;

[0117] When the serial port enable status is "Enable Off", set the BIOS log printing serial port status to "Off".

[0118] When the first row of pins and the second row of pins are electrically connected via a jumper cap, the first power supply V DD The voltage applied to the gate of the first transistor T1 turns it on, and the high level is transmitted to the CPU via GPIO and stored in the CPU's register. When the second pin header pin2 and the third pin header pin3 are electrically connected via jumpers, the second power supply V... SS A voltage is applied to the gate of the second transistor T2, causing it to conduct. A low-level signal is transmitted to the CPU via GPIO and stored in the CPU's register. The controller reads the voltage level of the BIOS log printing serial port from the register and configures the BIOS log printing serial port accordingly. Specifically, when the controller reads a high level, it sets the BIOS log printing serial port to "enabled"; when it reads a low level, it sets it to "disabled".

[0119] After setting the BIOS log printing serial port status to enabled, it also includes:

[0120] Connect the serial cable to the enabled BIOS log printing serial port to print BIOS logs.

[0121] After enabling the BIOS log printing serial port, the following steps are also required: Powering on the computer normally.

[0122] A method for setting serial port status also includes:

[0123] Power off the computer whose BIOS log printing serial port is located.

[0124] Use a jumper cap to connect the pin headers of the corresponding connector;

[0125] Power on the computer that hosts the BIOS log printing serial port.

[0126] Use a jumper cap to connect the pin headers of the corresponding connector, including:

[0127] Connect the first and second rows of pins of the connector using a jumper cap;

[0128] or,

[0129] Connect the second and third rows of pins of the connector using a jumper cap.

[0130] Specifically, according to embodiments of this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this application include a computer program product comprising a computer program loaded on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from memory, or installed from ROM. When the computer program is executed by an external processor, it performs the functions defined in the methods of embodiments of this application.

[0131] It should be noted that the computer-readable medium in the embodiments of this application can be a computer-readable signal medium or a computer-readable storage medium, or any combination of the two. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In the embodiments of this application, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In the embodiments of this application, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium can be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wires, optical fibers, RF (Radio Frequency), etc., or any suitable combination thereof.

[0132] The aforementioned computer-readable medium may be included in the aforementioned server; or it may exist independently and not assembled into the server. The aforementioned computer-readable medium carries one or more programs that, when executed by the server, cause the server to: in response to detecting that the peripheral mode of the terminal is not activated, acquire the frame rate of the application on the terminal; when the frame rate meets the screen-off condition, determine whether the user is acquiring the terminal's screen information; and in response to the determination that the user is not acquiring the terminal's screen information, control the screen to enter an immediate dimming mode.

[0133] Computer program code for performing the operations of the embodiments of this application can be written in one or more programming languages ​​or a combination thereof. Programming languages ​​include object-oriented programming languages—such as Java, Smalltalk, and C++—and conventional procedural programming languages—such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0134] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, for system or system embodiments, since they are basically similar to method embodiments, the description is relatively simple, and relevant parts can be referred to the descriptions in the method embodiments. The systems and system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0135] The technical solutions provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

[0136] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A serial port status setting circuit for controlling an enabling switch state of a BIOS log printing serial port, characterized in that, The circuit comprises a connector, a controlled switch module, a CPU, a resistor, a first power supply and a second power supply. The connector comprises a first pin row, a second pin row and a third pin row, and the controlled switch module comprises a first switch port, a second switch port, a third switch port and a fourth switch port. The second pin row is electrically connected to the first switch port, and the second switch port is electrically connected to a GPIO pin of the CPU. The first pin row is electrically connected to the third switch port and then connected to the first power supply. The third pin row is electrically connected to one end of the resistor, and the other end of the resistor is electrically connected to the second switch port, and the third pin row is grounded. The fourth switch port is electrically connected to the second power supply. When the first pin row and the second pin row are connected by a jumper cap, the GPIO pin of the CPU receives a high level, and when the second pin row and the third pin row are connected by a jumper cap, the GPIO pin of the CPU receives a low level. The controlled switch module comprises a first transistor and a second transistor. The first transistor comprises a first transistor first electrode, a first transistor second electrode and a first transistor third electrode, and the second transistor comprises a second transistor first electrode, a second transistor second electrode and a second transistor third electrode. The first transistor first electrode is electrically connected to the second transistor first electrode, serving as the first switch port, the first transistor second electrode is electrically connected to the second transistor second electrode, serving as the second switch port, the first transistor third electrode is electrically connected to the first power supply, serving as the third switch port, and the second transistor third electrode is electrically connected to the second power supply, serving as the fourth switch port. The inner layer of the jumper cap is made of conductive material, and the jumper cap is provided with two pin row interfaces for connecting two adjacent pin rows of the connector; when the jumper cap connects the pin rows of the connector, the inner layer of the jumper cap is used to form electrical connection between the two pin rows.

2. The serial port status setting circuit according to claim 1, wherein The outer layer of the jumper cap is made of insulating material.

3. A method for setting the state of a serial port, used in the serial port state setting circuit of claim 1 or 2, for controlling the state of the enabling switch of the BIOS log printing serial port, characterized in that, The method comprises: detecting the connector state of the serial port state setting circuit through a BIOS self-check program to obtain a corresponding serial port enable state; enabling and setting the BIOS log printing serial port according to the corresponding serial port enable state.

4. The method of claim 3, wherein, The detection of the connector state of the serial port state setting circuit through the BIOS self-check program to obtain the corresponding serial port enable state comprises: if the BIOS self-check program detects that the first pin row and the second pin row of the serial port state setting circuit are electrically connected, the serial port enable state is "enable on"; if the BIOS self-check program detects that the second pin row and the third pin row of the serial port state setting circuit are electrically connected, the serial port enable state is "enable off"; when the first pin row, the second pin row and the third pin row are not electrically connected to each other, the computer is normally started.

5. The method of claim 4, wherein, The enabling and setting of the BIOS log printing serial port according to the corresponding serial port enable state comprises: When the serial port enable state is "enable on", set the BIOS log printing serial port state as on; When the serial port enable state is "enable off", set the BIOS log printing serial port state as off.

6. The method of claim 5, wherein, After setting the BIOS log printing serial port state as on, further comprising: Connect the serial port line to the opened BIOS log printing serial port to print the BIOS log.

7. The method of claim 3, wherein the method further comprises: After enabling the BIOS log printing serial port, further comprising:

8. The method of claim 3, wherein, Normally start the computer. The method further comprises before: AC power off the computer where the BIOS log printing serial port is located; Use the jumper cap to connect the pin of the corresponding connector; 9. The method of claim 8, wherein, AC power on the computer where the BIOS log printing serial port is located. The use of jumper cap to connect the pin of the corresponding connector, comprising: Connect the first pin and the second pin of the connector through the jumper cap; Or, Connect the second pin and the third pin of the connector through the jumper cap.

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