An audio data processing chip and headphones

Abstract

This application relates to the field of chip technology, and more particularly to an audio data processing chip and headphones. The chip includes: a first DMA module for acquiring first audio data from a first channel of a codec and storing the first audio data in a first cache of memory; a first processor for acquiring the first audio data from the first cache and performing hearing aid processing on the first audio data to obtain second audio data, storing the second audio data in a second cache of memory; a second DMA module for storing the second audio data from the second cache in a second channel of the codec; and a second processor for processing the third audio data according to its corresponding function to obtain fourth audio data. This allows the hearing aid function to be separated from other functions, avoiding mutual interference between different functional tasks, and thus enabling the integration of various functional tasks.

Description

Technical Field

[0001] This application relates to the field of chip technology, and in particular to an audio data processing chip and headphones. Background Technology

[0002] As the aging population grows, the living standards of the elderly should also receive attention. For the elderly, hearing loss is declining year by year, thus increasing the demand for hearing aids.

[0003] Traditional hearing aids only amplify sound. This involves a microphone capturing ambient sound, converting it into analog electrical signals, sampling these signals according to a fixed format, converting them into digital signals, filtering or amplifying the digital signals through hardware circuitry, converting them back into analog signals, and finally transmitting them to the external system via a sound sensor. However, this approach only amplifies sound. Modern electronic devices also include other audio functions, such as making calls, listening to music, and voice communication. Combining hearing aid functionality with other audio functions is a necessary requirement to meet the demands of modern technology.

[0004] Therefore, there is an urgent need for an audio data processing chip and headphones to combine hearing aid functions with other audio functions. Summary of the Invention

[0005] This application provides an audio data processing chip and headphones, which are used to combine hearing aid functions with other audio functions.

[0006] In a first aspect, embodiments of this application provide an audio data processing chip, comprising: a codec, a first direct memory access (DMA) module, a second DMA module, a memory, a first processor, and a second processor; the first DMA module is configured to acquire first audio data from a first channel of the codec and store the first audio data in a first cache of the memory; the first processor is configured to acquire the first audio data from the first cache and perform hearing aid processing on the first audio data to obtain second audio data, and store the second audio data in a second cache of the memory; the second DMA module is configured to store the second audio data in the second cache in a second channel of the codec; the second processor is configured to process the third audio data according to the function to which the third audio data belongs, to obtain fourth audio data; the function to which the third audio data belongs is a function other than hearing aid function.

[0007] In the above method, an audio data processing chip is provided, which includes two processors. The first processor is used to process hearing aid functions, and the second processor is used to process other functions besides hearing aid functions. This separates hearing aid functions from other functions, avoids mutual interference between functional tasks, prevents other functional tasks from interrupting the hearing aid function processing task, thereby reducing the latency of the hearing aid audio path and realizing the combination of various functional tasks.

[0008] In one possible implementation, the chip further includes an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC); the ADC is used to convert the acquired audio signal into audio data and transmit the audio data to the codec; the DAC is used to convert the audio data acquired from the codec into an audio signal.

[0009] In the above method, the first audio data is preprocessed before being acquired by the first DMA module to ensure that the first DMA module can acquire the first audio data with the correct format.

[0010] In one possible implementation, the chip further includes a short-range communication module; the short-range communication module is used to send and receive audio data with an electronic device.

[0011] In the above method, the short-range communication module can realize the transmission and reception of audio data, ensuring that the device containing the chip can be interconnected with other devices, and increasing the possibility of the chip being compatible with more scenarios.

[0012] In one possible implementation, the function is a call function, and the chip further includes a third DMA module; the third DMA module is used to obtain the third audio data from the third channel of the encoder and decoder, and store the third audio data in the third cache of the memory; the second processor is specifically used to obtain the third audio data from the third cache, process the third audio data for the call function, obtain the fourth audio data, and transmit the fourth audio data to the short-range communication module.

[0013] In the above method, when implementing the call function, the second processor processes the third audio data and stores it in the third buffer, separating the audio path of the call function and the audio path of the hearing aid function. The two functions are performed independently to avoid mutual interference and improve the reliability of the combination of various functions.

[0014] In one possible implementation, the function is audio playback, and the chip further includes a fourth DMA module; the second processor is specifically used to obtain the third audio data from the short-range communication module, and process the third audio data for audio playback to obtain fifth audio data; the fifth audio data is written into the fourth buffer of the memory; the fourth DMA module is used to transfer the fifth audio data from the fourth buffer to the fourth channel of the codec.

[0015] In the above method, when implementing the audio playback function, the second processor processes the third audio data and stores it in the fourth buffer. This separates the audio path of the audio playback function from the audio path of the hearing aid function, allowing the two functions to operate independently, avoiding mutual interference, and improving the reliability of the hearing aid function and its combination.

[0016] In one possible implementation, the first DMA module is further configured to send an interrupt request to the first processor after storing the first audio data in the first cache of the memory according to the first interrupt signal; the first processor is specifically configured to retrieve the first audio data from the first cache according to the interrupt request, and store the processed second audio data in the second cache; the second DMA module is specifically configured to store the second audio data from the second cache in the second channel of the codec according to the second interrupt signal, wherein the first interrupt signal and the second interrupt signal are issued by the interrupt controller in the first processor.

[0017] In the above method, controlling the first DMA module and the second DMA module in an interrupt manner can enable the first DMA module and the second DMA module to work according to the interrupt cycle, which facilitates the control of the two DMA modules in a periodic manner to meet the low latency requirements of the audio path.

[0018] In one possible implementation, the first buffer includes a first storage unit and a second storage unit, and the second buffer includes a third storage unit and a fourth storage unit; the first DMA module is specifically used to store the first audio data acquired in different interrupt cycles into the first storage unit and the second storage unit in a polling manner; the second DMA module is specifically used to store the second audio data acquired in different interrupt cycles into the second channel of the codec in the third storage unit and the fourth storage unit in a polling manner.

[0019] In the above method, each buffer is divided into two buffer units, so that when data is written to one buffer unit, data can be read from the other buffer unit. The two buffers operate independently and simultaneously to reduce audio data transmission time and lower the latency of the audio path. The total latency T in the audio path... n for:

[0020] T n =TT d

[0021] Where T d The enable signal of the second DMA module is earlier than the enable signal of the first DMA module by a certain time, where T is one cycle of the high and low signals.

[0022] In one possible implementation, the enable signal of the second DMA module is earlier than the enable signal of the first DMA module.

[0023] Secondly, embodiments of this application provide an audio data processing method, the method comprising: a first DMA module, which acquires first audio data from a first channel of the codec and stores the first audio data in a first cache of the memory; a first processor, which acquires the first audio data from the first cache and performs hearing aid function processing on the first audio data to obtain second audio data, and stores the second audio data in a second cache of the memory; a second DMA module, which stores the second audio data in the second cache in a second channel of the codec; and a second processor, which processes the third audio data according to the function to which the third audio data belongs, to obtain fourth audio data; the function to which the third audio data belongs is a function other than hearing aid function.

[0024] The chip further includes an analog-to-digital converter and a digital-to-analog converter; the method further includes: the analog-to-digital converter converting the acquired audio signal into audio data and transmitting the audio data to the codec; the digital-to-analog converter converting the audio data acquired from the codec into an audio signal.

[0025] The chip also includes a short-range communication module; the method further includes the short-range communication module and the electronic device transmitting and receiving audio data.

[0026] The function is a call function, and the chip also includes a third DMA module; the method further includes: the third DMA module obtains the third audio data from the third channel of the encoder and decoder, and stores the third audio data in the third cache of the memory; the second processor obtains the third audio data from the third cache, processes the third audio data for the call function, obtains the fourth audio data, and transmits the fourth audio data to the short-range communication module.

[0027] The chip, which is for audio playback, also includes a fourth DMA module. The method further includes: the second processor acquiring the third audio data from the short-range communication module and processing the third audio data for audio playback to obtain fifth audio data; writing the fifth audio data into the fourth cache of the memory; and the fourth DMA module transferring the fifth audio data from the fourth cache to the fourth channel of the codec.

[0028] The first DMA module acquires first audio data from the first channel of the codec and stores the first audio data in the first cache of the memory, including: after the first DMA module stores the first audio data in the first cache of the memory according to the first interrupt signal, it sends an interrupt request to the first processor; the first processor acquires the first audio data from the first cache according to the interrupt request, and stores the processed second audio data in the second cache.

[0029] The second DMA module stores the second audio data in the second buffer to the second channel of the codec, including: the second DMA module stores the second audio data in the second buffer to the second channel of the codec according to a second interrupt signal, wherein the first interrupt signal and the second interrupt signal are issued by the interrupt controller in the first processor.

[0030] The first buffer includes a first storage unit and a second storage unit, and the second buffer includes a third storage unit and a fourth storage unit. The first DMA module stores the first audio data into the first buffer of the memory, including: the first DMA module stores the first audio data acquired in different interrupt cycles into the first storage unit and the second storage unit in a polling manner. The second DMA module stores the second audio data in the second buffer into the second channel of the codec, including: the second DMA module stores the second audio data acquired in different interrupt cycles into the second channel of the codec in the third storage unit and the fourth storage unit in a polling manner.

[0031] Thirdly, embodiments of this application provide a hearing aid headset, including: a microphone, a speaker, and the chip mentioned in the first aspect above.

[0032] The beneficial effects of the second and third aspects mentioned above can be specifically referred to as the beneficial effects that can be achieved by any of the designs in the first aspect mentioned above, and will not be elaborated here. Attached Figure Description

[0033] Figure 1 An exemplary illustration shows an application scenario provided by an embodiment of this application;

[0034] Figure 2 This illustration shows another application scenario provided by an embodiment of the present application;

[0035] Figure 3 An exemplary schematic diagram of an audio data processing chip provided in an embodiment of this application is shown.

[0036] Figure 4 This illustration shows a schematic diagram of the structure of another audio data processing chip provided in an embodiment of this application;

[0037] Figure 5 An exemplary schematic diagram of another audio data processing chip provided in an embodiment of this application is shown;

[0038] Figure 6 An exemplary schematic diagram of another audio data processing chip provided in an embodiment of this application is shown;

[0039] Figure 7 An exemplary schematic diagram of another audio data processing chip provided in an embodiment of this application is shown;

[0040] Figure 8 An exemplary schematic diagram of a cache area provided in an embodiment of this application is shown;

[0041] Figure 9An exemplary timing diagram of an audio data processing embodiment provided in this application is shown;

[0042] Figure 10 An exemplary flowchart of an audio data processing method provided in an embodiment of this application is shown. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0044] Figure 1 An exemplary diagram illustrating an application scenario provided by an embodiment of this application is shown. Figure 1 As shown, after the sound source emits sound, the microphone picks it up and converts the sound signal into an analog signal. An analog signal is an electrical signal that can be processed and transmitted by hardware circuitry. The analog signal is then sampled by an analog-to-digital converter (ADC) and converted into a digital signal. The digital signal is then transmitted to the hardware module, which processes it. For example, the hardware module can use filters to filter the digital signal and amplifiers to amplify it. The processed digital signal is then transmitted to a digital-to-analog converter (DAC), which converts it back into an analog signal and transmits it to the player for playback.

[0045] In the above Figure 1 In this structure, sound processing is only done in hardware. The sound processed by hardware only achieves basic hearing aid functions such as filtering or amplification. Although the delay between the sound source and the player is very short in this sound path, this structure does not provide a software algorithm interface for sound processing. The sound processing method is very simple and its scalability is not high.

[0046] Furthermore, with the widespread use of modern electronic devices, the demand for modern electronic devices among people using hearing aids is also increasing. Therefore, combining hearing aid functions with the audio functions of modern electronic devices is an inevitable trend.

[0047] Figure 2 This illustration shows another application scenario provided by an embodiment of the present application, such as... Figure 2As shown, after the sound source emits sound, the microphone picks it up and converts the sound signal into an analog signal. The analog signal is then sampled by an analog-to-digital converter (ADC), which converts the analog signal into a digital signal by setting multiple sampling points. The digital signal is then transmitted to the hardware module for processing. Before being transmitted to the ADC, the digital signal undergoes computational processing by software algorithms in the central processing unit (CPU) before being transmitted to the ADC, finally forming an analog signal for playback by the player.

[0048] The above structure introduces a software algorithm interface, which can perform software calculations on digital sound signals to achieve flexibility and high scalability in sound processing.

[0049] Building upon this foundation, other audio functions can be introduced, such as call functionality, music functionality, and two-way audio. Each functional module shares the CPU and operates through time-sharing scheduling. However, in this approach, with multiple functions sharing the CPU, the audio path for a single hearing aid function may be interrupted by other functions. This is because the CPU uses interrupt control to determine the execution process of each function. During audio data processing, interrupts from other functional modules are likely to occur. In this case, the CPU first processes the tasks of other functional modules, and only after those tasks are completed, when the next audio data processing task interrupt arrives, does it begin processing the audio data. However, for hearing aid functions, the audio path needs to have low latency. That is, in... Figure 2 In this approach, the time between sound emanating from the sound source, traveling through the audio path, and being played by the player should be minimized. However, in the method described above, the audio processing is interrupted by the processing of other functional modules, thus failing to meet the requirement of low latency in the audio path.

[0050] Based on this, this application provides an audio data processing chip for adding other extended functions to hearing aids, while meeting the requirements of low latency in the audio path.

[0051] Figure 3 An exemplary schematic diagram of an audio data processing chip provided in an embodiment of this application is shown. Figure 2The audio data processing chip shown includes: a codec, a first Direct Memory Access (DMA) module (DMA1), a second DMA module (DMA2), a memory, a first processor, and a second processor. One port of the first DMA module (DMA1) is connected to the codec via a first channel CH1, and the other port is connected to the memory. The first and second processors can retrieve data from and write data to the memory. One port of the second DMA module (DMA2) is connected to the memory, and the other port is connected to the second channel CH2 of the codec. DMA is a type of direct memory access that allows communication between hardware devices of different speeds without relying on a large interrupt load from the CPU.

[0052] like Figure 3 As shown, the first DMA module DMA1 is used to obtain the first audio data from the first channel CH1 of the codec and store the first audio data in the first cache area of ​​the memory.

[0053] For example, the codec includes a first-in-first-out (FIFO) buffer containing different queues. After the codec obtains audio data from the previous device, it places the audio data into the respective queues. Each queue contains complete audio data, and the data format can be the same or different. The first DMA module DMA1 obtains the first audio data from one queue of the codec's FIFO buffer and stores the first audio data in memory.

[0054] As a further example, the aforementioned device may be an analog-to-digital converter, and if the radio device of the device in which the chip is located is a digital microphone, then a digital microphone may not be necessary.

[0055] The memory has multiple cache areas, which can store data written by different DMA modules, as well as data processed by the processor.

[0056] A first processor is configured to obtain first audio data from a first cache, perform hearing aid processing on the first audio data to obtain second audio data, and store the second audio data in a second cache of the memory.

[0057] The primary purpose of hearing aids is to amplify sound, making it easier for hearing-impaired individuals to hear normal sounds. The processor's hearing aid function uses software algorithms to amplify the audio signal. During this process, other processing can also be performed on the audio signal, such as noise filtering.

[0058] The second DMA module DMA2 is used to store the second audio data in the second buffer to the second channel CH2 of the codec.

[0059] For example, the second audio data is stored in the second FIFO buffer of the codec so that subsequent devices can access it.

[0060] The second processor is used to process the third audio data according to the function to which the third audio data belongs, so as to obtain the fourth audio data; the function to which the third audio data belongs is a function other than hearing aid function.

[0061] The function to which the third audio data belongs can be any function other than hearing aid function, such as music function, video function, call function, or any other function that requires hearing sound. The specific implementation method will be detailed below.

[0062] The reason why the first processor handles hearing aid functions, while the second processor handles other functions such as music, video, and calls, is that hearing aid functions require low latency and near real-time processing. The latency for hearing aid functions is generally required to be within 1ms, 3ms, or 5ms. If music, video, and call functions are processed simultaneously in the first processor, the latency requirements for these functions (generally within 20ms, 30ms, 50ms, or 100ms) would be too high, resulting in longer task times and preventing near real-time performance of the hearing aid function.

[0063] Figure 4 An exemplary schematic diagram of another audio data processing chip provided in an embodiment of this application is shown, such as... Figure 4 As shown, the chip also includes an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC); the ADC is used to convert the acquired audio signal into audio data and transmit the audio data to the codec; the DAC is used to convert the audio data obtained from the codec into an audio signal.

[0064] For example, after receiving sound, the receiver converts it into an analog audio signal. The analog-to-digital converter then samples the signal to convert it into a digital signal, i.e., audio data, and transmits the audio data to the first FIFO buffer of the codec. The FIFO buffer buffers the audio data in a queue manner. It should be understood that... Figure 3 Only one microphone is shown in the diagram. In some embodiments, there may be multiple microphones, for example, one microphone on each of the left and right earpieces. Furthermore, if each earpiece is equipped with an audio data processing chip, then each chip corresponds to one or more microphones.

[0065] As further exemplified, the digital-to-analog converter can retrieve audio data from the queue of a second first-in-first-out buffer and convert the audio data into an analog audio signal so that the analog audio signal can be played by a player. It should be understood that... Figure 4 Only one player is shown in the image. In some embodiments, there may be multiple players, which may have different channels, or one channel may be transmitted to two players. For example, a left ear player and a right ear player for headphones.

[0066] Figure 5 An exemplary schematic diagram of another audio data processing chip provided in an embodiment of this application is shown, such as... Figure 5 As shown, the chip also includes a short-range communication module for sending and receiving audio data with electronic devices.

[0067] In one possible implementation, the short-range communication module can be a Bluetooth module. After an electronic device is paired and connected via Bluetooth, data can be transmitted between the two devices via radio frequency. In a practical scenario, such as listening to music, the audio data can be transmitted from the electronic device to the chip via Bluetooth.

[0068] In another possible implementation, the short-range communication module can also be a ZigBee module, IrDA, or other modules. Any module with short-range communication function is within the protection scope of this application, and will not be elaborated further here.

[0069] The following describes the specific implementation method of the function belonging to the third audio data:

[0070] Method 1: The function is a call function.

[0071] Figure 6 This illustration shows a schematic diagram of the structure of another audio data processing chip provided in an embodiment of this application. Figure 6 As shown, to implement the call function, the chip should also include a third DMA module DMA3, which is used to obtain the third audio data from the third channel CH3 of the encoder / decoder and store the third audio data in the third cache of the memory; the second processor obtains the third audio data from the third cache, processes the third audio data for the call function, obtains the fourth audio data, and transmits the fourth audio data to the short-range communication module.

[0072] The call processing can involve denoising the third audio data obtained from the codec to remove environmental noise and highlight the human voice, or correcting unclear human voices captured by the microphone to achieve better call quality. The processed third audio data results in fourth audio data, which can be pre-stored in the memory buffer or transmitted to a short-range communication module for transmission to the electronic device, and then to the other party in the call via the electronic device's mobile network.

[0073] Method 2: The function is audio playback.

[0074] Figure 7 This illustration shows a schematic diagram of the structure of another audio data processing chip provided in an embodiment of this application. Figure 7 As shown, to implement the audio playback function, the chip should also include a fourth DMA module, DMA4. The second processor is specifically used to obtain third audio data from the short-range communication module, process the third audio data for audio playback, and obtain fifth audio data; the fifth audio data is written into the fourth buffer of the memory; the fourth DMA module, DMA4, is used to transfer the fifth audio data from the fourth buffer to the fourth channel CH4 of the codec.

[0075] In a specific implementation scenario, the audio playback function can be a music function. After the music signal from the electronic device is transmitted to the short-range communication module, the second processor obtains the third audio data containing the music signal from the short-range communication module and processes the third audio data. For example, the third audio data can be processed to support spatial audio data to achieve better sound effects; it can also be amplified to make the played sound louder, which can support users with hearing impairments. The processed third audio data, i.e., the fifth audio data, is written into the fourth buffer of the memory so that the fourth DMA module DMA4 can transfer the fifth audio data to the fourth channel CH4 of the codec. It can further be stored in a queue of the second first-in-first-out buffer so that the digital-to-analog converter can retrieve it. It should be understood that the above music function is just an example. In addition, the audio playback function can also play the sound in the video, or the voice in the voice intercom, etc.

[0076] It should be noted that Method 1 described above only presents one implementation of the call function, which involves collecting the audio via a receiver and transmitting it to the remote location through a short-range communication module, with latency requirements within 20ms, 30ms, 50ms, and 100ms. Another implementation involves playing the voice of the person being called, which can be performed in accordance with the audio playback function in Method 2 above, and will not be elaborated upon here.

[0077] For hearing aid functions, the first audio data is collected and played back by the player. This process involves converting sound into electrical signals, processing them appropriately, and then converting them back into sound for playback. This is one audio path the user hears. However, the user also hears another path: ambient sounds or speech outside the ear, which are transmitted from the physical space to the ear via the headphones. These two paths have different time delays. If the delay in the hearing aid's path is significant, the user can easily hear two sounds from the same source, resulting in poor hearing and a greatly negative impact on the user's listening experience. Music and video functions, on the other hand, are... Figure 5 As shown, the three audio data are received by short-range communication modules such as Bluetooth and Wi-Fi, and finally played out by the player.

[0078] The transmission process of the first audio data is described in detail below.

[0079] The first DMA module DMA1 stores the first audio data into the first cache of the memory according to the first interrupt signal, and then sends an interrupt request to the first processor. The first processor retrieves the first audio data from the first cache according to the interrupt request, and stores the processed second audio data into the second cache. The second DMA module DMA2 stores the second audio data from the second cache into the second channel CH2 of the codec according to the second interrupt signal. The first interrupt signal and the second interrupt signal are issued by the interrupt controller in the first processor.

[0080] Figure 8 An exemplary schematic diagram of a cache area provided in an embodiment of this application is shown, such as... Figure 8 As shown, the first cache area includes a first storage unit and a second storage unit, and the second cache area includes a third storage unit and a fourth storage unit;

[0081] The first DMA module DMA1 is specifically used to store the first audio data acquired in different interrupt cycles into the first storage unit and the second storage unit in a polling manner.

[0082] For example, the first audio data can be stored in the first storage unit during the first half of an interrupt cycle, and stored in the second storage unit during the second half of an interrupt cycle.

[0083] The second DMA module DMA2 is specifically used to store the second audio data acquired in different interrupt cycles into the second channel CH2 of the codec in a polling manner, using the second audio data in the third and fourth storage units.

[0084] For example, the second audio data in the third storage unit can be stored in the second channel CH2 of the codec during the first half of an interrupt cycle; and the second audio data in the fourth storage unit can be stored in the second channel CH2 of the codec during the second half of an interrupt cycle.

[0085] According to the above storage method and the data interaction method between the first buffer and the second buffer, the enable signal of the second DMA module DMA2 can be made earlier than the enable signal of the first DMA module DMA1, so as to reduce the latency of audio data processing and transmission in the chip.

[0086] Figure 9 An exemplary timing diagram of an audio data processing embodiment provided in this application is shown, such as... Figure 9 As shown, the first storage unit of the first buffer is represented by A0, and the second storage unit is represented by A1; the third storage unit of the second buffer is represented by B0, and the fourth storage unit is represented by B1. The enable signal of the second DMA module DMA2 arrives at time T0, and the enable signal of the first DMA module DMA1 arrives at time T1.

[0087] At time T0, the second DMA module DMA2 receives the enable signal, retrieves audio data from buffer B0, and sends it to the second FIFO buffer. Then, the digital-to-analog converter (DAC) converts the audio data in the second FIFO buffer into a sound signal for playback to the speaker. In other words, after the second DMA module DMA2 is enabled, the second FIFO buffer is immediately filled with data, and then the DAC begins the conversion. When writing audio data to the second FIFO buffer, the second DMA module DMA2 writes the audio data to the second FIFO buffer at a fixed sampling frequency according to the buffer's synchronization signal.

[0088] Before the second DMA module DMA2 is enabled, B0 has been initialized to 0. When the second DMA module DMA2 receives the enable signal, the processor has not yet stored any data in B0. Therefore, the second DMA module DMA2 stores an empty dataset in the second channel CH2 of the codec, and thus the player after the second channel CH2 has no sound at this time.

[0089] At time T1, the first DMA module DMA1 receives an enable signal and then begins to acquire the first audio data from the first FIFO buffer, storing the first audio data in A0. During this process, the analog-to-digital converter operates at a certain frequency, capturing the external sound signal and converting it into a digital value, which is then sent to the first FIFO buffer. Assuming there are 2N sampling points in one cycle, where N is an integer greater than or equal to 1, at time T2, after acquiring N sampling points, the first DMA module DMA1 sends an interrupt request to the first processor. The first processor responds to the interrupt request, begins to acquire the first audio data from the first buffer, and stores the processed second audio data in B0.

[0090] Meanwhile, the first DMA module DMA1 receives the next first interrupt signal and stores the first audio data in A1 according to the first interrupt signal. At time T4 after collecting N sampling points, the first DMA module DMA1 sends an interrupt request to the first processor. The first processor responds to the interrupt request, starts to obtain the first audio data from the first buffer, and stores the processed second audio data in B1.

[0091] At time T3, before T2, the next second interrupt signal of the second DMA module DMA2 arrives. The second DMA module DMA2 stores the second audio data in B1 into the second channel CH2 of the codec according to the second interrupt signal. However, since the processor has not yet stored data in B1 at this time, the second DMA module DMA2 stores an empty dataset into the second channel CH2 of the codec.

[0092] At time T5, between T2 and T4, the next second interrupt signal from the second DMA module DMA2 arrives, requiring data to be present in B0 to meet the low latency requirements of the audio path. Therefore, the first processor must complete the reading and processing of data in A0 and store it in B0 before T5. Assuming the interrupt cycles of the first DMA module DMA1 and the second DMA module DMA2 are the same, then the time T for the first processor to read, process, and store the data in A0 is... c The following conditions must be met:

[0093]

[0094] Where T d The enable signal of the second DMA module DMA2 is earlier than the enable signal of the first DMA module DMA1 by a certain time, where T is... Figure 9 The period of high, medium and low signals, That is, the interrupt cycle of the first DMA module DMA1 or the second DMA module DMA2. Figure 9The generation cycle of DMA1IRQ or DMA2IRQ is determined. From this, the total delay time T of the audio path can be obtained. n for:

[0095] T n =TT d

[0096] Based on the same technical concept, this application also provides an audio data processing method. Figure 10 The illustration shows a flowchart of an audio data processing method provided in an embodiment of this application. This method can be executed on the aforementioned audio data processing chip, such as... Figure 10 As shown, the method includes:

[0097] Step 1001: The first DMA module DMA1 obtains the first audio data from the first channel CH1 of the codec and stores the first audio data in the first cache area of ​​the memory;

[0098] Step 1002: The first processor retrieves the first audio data from the first cache area and performs hearing aid processing on the first audio data to obtain the second audio data, and stores the second audio data in the second cache area of ​​the memory.

[0099] Step 1003: The second DMA module DMA2 stores the second audio data in the second buffer into the second channel CH2 of the codec.

[0100] Step 1004: The second processor processes the third audio data according to the function to which the third audio data belongs, to obtain the fourth audio data; the function to which the third audio data belongs is a function other than hearing aid function.

[0101] The chip further includes an analog-to-digital converter and a digital-to-analog converter; the method further includes: the analog-to-digital converter converting the acquired audio signal into audio data and transmitting the audio data to the codec; the digital-to-analog converter converting the audio data acquired from the codec into an audio signal.

[0102] The chip also includes a short-range communication module; the method further includes the short-range communication module and the electronic device transmitting and receiving audio data.

[0103] The function is a call function. The chip also includes a third DMA module DMA3. The method further includes: the third DMA module DMA3 obtains the third audio data from the third channel CH3 of the encoder and decoder, and stores the third audio data in the third cache of the memory; the second processor obtains the third audio data from the third cache, processes the third audio data for the call function, obtains the fourth audio data, and transmits the fourth audio data to the short-range communication module.

[0104] The chip, which is for audio playback, also includes a fourth DMA module DMA4. The method further includes: the second processor acquiring the third audio data from the short-range communication module and processing the third audio data for audio playback to obtain fifth audio data; writing the fifth audio data into the fourth buffer of the memory; and the fourth DMA module DMA4 transmitting the fifth audio data from the fourth buffer to the fourth channel CH4 of the codec.

[0105] The first DMA module DMA1 acquires first audio data from the first channel CH1 of the codec and stores the first audio data in the first buffer of the memory, including: after the first DMA module DMA1 stores the first audio data in the first buffer of the memory according to the first interrupt signal, it sends an interrupt request to the first processor; the first processor acquires the first audio data from the first buffer according to the interrupt request, and stores the processed second audio data in the second buffer.

[0106] The second DMA module DMA2 stores the second audio data in the second buffer to the second channel CH2 of the codec, including: the second DMA module DMA2 stores the second audio data in the second buffer to the second channel CH2 of the codec according to a second interrupt signal, wherein the first interrupt signal and the second interrupt signal are issued by the interrupt controller in the first processor.

[0107] The first buffer includes a first storage unit and a second storage unit, and the second buffer includes a third storage unit and a fourth storage unit; the first DMA module DMA1 stores the first audio data into the first buffer of the memory, including: the first DMA module DMA1 stores the first audio data acquired in different interrupt cycles into the first storage unit and the second storage unit in a polling manner; the second DMA module DMA2 stores the second audio data in the second buffer into the second channel CH2 of the codec, including: the second DMA module DMA2 stores the second audio data acquired in different interrupt cycles into the second channel CH2 of the codec in a polling manner.

[0108] Based on the same technical concept, this application also provides a hearing aid headset, including: a microphone, a speaker and the aforementioned chip.

[0109] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0110] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. An audio data processing chip, characterized in that, include: The compiler, the first direct memory access DMA module, the second DMA module, the memory, the first processor and the second processor; The first cache area includes a first storage unit and a second storage unit, and the second cache area includes a third storage unit and a fourth storage unit; The first DMA module is used to acquire first audio data from the first channel of the codec, store the first audio data acquired in different interrupt cycles in a polling manner to the first storage unit and the second storage unit according to the first interrupt signal, and send an interrupt request to the first processor. The first processor is configured to, according to the interrupt request, retrieve the first audio data from the first buffer, perform hearing aid processing on the first audio data to obtain second audio data, and store the second audio data in the second buffer of the memory; The second DMA module is used to, according to the second interrupt signal, store the second audio data acquired in different interrupt cycles in the third and fourth storage units in a polling manner to the second channel of the codec; wherein, the enable signal of the second DMA module is earlier than the enable signal of the first DMA module, and the third memory is initialized before the second DMA module is enabled; when the second DMA module receives the enable signal, it stores an empty dataset in the second channel of the codec, and the player after the second channel has no sound; The second processor is used to process the third audio data according to the function to which the third audio data belongs, to obtain the fourth audio data; the function to which the third audio data belongs is a function other than hearing aid function.

2. The chip as described in claim 1, characterized in that, The chip also includes an analog-to-digital converter and a digital-to-analog converter; The analog-to-digital converter is used to convert the acquired audio signal into audio data and transmit the audio data to the codec. The digital-to-analog converter is used to convert audio data obtained from the codec into audio signals.

3. The chip as described in claim 1, characterized in that, The chip also includes a short-range communication module; The short-range communication module is used for sending and receiving audio data with electronic devices.

4. The chip as described in claim 3, characterized in that, Its function is for making calls, and the chip also includes a third DMA module; The third DMA module is used to obtain the third audio data from the third channel of the encoder / decoder and store the third audio data in the third cache of the memory; The second processor is specifically used to obtain the third audio data from the third buffer, process the third audio data for call function to obtain the fourth audio data, and transmit the fourth audio data to the short-range communication module.

5. The chip as described in claim 3, characterized in that, Its function is audio playback, and the chip also includes a fourth DMA module; The second processor is specifically configured to acquire the third audio data from the short-range communication module, process the third audio data for audio playback, and obtain the fifth audio data; and write the fifth audio data into the fourth cache of the memory; The fourth DMA module is used to transmit the fifth audio data from the fourth buffer to the fourth channel of the codec.

6. The chip as described in claim 1, characterized in that, The first interrupt signal and the second interrupt signal are issued by the interrupt controller in the first processor.

7. The chip as described in claim 1, characterized in that, Total delay T in the audio path n for: T n =T-T d Where T d The enable signal of the second DMA module is earlier than the enable signal of the first DMA module by a certain time, where T is one cycle of the high and low signals.

8. A hearing aid headphone, characterized in that, include: Microphone, speaker, and chip as described in any one of claims 1 to 7.

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