Leadframe capacitor

Abstract

An electronic device (100) has a package structure (120) with electrically conductive leads (102), first and second dies (108, 109) in the package structure (120), and first and second electrically conductive plates (104, 105) electrically coupled with the respective first and second dies (108, 109) and having respective first and second sides (110, 114) spaced apart from and directly facing each other, wherein a portion of the package structure (120) extends between the first side (110) of the first electrically conductive plate (104) and the second side (114) of the second electrically conductive plate (105) to form a capacitor (C1, C2). The other side of the first electrically conductive plate (104) does not directly face a side of the second electrically conductive plate (105), and the other side of the second electrically conductive plate (105) does not directly face a side of the first electrically conductive plate (104).

Description

Background Technology

[0001] Signal isolation is used in a variety of applications where signaling must traverse isolation barriers, such as between circuits in different voltage domains. Integrating isolation components into the fabricated semiconductor die utilizes silicon dioxide as the dielectric material for a capacitive isolation barrier with electrical isolation capabilities, but this integration increases the cost and complexity of the manufacturing process. Capacitors are formed within silicon metal layers during silicon wafer fabrication, and the capacitor structure depends on the geometry and design rules of the specific manufacturing process node. Furthermore, in a given manufacturing facility, device designs can typically only be fabricated using a subset of process nodes with qualified isolation components. Structures fabricated using each node in a given process node require isolation qualification and certification, resulting in high costs. Integrated isolation components often require dedicated development by the process team and frequently employ specific design rules. Some applications may utilize wafer fabrication processes optimized for specific needs (such as high power and / or high voltage), but these processes may be incompatible with robust isolation dielectric requirements. Without redesigning the isolation components for these manufacturing process nodes and then requalifying and certifying the isolation, new designs often cannot utilize processes optimized for specific needs (such as power and high voltage). Furthermore, integrating isolation components in semiconductor wafer manufacturing can result in a relatively large minimum die size for isolation dies. Summary of the Invention

[0002] In one aspect, an electronic device includes an isolation structure created during IC manufacturing using a patterned lead frame to provide a low-cost, compact isolation solution that does not affect the semiconductor wafer manufacturing process and requires no additional board-level components. In one example, the electronic device includes a package structure with conductive leads, first and second dies within the package structure, and first and second conductive plates electrically connected to the respective first and second dies and having respective first and second sides spaced apart from and directly facing each other, wherein a portion of the package structure extends between a first side of the first conductive plate and a second side of the second conductive plate to form a capacitor. Other sides of the first conductive plate do not directly face the sides of the second conductive plate, and other sides of the second conductive plate do not directly face the sides of the first conductive plate.

[0003] In one example, a first side of the first conductive plate extends in a first plane, a second side of the second conductive plate extends in a second plane, and the first and second planes are parallel to each other. In another example, the first and second conductive plates are coplanar in a third plane perpendicular to the first and second planes. In one embodiment, the encapsulation structure has first and second opposing sides spaced apart from each other along a first direction, and conductive leads spaced apart from each other along a perpendicular second direction, wherein the second side of the second conductive plate is spaced apart from the first side of the first conductive plate along one of the first and second directions.

[0004] In another example, a second side of the second conductive plate is spaced apart from a first side of the first conductive plate along a third direction perpendicular to the first and second directions. In one embodiment, the first conductive plate has a first portion and a second portion with a first side; and the first and second portions of the first conductive plate are not coplanar. In another example, the second conductive plate further has a first portion and a second portion with a second side; and the first and second portions of the second conductive plate are not coplanar. In another example, the electronic device also includes an embedded dielectric insert in a package structure, and the first or second conductive plate is on or in the embedded dielectric insert. In one embodiment, a plurality of conductive plates are on or in the embedded dielectric insert.

[0005] Another aspect relates to a method comprising positioning a lead frame, performing a bonding and forming process, and a separation process. The lead frame is positioned such that a first side of a first conductive plate is spaced apart from and directly faces a second side of a second conductive plate, wherein other sides of the first conductive plate do not directly face the sides of the second conductive plate, and other sides of the second conductive plate do not directly face the sides of the first conductive plate. In one example, the bonding process electrically connects a first bonding wire to a first die and the first conductive plate, and electrically connects a second bonding wire to a second die and the second conductive plate. The forming process forms a package structure that surrounds portions of the first and second dies, the first and second bonding wires, and the first and second conductive plates. The separation process separates the first conductive plate, the second conductive plate, and the conductive leads from the remainder of the lead frame.

[0006] In one example, positioning the lead frame includes positioning the first lead frame relative to the second lead frame or relative to the dielectric insert such that a first side of a first conductive plate of the first lead frame is spaced apart from and directly faces the second side of a second conductive plate of the second lead frame or the dielectric insert. In one embodiment, positioning the lead frame includes positioning the first lead frame relative to the dielectric insert such that a first side of a first conductive plate of the first lead frame is spaced apart from and directly faces the second side of a second conductive plate of the dielectric insert. This embodiment further includes positioning the second lead frame relative to the dielectric insert such that a first side of a third conductive plate of the second lead frame is spaced apart from and directly faces the second side of a fourth conductive plate of the dielectric insert, wherein other sides of the third conductive plate do not directly face the sides of the fourth conductive plate, and other sides of the fourth conductive plate do not directly face the sides of the third conductive plate.

[0007] Another aspect relates to a system having first and second electronic circuits or different voltage domains, and an isolation device coupled to the first and second electronic circuits. The isolation device includes a package structure with conductive leads, first and second dies within the package structure, and first and second conductive plates electrically coupled to the respective first and second dies and having respective first and second sides spaced apart from and directly facing each other. A portion of the package structure extends between a first side of the first conductive plate and a second side of the second conductive plate to form a capacitor. Other sides of the first conductive plate do not directly face the sides of the second conductive plate, and other sides of the second conductive plate do not directly face the sides of the first conductive plate.

[0008] In one example, a first side of a first conductive plate extends in a first plane; a second side of a second conductive plate extends in a second plane, the first and second planes are parallel to each other, and the first and second conductive plates are coplanar in a third plane perpendicular to the first and second planes.

[0009] In another example, the first conductive plate has a first portion and a second portion with a first side, and the first portion and the second portion of the first conductive plate are not coplanar.

[0010] In another example, the isolation device includes an embedded dielectric insert in a package structure, wherein one of a first conductive plate and a second conductive plate is on or in the embedded dielectric insert. Attached Figure Description

[0011] Figure 1 It is a cross-sectional top view of a packaged electronic device having first and second semiconductor dies and an isolation capacitor formed by a planar conductive plate from the starting lead frame.

[0012] Figure 2 Is Figure 1 A schematic diagram of a circuit implemented in a semiconductor die and isolation capacitor in a packaged electronic device.

[0013] Figure 3 This is a flowchart of a method for manufacturing packaged electronic devices.

[0014] Figures 4-7 It is based on Figure 3 The method at different stages of manufacturing Figure 1 A partial top view of the packaged electronic device.

[0015] Figure 8 yes Figure 1 , Figure 2 and Figure 4-7 A perspective view of the packaged electronic device.

[0016] Figure 9This is a top perspective view of another example packaged electronic device having first and second semiconductor dies and an isolation capacitor having conductive plates vertically spaced from the first and second start lead frames.

[0017] Figure 10 It is used for manufacturing Figure 9 Top perspective view of the first and second starting lead frames of the packaged electronic device.

[0018] Figure 11 This is a top perspective view of another example packaged electronic device having first and second semiconductor dies, an isolation capacitor having conductive plates vertically spaced from the first and second start lead frames, and an insertion structure having additional conductive capacitor plates.

[0019] Figure 12 It is used for manufacturing Figure 11 Top perspective view of the first and second start lead frames and insertion structure of the packaged electronic device.

[0020] Figure 13 This is a schematic diagram of a power conversion system, which has isolated primary and secondary circuits and includes... Figure 1 The control or feedback signal path of the packaged electronic device. Detailed Implementation

[0021] In the accompanying drawings, the same reference numerals refer to the same elements throughout, and various features are not necessarily drawn to scale. Additionally, the term "couple" includes indirect or direct electrical or mechanical connections, or combinations thereof. For example, if a first device is coupled to or connected to a second device, this connection can be a direct electrical connection or an indirect electrical connection via one or more intervening devices and connections. One or more operating characteristics of various circuits, systems, and / or components are described below; these functions, in some cases, arise from the configuration and / or interconnection of various structures when the circuit is powered and operating.

[0022] Figure 1An illustrated packaged electronic device 100 has conductive features formed by a start lead frame 101 (e.g., copper, aluminum, etc.). The electronic device includes conductive leads 102, a pair of first conductive plates 104, and a pair of second conductive plates 105. In another example, only a single first conductive plate 104 and a single second conductive plate 105 are included. In other examples, more than two first conductive plates 104 and more than two corresponding second conductive plates 105 are included. The electronic device also includes a first die attachment pad 106 in a second die attachment pad 107 that was initially part of the start lead frame 101 during manufacturing. The electronic device 100 includes a first die 108 mounted to the first die attachment pad 106 and a second die 109 mounted to the second die attachment pad 107. In this example, each of the first conductive plates 104 includes a first side 110. Dies 108 and 109 can be any suitable semiconductor-based circuit die formed, for example, using semiconductor processing of a starting wafer, including transistors, resistors, capacitors, or other electronic components integrated into a die structure having conductive features that allow for bonding wire or flip-chip electrical connections (e.g., copper or aluminum bonding pads).

[0023] The electronic device 100 also includes electrical connections between corresponding first and second dies 108, 109 and various leads and conductive plates. In the example shown, bonding wires 111 connect conductive features (e.g., bonding pads) of the first die 108 to corresponding conductive leads of the first set of conductive leads 102 for circuit connection to a main printed circuit board (PCB, not shown) to which the electronic device 100 is soldered. Other bonding wires of bonding wires 111 connect conductive features of the second die 109 to the second set of conductive leads 102. In the example shown, the first set of conductive leads 102 connected to the first die 108 are located on a first side of the electronic device 100 (e.g., on a first side of the electronic device 100). Figure 1 On the left side of the electronic device 100, while the second set of conductive leads 102 connected to the second die 109 are on the opposite second side of the electronic device 100 (e.g., on the left side). Figure 1 On the right side of the image (but not a strict requirement for all possible implementations). The electronic device 100 also includes a pair of first bonding wires 112, each bonding wire being connected between a conductive feature of the first die 108 and a corresponding conductive plate of the first conductive plate 104. In addition, a pair of second bonding wires 113 are each connected between a conductive feature of the second die 109 and a corresponding conductive plate of the second conductive plate 105.

[0024] In this example, each of the second conductive plates 105 has a second side surface 114. In one example, the first side surface 110 of the corresponding conductive plate 104 is on a first plane (e.g., Figure 1The YZ plane (where the Z direction is outside the page in the figure) extends in the diagram. In this example, the second side 114 of the corresponding second conductive plate 105 extends in the second plane (e.g., also the YZ plane), and the first and second planes are parallel to each other. In other examples, the first and second planes are not strictly parallel to each other. In another example, one or both of sides 110 and / or 114 are non-planar. In the illustrated embodiment, the second side 114 of each conductive plate in the second conductive plate 105 is spaced apart from and directly faces the first side 110 of the corresponding first conductive plate 104. Furthermore, other sides of the first conductive plate 104 do not directly face the sides of the corresponding second conductive plate 105, and other sides of the corresponding second conductive plate 105 do not directly face the sides of the corresponding first conductive plate 104. Directly facing sides, as used herein, are conductive plate sides facing each other along a straight line without intermediate conductive structures. The electronic device 100 also includes a non-conductive encapsulation structure 120. In one example, the encapsulation structure 120 is or includes a molding compound. A portion of the encapsulation structure 120 extends between the first side 110 of the corresponding first conductive plate 104 and the second side 114 of the corresponding second conductive plate 105 to form as shown in the image. Figure 1 The corresponding capacitors C1 and C2 are schematically shown by the dashed lines. An intermediate package structure 120 between the corresponding plate sides 110 and 114 provides a dielectric, which, together with the conductive material of the corresponding plates 104 and 105, forms a capacitor structure that operates to isolate the first and second circuits of the first die 108 and the second die 109. In operation of the electronic device 100, the example capacitors C1 and C2 provide electrochemical capacitive isolation between the first and second voltage domains of the corresponding first die 108 and the second die 109.

[0025] In other embodiments, a single isolation capacitor is provided in the electronic device 100 using respective first plates 104 and second plates 105 having respective first sides 110 and second sides 114. In other examples, more than two isolation capacitors are provided by arranging the respective sides 110 and 114 of the respective first and second plates 104 and 105, wherein the first side 110 of the first conductive plate 104 is spaced apart from and directly faces the second side 114 of the second conductive plate 105, and wherein other sides of the first conductive plate 104 do not directly face the sides of the second conductive plate 105 and other sides of the second conductive plate 105 do not directly face the sides of the first conductive plate 104.

[0026] In one example, such as Figure 1As shown, a single starting lead frame 101 is used to create a first conductive plate 104 and a second conductive plate 105. In this example, the first conductive plate 104 and the second conductive plate 105 are coplanar in a third plane (e.g., an XY plane) perpendicular to the first and second planes of the respective plate surfaces 110 and 114, but this is not a requirement for all possible embodiments. Furthermore, in Figure 1 In the example, isolation between the corresponding boards 104 and 105 and between the first and second voltage domains of the corresponding first die 108 and second die 109 is provided laterally. For example, as shown below Figures 9-12 In conjunction with the description and illustration, other embodiments provide vertical capacitor plate spacing and isolation orientation. Figure 1 In the example, the package structure 120 has first and second opposing sides, and corresponding leads 102 are positioned along the said sides, wherein the first and second sides of the package structure 120 are along a first direction (e.g., Figure 1 The conductive leads 102 are spaced apart from each other in the X direction, and portions of the conductive leads 102 are exposed outside the package structure 120 along the respective first and second sides of the package structure 120. In one example, the leads are generally flush with the outer side of the package structure 120 and exposed along the bottom and side portions, for example, for leadless package types, including quad flat no-lead (QFN) packages or pre-formed packages like MIS, RLF, etc. In this example, the conductive leads 102 are spaced apart from each other in the X direction along the respective first and second sides of the package structure 120, and portions of the conductive leads 102 are exposed outside the package structure 120 along the respective first and second sides of the package structure 120 in the second direction (e.g., X direction). Figure 1 The second conductive plate 105 and the first conductive plate 104 are spaced apart along the first direction X, with the second direction Y perpendicular to the first direction X. Furthermore, in the example shown, the second side 114 of the second conductive plate 105 is spaced apart from the first side 110 of the first conductive plate 104 along the first direction X. In other examples, the lateral capacitor plate spacing can be along different directions in the XY plane, such as along the first (Y) direction.

[0027] Figure 2 Shown in Figure 1 The packaged electronic device 100 contains semiconductor dies 108 and 109 and isolation capacitors C1 and C2, implementing an isolated communication circuit 200. In some applications, Figure 1Capacitors C1 and C2 provide a single-channel or multi-channel digital isolator created using a custom-patterned leadframe 101. In operation, a lateral capacitive connection between leadframe metal regions 104 and 105 allows one or more signals to be transmitted between different voltage domain circuits of corresponding first die 108 and second die 109. The isolated communication circuit 200 includes a high-frequency data channel, for example, with a bandwidth from 100 kbps to 150 Mbps, and a low-frequency channel, for example, with a bandwidth from DC to 100 kbps. In one example embodiment, a single-ended input signal entering the high-frequency data channel is split into a differential signal by an inverter gate at the input. The capacitor-resistor network below separates the signal into small, narrow transient signals, which are then converted into rail-to-rail differential pulses by two comparators. The comparator outputs drive a NOR-gate flip-flop with the output of a feed-output multiplexer. Decision logic (DCL) at the drive output of the flip-flop measures the duration between signal transients. If the duration between two consecutive transients exceeds a certain time limit (e.g., in the case of low-frequency signals), DCL forces the output multiplexer to switch from a high-frequency channel to a low-frequency channel. In one example, the low-frequency input signal is pulse-width modulated (PWM) at the carrier frequency of an internal oscillator to create a sufficiently high frequency that can pass through the capacitive barrier. As the input is modulated, a low-pass filter (LPF) removes the high-frequency carrier from the actual data before passing the actual data to the output multiplexer. In this example, the molding compound or any other encapsulant used to form package structure 120 acts as an isolation dielectric barrier with a designed isolation spacing to provide a robust high-dielectric-strength barrier under humidity, temperature, and reliability stress conditions. The starting lead frame 101 can be patterned with a custom design of the mutual capacitances required for the circuit performance needed for a given circuit application. Capacitor isolation can be combined with any process manufacturing node used to create the functional silicon or other semiconductor processing for dies 108 and 109. In this regard, the lead frame 101 can be customized for specific isolation applications without changing the manufacturing process used to manufacture dies 108 and 109, and the manufacturing of semiconductor dies can be simplified and cost-effective compared to integrated isolation component solutions. Furthermore, the example can be manufactured using existing packaging assembly processes and equipment, thereby providing a compact and cost-effective isolation solution.

[0028] Also refer to Figures 3-7 , Figure 3 A method 300 for manufacturing packaged electronic devices is shown, and Figures 4-7 This illustrates the different manufacturing stages according to method 300. Figure 1 Example 100 of the packaged electronic device. Method 300 from Figure 3 Starting with 302: Position one or more lead frames, for example Figure 4The lead frame 101 in the first conductive plate 104 is positioned such that the first side 110 of the first conductive plate 104 is separated from and directly faces the second side 114 of the second conductive plate 105, while the other sides of the first conductive plate 104 do not directly face the sides of the second conductive plate 105, and the other sides of the second conductive plate 105 do not directly face the sides of the first conductive plate 104. Figure 5 As shown, a die attachment process is performed at 304, which attaches the first die 108 to the first die attachment pad 106 and the second die 109 to the second die attachment pad 107. Method 300 continues at 306 by performing a connection process. Figure 6 In one example shown, the connection process is a wire bonding process that electrically connects the first bonding wire 112 to the first die 108 and the first conductive plate 104. The wire bonding process also electrically connects the second bonding wire 113 to the second die 109 and the second conductive plate 105. Figure 6 In the example, the wire bonding process at 306 interconnects multiple bonding lines 111, 112 and 113 between the conductive features (e.g. bonding pads) of dies 108 and 109 with leads 102 and / or conductive plates 104 and 105 to form a circuit including isolation capacitors C1 and C2.

[0029] Method 300 in Figure 3 At point 308, the molding process continues to form the molded package structure 120. Figure 7 In one example, the molding process creates a separate molded package structure 120 for each intended electronic region of the leadframe assembly. In this example, each package structure 120 respectively surrounds a first die 108, a second die 109, a first bonding wire 112, a second bonding wire 113, a portion of a first conductive plate 104, and a portion of a second conductive plate 105. Some examples also include... Figure 3 The lead wire repair and shaping operation at 310 is not a strict requirement for all possible implementations. At 312, method 300 also includes, for example, using laser cutting or sawing to separate the first conductive plate 104, the second conductive plate 105, and the conductive lead 102 from the remainder of the lead frame 101. Figure 8 An example of a separate packaged electronic device 100 is shown.

[0030] Also refer to Figure 9 and Figure 10 , Figure 9 Another exemplary packaged electronic device 900 includes, via Figure 10The example illustrates a leadframe-based isolation capacitor formed by the arrangement and positioning of conductive plates 104 and 105 of corresponding first leadframes 1001 and second leadframes 1002. This example provides a vertical capacitor plate spacing along the Z-direction, wherein the corresponding first conductive plate 104 of the first leadframe 1001 has a first side surface that is generally planar upwards, and the corresponding corresponding second conductive plate 105 of the second leadframe 1002 has a second side surface that is generally planar downwards. The electronic device 900 in this embodiment includes the aforementioned leads 102, die attachment pads 106 and 107, semiconductor dies 108 and 109, and a molded package structure 120, as well as bonding wires for providing interconnections between the die 108 and the leads 102 and conductive plates 104 and 105. Figure 9 (Not shown in the image) A circuit with two isolated voltage domains and capacitor connections is formed by four capacitors created via four conductive plates 104 and four conductive plates 105, which are respectively separated by the dielectric material of the encapsulation structure 120.

[0031] and Figure 1 Similar to the electronic device 100, in the second conductive plate 105, the downward-facing second side of each conductive plate is separated from and directly faces the upward-facing first side of the corresponding first conductive plate 104. Furthermore, the other sides of the first conductive plate 104 do not directly face the sides of the corresponding second conductive plate 105, and the other sides of the corresponding second conductive plate 105 do not directly face the sides of the corresponding first conductive plate 104. Furthermore, in Figure 9 and Figure 10 In this example, the package structure 120 has a first side and a second opposing side spaced apart from each other along a first direction X, and portions of the conductive leads 102 are exposed outside the package structure 120 along the respective first and second sides. Furthermore, the conductive leads 102 are spaced apart from each other along a second direction Y along the respective first and second sides of the package structure 120. In this example, the second side of the respective second conductive plate 105 is vertically spaced from the first side of the respective first conductive plate 104 along a third direction Z perpendicular to the first direction X and the second direction Y. In other embodiments, the first and second conductive plates are, for example, laterally spaced apart from each other along the Y direction.

[0032] like Figure 10 As shown, each of the first conductive plates 104 has a first portion with a first side surface and a second portion joined to the first portion by a strip, wherein the first and second portions of the respective first conductive plates 104 are not coplanar. Similarly, each of the respective second conductive plates 105 has a first portion including a second side surface and a second portion joined to the first portion by a bend, and the first and second portions of the respective second conductive plates 105 are not coplanar. During the manufacturing process (e.g., at 302 according to the example method 300 described above), as Figure 10As shown, the first lead frame 1001 is positioned relative to the second lead frame 1002 such that the first side of the first conductive plate 104 of the first lead frame 1001 is separated from the corresponding second side of the second conductive plate 105 of the second lead frame 1002 and directly faces the second side. The other sides of the first conductive plate 104 do not directly face the corresponding side of the second conductive plate 105, and the other sides of the second conductive plate 105 do not directly face the side of the first conductive plate 104.

[0033] Also refer to Figure 11 and Figure 12 , Figure 11 Another exemplary packaged electronic device 1100 is shown, which has first and second semiconductor dies 108 and 109, an isolation capacitor having conductive plates vertically spaced from the first start lead frame 1101 and the second start lead frame 1102, and a dielectric insertion structure 1103 having an additional corresponding first conductive capacitor plate 1104 and second conductive capacitor plate 1105. Figure 12 Showing the manufacturing process Figure 11 The packaged electronic device 1100 includes a first start lead frame 1101, a second start lead frame 1102, and an insertion structure 1103. In one example, the insertion structure 1103 has respective first and second top-side conductive plates 1104 and 1105 separated by a dielectric. The insertion structures 1103, 1104, and 1105 can be manufactured using various techniques, including but not limited to double-layer laminated structures, pre-molded lead frames (PMLF), MIS, etc. In various embodiments, one or more of the first conductive plate 1104 and the second conductive plate 1105 are on or in the embedded dielectric insert 1103.

[0034] Electronic device 1100 includes the aforementioned leads 102, die attachment pads 106 and 107, semiconductor dies 108 and 109, and a molded package structure 120. It also includes bonding wires 111, 112, and 113 for providing interconnections between the die 108 and the leads 102 and conductive plates 104, 1104, 105, and 1105. This interconnections are formed via four capacitors created through the four conductive plates 104 and 105 and the corresponding conductive plates 1104 and 1105 of the insertion structure 1103, which are separated by the dielectric material of the package structure 120. In this example, the package structure 120 has first side surfaces spaced apart from each other along a first direction X and second opposing side surfaces, with portions of the conductive leads 102 exposed outside the package structure 120 along the respective first and second package structure sides. In this example, the conductive leads 102 are spaced apart from each other along the second direction Y, and the second sides of the corresponding second conductive plates 105, 1105 are spaced apart from the first sides of the corresponding first conductive plates 104, 1104 along the third direction Z. This example also provides a vertical capacitor plate spacing, but it is not a strict requirement for all possible implementations using the insertion structure.

[0035] During manufacturing (e.g., at 302 according to the example method 300 above), the first lead frame 1101, the second lead frame 1102, and the dielectric insertion structure 1103 are positioned relative to each other such that a first side of the first conductive plate 104 of the first lead frame 1101 is spaced apart from and directly faces the corresponding second side of the second conductive plate 1105 of the dielectric insertion structure 1103, while the other sides of the first conductive plate 104 do not directly face the sides of the second conductive plate 1105, and the other sides of the second conductive plate 1105 do not directly face the sides of the first conductive plate 104. The relative positioning at 302 in this example also ensures that a first side of the third conductive plate 105 of the second lead frame 1102 is spaced apart from and directly faces the second side of the fourth conductive plate 1104 of the dielectric insertion structure 1103, while the other sides of the third conductive plate 105 do not directly face the sides of the fourth conductive plate 1104, and the other sides of the fourth conductive plate 1104 do not directly face the sides of the third conductive plate 105.

[0036] Figure 13 The diagram shows a power conversion system 1300, which has isolated primary and secondary circuitry and includes... Figure 1The packaged electronic device 100 provides a control or feedback signal path. This example includes a DC power supply 1302, the output of which is connected to a first end of the primary winding of an isolation transformer 1304. The second end of the primary winding is connected to a primary site switching circuit 1306. The secondary winding of the transformer 1304 is connected to a secondary circuit 1308, for example, to implement a flyback switching power conversion system 1300. The secondary circuit 1308 is connected to provide regulated output power to drive a load 1310. The electronic device 100 in this example is an isolation device that provides feedback signals or switching control signals from the secondary circuit 1308 to the primary-side switching circuit 1306. In one example, the secondary circuit 1308 provides a signal to the isolation device 100 relative to the output or load-side voltage domain, which, for example, represents a zero crossover of the switching circuit connected to the secondary winding of the transformer 1304. In this example, isolation device 100 provides an isolation signal to primary site switching circuit 1306, and in response, the primary site switching circuit initiates a new switching cycle to close the switch, thereby allowing current to flow in the primary winding of transformer 1304. In another example, secondary circuit 1308 provides a feedback signal to isolation device 100, representing the output voltage or output current of load 1310, and primary site switching circuit 1306 regulates the output voltage or current in a closed-loop manner based on the feedback signal from isolation device 100.

[0037] The embodiments described provide a global, low-cost solution for signal isolation, with applicability across package types and sizes. Furthermore, these examples can be used to provide high-voltage isolation in single-package electronics 100, 900, and 1100 without requiring the integration of capacitor isolation components on or within semiconductor dies 108 and 109, thereby reducing die manufacturing costs and complexity. Additionally, the electronics 100, 900, and 1100 provide integration within the packaged electronics themselves, mitigating or avoiding the additional costs and board space associated with using optical connectors or other external isolation components. The examples utilize leadframe metal structures to provide signal isolation, serving as a silicon manufacturing process-independent solution. Moreover, the resulting solution is significantly less expensive than integrating isolation components during silicon manufacturing. Furthermore, the electronics 100, 900, and 1100 can be manufactured using existing leadframe manufacturing and assembly infrastructure and processes, allowing for adaptation to a wide variety of different designs and applications. These isolation solutions can be extended to all leadframe and / or laminate-based package types and form factors while providing a robust isolation barrier. By removing the reliance on isolation components from silicon manufacturing process nodes and integrating the isolation solution into the leadframe itself, the described example provides a technical solution to the problems of high cost, long development cycles, and limitations of isolation-based development, where each process node has separate design, qualification, and certification requirements.

[0038] Modifications may be made to the embodiments within the scope of the claims, and other implementations may exist.

Claims

1. An electronic device comprising: a package structure; a conductive lead partially exposed outside the package structure; a first die mounted to a first die attach pad in the package structure; a second die mounted to a second die attach pad in the package structure; a first conductive plate in the package structure, the first conductive plate having a first side; a second conductive plate in the package structure, the second conductive plate having a second side; a first bond wire coupled to the first die and the first conductive plate in the package structure; and a second bond wire coupled to the second die and the second conductive plate in the package structure; the first and second die attach pads are physically separated from the first and second conductive plates, the second side of the second conductive plate is separated from and directly faces the first side of the first conductive plate, a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate acts as a dielectric to form an isolated capacitor together with the first and second conductive plates, other sides of the first conductive plate do not directly face sides of the second conductive plate, and other sides of the second conductive plate do not directly face sides of the first conductive plate. the first side of the first conductive plate extends in a first plane; the second side of the second conductive plate extends in a second plane; and the first and second planes are parallel to each other.

2. The electronic device of claim 1, wherein: the first and second conductive plates are coplanar in a third plane perpendicular to the first and second planes. 3.The electronic device of claim 2, wherein, the package structure has a first side and an opposite second side; the first and second sides of the package structure are separated from each other along a first direction; portions of the conductive leads are exposed outside the package structure along respective ones of the first and second sides of the package structure; 4.The electronic device of claim 2, wherein: the conductive leads are separated from each other along a second direction of respective ones of the first and second sides of the package structure; the second direction is perpendicular to the first direction; and the second side of the second conductive plate is separated from the first side of the first conductive plate along one of the first and second directions. the package structure has a first side and an opposite second side; the first and second sides of the package structure are separated from each other along a first direction; portions of the conductive leads are exposed outside the package structure along respective ones of the first and second sides of the package structure; 5.The electronic device of claim 1, wherein: the conductive leads are separated from each other along a second direction of respective ones of the first and second sides of the package structure; the second direction is perpendicular to the first direction; and the second side of the second conductive plate is separated from the first side of the first conductive plate along a third direction perpendicular to the first and second directions. ​ 6.The electronic device of claim 5, wherein: The first conductive plate has a first portion with the first side, and a second portion; and the first portion and the second portion of the first conductive plate are not coplanar. 7.The electronic device of claim 6, wherein: The second conductive plate has a first portion with the second side, and a second portion; and the first portion and the second portion of the second conductive plate are not coplanar. 8.The electronic device of claim 6, wherein: The first side of the first conductive plate extends in a first plane; the second side of the second conductive plate extends in a second plane; and the first plane and the second plane are parallel to each other.

9. The electronic device of claim 5, further comprising an embedded dielectric interposer in the package structure, wherein, One of the first conductive plate and the second conductive plate is on or in the embedded dielectric interposer.

10. The electronic device of claim 9, comprising a plurality of conductive plates on or in the embedded dielectric interposer. 11.The electronic device of claim 9, wherein: The first side of the first conductive plate extends in a first plane; the second side of the second conductive plate extends in a second plane; and the first plane and the second plane are parallel to each other. 12.The electronic device of claim 5, wherein: The first side of the first conductive plate extends in a first plane; the second side of the second conductive plate extends in a second plane; and the first plane and the second plane are parallel to each other.

13. A method comprising: positioning a leadframe such that a first side of a first conductive plate is spaced apart from and directly faces a second side of a second conductive plate; other sides of the first conductive plate do not directly face sides of the second conductive plate; and other sides of the second conductive plate do not directly face sides of the first conductive plate; performing a connection process that electrically connects a first bond wire with a first die and the first conductive plate, and a second bond wire with a second die and the second conductive plate, wherein the first die is attached to a first die attach pad, the second die is attached to a second die attach pad, and the first die attach pad and the second die attach pad are physically spaced apart from the first conductive plate and the second conductive plate; performing a molding process that forms a package structure that encloses: the first die; the second die; the first bond wire; the second bond wire; a portion of the first conductive plate; and a portion of the second conductive plate; separating the first conductive plate, the second conductive plate, and a conductive lead from a remainder of the leadframe; and wherein a portion of the package structure that extends between the first side of the first conductive plate and the second side of the second conductive plate provides a dielectric to form an isolation capacitor along with the first conductive plate and the second conductive plate, wherein positioning the leadframe comprises: positioning the first leadframe relative to the second leadframe or relative to the dielectric insert such that: the first side of the first conductive plate of the first leadframe is spaced apart from and directly faces the second side of the second conductive plate of the second leadframe or of the dielectric insert; other sides of the first conductive plate do not directly face sides of the second conductive plate; and other sides of the second conductive plate do not directly face sides of the first conductive plate.

14. The method of claim 13, wherein, positioning the leadframe includes: positioning the first leadframe relative to the dielectric insert such that: the first side of the first conductive plate of the first leadframe is spaced apart from and directly faces the second side of the second conductive plate of the dielectric insert; other sides of the first conductive plate do not directly face sides of the second conductive plate; and other sides of the second conductive plate do not directly face sides of the first conductive plate; and positioning the second leadframe relative to the dielectric insert such that: a first side of a third conductive plate of the second leadframe is spaced apart from and directly faces a second side of a fourth conductive plate of the dielectric insert; other sides of the third conductive plate do not directly face sides of the fourth conductive plate; and other sides of the fourth conductive plate do not directly face sides of the third conductive plate.

15. The method of claim 13, wherein, positioning the leadframe includes: positioning the first leadframe relative to the dielectric insert such that: the first side of the first conductive plate of the first leadframe is spaced apart from and directly faces the second side of the second conductive plate of the dielectric insert; other sides of the first conductive plate do not directly face sides of the second conductive plate; and other sides of the second conductive plate do not directly face sides of the first conductive plate; and positioning the second leadframe relative to the dielectric insert such that: a first side of a third conductive plate of the second leadframe is spaced apart from and directly faces a second side of a fourth conductive plate of the dielectric insert; other sides of the third conductive plate do not directly face sides of the fourth conductive plate; and other sides of the fourth conductive plate do not directly face sides of the third conductive plate.

16. A system comprising: a first electronic circuit of a first voltage domain; a second electronic circuit of a second voltage domain; and an isolation device coupled with the first electronic circuit and the second electronic circuit, the isolation device comprising: a packaging structure; a first set of conductive leads partially exposed outside the packaging structure and coupled with the first electronic circuit; a second set of conductive leads partially exposed outside the packaging structure and coupled with the second electronic circuit; a first die mounted to a first die attach pad in the package structure and coupled to the first set of conductive leads; a second die mounted to a second die attach pad in the package structure and coupled to the second set of conductive leads; a first conductive plate in the package structure, the first conductive plate having a first side; a second conductive plate in the package structure, the second conductive plate having a second side; a first bond wire coupled to the first die and the first conductive plate in the package structure; and a second bond wire coupled to the second die and the second conductive plate in the package structure; the first die attach pad and the second die attach pad are physically separated from the first conductive plate and the second conductive plate, the second side of the second conductive plate is separated from and directly faces the first side of the first conductive plate, a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate acts as a dielectric to form an isolated capacitor along with the first conductive plate and the second conductive plate, other sides of the first conductive plate do not directly face sides of the second conductive plate, and other sides of the second conductive plate do not directly face sides of the first conductive plate.

17. The system of claim 16, wherein: the first side of the first conductive plate extends in a first plane; the second side of the second conductive plate extends in a second plane; the first plane and the second plane are parallel to each other; and the first conductive plate and the second conductive plate are coplanar in a third plane perpendicular to the first plane and the second plane.

18. The system of claim 16, wherein: the first conductive plate has a first portion with the first side, and a second portion; and the first portion and the second portion of the first conductive plate are not coplanar.

19. The system of claim 16, wherein, the isolation device further comprises an embedded dielectric insert in the package structure, wherein one of the first conductive plate and the second conductive plate is on or in the embedded dielectric insert.

20. A method of making an electronic device, comprising: providing a package structure having conductive leads partially exposed outside the package structure; mounting a first die to a first die attach pad in the package structure, mounting a first conductive plate in the package structure, the first conductive plate having a first side, and mounting a second conductive plate in the package structure, the second conductive plate having a second side; mounting a second die to a second die attach pad in the package structure; coupling a first bond wire to the first die and the first conductive plate in the package structure; coupling a second bond wire to the second die and the second conductive plate in the package structure; and ​ The first die attach pad and the second die attach pad are physically separated from the first conductive plate and the second conductive plate, the second side of the second conductive plate is separated from and directly faces the first side of the first conductive plate, a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate acts as a dielectric to form an isolated capacitor along with the first conductive plate and the second conductive plate, other sides of the first conductive plate do not directly face sides of the second conductive plate, and other sides of the second conductive plate do not directly face sides of the first conductive plate.

21. The method according to claim 20, wherein: The first side of the first conductive plate extends in a first plane; the second side of the second conductive plate extends in a second plane; and the first plane and the second plane are parallel to each other.

22. The method of claim 21, wherein, The first conductive plate and the second conductive plate are coplanar in a third plane perpendicular to the first plane and the second plane.

23. The method of claim 21, wherein: The package structure has a first side and an opposite second side; the first side and the second side of the package structure are separated from each other along a first direction; portions of the conductive leads are exposed outside the package structure along respective the first side and the second side of the package structure; The conductive leads are separated from each other along a second direction of respective the first side and the second side of the package structure; The second direction is perpendicular to the first direction; and the second side of the second conductive plate is separated from the first side of the first conductive plate along one of the first direction and the second direction.

24. The method of claim 20, wherein: The package structure has a first side and an opposite second side; the first side and the second side of the package structure are separated from each other along a first direction; portions of the conductive leads are exposed outside the package structure along respective the first side and the second side of the package structure; The conductive leads are separated from each other along a second direction of respective the first side and the second side of the package structure; The second direction is perpendicular to the first direction; and the second side of the second conductive plate is separated from the first side of the first conductive plate along a third direction perpendicular to the first direction and the second direction.

25. The method of claim 24, wherein: The first conductive plate has a first portion with the first side, and a second portion; and the first portion and the second portion of the first conductive plate are not coplanar.

26. The method of claim 25, wherein: The second conductive plate has a first portion with the second side, and a second portion; and the first portion and the second portion of the second conductive plate are not coplanar.

27. The method of claim 25, wherein: The first side of the first conductive plate extends in a first plane; the second side of the second conductive plate extends in a second plane; and the first plane and the second plane are parallel to each other.

28. The method of claim 24, further comprising an embedded dielectric interposer in the package structure, wherein, One of the first conductive plate and the second conductive plate is on or in the embedded dielectric interposer.

29. The method of claim 28, further comprising a plurality of conductive plates on or in the embedded dielectric interposer.

30. The method of claim 28, wherein: the first side of the first conductive plate extends in a first plane; the second side of the second conductive plate extends in a second plane; and the first plane and the second plane are parallel to each other.

31. The method of claim 24, wherein: the first side of the first conductive plate extends in a first plane; the second side of the second conductive plate extends in a second plane; and the first plane and the second plane are parallel to each other.

32. A method comprising: providing a first electronic circuit of a first voltage domain; providing a second electronic circuit of a second voltage domain; and coupling an isolation device with the first electronic circuit and the second electronic circuit, the isolation device comprising: a package structure; a first set of conductive leads partially exposed outside the package structure and coupled with the first electronic circuit; a second set of conductive leads partially exposed outside the package structure and coupled with the second electronic circuit; a first die mounted to a first die attach pad in the package structure and coupled to the first set of conductive leads; a second die mounted to a second die attach pad in the package structure and coupled to the second set of conductive leads; a first conductive plate in the package structure, the first conductive plate having a first side; a second conductive plate in the package structure, the second conductive plate having a second side; a first bond wire coupled to the first die and the first conductive plate in the package structure; a second bond wire coupled to the second die and the second conductive plate in the package structure; and the first die attach pad and the second die attach pad are physically separated from the first conductive plate and the second conductive plate, the second side of the second conductive plate is separated from and directly faces the first side of the first conductive plate, a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate acts as a dielectric to form an isolation capacitor together with the first conductive plate and the second conductive plate, other sides of the first conductive plate do not directly face sides of the second conductive plate, and other sides of the second conductive plate do not directly face sides of the first conductive plate.

33. The method of claim 32, wherein: the first side of the first conductive plate extends in a first plane; the second side of the second conductive plate extends in a second plane; the first plane and the second plane are parallel to each other; and the first conductive plate and the second conductive plate are coplanar in a third plane perpendicular to the first plane and the second plane.

34. The method of claim 32, wherein: the first conductive plate has a first portion with the first side, and a second portion; and the first portion and the second portion of the first conductive plate are not coplanar.

35. The method of claim 32, wherein, the isolation device further comprises an embedded dielectric interposer in the package structure, wherein one of the first conductive plate and the second conductive plate is on or in the embedded dielectric interposer.

36. A method comprising: spaced apart from and directly facing a second side of a second conductive plate of the leadframe, other sides of the first conductive plate not directly facing sides of the second conductive plate and other sides of the second conductive plate not directly facing sides of the first conductive plate; coupling a first die to the first conductive plate with a first bond wire; coupling a second die to the second conductive plate with a second bond wire, wherein the first die is attached to a first die attach pad, the second die is attached to a second die attach pad, and the first die attach pad and the second die attach pad are physically spaced apart from the first conductive plate and the second conductive plate; enclosing the first die, the second die, the first bond wire, the second bond wire, a portion of the first conductive plate, and a portion of the second conductive plate with a package structure; and the first conductive plate, the second conductive plate, and conductive leads are separated from a remainder of the leadframe; wherein a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate provides a dielectric to form an isolated capacitor along with the first conductive plate and the second conductive plate, wherein: the leadframe comprises a first leadframe and a second leadframe, the side of the first conductive plate of the first leadframe is spaced apart from and directly facing the side of the second conductive plate of the second leadframe or a dielectric insert; other sides of the first conductive plate do not directly face another side of the second conductive plate; and other sides of the second conductive plate do not directly face another side of the first conductive plate.

37. The method of claim 36, wherein: the first conductive plate of the first leadframe is spaced apart from and directly facing the side of the second conductive plate of the dielectric insert; other sides of the first conductive plate do not directly face another side of the second conductive plate; other sides of the second conductive plate do not directly face another side of the first conductive plate; a side of a third conductive plate of the second leadframe is spaced apart from and directly facing a side of a fourth conductive plate of the dielectric insert; other sides of the third conductive plate do not directly face another side of the fourth conductive plate; and other sides of the fourth conductive plate do not directly face another side of the third conductive plate.

38. The method of claim 36, wherein: the leadframe comprises a first leadframe and a second leadframe, the side of the first conductive plate of the first leadframe is spaced apart from and directly facing the side of a second conductive plate of a dielectric insert; other side of the second conductive plate does not directly face another side of the first conductive plate; other side of the second conductive plate does not directly face another side of the first conductive plate; a side of a third conductive plate of the second leadframe is spaced apart from and directly faces a side of a fourth conductive plate of the dielectric insert; other side of the third conductive plate does not directly face another side of the fourth conductive plate; and other side of the fourth conductive plate does not directly face another side of the third conductive plate.

39. An apparatus comprising: a first side of a first conductive plate of a leadframe is spaced apart from and directly faces a second side of a second conductive plate of the leadframe; other sides of the first conductive plate do not directly face sides of the second conductive plate; and other sides of the second conductive plate do not directly face sides of the first conductive plate; a first bond wire coupling a first die and the first conductive plate; a second bond wire coupling a second die and the second conductive plate, wherein the first die is attached to a first die attach pad, the second die is attached to a second die attach pad, and the first and second die attach pads are physically spaced apart from the first and second conductive plates; a package structure enclosing: the first die, the second die, the first bond wire, the second bond wire, a portion of the first conductive plate, and a portion of the second conductive plate; the first and second conductive plates and conductive leads are separated from a remainder of the leadframe; and wherein a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate provides a dielectric to form an isolated capacitor along with the first and second conductive plates, wherein: the leadframe comprises a first leadframe and a second leadframe, the first side of the first conductive plate of the first leadframe is spaced apart from and directly faces the second side of the second conductive plate of the second leadframe or a dielectric insert; other sides of the first conductive plate do not directly face sides of the second conductive plate; and other sides of the second conductive plate do not directly face sides of the first conductive plate.

40. The apparatus of claim 39, wherein: the first conductive plate of the first leadframe is spaced apart from and directly faces the second side of the second conductive plate of the dielectric insert; other sides of the first conductive plate do not directly face sides of the second conductive plate; other sides of the second conductive plate do not directly face sides of the first conductive plate; a first side of a third conductive plate of the second leadframe is spaced apart from and directly faces a second side of a fourth conductive plate of the dielectric insert; a first side of a third conductive plate of the second leadframe is spaced apart from and directly faces a second side of a fourth conductive plate of the dielectric insert; other side of the third conductive plate does not directly face a side of the fourth conductive plate; and other side of the fourth conductive plate does not directly face a side of the third conductive plate.

41. The apparatus of claim 39, wherein: the leadframe comprises a first leadframe and a second leadframe, the first side of the first conductive plate of the first leadframe is spaced apart from and directly faces a second side of a second conductive plate of a dielectric insert; other side of the first conductive plate does not directly face a side of the second conductive plate; other side of the second conductive plate does not directly face a side of the first conductive plate; the first side of a third conductive plate of the second leadframe is spaced apart from and directly faces a second side of a fourth conductive plate of the dielectric insert; other side of the third conductive plate does not directly face a side of the fourth conductive plate; and other side of the fourth conductive plate does not directly face a side of the third conductive plate.

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