DCI receiving method, sending method, terminal, network device and storage medium

Abstract

The present application provides a DCI receiving method, a sending method, a terminal, a network device and a storage medium, the method comprising: the terminal receives DCI, the DCI comprises at least one of a HARQ process identification field and a feedback timing indication field, and further comprises: at least one of an FDRA field and a PUCCH resource indication field: the terminal determines a target content, the target content determination comprises at least one of the following: determining the HARQ process identification according to a bit and a first bit of the HARQ process identification field; determining the feedback timing indication according to a bit and a second bit of the feedback timing indication field, or determining the feedback timing indication according to the HARQ process identification and a bit of the feedback timing indication field. The present application can improve the indication effect of DCI.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a downlink control information (Downlink Control Information, DCI) receiving method, sending method, terminal, network device and storage medium. Background Art

[0002] DCI may include a hybrid automatic repeat request (HARQ) process identification field and a feedback timing indication field. In some communication systems, the number of bits of the HARQ process identification field and the feedback timing indication field is often fixed, which results in the HARQ process identification field and the feedback timing indication field being able to indicate less content, which in turn results in a poor indication effect of DCI. Summary of the invention

[0003] The embodiments of the present application provide a DCI receiving method, a sending method, a terminal, a network device and a storage medium to solve the problem that the indication effect of DCI is relatively poor.

[0004] The present application provides a DCI receiving method, including:

[0005] The terminal receives DCI, where the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also includes at least one of a frequency domain resource allocation (Frequency Domain Resource Allocation, FDRA) field and a physical uplink control channel (Physical Uplink Control Channel, PUCCH) resource indication field:

[0006] The terminal determines the target content, wherein the determining the target content includes at least one of the following:

[0007] Determine a HARQ process identifier according to the bits and the first bit of the HARQ process identifier field;

[0008] Determine the feedback timing indication according to the bit of the feedback timing indication field and the second bit, or determine the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field;

[0009] The first bit includes the first bit of the FDRA field or the PUCCH resource indication field;

[0010] The second bit includes the second bit of the FDRA field or the PUCCH resource indication field.

[0011] Optionally, the first bit of the FDRA field includes:

[0012] The least significant bit of the FDRA information carried by the FDRA field;

[0013] The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes:

[0014] The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit in the FDRA information carried by the FDRA field.

[0015] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the HARQ process identifier; or

[0016] The least significant bit in the FDRA information is used as the least significant bit of the HARQ process identifier.

[0017] Optionally, the first bit of the PUCCH resource indication field includes:

[0018] The most significant bit of the PUCCH resource indication field; or

[0019] The least significant bit of the PUCCH resource indication field;

[0020] The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes:

[0021] Determine the HARQ process identifier according to the bits of the HARQ process identifier field and the most significant bit of the PUCCH resource indication field; or

[0022] The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit of the PUCCH resource indication field.

[0023] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0024] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier; or

[0025] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0026] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier.

[0027] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0028] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0029] When the DCI is in DCI format 1_0 or in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a PUCCH resource indication field in the DCI.

[0030] Optionally, the second bit of the FDRA field includes:

[0031] The least significant bit of the FDRA information carried by the FDRA field;

[0032] The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes:

[0033] The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit in the FDRA information carried by the FDRA field.

[0034] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the feedback timing indication; or

[0035] The least significant bit in the FDRA information is used as the least significant bit of the feedback timing indication.

[0036] Optionally, the second bit of the PUCCH resource indication field includes:

[0037] The most significant bit of the PUCCH resource indication field; or

[0038] The least significant bit of the PUCCH resource indication field;

[0039] The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes:

[0040] Determine the feedback timing indication according to the bits of the feedback timing indication field and the most significant bit of the PUCCH resource indication field; or

[0041] The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit of the PUCCH resource indication field.

[0042] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0043] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication; or

[0044] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0045] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication.

[0046] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0047] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0048] When the DCI is in DCI format 1_0 or in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and also includes: a second bit of a PUCCH resource indication field in the DCI.

[0049] Optionally, the determining the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field includes:

[0050] When the HARQ process identifier is in the first identifier range, determining the feedback timing indication in the first timing set according to the bits of the feedback timing indication field; or

[0051] When the HARQ process identifier is in the second identifier range, the feedback timing indication is determined in the second timing set according to the bits of the feedback timing indication field.

[0052] Optionally, the number of HARQ process identifiers included in the first identifier range is equal to the number of HARQ process identifiers included in the second identifier range;

[0053] The number of timings included in the first timing set is equal to the number of timings included in the second timing set.

[0054] The embodiment of the present application provides a DCI sending method, including:

[0055] The network device sends a DCI, wherein the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also includes: at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field;

[0056] The bit and the first bit of the HARQ process identifier field are used to determine the HARQ process identifier; and / or, the bit and the second bit of the feedback timing indication field are used to determine the feedback timing indication, or the feedback timing indication corresponding to the DCI is determined by the HARQ process identifier and the bit of the feedback timing indication field;

[0057] The first bit includes the first bit of the FDRA field or the PUCCH resource indication field;

[0058] The second bit includes: the second bit of the FDRA field or the PUCCH resource indication field.

[0059] An embodiment of the present application provides a terminal, including: a memory, a transceiver, and a processor, wherein:

[0060] The memory is used to store a computer program; the transceiver is used to send and receive data under the control of the processor; the processor is used to read the computer program in the memory and perform the following operations:

[0061] Receive DCI, the DCI including at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also including at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field:

[0062] Determine the target content, wherein determining the target content includes at least one of the following:

[0063] Determine a HARQ process identifier according to the bits and the first bit of the HARQ process identifier field;

[0064] Determine the feedback timing indication according to the bit of the feedback timing indication field and the second bit, or determine the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field;

[0065] The first bit includes the first bit of the FDRA field or the PUCCH resource indication field;

[0066] The second bit includes the second bit of the FDRA field or the PUCCH resource indication field.

[0067] Optionally, the first bit of the FDRA field includes:

[0068] The least significant bit of the FDRA information carried by the FDRA field;

[0069] The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes:

[0070] The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit in the FDRA information carried by the FDRA field.

[0071] Optionally, the first bit of the PUCCH resource indication field includes:

[0072] The most significant bit of the PUCCH resource indication field; or

[0073] The least significant bit of the PUCCH resource indication field;

[0074] The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes:

[0075] Determine the HARQ process identifier according to the bits of the HARQ process identifier field and the most significant bit of the PUCCH resource indication field; or

[0076] The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit of the PUCCH resource indication field.

[0077] Optionally, the second bit of the FDRA field includes:

[0078] The least significant bit of the FDRA information carried by the FDRA field;

[0079] The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes:

[0080] The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit in the FDRA information carried by the FDRA field.

[0081] Optionally, the second bit of the PUCCH resource indication field includes:

[0082] The most significant bit of the PUCCH resource indication field; or

[0083] The least significant bit of the PUCCH resource indication field;

[0084] The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes:

[0085] The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit in the FDRA information carried by the FDRA field.

[0086] Optionally, the determining the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field includes:

[0087] When the HARQ process identifier is in the first identifier range, determining the feedback timing indication in the first timing set according to the bits of the feedback timing indication field; or

[0088] When the HARQ process identifier is in the second identifier range, the feedback timing indication is determined in the second timing set according to the bits of the feedback timing indication field.

[0089] The embodiment of the present application provides a network device, including: a memory, a transceiver, and a processor, wherein:

[0090] A memory for storing a computer program; a transceiver for transmitting and receiving data under the control of the processor; and a processor for reading the computer program in the memory and performing the following operations:

[0091] Sending downlink control information DCI, wherein the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also includes at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field;

[0092] The bit and the first bit of the HARQ process identifier field are used to determine the HARQ process identifier; and / or, the bit and the second bit of the feedback timing indication field are used to determine the feedback timing indication, or the feedback timing indication corresponding to the DCI is determined by the HARQ process identifier and the bit of the feedback timing indication field;

[0093] The first bit includes the first bit of the FDRA field or the PUCCH resource indication field;

[0094] The second bit includes: the second bit of the FDRA field or the PUCCH resource indication field.

[0095] An embodiment of the present application provides a terminal, including:

[0096] A receiving unit, configured to receive a DCI, wherein the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and further includes at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field:

[0097] The determination unit is used to determine the target content, wherein the determination of the target content includes at least one of the following:

[0098] Determine a HARQ process identifier according to the bits and the first bit of the HARQ process identifier field;

[0099] Determine the feedback timing indication according to the bit of the feedback timing indication field and the second bit, or determine the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field;

[0100] The first bit includes the first bit of the FDRA field or the PUCCH resource indication field;

[0101] The second bit includes the second bit of the FDRA field or the PUCCH resource indication field.

[0102] The present application provides a network device, including:

[0103] A sending unit, configured to send downlink control information DCI, wherein the DCI includes a HARQ process identifier and a feedback timing indication;

[0104] Among them, the HARQ process identifier includes the bits of the HARQ process identifier field in the DCI, and the first bit of the frequency domain resource allocation FDRA field or the physical uplink control channel PUCCH resource indication field in the DCI; and / or, the feedback timing indication includes the bits of the feedback timing indication field in the DCI, and the second bit of the frequency domain resource allocation FDRA field or the physical uplink control channel PUCCH resource indication field in the DCI; and / or, the HARQ process identifier and the bits of the feedback timing indication field are used to determine the feedback timing indication.

[0105] An embodiment of the present application provides a processor-readable storage medium, characterized in that the processor-readable storage medium stores a computer program, and the computer program is used to enable the processor to execute the DCI receiving method provided by the embodiment of the present application, or the computer program is used to enable the processor to execute the DCI sending method provided by the embodiment of the present application.

[0106] In an embodiment of the present application, a terminal receives a DCI, and the DCI includes at least one of a HARQ process identification field and a feedback timing indication field, and also includes: at least one of a FDRA field and a PUCCH resource indication field: the terminal determines the target content, and the determination of the target content includes at least one of the following: determining the HARQ process identification according to the bit and the first bit of the HARQ process identification field; determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field, or determining the feedback timing indication according to the HARQ process identification and the bit of the feedback timing indication field; wherein the first bit includes the first bit of the FDRA field or the PUCCH resource indication field; the second bit includes the second bit of the FDRA field or the PUCCH resource indication field. Through the above, it can be achieved that the DCI can indicate more HARQ processes, and / or, it can be achieved that the DCI can indicate more feedback timings, thereby improving the indication effect of the DCI. BRIEF DESCRIPTION OF THE DRAWINGS

[0107] Figure 1 It is a schematic diagram of the structure of the network architecture applicable to the implementation of this application;

[0108] Figure 2 is a flow chart of a DCI receiving method provided in an embodiment of the present application;

[0109] Figure 3 is a schematic diagram of an FDRA field provided in an embodiment of the present application;

[0110] Figure 4 This is a flow chart of a DCI sending method provided by an embodiment of the present application;

[0111] Figure 5 is a structural diagram of a terminal provided in an embodiment of the present application;

[0112] Figure 6 is a structural diagram of a network device provided in an embodiment of the present application;

[0113] Figure 7 is a structural diagram of another terminal provided in an embodiment of the present application;

[0114] Figure 8 It is a structural diagram of another network device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0115] In order to make the technical problems, technical solutions and advantages to be solved by the present application clearer, a detailed description will be given below with reference to the accompanying drawings and specific embodiments.

[0116] In the embodiments of the present application, the term "and / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0117] In the embodiments of the present application, the term "plurality" refers to two or more than two, and other quantifiers are similar.

[0118] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0119] The embodiments of the present application provide an information sending method, a receiving method, a terminal, a network device and a storage medium to solve the problem of poor interaction performance between a terminal and a network side.

[0120] Among them, the method and the device are based on the same application concept. Since the method and the device solve the problem in a similar principle, the implementation of the device and the method can refer to each other, and the repeated parts will not be repeated.

[0121] The technical solution provided in the embodiment of the present application can be applicable to a variety of systems, especially 6G systems. For example, the applicable system can be a global system of mobile communication (GSM) system, a code division multiple access (CDMA) system, a wideband code division multiple access (WCDMA) general packet radio service (GPRS) system, a long term evolution (LTE) system, a LTE frequency division duplex (FDD) system, a LTE time division duplex (TDD) system, an advanced long term evolution (LTE-A) system, a universal mobile telecommunication system (UMTS), a world-wide interoperability for microwave access (WiMAX) system, a 5G new radio (NR) system, a 6G system, etc. These various systems include terminal equipment and network equipment. The system may also include a core network part, such as an evolved packet system (EPS), a 5G system (5GS), etc.

[0122] See also Figure 1 , Figure 1 It is a schematic diagram of the network architecture applicable to the implementation of this application, such as Figure 1 As shown, it includes a terminal 11 and a network device 12.

[0123] Among them, the terminal involved in the embodiment of the present application may be a device that provides voice and / or data connectivity to a user, a handheld device with a wireless connection function, or other processing devices connected to a wireless modem. In different systems, the name of the terminal device may also be different. For example, in a 5G system, the terminal device may be called a user equipment (UE). The wireless terminal device can communicate with one or more core networks (CN) via a radio access network (RAN). The wireless terminal device can be a mobile terminal device, such as a mobile phone (or a "cellular" phone) and a computer with a mobile terminal device. For example, it can be a portable, pocket-sized, handheld, computer-built-in or vehicle-mounted mobile device, which exchanges language and / or data with the radio access network. For example, Personal Communication Service (PCS) phones, cordless phones, Session Initiated Protocol (SIP) phones, Wireless Local Loop (WLL) stations, Personal Digital Assistants (PDA), Redcap terminals, Low power wide area (LPWA) terminals, etc. Wireless terminal devices may also be referred to as systems, subscriber units, subscriber stations, mobile stations, mobile stations, remote stations, access points, remote terminal devices, access terminal devices, user terminal devices, user agents, and user devices, which are not limited in the embodiments of the present application.

[0124] The network device involved in the embodiment of the present application may be a base station, which may include multiple cells providing services for the terminal. Depending on the specific application scenario, the base station may also be called an access point, or may be a device in the access network that communicates with the wireless terminal device through one or more sectors on the air interface, or other names. The network device may be used to interchange received air frames with Internet Protocol (IP) packets, and serve as a router between the wireless terminal device and the rest of the access network, wherein the rest of the access network may include an Internet Protocol (IP) communication network. The network device may also coordinate the attribute management of the air interface. For example, the network device involved in the embodiments of the present application may be a network device (Base Transceiver Station, BTS) in the Global System for Mobile communications (Global System for Mobile communications, GSM) or Code Division Multiple Access (Code Division Multiple Access, CDMA), or a network device (NodeB) in Wide-band Code Division Multiple Access (WCDMA), or an evolutionary network device (evolutional Node B, eNB or e-NodeB) in the long term evolution (long term evolution, LTE) system, a 5G base station (gNB) in the 5G network architecture (next generation system), a base station in 6G, or a home evolved Node B (Home evolved Node B, HeNB), a relay node, a home base station (femto), a pico base station (pico), etc., which is not limited in the embodiments of the present application. In some network structures, the network device may include a centralized unit (CU) node and a distributed unit (DU) node, and the centralized unit and the distributed unit may also be arranged geographically separately.

[0125] Network devices and terminals can each use one or more antennas for multiple-input multiple-output (MIMO) transmission. MIMO transmission can be single-user MIMO (SU-MIMO) or multi-user MIMO (MU-MIMO). Depending on the form and number of antenna combinations, MIMO transmission can be 2D-MIMO, 3D-MIMO, FD-MIMO or massive-MIMO, or it can be diversity transmission, precoded transmission or beamforming transmission, etc.

[0126] See also Figure 2 , Figure 2 is a flowchart of a DCI receiving method provided in an embodiment of the present application, such as Figure 2 As shown, the following steps are included:

[0127] Step 201: The terminal receives DCI, where the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also includes at least one of a frequency domain resource allocation FDRA field and a PUCCH resource indication field (PUCCH resource indicator):

[0128] The terminal determines the target content, wherein the determining the target content includes at least one of the following:

[0129] Determine a HARQ process identifier (HARQ process number) according to the bits and the first bit of the HARQ process identifier field;

[0130] Determine the feedback timing indication according to the bit of the feedback timing indication field and the second bit, or determine the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field;

[0131] The first bit includes the first bit of the FDRA field or the PUCCH resource indication field;

[0132] The second bit includes the second bit of the FDRA field or the PUCCH resource indication field.

[0133] The above DCI is the DCI sent by the terminal and received by the network device, and may include DCI format 0_0 / 1_0 / 0_1 / 1_1.

[0134] The number of bits of the above HARQ process number field may be defined by the protocol or configured by high-level parameters. For example, the number of bits of DCI formats 0-2 and 1-2 configured by high-level parameters may be any one of 1, 2, 3 and 4.

[0135] The feedback timing indication may be a K1 indication, and specifically may be a physical downlink shared channel (PDSCH) to HARQ feedback timing indication (PDSCH-to-HARQ_feedbacktimingindicator). In addition, the number of bits of the feedback timing indication field may be defined by the protocol or configured by a high-level parameter, for example, any one of 1, 2, and 3 bits of the feedback timing indication field configured by the high-level parameter.

[0136] The number of bits of the FDRA field may be determined according to the resource allocation type, for example, 8 bits or 9 bits.

[0137] The number of bits of the PUCCH resource indication field may be defined by the protocol, for example: 3 bits.

[0138] The first bit of the above-mentioned FDRA field may be 1 bit in the FDRA field, and the first bit of the above-mentioned PUCCH resource indication field may be 1 bit of the PUCCH resource indication field. Of course, in some scenarios or implementation methods, it may also be 2 bits or more bits.

[0139] The above-mentioned determining the HARQ process identifier based on the bits and the first bit of the HARQ process identifier field may be indicating the HARQ process identifier based on the bits and the first bit of the HARQ process identifier field to determine the HARQ process indicated by the DCI.

[0140] In an embodiment of the present application, the indication of the HARQ process identifier can be implemented by using the first bit of the FDRA field or the PUCCH resource indication field and the bit of the HARQ process identifier field, thereby increasing the number of bits of the HARQ process identifier, and further allowing the HARQ process identifier included in the DCI to indicate more HARQ processes, thereby improving the indication effect of the DCI.

[0141] The determining of the feedback timing indication according to the bit and the second bit of the feedback timing indication field may be indicating the feedback timing indication according to the bit and the second bit of the feedback timing indication field to determine the feedback timing.

[0142] The above-mentioned determination of the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field may be to determine the feedback timing indication according to the third bit corresponding to the HARQ process identifier and the bit of the feedback timing indication field. The above-mentioned third bit may be an additional bit added to the HARQ process identifier, for example: the above-mentioned first bit or second bit. The above-mentioned HARQ process identifier may be a bit in the HARQ process identifier field of the above-mentioned DCI indicating the HARQ process identifier, or a HARQ process identifier jointly indicated by the HARQ process identifier field of the DCI and the bit additionally added for the HARQ process identifier, or the above-mentioned HARQ process identifier may be a HARQ process identifier indicated by other signaling, and this is not limited.

[0143] In this way, since the feedback timing indication is determined according to the HARQ process identifier and the bits of the feedback timing indication field, the DCI can indicate more feedback timings.

[0144] In the embodiment of the present application, the feedback timing indication can be implemented by using the first bit of the FDRA field or the PUCCH resource indication field and the bit of the feedback timing indication, thereby increasing the number of bits of the feedback timing indication, and further enabling the feedback timing indication included in the DCI to indicate more feedback timings, thereby improving the indication effect of the DCI. In addition, by improving the indication effect of the DCI, the information transmission rate and reliability can be guaranteed.

[0145] It should be noted that the DCI provided in the embodiment of the present application can be applied to non-terrestrial networks (NTN) systems, and of course, can also be applied to terrestrial networks (TN) systems, which is not limited to the embodiment of the present application.

[0146] In the embodiment of the present application, the FDRA field is mainly used for frequency domain resource allocation, and the number of bits of the field is related to the number of resource blocks RB (Resource Block) of the corresponding uplink or downlink bandwidth part (Bandwidth Part, BWP);

[0147] For example, if resource allocation type 1 is used, the number of bits in the FDRA field is in, The number of RBs for uplink or downlink BWP;

[0148] For resource allocation type 0, it is a non-continuous resource allocation type. The resource allocation resources are allocated according to resource block groups (RBG). One RBG is a virtual resource block group (VRB group), which consists of P consecutive VRBs. The specific number is determined by the high-level parameters RBG size and BWP bandwidth. The RBG size determines whether it is resource allocation type 1 or resource allocation type 2, as shown in Table 1 below:

[0149] Table 1:

[0150] BWP Bandwidth Resource Allocation Type 1 Resource Allocation Type 2 1–36 2 4 37–72 4 8 73–144 8 16 145–275 16 16

[0151] If resource allocation type 0 is used, the number of bits in the FDRA field is N. RBG ,in, in, is the BWP size corresponding to the BWP bandwidth in the table, where Indicates the starting RB number of the BWP in the above table, and P is the RBG size for different resource allocation types and different BWP bandwidths in the above table.

[0152] When both resource allocation type 1 and resource allocation type 0 are configured, the number of bits in the FDRA field is

[0153] As an optional implementation, the first bit of the FDRA field includes:

[0154] The least significant bit of the FDRA information carried by the FDRA field;

[0155] The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes:

[0156] The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit in the FDRA information carried by the FDRA field.

[0157] In this implementation, the least significant bit in the FDRA information can be used as both a bit in the FDRA information and a bit of the HARQ process identifier, that is, the least significant bit in the above FDRA information is used as an implicit indication of an additional bit of the HARQ process identifier field. In other words, the above least significant bit is used to indicate two contents at the same time.

[0158] In this way, the indication effect of the HARQ process identifier in the DCI is improved while the indication of the FDRA information is not affected.

[0159] For example: In some communication systems, the HARQ process identification field and the FDRA field are configured in the same DCI format. Considering that the FDRA field needs to be configured for each process, that is, for each process, there is a certain probability that the corresponding HARQ process identification range is (0, 15) or (16, 31). Assuming that there are 32 processes in a time slot, in this implementation, considering the randomness of the FDRA field configuration, the worst case configuration of the HARQ process identification is one of (0, 15) or (16, 31), and the best case is the process ID configuration (0, 31). It can be seen that this implementation can improve the flexibility of the DCI configuration and avoid the impact on other fields in the DCI.

[0160] In one implementation, the least significant bit in the FDRA information is used as the most significant bit of the HARQ process identifier.

[0161] Taking the comparison of the HARQ process identification field as ABCD and the least significant bit in the FDRA information as X as an example, the HARQ process identification is XABCD, so that the HARQ process identification can indicate more HARQ processes.

[0162] The following is an example to illustrate the implementation method:

[0163] For resource allocation type 1, the allocated frequency domain resources are continuous resource allocation. The bits corresponding to the FDRA field are used to represent a resource indication value (RIV), which includes the starting RB (RB_start) allocated to the UE RB and the length of the continuous allocation RB L_RBs. The RIV calculation formula can be as follows:

[0164] if So

[0165] otherwise

[0166] Among them, L RBs ≥1 and no more than

[0167] assumed To ensure the transmission coding rate, the required frequency domain resources are 3RB, corresponding to 18 allocation methods, that is, RB start The three consecutive RBs starting from (0,1,2,…,19) are as follows: Figure 3 As shown. At this time, the number of bits in the FDRA field is

[0168] The network equipment can flexibly configure the frequency domain resources of the terminal according to the frequency domain multiplexing and frequency domain interference. When the FDRA field selects (00101000, 00101010, 00101100, 00101110, 00110000, 00110010, 00110100, 00110110, 00111000), the corresponding HARQ process identification range is (0, 15), that is, X=0 in "XABCD"; when the FDRA field can select (00101001, 00101011, 00101101, 00101111, 00110001, 00110011, 00110101, 00110111, 00111001), the corresponding HARQ process identification range is (16,31), that is, X=1 in "XABCD".

[0169] For resource allocation type 0, it is a non-continuous resource allocation type. The resource allocation resources are allocated according to RBG. One RBG is a VRB group, which consists of P consecutive VRBs. The specific number is determined by the high-level parameters RBG size and BWP bandwidth. The RBG size determines whether it is resource allocation type 1 or resource allocation type 2. The details can be shown in Table 1 above.

[0170] The FDRA field contains N_RBG bits, where each bit corresponds to one RBG, the highest bit represents RBG 0, the lowest bit represents RBG N_RBG-1, and so on. If an RBG is assigned to a terminal, the corresponding bit in the bitmap is set to 1; otherwise, it is set to 0. Then the number of RBGs in a BWP is:

[0171] The network equipment can flexibly configure the frequency domain resources of the terminal according to the frequency domain multiplexing and frequency domain interference conditions. When the last bit of the FDRA field is 0, the corresponding HARQ process ID range is (0,15), that is, X=0 in "XABCD"; when the last bit of the FDRA field is 1, the corresponding HARQ process ID range is (16,31), that is, X=1 in "XABCD".

[0172] For configuration of both resource allocation type 1 and resource allocation type 0, the FDRA field corresponds to At this time, the highest bit of the FDRA field is used to indicate resource allocation type 0 or resource allocation type 1, wherein a bit value of 0 indicates resource allocation type 0, and a bit value of 1 indicates resource allocation type 1. According to the configuration of the highest bit of the FDRA field, refer to the implementation method of resource allocation type 0 or resource allocation type 1 described above.

[0173] In another embodiment, the least significant bit in the FDRA information is used as the least significant bit of the HARQ process identifier.

[0174] Taking the comparison of the HARQ process identification field as ABCD and the least significant bit in the FDRA information as X as an example, the HARQ process identification is ABCDX, so that the HARQ process identification can indicate more HARQ processes.

[0175] The following is an example to illustrate the implementation method:

[0176] For resource allocation type 1, assume that To ensure the transmission coding rate, the required frequency domain resources are 3RB, corresponding to 18 allocation methods, that is, RB start The three consecutive RBs starting from (0,1,2,…,19) are as follows: Figure 3 As shown. At this time, the FDRA field corresponds to Bit,

[0177] The network equipment can flexibly configure the frequency domain resources of the UE according to the frequency domain multiplexing and frequency domain interference. When the FDRA field selects (00101000, 00101010, 00101100, 00101110, 00110000, 00110010, 00110100, 00110110, 00111000), that is, X=0 in "ABCDX", the corresponding HARQ process ID is (0,2,4,6,8,10,12,14,16,18, 20,22,24,26,28,30); when the FDRA field selects (00101001, 00101011, 00101101, 00101111, 00110001, 00110011, 00110101, 00110111, 00111001), that is, X=1 in "ABCDX", the corresponding HARQ process ID is (1,3,5,7,9,11,13,15,17,19,21,23,25,27,29,31).

[0178] For resource allocation type 0, the network equipment can flexibly configure the frequency domain resources of the UE according to the frequency domain multiplexing and frequency domain interference. When the last bit of the FDRA field is 0, the corresponding HARQ process ID is (0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30), that is, X=0 in "ABCDX"; when the last bit of the Frequency domainresource assignment field is 1, the corresponding HARQ process ID is (1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31), that is, X=1 in "ABCDX".

[0179] For configuration of both resource allocation type 1 and resource allocation type 0, the FDRA field corresponds to At this time, the highest bit of the FDRA field is used to indicate resource allocation type 0 or resource allocation type 1, wherein a bit value of 0 indicates that the resource allocation type is 0, and a bit value of 1 indicates that the resource allocation type is 1. According to the configuration of the highest bit of the FDRA field, refer to the implementation method of resource allocation type 0 or resource allocation type 1 described above.

[0180] It should be noted that, in the embodiments of the present application, the first bit of the above-mentioned FDRA field is not limited to the least significant bit in the FDRA information carried by the FDRA field. For example, in some scenarios or implementations, the first bit of the above-mentioned FDRA field is the second to last or third to last bit in the FDRA information carried by the FDRA field.

[0181] As an optional implementation manner, the first bit of the PUCCH resource indication field includes:

[0182] The most significant bit of the PUCCH resource indication field; or

[0183] The least significant bit of the PUCCH resource indication field;

[0184] The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes:

[0185] Determine the HARQ process identifier according to the bits of the HARQ process identifier field and the most significant bit of the PUCCH resource indication field; or

[0186] The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit of the PUCCH resource indication field.

[0187] In this implementation, the highest bit / lowest bit in the PUCCH resource indication field can be used as both a bit in the PUCCH resource indication field and a bit of the HARQ process identifier, that is, the highest bit / lowest bit in the PUCCH resource indication field is used as an implicit indication of an additional bit of the HARQ process identifier field. In other words, the highest bit / lowest bit is used to indicate two contents at the same time.

[0188] In this way, the indication effect of the DCI HARQ process identifier is improved while the indication of the PUCCH resource indication field is not affected.

[0189] For example: the PUCCH resource indication field can exist in DCI format 1_0 / 1_1, which is mainly used for PUCCH resource allocation. The protocol defines this field as 3 bits. For DCI format 1_0 / 1_1, considering that the PUCCH resource indication field needs to be configured for each process, that is, there is a certain probability that each process will take the corresponding HARQ process identification range of (0,15) or (16,31). Assuming that there are 32 processes in a time slot, this implementation method takes into account the randomness of the PUCCH resource indication field configuration. The worst case configuration of the process ID is one of (0,15) or (16,31), and the best case is that the process ID is configured (0,31). The PUCCH resource indication field has higher flexibility and can avoid affecting other fields in the DCI.

[0190] In one embodiment, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0191] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier.

[0192] Taking the comparison of the HARQ process identification field as ABCD and the highest bit / lowest bit of the PUCCH resource indication field as X as an example, the HARQ process identification is XABCD, so that the HARQ process identification can indicate more HARQ processes.

[0193] The following is an example to illustrate the implementation method:

[0194] For the lowest / highest bit of the PUCCH resource indication field, it is the highest bit of the HARQ process identifier. The high-level RRC signaling configures one or more PUCCH resource sets, each resource set contains multiple PUCCH resources. After the terminal receives the downlink scheduling information, it finds a certain PUCCH resource in one PUCCH resource set according to the PUCCH resource indication field in the DCI, as shown in Table 2 below.

[0195] Table 2:

[0196]

[0197]

[0198] The network device can use the high-level RRC signaling to dynamically configure the PUCCH resources, so as to flexibly configure the PUCCH resource indication field. When the lowest / highest bit of the PUCCH resource indication field is 0, and the corresponding HARQ process identification range is (0,15), that is, X=0 in "XABCD"; when the lowest / highest bit of the PUCCH resource indication field is 1, and the corresponding HARQ process identification range is (16,31), that is, X=1 in "XABCD".

[0199] In another embodiment, the most significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier; or

[0200] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier.

[0201] Taking the comparison of the above HARQ process identification field as ABCD, and the highest bit / lowest bit in the above PUCCH resource indication field as X as an example, the above HARQ process identification is ABCDX, so that the HARQ process identification can indicate more HARQ processes.

[0202] The following is an example to illustrate the implementation method:

[0203] For the use of the lowest / highest bit of the PUCCH resource indication field as the lowest bit of the HARQ process identifier, high-level RRC signaling configures one or more PUCCH resource sets, each resource set contains multiple PUCCH resources. After receiving the downlink scheduling information, the UE will find a certain PUCCH resource in one PUCCH resource set according to the PUCCH resource indication field in the DCI, as shown in Table 4.

[0204] The network device can use the dynamic configuration of PUCCH resources by high-level RRC signaling to flexibly configure the PUCCH resource indication field. When the lowest / highest bit of the PUCCH resource indication field is 0, corresponding to the HARQ process ID (0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30), that is, X=0 in "ABCDX"; when the lowest / highest bit of the PUCCH resource indication field is 1, the corresponding HARQ process ID (1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31), that is, X=1 in "ABCDX".

[0205] As an optional implementation manner, when the DCI is DCI format 0_0, or the DCI is DCI format 0_1, the HARQ process identifier includes bits of the HARQ process identifier field in the DCI, and also includes: the first bit of the FDRA field in the DCI; or

[0206] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0207] When the DCI is in DCI format 1_0 or in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a PUCCH resource indication field in the DCI.

[0208] In this implementation, it is possible to use the least significant bit of FDRA for DCI format 0_0 / 0_1, and use the least significant bit of FDRA or the least significant / most significant bit of the PUCCH resource indication field as an additional 1-bit implicit indication of the HARQ process identifier for DCI format 1_0 / 1_1, thereby ensuring that the premise of DCI format 0_0 / 1_0 / 0_1 / 1_1 and scheduling flexibility are not changed, and avoiding the impact on the information indicated by the FDRA field or the PUCCH resource indication field in the DCI.

[0209] For example: DCI format 0_0 / 0_1 uses the lowest bit of FDRA as the lowest bit of the HARQ process identifier, and DCI1_0 / 1_1 uses the lowest / highest bit of the PUCCH resource indication field or the lowest bit of FDRA as the lowest bit of the HARQ process identifier.

[0210] For another example: DCI format 0_0 / 0_1 uses the least significant bit of FDRA as the most significant bit of HARQ process ID, and DCI format 1_0 / 1_1 uses the least significant bit / most significant bit of the PUCCH resource indication field or uses the least significant bit of FDRA as the most significant bit of the HARQ process ID.

[0211] As an optional implementation, the second bit of the FDRA field includes:

[0212] The least significant bit of the FDRA information carried by the FDRA field;

[0213] The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes:

[0214] The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit in the FDRA information carried by the FDRA field.

[0215] The least significant bit in the above FDRA information can refer to the description of the above implementation mode and is not limited here.

[0216] In this implementation, the least significant bit in the FDRA information can be used as both a bit in the FDRA information and a bit for feedback timing indication, that is, the least significant bit in the above FDRA information is used as an implicit indication of an additional bit for feedback timing indication. In other words, the least significant bit is used to indicate two contents at the same time. This ensures that the DCI format and scheduling flexibility are not changed, and avoids affecting the FDRA field.

[0217] In addition, since the second bit of the FDRA field can be the same as the first bit of the FDRA field, it is possible to reuse the bits added by the HARQ process identifier as additional bits for the feedback timing indication. While ensuring scheduling flexibility, the increase in the interval corresponding to the feedback timing indication value does not cause any additional changes to the DCI format and has low complexity.

[0218] It should be noted that, in some embodiments, the second bit of the above-mentioned FDRA field and the first bit of the FDRA field may be different. For example, if the first bit of the FDRA field is the least significant bit in the FDRA information, then the second bit of the FDRA field may be the second to last or third to last bit of the FDRA information.

[0219] In one embodiment, the least significant bit in the FDRA information is used as the most significant bit of the feedback timing indication.

[0220] Taking the case where the bits of the feedback timing indication field are ABC and the least significant bit in the FDRA information is X as an example, the feedback timing indication is XABC, so that the feedback timing indication can indicate more feedback timings.

[0221] The following is an example to illustrate the implementation method:

[0222] For resource allocation type 1, the network device configures the HARQ process identification field and the FDRA field in the same DCI format. When the FDRA field selects (00101000, 00101010, 00101100, 00101110, 00110000, 00110010, 00110100, 00110110, 00111000), the corresponding feedback timing indication field range is (0,7), that is, X=0 in XABC. The network device can flexibly configure the frequency domain resources of the terminal according to the frequency domain reuse and frequency domain interference conditions; when the FDRA field selects (00101001, 00101011, 00101101, 00101111, 00110001, 00110011, 00110101, 00110111, 00111001), the corresponding FDRA field range is (8,15), that is, X=1 in XABC, and the network device can flexibly configure the frequency domain resources of the terminal according to the frequency domain reuse and frequency domain interference conditions.

[0223] For resource allocation type 0, when the last bit of the FDRA field is 0, the corresponding feedback timing indication field range is (0,7), that is, X=0 in XABC, and the network device can flexibly configure the remaining bit frequency domain resources of the terminal according to the frequency domain multiplexing and frequency domain interference conditions; when the last bit of the FDRA field is 1, the corresponding feedback timing indication field range is (8,15), that is, X=1 in XABC, and the network device can flexibly configure the remaining bit frequency domain resources of the terminal according to the frequency domain multiplexing and frequency domain interference conditions.

[0224] In another embodiment, the least significant bit in the FDRA information is used as the least significant bit of the feedback timing indication.

[0225] Taking the comparison of the feedback timing indication field as ABC and the least significant bit in the FDRA information as X as an example, the feedback timing indication is ABCX, so that the feedback timing indication can indicate more feedback timings.

[0226] The following is an example to illustrate the implementation method:

[0227] For resource allocation type 1, when the FDRA segment selects (00101000, 00101010, 00101100, 00101110, 00110000, 00110010, 00110100, 00110110, 00111000), that is, X=0 in ABCX, the corresponding feedback timing indication field is (0, 2, 4, 6, 8, 10, 12 ,14); When the FDRA field selects (00101001, 00101011, 00101101, 00101111, 00110001, 00110011, 00110101, 00110111, 00111001), that is, X=1 in ABCX, the corresponding feedback timing indication field is (1,3,5,7,9,11,13,15). The network device can flexibly configure the FDRA field and feedback timing indication field of the terminal based on the frequency domain multiplexing and frequency domain interference conditions and the feedback timing indication required to be used.

[0228] For resource allocation type 0, when the FDRA field only needs to ensure that the last bit is 0, the corresponding feedback timing indication field is (0, 2, 4, 6, 8, 10, 12, 14), that is, X=0 in "ABCX", and the network device can flexibly configure the remaining bit frequency domain resources of the terminal according to the frequency domain multiplexing and frequency domain interference conditions; when the last bit of the FDRA field is 1, the corresponding feedback timing indication field is (1, 3, 5, 7, 9, 11, 13, 15), that is, X=1 in ABCX, and the network device can flexibly configure the remaining bit frequency domain resources of the terminal according to the frequency domain multiplexing and frequency domain interference conditions.

[0229] As an optional implementation manner, the second bit of the PUCCH resource indication field includes:

[0230] The most significant bit of the PUCCH resource indication field; or

[0231] The least significant bit of the PUCCH resource indication field;

[0232] The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes:

[0233] Determine the feedback timing indication according to the bits of the feedback timing indication field and the most significant bit of the PUCCH resource indication field; or

[0234] The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit of the PUCCH resource indication field.

[0235] Among them, the highest bit / lowest bit of the above-mentioned PUCCH resource indication field can refer to the description of the above-mentioned implementation method and is not limited here.

[0236] In this implementation, the highest bit / lowest bit of the PUCCH resource indication field can be used as both a bit in the PUCCH resource indication field and a bit for feedback timing indication, that is, the highest bit / lowest bit of the PUCCH resource indication field is used as an implicit indication of an additional bit for feedback timing indication. In other words, the highest bit / lowest bit is used to indicate two contents at the same time. In this way, the premise of not changing the DCI format and scheduling flexibility can be ensured, and the impact on the PUCCH resource indication field can be avoided.

[0237] In addition, since the second bit of the PUCCH resource indication field and the first bit of the PUCCH resource indication field can be the same, it is possible to reuse the bits added by the HARQ process identifier as additional bits for the feedback timing indication. While ensuring scheduling flexibility, the increase in the interval corresponding to the feedback timing indication value does not cause any additional changes to the DCI format and has low complexity.

[0238] It should be noted that, in some embodiments, the second bit of the above-mentioned PUCCH resource indication field and the first bit of the PUCCH resource indication field may be different. For example, if the first bit of the PUCCH resource indication field is the lowest bit in the PUCCH resource indication field, then the second bit of the PUCCH resource indication field may be the second to last or third to last bit of the PUCCH resource indication field.

[0239] In one embodiment, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0240] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication.

[0241] Taking the comparison of the feedback timing indication field as ABC and the highest bit / lowest bit of the PUCCH resource indication field as X as an example, the feedback timing indication is XABC, so that the feedback timing indication can indicate more feedback timings.

[0242] The following is an example to illustrate the implementation method:

[0243] For the use of the lowest / highest bit of the PUCCH resource indication field as the highest bit of the feedback timing indication, the high-level RRC signaling configures one or more PUCCH resource sets, each resource set contains multiple PUCCH resources. After receiving the downlink scheduling information, the terminal finds a certain PUCCH resource in one PUCCH resource set according to the PUCCH resource indication field in the DCI.

[0244] When the lowest / highest bit of the PUCCH resource indication field is 0, the corresponding feedback timing indication field range is (0,7), that is, X=0 in "XABC". The network device can use the high-level RRC signaling to dynamically configure the PUCCH resources, thereby flexibly configuring the PUCCH resource indication field; when the PUCCH resource indication field only needs to ensure that the lowest / highest bit is 1, the corresponding feedback timing indication field range is (8,15), that is, X=1 in "XABC". The network device can use the high-level RRC signaling to dynamically configure the PUCCH resources, thereby flexibly configuring the PUCCH resource indication field.

[0245] In another embodiment, the most significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication; or

[0246] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication.

[0247] Taking the comparison of the feedback timing indication field as ABC and the highest bit / lowest bit of the PUCCH resource indication field as X as an example, the feedback timing indication is ABCX, so that the feedback timing indication can indicate more feedback timings.

[0248] The following is an example to illustrate the implementation method:

[0249] The least significant bit / highest significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication. The high-level RRC signaling configures one or more PUCCH resource sets. Each resource set contains multiple PUCCH resources. After receiving the downlink scheduling information, the terminal finds a certain PUCCH resource in one PUCCH resource set according to the PUCCH resource indication field in the DCI.

[0250] When the lowest / highest bit of the PUCCH resource indication field is 0, the corresponding feedback timing indication field is (0, 2, 4, 6, 8, 10, 12, 14), that is, X=0 in ABCX, and the network device can use the high-level RRC signaling to dynamically configure the PUCCH resources, so as to flexibly configure the PUCCH resource indication field; when the lowest / highest bit of the PUCCH resource indication field is 1, the corresponding feedback timing indication field is (1, 3, 5, 7, 9, 11, 13, 15), that is, X=1 in ABCX, and the network device can use the high-level RRC signaling to dynamically configure the PUCCH resources, so as to flexibly configure the PUCCH resource indication field.

[0251] As an optional implementation, when the DCI is DCI format 0_0, or the DCI is DCI format 0_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and also includes: a second bit of the FDRA field in the DCI; or

[0252] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0253] When the DCI is in DCI format 1_0 or in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and also includes: a second bit of a PUCCH resource indication field in the DCI.

[0254] In this implementation, for DCI format 0_0 / 0_1, the least significant bit of FDRA can be used, and for DCI format 1_0 / 1_1, the least significant bit of FDRA or the least significant / most significant bit of the PUCCH resource indication field can be used as an additional 1-bit implicit indication of the feedback timing indication field, thereby ensuring that the premise of DCI format 0_0 / 1_0 / 0_1 / 1_1 and scheduling flexibility are not changed, and avoiding the impact on the information indicated by the FDRA field or the PUCCH resource indication field in the DCI.

[0255] As an optional implementation manner, determining the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field includes:

[0256] When the HARQ process identifier is in the first identifier range, determining the feedback timing indication in the first timing set according to the bits of the feedback timing indication field; or

[0257] When the HARQ process identifier is in the second identifier range, the feedback timing indication is determined in the second timing set according to the bits of the feedback timing indication field.

[0258] The first identification range and the second identification range may be predefined, for example, the first identification range and the second identification range correspond to HARQ process identification (0, 15) and HARQ process identification (16, 31) respectively. The first timing set and the second timing set may be predefined, for example, the first timing set and the second timing set correspond to two timing sets respectively, each timing set includes 8 timing values.

[0259] And the number of feedback timings included in each of the first timing set and the second timing set is the number of timings that can be indicated by the bits of the feedback timing indication field in the DCI. For example: the feedback timing indication field is 3 bits, and the first timing set and the second timing set are two different timing sets including 8 timing values, respectively, so that the feedback timing indication of the DCI can indicate a set of 16 timing values.

[0260] In this implementation, since the feedback timing indication can indicate the feedback timing in two timing sets respectively, the feedback timing indication included in the DCI can indicate more feedback timings, thereby improving the indication effect of the DCI.

[0261] As an optional implementation manner, the number of HARQ process identifiers included in the first identification range is equal to the number of HARQ process identifiers included in the second identification range;

[0262] The number of timings included in the first timing set is equal to the number of timings included in the second timing set.

[0263] This implementation may be to bind the additional 1 bit of the HARQ process identifier and the additional 1 bit of the feedback timing indication, that is, to use the additional 1 bit of the HARQ process as the additional 1 bit of the feedback timing indication.

[0264] The 32 HARQ processes considered in NTN are divided into two groups, where the HARQ process range (0,15) corresponds to one K1 set (8 values), and the HARQ process range (16,31) corresponds to another K1 set (8 values). Under the premise of ensuring scheduling flexibility, the increase in the corresponding interval of the K1 value has no additional change to the DCI format and has low complexity.

[0265] For example: the 32 HARQ processes considered in NTN are divided into two groups, where the HARQ process range (0,15) corresponds to a K1 set (8 values), corresponding to the feedback timing indication field range (0,7); the HARQ process range (16,31) corresponds to another K1 set (8 values), corresponding to the feedback timing indication field range (8,15).

[0266] In an embodiment of the present application, a terminal receives a DCI, and the DCI includes at least one of a HARQ process identification field and a feedback timing indication field, and also includes: at least one of a FDRA field and a PUCCH resource indication field: the terminal determines the target content, and the determination of the target content includes at least one of the following: determining the HARQ process identification according to the bit and the first bit of the HARQ process identification field; determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field, or determining the feedback timing indication according to the HARQ process identification and the bit of the feedback timing indication field; wherein the first bit includes the first bit of the FDRA field or the PUCCH resource indication field; the second bit includes the second bit of the FDRA field or the PUCCH resource indication field. Through the above, it can be achieved that the DCI can indicate more HARQ processes, and / or, it can be achieved that the DCI can indicate more feedback timings, thereby improving the indication effect of the DCI.

[0267] See also Figure 4 , Figure 4 is a flowchart of a DCI sending method provided in an embodiment of the present application, such as Figure 4 As shown, the following steps are included:

[0268] Step 401: A network device sends a DCI, where the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also includes at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field;

[0269] The bit and the first bit of the HARQ process identifier field are used to determine the HARQ process identifier; and / or, the bit and the second bit of the feedback timing indication field are used to determine the feedback timing indication, or the feedback timing indication corresponding to the DCI is determined by the HARQ process identifier and the bit of the feedback timing indication field;

[0270] The first bit includes the first bit of the FDRA field or the PUCCH resource indication field;

[0271] The second bit includes: the second bit of the FDRA field or the PUCCH resource indication field.

[0272] Optionally, the first bit of the FDRA field includes:

[0273] The FDRA field carries the least significant bit of the FDRA information.

[0274] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the HARQ process identifier; or

[0275] The least significant bit in the FDRA information is used as the least significant bit of the HARQ process identifier.

[0276] Optionally, the first bit of the PUCCH resource indication field includes:

[0277] The most significant bit of the PUCCH resource indication field; or

[0278] The least significant bit of the PUCCH resource indication field.

[0279] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0280] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier; or

[0281] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0282] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier.

[0283] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0284] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0285] When the DCI is in DCI format 1_0 or in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a PUCCH resource indication field in the DCI.

[0286] Optionally, the second bit of the FDRA field includes:

[0287] The FDRA field carries the least significant bit of the FDRA information.

[0288] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the feedback timing indication; or

[0289] The least significant bit in the FDRA information is used as the least significant bit of the feedback timing indication.

[0290] Optionally, the second bit of the PUCCH resource indication field includes:

[0291] The most significant bit of the PUCCH resource indication field; or

[0292] The least significant bit of the PUCCH resource indication field.

[0293] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0294] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication; or

[0295] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0296] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication.

[0297] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0298] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0299] When the DCI is in DCI format 1_0 or in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and also includes: a second bit of a PUCCH resource indication field in the DCI.

[0300] Optionally, when the HARQ process identifier is within a first identifier range, the feedback timing indication is used to indicate the timing in a first timing set; when the HARQ process identifier is within a second identifier range, the feedback timing indication is used to indicate the timing in a second timing set.

[0301] Optionally, the number of HARQ process identifiers included in the first identifier range is equal to the number of HARQ process identifiers included in the second identifier range;

[0302] The number of timings included in the first timing set is equal to the number of timings included in the second timing set.

[0303] It should be noted that this embodiment is Figure 2 The implementation methods of the corresponding network devices in the embodiment shown in the figure can be found in the specific implementation methods. Figure 2 In order to avoid repeated description, the relevant description of the embodiment shown will not be repeated in this embodiment, and the same beneficial effects can still be achieved.

[0304] See also Figure 5 , Figure 5 is a structural diagram of a terminal provided in an embodiment of the present application, such as Figure 5 As shown, it includes a memory 520, a transceiver 500 and a processor 510:

[0305] The memory 520 is used to store computer programs; the transceiver 500 is used to send and receive data under the control of the processor 510; the processor 510 is used to read the computer program in the memory 520 and perform the following operations:

[0306] Receive DCI, the DCI including at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also including at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field:

[0307] Determine the target content, wherein determining the target content includes at least one of the following:

[0308] Determine a HARQ process identifier according to the bits and the first bit of the HARQ process identifier field;

[0309] Determine the feedback timing indication according to the bit of the feedback timing indication field and the second bit, or determine the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field;

[0310] The first bit includes the first bit of the FDRA field or the PUCCH resource indication field;

[0311] The second bit includes the second bit of the FDRA field or the PUCCH resource indication field.

[0312] Among them, Figure 5 In the embodiment, the bus architecture may include any number of interconnected buses and bridges, specifically one or more processors represented by processor 510 and various circuits of memory represented by memory 520 are linked together. The bus architecture may also link together various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and are therefore not further described herein. The bus interface provides an interface. The transceiver 500 may be a plurality of components, namely, a transmitter and a receiver, providing a unit for communicating with various other devices on a transmission medium, including wireless channels, wired channels, optical cables, and other transmission media. For different user devices, the user interface 530 may also be an interface capable of externally and internally connecting required devices, and the connected devices include but are not limited to a keypad, a display, a speaker, a microphone, a joystick, and the like.

[0313] The processor 510 is responsible for managing the bus architecture and general processing, and the memory 520 can store data used by the processor 500 when performing operations.

[0314] Optionally, the processor 510 may be a CPU (central processing unit), an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array) or a CPLD (Complex Programmable Logic Device), and the processor may also adopt a multi-core architecture.

[0315] The processor calls the computer program stored in the memory to execute any of the methods provided in the embodiments of the present application according to the obtained executable instructions. The processor and the memory can also be arranged physically separately.

[0316] Optionally, the first bit of the FDRA field includes:

[0317] The least significant bit of the FDRA information carried by the FDRA field;

[0318] The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes:

[0319] The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit in the FDRA information carried by the FDRA field.

[0320] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the HARQ process identifier; or

[0321] The least significant bit in the FDRA information is used as the least significant bit of the HARQ process identifier.

[0322] Optionally, the first bit of the PUCCH resource indication field includes:

[0323] The most significant bit of the PUCCH resource indication field; or

[0324] The least significant bit of the PUCCH resource indication field;

[0325] The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes:

[0326] Determine the HARQ process identifier according to the bits of the HARQ process identifier field and the most significant bit of the PUCCH resource indication field; or

[0327] The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit of the PUCCH resource indication field.

[0328] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0329] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier; or

[0330] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0331] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier.

[0332] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0333] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0334] When the DCI is in DCI format 1_0 or in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a PUCCH resource indication field in the DCI.

[0335] Optionally, the second bit of the FDRA field includes:

[0336] The least significant bit of the FDRA information carried by the FDRA field;

[0337] The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes:

[0338] The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit in the FDRA information carried by the FDRA field.

[0339] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the feedback timing indication; or

[0340] The least significant bit in the FDRA information is used as the least significant bit of the feedback timing indication.

[0341] Optionally, the second bit of the PUCCH resource indication field includes:

[0342] The most significant bit of the PUCCH resource indication field; or

[0343] The least significant bit of the PUCCH resource indication field;

[0344] The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes:

[0345] Determine the feedback timing indication according to the bits of the feedback timing indication field and the most significant bit of the PUCCH resource indication field; or

[0346] The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit of the PUCCH resource indication field.

[0347] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0348] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication; or

[0349] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0350] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication.

[0351] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0352] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0353] When the DCI is in DCI format 1_0 or in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and also includes: a second bit of a PUCCH resource indication field in the DCI.

[0354] Optionally, the determining the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field includes:

[0355] When the HARQ process identifier is in the first identifier range, determining the feedback timing indication in the first timing set according to the bits of the feedback timing indication field; or

[0356] When the HARQ process identifier is in the second identifier range, the feedback timing indication is determined in the second timing set according to the bits of the feedback timing indication field.

[0357] Optionally, the number of HARQ process identifiers included in the first identifier range is equal to the number of HARQ process identifiers included in the second identifier range;

[0358] The number of timings included in the first timing set is equal to the number of timings included in the second timing set.

[0359] It should be noted here that the above-mentioned terminal provided in the embodiment of the present application can implement all the method steps implemented in the above-mentioned method embodiment, and can achieve the same technical effect. The parts and beneficial effects that are the same as those in the method embodiment will not be described in detail here.

[0360] See also Figure 6 , Figure 6 is a structural diagram of a network device provided in an embodiment of the present application, such as Figure 6 As shown, it includes a memory 620, a transceiver 600 and a processor 610:

[0361] The memory 620 is used to store computer programs; the transceiver 600 is used to send and receive data under the control of the processor 610; the processor 610 is used to read the computer program in the memory 620 and perform the following operations:

[0362] Sending DCI, wherein the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also includes: at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field;

[0363] The bit and the first bit of the HARQ process identifier field are used to determine the HARQ process identifier; and / or, the bit and the second bit of the feedback timing indication field are used to determine the feedback timing indication, or the feedback timing indication corresponding to the DCI is determined by the HARQ process identifier and the bit of the feedback timing indication field;

[0364] The first bit includes the first bit of the FDRA field or the PUCCH resource indication field;

[0365] The second bit includes: the second bit of the FDRA field or the PUCCH resource indication field.

[0366] Among them, Figure 6In the embodiment, the bus architecture may include any number of interconnected buses and bridges, specifically one or more processors represented by processor 610 and various circuits of memory represented by memory 620 are linked together. The bus architecture may also link together various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and are therefore not further described herein. The bus interface provides an interface. The transceiver 600 may be a plurality of components, namely, a transmitter and a receiver, providing a unit for communicating with various other devices on a transmission medium, including wireless channels, wired channels, optical cables, and other transmission media. For different user devices, the user interface 630 may also be an interface capable of externally and internally connecting required devices, and the connected devices include but are not limited to a keypad, a display, a speaker, a microphone, a joystick, and the like.

[0367] The processor 610 is responsible for managing the bus architecture and general processing, and the memory 620 can store data used by the processor 600 when performing operations.

[0368] Optionally, the processor 610 may be a CPU (central processing unit), an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array) or a CPLD (Complex Programmable Logic Device), and the processor may also adopt a multi-core architecture.

[0369] The processor calls the computer program stored in the memory to execute any of the methods provided in the embodiments of the present application according to the obtained executable instructions. The processor and the memory can also be arranged physically separately.

[0370] Optionally, the first bit of the FDRA field includes:

[0371] The FDRA field carries the least significant bit of the FDRA information.

[0372] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the HARQ process identifier; or

[0373] The least significant bit in the FDRA information is used as the least significant bit of the HARQ process identifier.

[0374] Optionally, the first bit of the PUCCH resource indication field includes:

[0375] The most significant bit of the PUCCH resource indication field; or

[0376] The least significant bit of the PUCCH resource indication field.

[0377] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0378] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier; or

[0379] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0380] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier.

[0381] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0382] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0383] When the DCI is in DCI format 1_0 or in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a PUCCH resource indication field in the DCI.

[0384] Optionally, the second bit of the FDRA field includes:

[0385] The FDRA field carries the least significant bit of the FDRA information.

[0386] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the feedback timing indication; or

[0387] The least significant bit in the FDRA information is used as the least significant bit of the feedback timing indication.

[0388] Optionally, the second bit of the PUCCH resource indication field includes:

[0389] The most significant bit of the PUCCH resource indication field; or

[0390] The least significant bit of the PUCCH resource indication field.

[0391] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0392] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication; or

[0393] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0394] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication.

[0395] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0396] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0397] When the DCI is in DCI format 1_0 or in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and also includes: a second bit of a PUCCH resource indication field in the DCI.

[0398] Optionally, when the HARQ process identifier is within a first identifier range, the feedback timing indication is used to indicate the timing in a first timing set; when the HARQ process identifier is within a second identifier range, the feedback timing indication is used to indicate the timing in a second timing set.

[0399] Optionally, the number of HARQ process identifiers included in the first identifier range is equal to the number of HARQ process identifiers included in the second identifier range;

[0400] The number of timings included in the first timing set is equal to the number of timings included in the second timing set.

[0401] It should be noted here that the above-mentioned network device provided in the embodiment of the present application can implement all the method steps implemented in the above-mentioned method embodiment, and can achieve the same technical effect. The parts and beneficial effects that are the same as the method embodiment in this embodiment will not be described in detail here.

[0402] See also Figure 7 , Figure 7 is a structural diagram of another terminal provided in an embodiment of the present application, such as Figure 7 As shown, the terminal 700 includes:

[0403] The receiving unit 701 is configured to receive a DCI, wherein the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and further includes at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field:

[0404] The determination unit 702 is configured to determine the target content, wherein the determination of the target content includes at least one of the following:

[0405] Determine a HARQ process identifier according to the bits and the first bit of the HARQ process identifier field;

[0406] Determine the feedback timing indication according to the bit of the feedback timing indication field and the second bit, or determine the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field;

[0407] The first bit includes the first bit of the FDRA field or the PUCCH resource indication field;

[0408] The second bit includes the second bit of the FDRA field or the PUCCH resource indication field.

[0409] Optionally, the first bit of the FDRA field includes:

[0410] The least significant bit of the FDRA information carried by the FDRA field;

[0411] The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes:

[0412] The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit in the FDRA information carried by the FDRA field.

[0413] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the HARQ process identifier; or

[0414] The least significant bit in the FDRA information is used as the least significant bit of the HARQ process identifier.

[0415] Optionally, the first bit of the PUCCH resource indication field includes:

[0416] The most significant bit of the PUCCH resource indication field; or

[0417] The least significant bit of the PUCCH resource indication field;

[0418] The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes:

[0419] Determine the HARQ process identifier according to the bits of the HARQ process identifier field and the most significant bit of the PUCCH resource indication field; or

[0420] The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit of the PUCCH resource indication field.

[0421] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0422] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier; or

[0423] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0424] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier.

[0425] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0426] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0427] When the DCI is in DCI format 1_0 or in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a PUCCH resource indication field in the DCI.

[0428] Optionally, the second bit of the FDRA field includes:

[0429] The least significant bit of the FDRA information carried by the FDRA field;

[0430] The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes:

[0431] The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit in the FDRA information carried by the FDRA field.

[0432] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the feedback timing indication; or

[0433] The least significant bit in the FDRA information is used as the least significant bit of the feedback timing indication.

[0434] Optionally, the second bit of the PUCCH resource indication field includes:

[0435] The most significant bit of the PUCCH resource indication field; or

[0436] The least significant bit of the PUCCH resource indication field;

[0437] The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes:

[0438] Determine the feedback timing indication according to the bits of the feedback timing indication field and the most significant bit of the PUCCH resource indication field; or

[0439] The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit of the PUCCH resource indication field.

[0440] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0441] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication; or

[0442] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0443] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication.

[0444] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0445] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0446] When the DCI is in DCI format 1_0 or in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and also includes: a second bit of a PUCCH resource indication field in the DCI.

[0447] Optionally, the determining the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field includes:

[0448] When the HARQ process identifier is in the first identifier range, determining the feedback timing indication in the first timing set according to the bits of the feedback timing indication field; or

[0449] When the HARQ process identifier is in the second identifier range, the feedback timing indication is determined in the second timing set according to the bits of the feedback timing indication field.

[0450] Optionally, the number of HARQ process identifiers included in the first identifier range is equal to the number of HARQ process identifiers included in the second identifier range;

[0451] The number of timings included in the first timing set is equal to the number of timings included in the second timing set.

[0452] It should be noted here that the above-mentioned terminal provided in the embodiment of the present application can implement all the method steps implemented in the above-mentioned method embodiment, and can achieve the same technical effect. The parts and beneficial effects that are the same as those in the method embodiment will not be described in detail here.

[0453] See also Figure 8 , Figure 8 is a structural diagram of another network device provided in an embodiment of the present application, such as Figure 8As shown, the network device 800 includes:

[0454] The sending unit 801 is configured to send a DCI, wherein the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also includes at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field;

[0455] The bit and the first bit of the HARQ process identifier field are used to determine the HARQ process identifier; and / or, the bit and the second bit of the feedback timing indication field are used to determine the feedback timing indication, or the feedback timing indication corresponding to the DCI is determined by the HARQ process identifier and the bit of the feedback timing indication field;

[0456] The first bit includes the first bit of the FDRA field or the PUCCH resource indication field;

[0457] The second bit includes: the second bit of the FDRA field or the PUCCH resource indication field.

[0458] Optionally, the first bit of the FDRA field includes:

[0459] The FDRA field carries the least significant bit of the FDRA information.

[0460] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the HARQ process identifier; or

[0461] The least significant bit in the FDRA information is used as the least significant bit of the HARQ process identifier.

[0462] Optionally, the first bit of the PUCCH resource indication field includes:

[0463] The most significant bit of the PUCCH resource indication field; or

[0464] The least significant bit of the PUCCH resource indication field.

[0465] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0466] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier; or

[0467] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or

[0468] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier.

[0469] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0470] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or

[0471] When the DCI is in DCI format 1_0 or in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a PUCCH resource indication field in the DCI.

[0472] Optionally, the second bit of the FDRA field includes:

[0473] The FDRA field carries the least significant bit of the FDRA information.

[0474] Optionally, the least significant bit in the FDRA information is used as the most significant bit of the feedback timing indication; or

[0475] The least significant bit in the FDRA information is used as the least significant bit of the feedback timing indication.

[0476] Optionally, the second bit of the PUCCH resource indication field includes:

[0477] The most significant bit of the PUCCH resource indication field; or

[0478] The least significant bit of the PUCCH resource indication field.

[0479] Optionally, the most significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0480] The most significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication; or

[0481] The least significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or

[0482] The least significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication.

[0483] Optionally, when the DCI is in DCI format 0_0 or in DCI format 0_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0484] In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or

[0485] When the DCI is in DCI format 1_0 or in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and also includes: a second bit of a PUCCH resource indication field in the DCI.

[0486] Optionally, when the HARQ process identifier is within a first identifier range, the feedback timing indication is used to indicate the timing in a first timing set; when the HARQ process identifier is within a second identifier range, the feedback timing indication is used to indicate the timing in a second timing set.

[0487] Optionally, the number of HARQ process identifiers included in the first identifier range is equal to the number of HARQ process identifiers included in the second identifier range;

[0488] The number of timings included in the first timing set is equal to the number of timings included in the second timing set.

[0489] It should be noted here that the above-mentioned network device provided in the embodiment of the present application can implement all the method steps implemented in the above-mentioned method embodiment, and can achieve the same technical effect. The parts and beneficial effects that are the same as the method embodiment in this embodiment will not be described in detail here.

[0490] It should be noted that the division of units in the embodiments of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional unit in each embodiment of the present application may be integrated into a processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0491] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a processor-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) or a processor (processor) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), disk or optical disk and other media that can store program codes.

[0492] An embodiment of the present application also provides a processor-readable storage medium, which stores a computer program, and the computer program is used to enable the processor to execute the information sending method provided by the embodiment of the present application, or the computer program is used to enable the processor to execute the information receiving method provided by the embodiment of the present application.

[0493] The processor-readable storage medium can be any available medium or data storage device that can be accessed by the processor, including but not limited to magnetic storage (such as floppy disks, hard disks, magnetic tapes, magneto-optical disks (MO), etc.), optical storage (such as CD, DVD, BD, HVD, etc.), and semiconductor storage (such as ROM, EPROM, EEPROM, non-volatile memory (NANDFLASH), solid-state drive (SSD)), etc.

[0494] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) that contain computer-usable program code.

[0495] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer executable instructions. These computer executable instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0496] These processor executable instructions may also be stored in a processor readable memory that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the processor readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0497] These processor-executable instructions may also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0498] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A method for receiving downlink control information DCI, characterized in that: include: The terminal receives a DCI, wherein the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and further includes at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field: The terminal determines the target content, wherein the determining the target content includes at least one of the following: Determine a HARQ process identifier according to the bits and the first bit of the HARQ process identifier field; Determine the feedback timing indication according to the bit of the feedback timing indication field and the second bit, or determine the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field; The first bit includes the first bit of the FDRA field or the PUCCH resource indication field; The second bit includes: the second bit of the FDRA field or the PUCCH resource indication field.

2. The method according to claim 1, characterized in that The first bit of the FDRA field includes: The least significant bit of the FDRA information carried by the FDRA field; The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes: The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit in the FDRA information carried by the FDRA field.

3. The method according to claim 2, characterized in that The least significant bit in the FDRA information is used as the most significant bit of the HARQ process identifier; or The least significant bit in the FDRA information is used as the least significant bit of the HARQ process identifier.

4. The method according to claim 1, characterized in that The first bit of the PUCCH resource indication field includes: The most significant bit of the PUCCH resource indication field; or The least significant bit of the PUCCH resource indication field; The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes: Determine the HARQ process identifier according to the bits of the HARQ process identifier field and the most significant bit of the PUCCH resource indication field; or The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit of the PUCCH resource indication field.

5. The method according to claim 4, characterized in that The most significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or The most significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier; or The least significant bit of the PUCCH resource indication field is used as the most significant bit of the HARQ process identifier; or The least significant bit of the PUCCH resource indication field is used as the least significant bit of the HARQ process identifier.

6. The method according to any one of claims 1 to 5, characterized in that In the case where the DCI is in DCI format 0_0, or the DCI is in DCI format 0_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a FDRA field in the DCI; or When the DCI is in DCI format 1_0 or in DCI format 1_1, the HARQ process identifier includes bits of a HARQ process identifier field in the DCI, and also includes: a first bit of a PUCCH resource indication field in the DCI.

7. The method according to claim 1, characterized in that The second bit of the FDRA field includes: The least significant bit of the FDRA information carried by the FDRA field; The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes: The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit in the FDRA information carried by the FDRA field.

8. The method according to claim 7, characterized in that The least significant bit in the FDRA information is used as the most significant bit of the feedback timing indication; or The least significant bit in the FDRA information is used as the least significant bit of the feedback timing indication.

9. The method according to claim 1, characterized in that The second bit of the PUCCH resource indication field includes: The most significant bit of the PUCCH resource indication field; or The least significant bit of the PUCCH resource indication field; The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes: Determine the feedback timing indication according to the bits of the feedback timing indication field and the most significant bit of the PUCCH resource indication field; or The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit of the PUCCH resource indication field.

10. The method according to claim 9, characterized in that The most significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or The most significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication; or The least significant bit of the PUCCH resource indication field is used as the most significant bit of the feedback timing indication; or The least significant bit of the PUCCH resource indication field is used as the least significant bit of the feedback timing indication.

11. The method of claim 1, 7, 8, 9 or 10, wherein: In the case where the DCI is in DCI format 0_0, or the DCI is in DCI format 0_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or In the case where the DCI is in DCI format 1_0, or the DCI is in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and further includes: a second bit of a FDRA field in the DCI; or When the DCI is in DCI format 1_0 or in DCI format 1_1, the feedback timing indication includes bits of a feedback timing indication field in the DCI, and also includes: a second bit of a PUCCH resource indication field in the DCI.

12. The method of claim 1, 2, 3, 4, 5, 7, 8, 9 or 10, wherein: The determining the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field includes: When the HARQ process identifier is in the first identifier range, determining the feedback timing indication in the first timing set according to the bits of the feedback timing indication field; or When the HARQ process identifier is in the second identifier range, the feedback timing indication is determined in the second timing set according to the bits of the feedback timing indication field.

13. The method according to claim 12, characterized in that The number of HARQ process identifiers included in the first identifier range is equal to the number of HARQ process identifiers included in the second identifier range; The number of timings included in the first timing set is equal to the number of timings included in the second timing set.

14. A method for sending downlink control information DCI, characterized in that: include: The network device sends a DCI, wherein the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also includes: at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field; The bit and the first bit of the HARQ process identifier field are used to determine the HARQ process identifier; and / or, the bit and the second bit of the feedback timing indication field are used to determine the feedback timing indication, or the feedback timing indication corresponding to the DCI is determined by the HARQ process identifier and the bit of the feedback timing indication field; The first bit includes the first bit of the FDRA field or the PUCCH resource indication field; The second bit includes: the second bit of the FDRA field or the PUCCH resource indication field.

15. A terminal, characterized in that: include: A memory, a transceiver, and a processor, wherein: The memory is used to store a computer program; the transceiver is used to send and receive data under the control of the processor; the processor is used to read the computer program in the memory and perform the following operations: Receive DCI, the DCI including at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also including at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field: Determine the target content, wherein determining the target content includes at least one of the following: Determine a HARQ process identifier according to the bits and the first bit of the HARQ process identifier field; Determine the feedback timing indication according to the bit of the feedback timing indication field and the second bit, or determine the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field; The first bit includes the first bit of the FDRA field or the PUCCH resource indication field; The second bit includes the second bit of the FDRA field or the PUCCH resource indication field.

16. The terminal according to claim 15, characterized in that The first bit of the FDRA field includes: The least significant bit of the FDRA information carried by the FDRA field; The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes: The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit in the FDRA information carried by the FDRA field.

17. The terminal according to claim 15, characterized in that: The first bit of the PUCCH resource indication field includes: The most significant bit of the PUCCH resource indication field; or The least significant bit of the PUCCH resource indication field; The determining the HARQ process identifier according to the bit and the first bit of the HARQ process identifier field includes: Determine the HARQ process identifier according to the bits of the HARQ process identifier field and the most significant bit of the PUCCH resource indication field; or The HARQ process identifier is determined according to the bits of the HARQ process identifier field and the least significant bit of the PUCCH resource indication field.

18. The terminal according to claim 15, characterized in that: The second bit of the FDRA field includes: The least significant bit of the FDRA information carried by the FDRA field; The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes: The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit in the FDRA information carried by the FDRA field.

19. The terminal according to claim 15, characterized in that: The second bit of the PUCCH resource indication field includes: The most significant bit of the PUCCH resource indication field; or The least significant bit of the PUCCH resource indication field; The determining the feedback timing indication according to the bit and the second bit of the feedback timing indication field includes: Determine the feedback timing indication according to the bits of the feedback timing indication field and the most significant bit of the PUCCH resource indication field; or The feedback timing indication is determined according to the bits of the feedback timing indication field and the least significant bit of the PUCCH resource indication field.

20. The terminal according to claim 15, characterized in that The determining the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field includes: When the HARQ process identifier is in the first identifier range, determining the feedback timing indication in the first timing set according to the bits of the feedback timing indication field; or When the HARQ process identifier is in the second identifier range, the feedback timing indication is determined in the second timing set according to the bits of the feedback timing indication field.

21. A network device, characterized in that: include: A memory, a transceiver, and a processor, wherein: A memory for storing a computer program; a transceiver for transmitting and receiving data under the control of the processor; and a processor for reading the computer program in the memory and performing the following operations: Sending downlink control information DCI, wherein the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also includes at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field; The bit and the first bit of the HARQ process identifier field are used to determine the HARQ process identifier; and / or, the bit and the second bit of the feedback timing indication field are used to determine the feedback timing indication, or the feedback timing indication corresponding to the DCI is determined by the HARQ process identifier and the bit of the feedback timing indication field; The first bit includes the first bit of the FDRA field or the PUCCH resource indication field; The second bit includes: the second bit of the FDRA field or the PUCCH resource indication field.

22. A terminal, characterized in that: include: A receiving unit, configured to receive a DCI, wherein the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and further includes at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field: The determination unit is used to determine the target content, wherein the determination of the target content includes at least one of the following: Determine a HARQ process identifier according to the bits and the first bit of the HARQ process identifier field; Determine the feedback timing indication according to the bit of the feedback timing indication field and the second bit, or determine the feedback timing indication according to the HARQ process identifier and the bit of the feedback timing indication field; The first bit includes the first bit of the FDRA field or the PUCCH resource indication field; The second bit includes the second bit of the FDRA field or the PUCCH resource indication field.

23. A network device, characterized in that: include: A sending unit, configured to send downlink control information DCI, wherein the DCI includes at least one of a hybrid automatic repeat request HARQ process identification field and a feedback timing indication field, and also includes at least one of a frequency domain resource allocation FDRA field and a physical uplink control channel PUCCH resource indication field; The bit and the first bit of the HARQ process identifier field are used to determine the HARQ process identifier; and / or, the bit and the second bit of the feedback timing indication field are used to determine the feedback timing indication, or the feedback timing indication corresponding to the DCI is determined by the HARQ process identifier and the bit of the feedback timing indication field; The first bit includes the first bit of the FDRA field or the PUCCH resource indication field; The second bit includes: the second bit of the FDRA field or the PUCCH resource indication field.

24. A processor-readable storage medium, characterized in that: The processor-readable storage medium stores a computer program, and the computer program is used to enable the processor to execute the DCI receiving method according to any one of claims 1 to 13, or the computer program is used to enable the processor to execute the DCI sending method according to claim 14.

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