A method for establishing a current source injection model for nanofabrication

Abstract

This invention discloses a method for establishing a current source injection model for nanoscale processes. First, the specific parameters of the transistor to be evaluated are determined. Then, based on the selected nanoscale process, the transistor is modeled in a 3D TCAD tool. The equivalent saturation voltage and threshold voltage of the transistor are obtained through 3D TCAD simulation. The equivalent effective collection length and collection depth of the transistor are determined through 3D TCAD simulation. The type of ion to be evaluated and its corresponding linear transport energy are determined. The injection distance to be evaluated is set, and finally, the corresponding ion implantation current source injection model is obtained. This invention's current source model establishment method is based on diffusion theory and transistor principles, combined with the characteristics of nanoscale processes. By addressing the limited charge collection capability of devices in nanoscale processes through the effective collection length and equivalent saturation voltage of the transistor, a novel current source injection model for nanoscale processes is established.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor device and integrated circuit ruggedization technology, specifically relating to a method for establishing a current source injection model for nanoprocesses. Background Technology

[0002] The universe contains various high-energy particles, including heavy particles, protons, alpha particles, and neutrons. When these particles encounter semiconductor devices, they can cause irradiation effects such as single-event effects. Single-event effects generally refer to the energy deposition that occurs when high-energy charged particles pass through the sensitive region of a semiconductor device, generating a large number of electron-hole pairs. These electron-hole pairs are collected during drift, generating transient currents that affect the logic state of sensitive nodes or the device's performance. The single-event effect that causes level errors in semiconductor device nodes is called a Single Event Upset (SEU). Therefore, evaluating the single-event effect of devices is crucial. In irradiation assessment during the design process, current source injection is often used, and corresponding models include the double exponential model current source injection model, etc.

[0003] However, in nanoscale processes, due to the extremely small size of integrated circuit fabrication technology, the charge collection capability of the corresponding devices becomes very limited. Existing models are basically provided for large-size processes or deep submicron processes, which cannot meet the requirements of nanoscale processes.

[0004] In previous large-size processes, the current source injection model generally used was the double exponential model current source injection model proposed by GCMessenger in the paper "Collection of charge on junction nodes from ion tracks, IEEE Trans. Nucl. Sci., vol. NS-29, no. 6, pp. 2024–2031, Dec. 1982", as follows:

[0005]

[0006] Where Q represents the amount of charge collected, τ α τ represents the time constant of current fall. β Let τ be the rise time constant of the current. α and τ β Depending on the process parameters, t is a time variable. This model is mainly for large-size manufacturing processes and cannot meet the requirements of nanoscale processes.

[0007] CN102982216A discloses a method for establishing a current source model based on injection distance. This method proposes a current source model based on injection distance based on one-dimensional injection diffusion. This model assumes that the deposited charge is collected by the same node, which is different from the situation under nanotechnology and cannot meet the requirements of nanotechnology.

[0008] The literature “Boxes: an engineering methodology for calculating soft errorrates in SOI integrated circuits, IEEE Trans. Nucl. Sci., vol. 53, no. 6, pp. 3329–3335, Dec. 2006” and “Prediction of SOI single-event effects using a simple physics-based SPICE model, IEEE Trans. Nucl. Sci., vol. 52, no. 6, pp. 2168–2174, Dec. 2005” also proposes corresponding models based on the theory of injection diffusion, but none of them can meet the requirements of nanoscale processes.

[0009] CN111079366A discloses a method for establishing a current source injection model oriented towards charge sharing. This method is based on the two-dimensional injection diffusion concept and proposes a current source injection model oriented towards charge sharing by combining the injection distance and the reference distance. It solves the problem that the injected charge is collected by multiple sensitive nodes, but does not consider the limitation of the charge collection capability of the device itself under nanotechnology.

[0010] Under nanoscale processes, the existing models mentioned above are insufficient to meet the requirements. A current source model is needed to solve the problem that the existing current source injection models have not addressed regarding the limited charge collection capability of devices under nanoscale processes. Summary of the Invention

[0011] To address the aforementioned technical problems and the limitation of existing current source injection models in terms of charge collection capability of devices in nanoscale processes, this invention proposes a method for establishing a current source injection model for nanoscale processes.

[0012] The technical solution adopted in this invention is as follows: a method for establishing a current source injection model for nanotechnology, the specific steps of which are as follows:

[0013] S1. Determine the specific parameters of the transistor to be evaluated;

[0014] S2. Model the transistor to be evaluated in a 3D TCAD tool based on the selected nanotechnology;

[0015] S3. Obtain the equivalent saturation voltage V of the transistor through 3D TCAD simulation. DDSta and threshold voltage V T ;

[0016] S4. Determine the equivalent effective collector length L of the transistor through 3D TCAD simulation. ceff and collection depth d dep ;

[0017] S5. Determine the type of ion to be evaluated and its corresponding linear transport energy (LET);

[0018] S6. Set the injection distance d to be evaluated;

[0019] S7. Based on steps S1-S6, the corresponding current source injection model for ion implantation is obtained.

[0020] Furthermore, in step S1, the specific parameters of the transistor to be evaluated include: the transistor's width W, length L, and gate capacitance per unit area C. OX .

[0021] Furthermore, step S7 specifically includes the following:

[0022] The specific expression for the current source injection model of the above ion implantation is as follows:

[0023]

[0024] Where μ represents the carrier mobility, D n,p D represents the diffusivity of charge carriers. n D represents the electron diffusion rate. p This represents the hole diffusion rate; t, t1, and t2 are time variables, and t1 and t2 are determined by I. LC (t)=I DBsat I received DBsat I represents the saturation current of the transistor's collected charge. LC (t) represents the large collection current introduced by ion implantation diffusion, exp[] is an exponential function, and u[] is a step function.

[0025] The beneficial effects of this invention are as follows: The method of this invention first determines the specific parameters of the transistor to be evaluated, then models the transistor in a 3D TCAD tool based on the selected nanotechnology. The equivalent saturation voltage and threshold voltage of the transistor are obtained through 3D TCAD simulation. The equivalent effective collection length and collection depth of the transistor are determined through 3D TCAD simulation. The type of ion to be evaluated and its corresponding linear transport energy are determined. The injection distance to be evaluated is set, and finally, the corresponding current source injection model for ion implantation is obtained. The current source injection model establishment method of this invention is based on diffusion theory and transistor principles, combined with the characteristics of nanotechnology. By addressing the limited charge collection capability of devices under nanotechnology through the effective collection length and equivalent saturation voltage of the transistor, a novel current source injection model for nanotechnology is established. Attached Figure Description

[0026] Figure 1 This is a flowchart of a method for establishing a current source injection model for nanotechnology according to the present invention.

[0027] Figure 2 This invention provides a model for charge collection in nanoscale processes.

[0028] Figure 3 This is an example of an inverter unit and a current source injection model in an embodiment of the present invention. Detailed Implementation

[0029] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0030] This invention is aimed at nanoscale processes, especially advanced manufacturing processes such as 7nm and 5nm.

[0031] 1. Ion implantation in nanotechnology is considered high-implantation. Under high-implantation conditions, the charge quantity is far greater than the device's collect charge. Based on transistor principle theory, this invention defines the transistor's collect charge saturation current as:

[0032]

[0033] Where μ represents carrier mobility, C OX The gate capacitance per unit area of ​​the transistor is represented by W, the width of the transistor is represented by L, and the length of the transistor is represented by V. T This represents the threshold voltage of the transistor. These parameters can be obtained from relevant semiconductor literature, such as "Semiconductor Physics" and "Semiconductor Device Physics". V DDSta The equivalent saturation voltage introduced in this invention.

[0034] 2. In this invention, charge collection modeling for nanotechnology is as follows: Figure 2As shown, during the entire ion implantation process, only the equivalent effective collection length L of the transistor passes through the carrier expansion process. ceff Only the charge is collected by the transistor. In this invention, based on the carrier diffusion theory in "Semiconductor Physics" and "Semiconductor Device Physics", the large collection current introduced by ion implantation diffusion is:

[0035]

[0036] Where LET represents the linear transport energy of the implanted ion. D n,p D represents the diffusivity of charge carriers. n D represents the electron diffusion rate. p This represents the hole diffusion rate, which can be obtained by consulting relevant semiconductor literature, such as "Semiconductor Physics" and "Semiconductor Device Physics". ceff d represents the equivalent effective collector length of the transistor. dep The collection depth of the transistor is represented by d, which can be obtained through 3D TCAD simulation. d represents the implantation distance, which is the distance from the ion implantation point to the transistor collection point. t is a time variable.

[0037] 3. Calculate the time variables t1 and t2:

[0038] Let I LC (t)=I DBsat We obtain two corresponding time variables t1 and t2, where t1 ≤ t2.

[0039] 4. The current source injection model for ion implantation under the nanotechnology of this invention is as follows:

[0040]

[0041] Where exp[] is the exponential function and u[] is the step function.

[0042] like Figure 1 The flowchart shown is a method for establishing a current source model for nanotechnology according to the present invention. The specific steps are as follows:

[0043] S1. Determine the specific parameters of the transistor to be evaluated;

[0044] S2. Model the transistor to be evaluated in a 3D TCAD tool based on the selected nanotechnology;

[0045] S3. Obtain the equivalent saturation voltage V of the transistor through 3D TCAD simulation. DDSta and threshold voltage V T ;

[0046] S4. Determine the equivalent effective collector length L of the transistor through 3D TCAD simulation. ceff and collection depth d dep ;

[0047] S5. Determine the type of ion to be evaluated and its corresponding linear transport energy (LET);

[0048] S6. Set the implantation distance d to be evaluated. The implantation distance is the distance from the ion implantation point to the transistor collection point.

[0049] S7. Based on steps S1-S6, the corresponding current source injection model for ion implantation is obtained.

[0050] In this embodiment, the specific parameters of the transistor to be evaluated in step S1 include the transistor's width W, length L, and gate capacitance per unit area C. OX .

[0051] When ions attack the corresponding transistor circuits, the impact of the ions on the semiconductor device can be further evaluated according to the present invention.

[0052] The following simulation of an inverter unit illustrates the application of this model:

[0053] like Figure 3 As shown, VDD is the power supply, VSS is ground, and the inverter unit includes two transistors, M1 and M2, where M1 is a PMOS transistor and M2 is an NMOS transistor. A is the input, and Y is the output. Inverters are a widely used structure in integrated circuits and can be found in relevant literature. Current source injection model I based on this embodiment of the invention. c (t) is connected between the output Y and ground VSS, specifically the D and B terminals of transistor M2.

[0054] The specific application process of this inverter unit is as follows:

[0055] (1) According to the following Figure 3 The circuit structure design of the inverter unit shown is as follows: Inverter unit circuit;

[0056] (2) Build the current source injection model I based on this embodiment in the corresponding simulation excitation platform. c (t), in this embodiment, M2 is the target of attack, M2 is an NMOS transistor, and the connection relationship of the injected current source model is as follows. Figure 3 As shown in the figure, the current source injection model I based on the embodiment of the present invention c (t) is connected between the output Y and ground VSS, specifically the D and B terminals of transistor M2.

[0057] (3) Combining steps S1-S7 in this embodiment, complete the corresponding parameter settings according to the nanoprocess parameters and implanted ion type;

[0058] (4) Set the initial bias state of the circuit, and set the input A = 0 in the circuit;

[0059] (5) Perform current source injection evaluation to assess the impact of the current source on the logic state of the inverter unit, especially the change in the output Y terminal level.

[0060] Those skilled in the art will recognize that the embodiments described herein are intended to help the reader understand the principles of the invention, and should be understood that the scope of protection of the invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific modifications and combinations based on the technical teachings disclosed in this invention without departing from the spirit of the invention, and these modifications and combinations are still within the scope of protection of this invention.

Claims

1. A method for establishing a current source injection model for nanotechnology, the specific steps of which are as follows: S1. Determine the specific parameters of the transistor to be evaluated; The specific parameters of the transistor to be evaluated include: The transistor's width W, length L, and gate capacitance per unit area C OX ; S2. Model the transistor to be evaluated in a 3D TCAD tool based on the selected nanotechnology; S3. Obtain the equivalent saturation voltage V of the transistor through 3D TCAD simulation. DDSta and threshold voltage V T ; S4. Determine the equivalent effective collector length L of the transistor through 3D TCAD simulation. ceff and collection depth d dep ; S5. Determine the type of ion to be evaluated and its corresponding linear transport energy (LET); S6. Set the injection distance d to be evaluated; S7. Based on steps S1-S6, obtain the corresponding current source injection model for ion implantation; In step S7, the specific details are as follows: Based on transistor principle theory, the saturation current of a transistor's collected charge is defined as: Where μ represents the carrier mobility; The large collection current introduced by ion implantation diffusion is: Where LET represents the linear transport energy of the implanted ion. D n,p D represents the diffusivity of charge carriers. n D represents the electron diffusion rate. p This represents the diffusion rate of holes, where t is a time variable; Let I LC (t)=I DBsat We obtain two corresponding time variables t1 and t2, where t1 ≤ t2; The specific expression for the current source injection model of the above ion implantation is: Where exp[] is the exponential function and u[] is the step function.

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