Drive device and display device

Abstract

The embodiment of the present invention discloses a driving device and a display device. The driving device includes: a timing control module, a level conversion module and a power supply module. The timing control module is used to generate a first control signal when a voltage signal is connected to the first power supply terminal to control the power supply module; the level conversion module is used to perform level conversion on the first control signal according to the signal of the second power supply terminal to obtain a second control signal; the power supply module is used to supply a driving power supply voltage to the display module according to the second control signal. The technical solution of the embodiment of the present invention helps to alleviate problems such as display abnormalities and heating of the driving chip caused by uncontrollable power supply voltage supply of the display device, so as to avoid safety hazards.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of display technology, and in particular to a driving device and a display device. Background Art

[0002] With the continuous development of display technology, people are demanding increasingly higher performance from display devices. Currently, existing display devices typically include a display module, which includes multiple pixel circuits and light-emitting devices. The display device is capable of supplying a power supply voltage to the pixel circuits, which in turn drives the light-emitting devices to emit light, enabling the display module to perform its display function. However, existing display devices suffer from uncontrollable power supply voltage, which can lead to display anomalies and overheating of the driver chip, posing certain safety risks. Summary of the Invention

[0003] Embodiments of the present invention provide a driving device and a display device to alleviate problems such as abnormal display of the display device and heating of a driving chip.

[0004] In a first aspect, an embodiment of the present invention provides a driving device for driving a display module to operate, the driving device comprising: a timing control module, a level conversion module and a power supply module;

[0005] The timing control module is connected to the first power supply terminal and is used to generate a first control signal when the first power supply terminal is connected to a voltage signal to control the power supply module;

[0006] The level conversion module is connected to the second power supply terminal, the timing control module and the power supply module, and is used to perform level conversion on the first control signal according to the signal of the second power supply terminal to obtain a second control signal;

[0007] The power supply module is connected to the display module and is configured to supply a driving power voltage to the display module according to the second control signal.

[0008] Optionally, the driving device further includes a logic operation module, the logic operation module is connected to the timing control module, the level conversion module and the power supply module, and the level conversion module is connected to the power supply module through the logic operation module;

[0009] The logic operation module is used to perform a logic operation on the first control signal and the second control signal to obtain a power control signal, and the power supply module is specifically used to supply the driving power voltage to the display module according to the power control signal;

[0010] Preferably, the logic operation module is specifically configured to output a first-level signal as the power control signal when both the first control signal and the second control signal are first-level signals, and output a second-level signal as the power control signal when at least one of the first control signal and the second control signal is a second-level signal;

[0011] The power supply module is specifically configured to supply the driving power voltage to the display module when the power control signal is the first level signal, and stop supplying the driving power voltage when the power control signal is the second level signal;

[0012] Preferably, the timing control module includes a timing controller.

[0013] Optionally, the logic operation module includes a first AND gate circuit;

[0014] The first input end of the first AND gate circuit is connected to the level conversion module, the second input end of the first AND gate circuit is connected to the timing control module, the output end of the first AND gate circuit is connected to the power supply module, and the first AND gate circuit is used to perform a logical AND operation on the first control signal and the second control signal to obtain the power control signal.

[0015] Optionally, the logic operation module includes a first AND gate circuit and a second AND gate circuit;

[0016] A first input end of the first AND gate circuit is connected to the level conversion module, a second input end of the first AND gate circuit is connected to the timing control module, an output end of the first AND gate circuit is connected to the first input end of the second AND gate circuit, and the first AND gate circuit is used to perform a logical AND operation on the first control signal and the second control signal to obtain a third control signal;

[0017] The second input terminal of the second AND gate circuit is connected to the reset signal terminal, the output terminal of the second AND gate circuit is connected to the power supply module, and the second AND gate circuit is used to perform a logic AND operation on the third control signal and the signal at the reset signal terminal to obtain the power control signal;

[0018] Preferably, the signal at the reset signal end includes a first level signal and a second level signal. Within a set time after the driving device is powered on, the signal at the reset signal end is the second level signal. After the set time after the driving device is powered on, the signal at the reset signal end is the first level signal.

[0019] Optionally, the signal at the second power supply terminal remains at the second power supply voltage during the process of the driving device recovering from the power-off state to the power-on state.

[0020] Optionally, the level conversion module includes a first inverting unit, a second inverting unit and a level conversion unit;

[0021] The power supply terminal of the first inverting unit is connected to the first power supply terminal, the input terminal of the first inverting unit is connected to the timing control module, the output terminal of the first inverting unit is connected to the input terminal of the second inverting unit and the first control terminal of the level conversion unit, and the first inverting unit is used to invert the first control signal;

[0022] The power supply terminal of the second inverting unit is connected to the first power supply terminal, the input terminal of the second inverting unit is connected to the output terminal of the first inverting unit, the output terminal of the second inverting unit is connected to the second control terminal of the level conversion unit, and the second inverting unit is used to invert the output signal of the first inverting unit;

[0023] The power supply end of the level conversion unit is connected to the second power supply end, and the output end of the level conversion unit is connected to the power supply module. The level conversion unit is used to respond to the signals of its own first control end and second control end, and level-convert the signal of its own second control end according to the signal of its own power supply end to obtain and output the second control signal.

[0024] Optionally, the level conversion module includes a first inverting unit and a level conversion unit;

[0025] The power supply terminal of the first inverting unit is connected to the first power supply terminal, the input terminal of the first inverting unit and the second control terminal of the level conversion unit are connected to the timing control module, the output terminal of the first inverting unit is connected to the first control terminal of the level conversion unit, and the first inverting unit is used to invert the first control signal and output it;

[0026] The power supply end of the level conversion unit is connected to the second power supply end, and the output end of the level conversion unit is connected to the power supply module. The level conversion unit is used to respond to the signals of its own first control end and second control end, and level-convert the signal of its own second control end according to the signal of its own power supply end to obtain and output the second control signal.

[0027] Optionally, the level conversion unit includes a first switch, a second switch, a third switch and a fourth switch;

[0028] The first end of the first switch and the first end of the second switch are both connected to the second power supply end as power supply ends of the level conversion unit, the first end of the third switch and the first end of the fourth switch are grounded, the second end of the first switch is connected to the second end of the third switch, the second end of the second switch is connected to the second end of the fourth switch, the control end of the first switch is connected to the second end of the fourth switch, the control end of the second switch is connected to the second end of the third switch, the second end of the second switch serves as the output end of the level conversion unit and is connected to the power supply module, the control end of the third switch serves as the second control end of the level conversion unit, and the control end of the fourth switch serves as the first control end of the level conversion unit;

[0029] The level signal controlling the first switch and the second switch to be turned on is the same, the level signal controlling the third switch and the fourth switch to be turned on is the same, and the level signal controlling the first switch and the second switch to be turned on is opposite to the level signal controlling the third switch and the fourth switch to be turned on.

[0030] Optionally, the first switch includes a first transistor, the second switch includes a second transistor, the third switch includes a third transistor, and the fourth switch includes a fourth transistor;

[0031] The first electrode of the first transistor and the first electrode of the second transistor are both connected to the second power supply end as power supply ends of the level conversion unit, the first electrode of the third transistor and the first electrode of the fourth transistor are grounded, the second electrode of the first transistor is connected to the second electrode of the third transistor, the second electrode of the second transistor is connected to the second electrode of the fourth transistor, the gate of the first transistor is connected to the second electrode of the fourth transistor, the gate of the second transistor is connected to the second electrode of the third transistor, the second electrode of the second transistor is connected to the power supply module as the output end of the level conversion unit, the gate of the third transistor is used as the second control end of the level conversion unit, and the gate of the fourth transistor is used as the first control end of the level conversion unit;

[0032] The first transistor and the second transistor have the same channel type, the third transistor and the fourth transistor have the same channel type, and the channel type of the first transistor and the second transistor is different from the channel type of the third transistor and the fourth transistor.

[0033] In a second aspect, an embodiment of the present invention provides a display device, comprising a display module and the driving device as described in the first aspect.

[0034] The driving device and display device provided by the embodiments of the present invention, when a voltage signal is connected to the first power supply end, controls the level of the first control signal outputted by the timing control module to control the working state of the power supply module, and converts the voltage level of the first control signal according to the voltage level of the signal at the second power supply end through the level conversion module, so that the voltage level of the second control signal obtained after the conversion corresponds to the voltage level of the signal receivable by the power supply module, thereby controlling whether the power supply module supplies the first driving power supply voltage and the second driving power supply voltage to the pixel circuit in the display module according to the level of the second control signal, making the power supply module controllable, helping to alleviate display abnormalities and heating of the driving chip caused by uncontrollable power supply voltage of the display device, so as to avoid safety hazards.

[0035] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0037] Figure 1 This is a schematic structural diagram of a display device in the related art;

[0038] Figure 2 It is a structural schematic diagram of a pixel circuit used in a display device;

[0039] Figure 3 1 is a schematic structural diagram of a driving device provided by an embodiment of the present invention;

[0040] Figure 4 is a structural schematic diagram of another driving device provided by an embodiment of the present invention;

[0041] Figure 5 is a schematic structural diagram of a display device provided by an embodiment of the present invention;

[0042] Figure 6 is a structural schematic diagram of another driving device provided by an embodiment of the present invention;

[0043] Figure 7 is a structural schematic diagram of another driving device provided by an embodiment of the present invention;

[0044] Figure 8 is a structural schematic diagram of another driving device provided by an embodiment of the present invention;

[0045] Figure 9 is a structural schematic diagram of another driving device provided by an embodiment of the present invention;

[0046] Figure 10 1 is a schematic structural diagram of a level conversion module provided by an embodiment of the present invention;

[0047] Figure 11 is a structural schematic diagram of another driving device provided by an embodiment of the present invention;

[0048] Figure 12 This is a driving timing diagram of a driving device provided by an embodiment of the present invention;

[0049] Figure 13 It is a structural schematic diagram of another driving device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0050] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0051] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0052] As mentioned in the background art, existing display devices have the problem of uncontrollable power supply voltage, which will lead to display abnormalities and heating of the driver chip, posing certain safety hazards. The inventors have found that the reasons for the above problems are as follows:

[0053] Figure 1 This is a schematic structural diagram of a display device in the related art; Figure 2 Schematic diagram of a pixel circuit used in a display device. Figure 1 and Figure 2 The display device includes a display panel 101, a driver chip 102, and a power supply chip 103. The display panel 101 includes multiple pixel circuits PX. The pixel circuits PX include thin film transistors, storage capacitors Cst, and light-emitting devices D1. The thin film transistors include a driving transistor M1 and a switching transistor M2. The switching transistor M2 is used to write a data voltage Data to the driving transistor M1, so that the driving transistor M1 generates a driving current based on the data voltage Data, driving the light-emitting device D1 to emit light at a corresponding brightness, so that the display panel 101 can achieve a display function. The driver chip 102 can provide the data voltage Data to each pixel circuit PX in the display panel 101 and control the power supply chip 103 to supply power supply voltages to the display panel 101, for example, supplying a first power supply voltage ELVDD and a second power supply voltage ELVSS to the pixel circuits PX in the display panel 101, so that the pixel circuits PX can drive the light-emitting device D1 to emit light.

[0054] In situations such as the Always On Display (AOD) mode, the power chip 103 typically no longer supplies the first power voltage ELVDD and the second power voltage ELVSS to the display panel 101. Instead, the driver chip 102 supplies the first power voltage ELVDD and the second power voltage ELVSS to the display panel 101. However, because the driver chip 102 may be unable to properly control the power chip 103, the power chip 103 may still start outputting the first power voltage ELVDD and the second power voltage ELVSS in the AOD mode. When the driver chip 102 does not provide the data voltage Data to the pixel circuits PX in the display panel 101, the data voltage Data connected to each pixel circuit PX is 0V or floating, causing all light-emitting devices D1 in the display panel to emit light simultaneously, resulting in an abnormal display. Furthermore, because the green light-emitting device D1 has a higher light-emitting efficiency, the abnormal green screen phenomenon is presented. In addition, since the signal terminal A1 of the power chip 103 outputting the first power voltage ELVDD is connected to the signal terminal B1 of the driver chip 102 outputting the first power voltage ELVDD, and the signal terminal A2 of the power chip 103 outputting the second power voltage ELVSS is connected to the signal terminal B2 of the driver chip 102 outputting the second power voltage ELVSS, the power chip 103 will reversely feed current to the driver chip 102, causing the driver chip 102 to heat up, thereby causing the entire display device to present an abnormal phenomenon of green screen and heating.

[0055] In view of the above problems, an embodiment of the present invention provides a driving device suitable for driving a display module. Figure 3Schematic diagram of a driving device provided by an embodiment of the present invention. Figure 3 The driving device includes: a timing control module 10, a level conversion module 20 and a power supply module 40.

[0056] The timing control module 10 is connected to the first power supply terminal DVDD and is configured to generate a first control signal Swire1 when a voltage signal is applied to the first power supply terminal DVDD, thereby controlling the power supply module 40. The level conversion module 20 is connected to the second power supply terminal VDDI, the timing control module 10, and the power supply module 40 and is configured to perform level conversion on the first control signal Swire1 based on the signal from the second power supply terminal VDDI to generate a second control signal Swire2. The power supply module 40 is connected to the display module 100 and is configured to supply a driving power voltage to the display module 100 based on the second control signal Swire2. Specifically, the first driving power voltage and the second driving power voltage may be supplied to the pixel circuits in the display module 100.

[0057] According to the technical solution of the embodiment of the present invention, when a voltage signal is connected to the first power supply terminal DVDD, the level of the first control signal Swire1 outputted by the timing control module 10 is controlled to control the working state of the power supply module 40. The voltage level of the first control signal Swire1 is converted by the level conversion module 40 according to the voltage level of the signal at the second power supply terminal VDDI, so that the voltage level of the second control signal Swire2 obtained after the conversion corresponds to the voltage level of the signal receivable by the power supply module 40. Therefore, according to the level of the second control signal Swire2, the power supply module 40 is controlled to supply the first driving power supply voltage and the second driving power supply voltage to the pixel circuit in the display module, making the power supply module 40 controllable, thereby helping to alleviate problems such as display abnormalities and overheating of the driver chip caused by uncontrollable power supply voltage of the display device, thereby avoiding safety hazards.

[0058] Figure 4 is a structural schematic diagram of another driving device provided by an embodiment of the present invention; Figure 5 Schematic diagram of a display device provided by an embodiment of the present invention. Figure 4 and Figure 5Based on the above embodiment, the driving device may optionally further include a logic operation module 30. The logic operation module 30 is connected to the timing control module 10, the level conversion module 20, and the power supply module 40. The level conversion module 20 is connected to the power supply module 40 via the logic operation module 30. The logic operation module 30 is configured to perform a logic operation on the first control signal Swire1 and the second control signal Swire2 to obtain a power control signal Swire. The power supply module 40 is specifically configured to supply a driving power voltage to the display module 100 according to the power control signal Swire. Specifically, the power supply module 40 may supply the first driving power voltage and the second driving power voltage to the pixel circuit in the display module 100. Specifically, the display device includes a display module 100, a display driver chip (Display Driver Integrated Circuit, DDIC) and a power chip, etc. The driving device in the embodiment of the present invention can be a combination of a display driver chip and a power chip. For example, the timing control module 10, the level conversion module 20 and the logic operation module 30 can be set in the display driver chip, and the power supply module 40 can constitute the power chip. In other embodiments, the driving device can also be a display driver chip, that is, the timing control module 10, the level conversion module 20, the logic operation module 30 and the power supply module 40 can all be set in the display driver chip.

[0059] Combine Figure 2 、 Figure 4 and Figure 5 The display module 100 may include a plurality of scan lines GL extending in the row direction and a plurality of data lines DL extending in the column direction and intersecting the scan lines GL. The intersection of the scan lines GL and the data lines DL may define a plurality of pixel regions on the display module 100. A pixel circuit PX may be disposed in each pixel region. The plurality of pixel circuits PX are arranged in an array in the display module 100. When a scan signal (e.g., scan signal Scan2) in the form of a pulse signal is input to the scan line GL, a switching transistor (e.g., switching transistor M2) in the pixel circuit PX connected to the scan line GL is turned on. At this time, the pixel circuit PX may receive a data voltage (e.g., data voltage Data) transmitted by the data line DL. The pixel circuit PX may then drive the light-emitting device D1 to emit light at a corresponding brightness according to the data voltage.

[0060] The driving device may also include a data driving module 50 and a gate driving module 60. The data driving module 50 is connected to the pixel circuit PX through the data line DL, and the gate driving module 60 is connected to the pixel circuit PX through the scan line GL. The timing control module 10 can control the data driving module 50 and the gate driving module 60 according to the received image signal, so that the gate driving module 60 transmits a scan signal to each row of pixel circuits PX, and the data driving module 50 transmits a data voltage to each row of pixel circuits PX, so that each pixel circuit PX in the display module 100 drives the light-emitting device D1 to emit light row by row, so that the display module 100 realizes the display function.

[0061] The first power supply terminal DVDD connected to the timing control module 10 and the second power supply terminal VDDI connected to the level conversion module 20 are both used to access voltage signals, and the voltage values ​​of the voltage signals accessed by the first power supply terminal DVDD and the second power supply terminal VDDI are different. The voltage value of the voltage signal accessed by the second power supply terminal VDDI can be greater than the voltage value of the voltage signal accessed by the first power supply terminal DVDD, or can also be less than the voltage value of the voltage signal accessed by the first power supply terminal DVDD.

[0062] When the first power supply terminal DVDD is connected to a voltage signal, the timing control module 10 controls the power supply module 40 by controlling the level of the first control signal Swire1 outputted by it. The level conversion module 20 can convert the voltage level of the first control signal Swire1 according to the voltage level of the signal of the second power supply terminal VDDI, so that the voltage level of the converted second control signal Swire2 corresponds to the voltage level of the signal that the power supply module 40 can receive. The logic operation module 30 obtains the power control signal Swire by performing a logic operation on the first control signal Swire1 and the second control signal Swire2, so as to jointly control the level of the power control signal Swire according to the levels of the first control signal Swire1 and the second control signal Swire2, thereby controlling whether the power supply module 40 supplies the first driving power voltage and the second driving power voltage to the pixel circuit PX in the display module 100. The first driving power voltage supplied by the power supply module 40 is greater than the second driving power voltage. The first driving power voltage is a positive voltage, and the second driving power voltage is a negative voltage or 0V. For example, the first driving power voltage can be Figure 2The first power supply voltage ELVDD shown, the second driving power supply voltage can be the second power supply voltage ELVSS. When the power supply module 40 supplies the first power supply voltage ELVDD and the second power supply voltage ELVSS to the pixel circuit PX, and the pixel circuit PX is connected to form a discharge path between the signal end of the first power supply voltage ELVDD and the signal end of the second power supply voltage ELVSS, the driving transistor M1 generates a driving current to drive the light-emitting device D1 to emit light.

[0063] Optionally, the logic operation module 30 is specifically configured to output a first-level signal as the power control signal Swire when both the first control signal Swire1 and the second control signal Swire2 are first-level signals, and to output a second-level signal as the power control signal Swire when at least one of the first control signal Swire1 and the second control signal Swire2 is a second-level signal. The power supply module 40 is specifically configured to supply a driving power voltage to the display module 100 (e.g., supply a first driving power voltage and a second driving power voltage to a pixel circuit in the display module 100) when the power control signal Swire is a first-level signal, and to stop supplying the driving power voltage (e.g., stop supplying the first driving power voltage and the second driving power voltage to the pixel circuit in the display module 100) when the power control signal Swire is a second-level signal. One of the first-level signal and the second-level signal is a high-level signal, and the other is a low-level signal.

[0064] The following combination Figure 2 、 Figure 4 and Figure 5 The operating principle of the driving device is described below, taking as an example a case where the voltage of the signal connected to the first power supply terminal DVDD is 1.2V, the voltage of the signal connected to the second power supply terminal VDDI is 1.8V, the first level signal is a high-level signal, the second level signal is a low-level signal, the first driving power supply voltage is the first power supply voltage ELVDD, and the second driving power supply voltage is the second power supply voltage ELVSS. Accordingly, a voltage signal of 1.2V or greater is considered a high-level signal, and a voltage signal of 0V or less is considered a low-level signal.

[0065] For example, when the display device is in a normal state, a 1.2V voltage signal is connected to the first power supply terminal DVDD. If the power supply module 40 needs to be controlled to supply the first power supply voltage ELVDD and the second power supply voltage ELVSS to the display module 100, the timing control module 10 can output a 1.2V first control signal Swire1, which is a high-level signal. The second power supply terminal VDDI is connected to a 1.8V voltage signal. The level conversion module 20 performs level conversion on the first control signal Swire1 based on the voltage value of the signal connected to the second power supply terminal VDDI, thereby outputting a 1.8V second control signal Swire2, which is a high-level signal. Since both the first control signal Swire1 and the second control signal Swire2 are connected to the logic operation module 30 and are high-level signals, the logic operation module 30 outputs a high-level signal as the power control signal Swire to control the power supply module 40 to supply the first power supply voltage ELVDD and the second power supply voltage ELVSS to the display module 100.

[0066] If it is necessary to control the power supply module 40 to stop supplying the first power voltage ELVDD and the second power voltage ELVSS, the timing control module 10 can output a 0V first control signal Swire1, which is a low-level signal. When the first control signal Swire1 inputted by the level conversion module 20 is 0V, the second control signal Swire2 outputted by the level conversion module 20 is also 0V, which is a low-level signal. Since the first control signal Swire1 and the second control signal Swire2 inputted by the logic operation module 30 are both low-level signals, the logic operation module 30 outputs a low-level signal as the power control signal Swire to control the power supply module 40 to stop supplying the first power voltage ELVDD and the second power voltage ELVSS.

[0067] When the display device experiences an abnormal state such as a complete system freeze, the signal from the first power supply terminal DVDD may not be properly supplied. In other words, the voltage of the signal received by the first power supply terminal DVDD is 0V. This may cause the timing control module 10 to be unable to properly output the first control signal Swire1, thereby causing the second control signal Swire2 output by the level conversion module 20 to be uncontrollable. The second control signal Swire2 may be a high-level signal or a low-level signal. However, since the voltage of the first control signal Swire1 received by the logic operation module 30 is 0V, that is, the first control signal Swire1 is equivalent to a low-level signal. When either the first control signal Swire1 or the second control signal Swire2 is a low-level signal, the logic operation module 30 outputs a low-level signal as the power control signal Swire to control the power supply module 40 to stop supplying the first driving power supply voltage and the second driving power supply voltage. This prevents the power supply module 40 from erroneously outputting the first power supply voltage ELVDD and the second power supply voltage ELVSS when the second control signal Swire2 output by the level conversion module 20 is uncontrollable.

[0068] As can be seen from the above analysis, when the display device is in screen-off mode, a low-level signal is typically output to the power supply module 40 as the power control signal Swire to control the power supply module 40 to stop supplying the first power voltage ELVDD and the second power voltage ELVSS. In this case, the display driver chip can supply the first power voltage ELVDD and the second power voltage ELVSS to the display module 100. If the display device experiences an abnormal state such as a complete system freeze, resulting in a failure to properly supply the signal from the first power supply terminal DVDD, the power supply module 40 may erroneously output the first power voltage ELVDD and the second power voltage ELVSS, causing the display device to appear green and overheat.

[0069] The technical solution of an embodiment of the present invention uses a logic operation module to perform a logic operation on a first control signal output by a timing control module and a second control signal output by a level conversion module to obtain a power control signal. The power control signal is then controlled based on the first and second control signals. This power control signal is then used to control whether the power supply module supplies the first and second driving power supply voltages to the pixel circuits in the display panel. If the display device experiences an abnormal state, such as a complete system freeze, resulting in a failure to properly supply the signal from the first power supply terminal connected to the timing control module, and thus causing the second control signal output by the level conversion module to become uncontrollable, this solution uses the logic operation module to control the power control signal based on the first and second control signals. This helps prevent the power supply module from erroneously outputting the first and second driving power supply voltages, thereby preventing display anomalies such as a green screen and overheating in the display device, thereby mitigating potential safety hazards. Furthermore, by alleviating display anomalies such as a green screen and overheating, this solution also helps reduce the standby power consumption of the display device, thereby extending standby time and improving the user experience.

[0070] Figure 6 FIG. 1 is a schematic diagram of the structure of another driving device provided by an embodiment of the present invention. Figure 5 and Figure 6 Optionally, the timing control module 10 includes a timing controller (Tcon) 110. When a voltage signal is connected to the first power supply terminal DVDD, the timing control module 10 can function normally, controlling the data driver module 50 and the gate driver module 60 to operate according to the received image signal, and controlling the power supply module 40 to supply the first and second driving power voltages to the pixel circuits PX in the display module 100, thereby enabling the display module 100 to achieve a display function. When the first power supply terminal DVDD cannot function normally, the timing control module 10 cannot function.

[0071] See also Figure 6 Furthermore, in one embodiment of the present invention, the logic operation module 30 may include a first AND gate circuit 310. A first input terminal of the first AND gate circuit 310 is connected to the level conversion module 20, a second input terminal of the first AND gate circuit 310 is connected to the timing control module 10, and an output terminal of the first AND gate circuit 310 is connected to the power supply module 40. The first AND gate circuit 310 is configured to perform a logic AND operation on the first control signal Swire1 and the second control signal Swire2 to obtain the power control signal Swire.

[0072] The first AND gate circuit 310 can be implemented in a variety of ways, including but not limited to using CMOS logic, NMOS logic, PMOS logic, and diodes. The first AND gate circuit 310 performs a logical AND operation on the first control signal Swire1 output by the timing control module 10 and the second control signal Swire2 output by the level conversion module 20. When both the first control signal Swire1 and the second control signal Swire2 are high-level signals, the first AND gate circuit 310 outputs a high-level signal as the power control signal Swire to control the power supply module 40 to supply the first and second driving power voltages to the display module. When either the first control signal Swire1 or the second control signal Swire2 is low-level signals, the first AND gate circuit 310 outputs a low-level signal as the power control signal Swire to control the power supply module 40 to stop supplying the first and second driving power voltages. In the event that the display device experiences an abnormal state such as a complete system freeze, resulting in the inability to normally provide a signal from the first power supply terminal DVDD, and thus causing the timing control module 10 to normally output the first control signal Swire1 and the second control signal Swire2 output by the level conversion module 20 to be uncontrollable, the embodiment of the present application performs a logical AND operation on the first control signal Swire1 and the second control signal Swire2 through the first AND gate circuit 310 to obtain the power control signal Swire, which helps to prevent the power supply module 40 from erroneously outputting the first driving power supply voltage and the second driving power supply voltage, thereby avoiding display abnormalities such as a green screen and overheating of the display device.

[0073] Figure 7 Schematic diagram of another driving device provided by an embodiment of the present invention. Figure 7 In another embodiment of the present invention, the logic operation module 30 may include a first AND gate circuit 310 and a second AND gate circuit 320. A first input of the first AND gate circuit 310 is connected to the level conversion module 20, a second input of the first AND gate circuit 310 is connected to the timing control module 10, and an output of the first AND gate circuit 310 is connected to a first input of the second AND gate circuit 320. The first AND gate circuit 310 is configured to perform a logical AND operation on the first control signal Swire1 and the second control signal Swire2 to generate a third control signal Swire3. A second input of the second AND gate circuit 320 is connected to the reset signal terminal RE, and an output of the second AND gate circuit 320 is connected to the power supply module 40. The second AND gate circuit 320 is configured to perform a logical AND operation on the third control signal and the signal at the reset signal terminal RE to generate the power control signal Swire. The first and second AND gate circuits 310 and 320 may be implemented in a variety of ways, including but not limited to using CMOS logic, NMOS logic, PMOS logic, and diodes.

[0074] Optionally, the signal at the reset signal terminal RE includes a first level signal and a second level signal. Within a set time period after the driving device is powered on, the signal at the reset signal terminal RE is the second level signal. From the set time period after the driving device is powered on until the driving device is powered off, the signal at the reset signal terminal RE is the first level signal. The specific value of the set time period can be set as required.

[0075] Optionally, the logic operation module 30 further includes a buffer register unit 330, which is connected between the output end of the second AND gate circuit 320 and the power supply module 40. The buffer register unit 330 is configured to store and output the power control signal Swire. For example, the buffer register unit 330 temporarily stores the power control signal Swire output by the second AND gate circuit 320 and then outputs it to the power supply module 40. The buffer register unit 330 may specifically include a buffer or a buffer register.

[0076] Figure 7 The buffer register unit 330 is shown to be connected between the output terminal of the second AND gate circuit 320 and the power supply module 40. In other embodiments, for example, Figure 6 In the driving device shown, a buffer register unit 330 may be further provided and connected between the output end of the first AND gate circuit 310 and the power supply module 40 .

[0077] In some other embodiments, the driving device further includes a buffer storage module. Figure 4 In the driving device shown in FIG, the buffer register module is connected between the output terminal of the logic operation module 30 and the power supply module 40. Figure 3 In the driving device shown, the buffer register module is connected between the output terminal of the level conversion module 20 and the power supply module 40 .

[0078] For example, when the first level signal is a high level signal and the second level signal is a low level signal, when both the first control signal Swire1 and the second control signal Swire2 are high level signals, the third control signal Swire3 output by the first AND gate circuit 310 is a high level signal. When either the first control signal Swire1 or the second control signal Swire2 is low level signals, the third control signal Swire3 output by the first AND gate circuit 310 is a low level signal. When both the third control signal Swire3 and the signal at the reset signal terminal RE are high level signals, the power control signal Swire output by the second AND gate circuit 320 is a high level signal. When either the third control signal Swire3 or the signal at the reset signal terminal RE is low level signals, the power control signal Swire output by the second AND gate circuit 320 is a low level signal. When the power control signal Swire is high level signals, the power supply module 40 supplies the first and second driving power supply voltages to the display module. When the power control signal Swire is low level signals, the power supply module 40 stops supplying the first and second driving power supply voltages.

[0079] The technical solution of this embodiment, by providing a first AND gate circuit 310, can, when an abnormal state such as a complete system freeze occurs in the display device, resulting in the failure of the signal from the first power supply terminal DVDD to be normally provided, thereby causing the timing control module 10 to be unable to normally output the first control signal Swire1 and the second control signal Swire2 output by the level conversion module 20 to be uncontrollable, perform a logical AND operation on the first control signal Swire1 and the second control signal Swire2 through the first AND gate circuit 310 to obtain the power control signal Swire. This helps to prevent the power supply module 40 from erroneously outputting the first driving power supply voltage and the second driving power supply voltage, thereby avoiding display abnormalities such as a green screen and overheating of the display device. If the signal from the first power supply terminal DVDD is not properly provided within a set time after the driver device is powered on, the timing control module 10 may be unable to properly output the first control signal Swire1, and the second control signal Swire2 output by the level conversion module 20 may be uncontrollable. This embodiment provides a second AND gate circuit 320 and provides a low-level signal to the reset signal terminal RE within a set time after the driver device is powered on. This ensures that the power control signal Swire remains low for the set time after the driver device is powered on, further preventing the power supply module 40 from erroneously outputting the first and second driving power supply voltages, thereby preventing display anomalies such as a green screen and overheating of the display device. After the set time after the driver device is powered on and until the driver device is powered off, a high-level signal is provided to the reset signal terminal RE, so that the level of the power control signal Swire is determined by the levels of the first and second control signals Swire1 and Swire2, thereby controlling whether the power supply module 40 supplies the first and second driving power supply voltages to the display panel.

[0080] Figure 8 Schematic diagram of another driving device provided by an embodiment of the present invention. Figure 8In one embodiment, the level conversion module 20 may include a first inverting unit 210, a second inverting unit 220, and a level conversion unit 230. A power supply terminal of the first inverting unit 210 is connected to the first power supply terminal DVDD, an input terminal of the first inverting unit 210 is connected to the timing control module 10, an output terminal of the first inverting unit 210 is connected to the input terminal of the second inverting unit 220 and a first control terminal INB of the level conversion unit 230, and the first inverting unit 210 is configured to invert the first control signal Swire1. A power supply terminal of the second inverting unit 220 is connected to the first power supply terminal DVDD, an input terminal of the second inverting unit 220 is connected to the output terminal of the first inverting unit 210, an output terminal of the second inverting unit 220 is connected to the second control terminal IN of the level conversion unit 230, and the second inverting unit 220 is configured to invert the output signal of the first inverting unit 210. The power supply terminal of the level conversion unit 230 is connected to the second power supply terminal VDDI. The output terminal of the level conversion unit 230 is connected to the power supply module 40 via the logic operation module 30. The level conversion unit 230 is configured to respond to signals from its first control terminal INB and second control terminal IN, and level-convert the signal from its second control terminal IN according to the signal from the power supply terminal to generate and output the second control signal Swire2. The first inverting unit 210 and the second inverting unit 220 can operate normally when a voltage signal is applied to the first power supply terminal DVDD, and cannot operate when a voltage signal is not applied to the first power supply terminal DVDD. Both the first inverting unit 210 and the second inverting unit 220 may include inverters.

[0081] Specifically, the level conversion unit 230 can, under the control of the signals at its first control terminal INB and second control terminal IN, convert the voltage level of the first control signal Swire1 input to its second control terminal IN according to the voltage level of the signal at the second power supply terminal VDDI, so that the voltage level of the converted second control signal Swire2 corresponds to the voltage level of the signal receivable by the power supply module 40. For example, the voltage value of the signal input to the first power supply terminal DVDD is 1.2V, and the voltage value of the signal input to the second power supply terminal VDDI is 1.8V. When the timing controller 110 outputs the first control signal Swire1 of 1.2V, the first control signal Swire1 is a high-level signal, the signal at the second control terminal IN is a high-level signal of 1.2V, and the signal at the first control terminal INB is a low-level signal of 0V. The level conversion unit 230 performs level conversion on the first control signal Swire1 according to the voltage value of the signal input to the second power supply terminal VDDI, thereby outputting the second control signal Swire2 of 1.8V, which is a high-level signal. When the timing controller 110 outputs the first control signal Swire1 of 0V, the first control signal Swire1 is a low-level signal, the signal of the second control terminal IN is a low-level signal of 0V, the signal of the first control terminal INB is a high-level signal of 1.2V, and the second control signal Swire2 output by the level conversion unit 230 is 0V, and the second control signal Swire2 is a low-level signal.

[0082] Figure 9 Schematic diagram of another driving device provided by an embodiment of the present invention. Figure 9In another embodiment, the level conversion module 20 may include a first inverting unit 210 and a level conversion unit 230. The power supply terminal of the first inverting unit 210 is connected to the first power supply terminal DVDD. The input terminal of the first inverting unit 210 and the second control terminal IN of the level conversion unit 230 are connected to the timing control module 10. The output terminal of the first inverting unit 210 is connected to the first control terminal INB of the level conversion unit 230. The first inverting unit 210 is configured to invert and output the first control signal Swire1. The power supply terminal of the level conversion unit 230 is connected to the second power supply terminal VDDI. The output terminal O1 of the level conversion unit 230 is connected to the power supply module 40 via the logic operation module 30. The level conversion unit 230 is configured to respond to signals from its first control terminal INB and second control terminal IN and level-convert the signal from its second control terminal IN based on the signal from its power supply terminal to generate and output the second control signal Swire2. The first inverting unit 210 operates normally when a voltage signal is applied to the first power supply terminal DVDD, but does not operate when no voltage signal is applied to the first power supply terminal DVDD. The level conversion unit 230 in this embodiment has the same function as the level conversion unit 230 in the above embodiment, with the only difference being that the level conversion module 20 in this embodiment includes a first inverting unit 210 , while the level conversion module 20 in the above embodiment includes a first inverting unit 210 and a second inverting unit 220 .

[0083] Figure 10 1 is a schematic structural diagram of a level conversion module provided by an embodiment of the present invention; Figure 11 Schematic diagram of another driving device provided by an embodiment of the present invention. Figure 10 and Figure 11 Optionally, the level conversion unit 230 includes a first switch 231, a second switch 232, a third switch 233, and a fourth switch 234. The first end of the first switch 231 and the first end of the second switch 232 are both connected to the second power supply terminal VDDI as the power supply terminal of the level conversion unit 230. The first end of the third switch 233 and the first end of the fourth switch 234 are grounded. The second end of the first switch 231 is connected to the second end of the third switch 233, and the second end of the second switch 232 is connected to the second end of the fourth switch 234. The control end of the first switch 231 is connected to the second end of the fourth switch 234, and the control end of the second switch 232 is connected to the second end of the third switch 233. The second end of the second switch 232 serves as the output terminal O1 of the level conversion unit 230 and is connected to the logic operation module 30. The control end of the third switch 233 serves as the second control terminal IN of the level conversion unit 230, and the control end of the fourth switch 234 serves as the first control terminal INB of the level conversion unit 230.

[0084] The level signal for controlling the conduction of the first switch 231 and the second switch 232 is the same, the level signal for controlling the conduction of the third switch 233 and the fourth switch 234 is the same, and the level signal for controlling the conduction of the first switch 231 and the second switch 232 is opposite to the level signal for controlling the conduction of the third switch 233 and the fourth switch 234. If the signal for controlling the conduction of the first switch 231 and the second switch 232 is a low-level signal, the signal for controlling the conduction of the third switch 233 and the fourth switch 234 is a high-level signal. Conversely, if the signal for controlling the conduction of the first switch 231 and the second switch 232 is a high-level signal, the signal for controlling the conduction of the third switch 233 and the fourth switch 234 is a low-level signal.

[0085] Continue to see Figure 10 and Figure 11 Furthermore, the first switch 231 includes a first transistor T1, the second switch 232 includes a second transistor T2, the third switch 233 includes a third transistor T3, and the fourth switch 234 includes a fourth transistor T4. The first electrode of the first transistor T1 and the first electrode of the second transistor T2 are both connected to the second power supply terminal VDDI as the power supply terminal of the level conversion unit 230. The first electrode of the third transistor T3 and the first electrode of the fourth transistor T4 are grounded. The second electrode of the first transistor T1 is connected to the second electrode of the third transistor T3, the second electrode of the second transistor T2 is connected to the second electrode of the fourth transistor T4, the gate of the first transistor T1 is connected to the second electrode of the fourth transistor T4, the gate of the second transistor T2 is connected to the second electrode of the third transistor T3, the second electrode of the second transistor T2 is connected to the second electrode of the third transistor T3, and the second electrode of the second transistor T2 is connected to the second electrode of the third transistor T3. The second electrode of the second transistor T2 serves as the output terminal O1 of the level conversion unit 230 and is connected to the logic operation module 30. The gate of the third transistor T3 serves as the second control terminal IN of the level conversion unit 230, and the gate of the fourth transistor T4 serves as the first control terminal INB of the level conversion unit 230.

[0086] The first transistor T1 and the second transistor T2 have the same channel type, the third transistor T3 and the fourth transistor T4 have the same channel type, and the first transistor T1 and the second transistor T2 have different channel types from the third transistor T3 and the fourth transistor T4. Figure 10 and Figure 11 The figures all show the case where the first transistor T1 and the second transistor T2 are P-type transistors, and the third transistor T3 and the fourth transistor T4 are N-type transistors. In other embodiments, the first transistor T1 and the second transistor T2 may be N-type transistors, and the third transistor T3 and the fourth transistor T4 may be P-type transistors.

[0087] Based on the above embodiments, the first inverting unit 210 optionally includes a first inverter 211. The power supply terminal of the first inverter 211 is connected to the first power supply terminal DVDD so that the signal from the first power supply terminal DVDD provides power to the inverter 211. The first inverter 211 operates normally when a voltage signal is applied to the first power supply terminal DVDD, and does not operate when no voltage signal is applied to the first power supply terminal DVDD. The power supply terminals of the first AND gate circuit 310, the second AND gate circuit 320, and the buffer register unit 330 are all connected to the second power supply terminal VDDI so that the signal from the second power supply terminal VDDI provides power to the first AND gate circuit 310, the second AND gate circuit 320, and the buffer register unit 330.

[0088] The following still takes the example that the voltage value of the signal connected to the first power supply terminal DVDD is 1.2V, the voltage value of the signal connected to the second power supply terminal VDDI is 1.8V, the first level signal is a high level signal, the second level signal is a low level signal, the first driving power supply voltage is the first power supply voltage ELVDD, and the second driving power supply voltage is the second power supply voltage ELVSS to illustrate the working states of the level conversion module 20 under different situations.

[0089] (1) The display device is in a normal state, and the first power supply terminal DVDD is connected to a 1.2V voltage signal:

[0090] When the timing controller 110 outputs a 1.2V first control signal Swire1, which is a high-level signal, a high-level signal is input to the second control terminal IN of the level conversion module 20. The first control signal Swire1 is converted to a low-level signal by the first inverter 211, and a low-level signal is input to the first control terminal INB of the level conversion module 20. The fourth transistor T4 is turned off, and the third transistor T3 is turned on, causing the gate voltage signal of the second transistor T2 to be a low-level signal. The second transistor T2 is turned on, and the output terminal O1 of the level conversion module 20 outputs a 1.8V high-level signal, turning off the first transistor T1. The output terminal O1 of the level conversion module 20 can stably output a 1.8V high-level signal, indicating that the second control signal Swire2 is a high-level signal.

[0091] When the timing controller 110 outputs the first control signal Swire1 of 0V, which is a low-level signal, the second control terminal IN of the level conversion module 20 inputs a low-level signal. The first control signal Swire1 is converted by the first inverter 211 to a high-level signal, and the first control terminal INB of the level conversion module 20 inputs a high-level signal. The third transistor T3 is turned off, and the fourth transistor T4 is turned on, causing the output terminal O1 of the level conversion module 20 to output a low-level signal. The first transistor T1 is turned on, causing the gate voltage signal of the second transistor T2 to be a high-level signal. The second transistor T2 is turned off, and the output terminal O1 of the level conversion module 20 can stably output a high-level signal of 0V, that is, the second control signal Swire2 is a low-level signal.

[0092] (2) The display device experiences an abnormal state such as a complete freeze, and the signal from the first power supply terminal DVDD cannot be provided normally:

[0093] In the related art, if a display device experiences an abnormal state such as a complete system freeze, the driver device will first power off and then power on again. When the driver device is in the power-off state, the voltages of the first power supply terminal DVDD and the second power supply terminal VDDI are both 0 V. After the driver device recovers from the power-off state, the voltage of the second power supply terminal VDDI can recover from 0 V to 1.8 V. However, there are cases where the signal at the first power supply terminal DVDD still cannot be restored, that is, the voltage of the first power supply terminal DVDD remains at 0 V. As a result, when the driver device is in the power-off state, since the first power supply terminal DVDD and the second power supply terminal VDDI are both in a floating state, the voltages of the first power supply terminal DVDD and the second power supply terminal VDDI are both approximately 0 V, rendering the timing controller 110 and the level shifting module 20 inoperable, and the voltages of the first control signal Swire1 and the second control signal Swire2 both 0 V. After the driving device recovers from the power-off state, the voltage of the second power supply terminal VDDI recovers from 0V to 1.8V, while the voltage of the first power supply terminal DVDD remains at 0V. The timing controller 110 is unable to normally output the first control signal Swire1, and the voltage value of the first control signal Swire1 is 0V, which is equivalent to a low-level signal. The first inverter 211 is unable to operate, and the signals at the first control terminal INB and the second control terminal IN of the level conversion module 20 are floating or equivalent to low-level signals. The third transistor T3 and the fourth transistor are both turned off. The second control signal Swire2 output by the level shifter module 20 depends on the conduction performance of the first transistor T1 and the second transistor T2. If the conduction performance of the first transistor T1 is stronger, causing the first transistor T1 to turn on before the second transistor T2, the gate voltage signal of the second transistor T2 will be high, causing the second transistor T2 to remain off, thereby causing the second control signal Swire2 output by the level shifter module 20 to be low. If the conduction performance of the second transistor T2 is stronger, causing the second transistor T2 to turn on before the first transistor T1, the output terminal O1 of the level shifter module 20 will output a high-level signal of 1.8V, thereby turning off the first transistor T1 and stably outputting a high-level signal of 1.8V. Therefore, the above situation can make the second control signal Swire2 output by the level shifter module 20 uncontrollable.

[0094] To address the above problem, this embodiment helps to improve the problem of uncontrollable output signal of the level conversion module 20 by setting the signal of the second power supply terminal VDDI to remain at the second power supply voltage during the process of the driving device recovering from the power-off state to the power-on state. Figure 12 1 is a driving timing diagram of a driving device provided by an embodiment of the present invention. Figure 12 and Figure 13For example, before time t1, the display device is in normal operation, with the voltage of the first power supply terminal DVDD being 1.2V, and the second power supply terminal VDDI connected to a second power supply voltage of 1.8V. After time t1, the display device experiences an abnormal state, such as a complete system freeze, and the drive device is powered off. After time t2, the drive device gradually recovers from the power-off state to the power-on state. After time t1, the voltage of the first power supply terminal DVDD is 0V, and the second power supply terminal VDDI connected to the second power supply voltage remains at 1.8V.

[0095] Before time t1, the voltage at the first power supply terminal DVDD is 1.2V and the voltage at the second power supply terminal VDDI is 1.8V, and the timing controller 110 and the level shifting module 20 are functioning normally. If the voltage value of the first control signal Swire1 output by the timing controller 110 is 0V, and the first control signal Swire1 is a low-level signal, then the second control terminal IN of the level shifting module 20 inputs a low-level signal, the first control terminal INB inputs a high-level signal, and the fourth transistor T4 turns on, causing the output terminal O1 of the level shifting module 20 to output a low-level signal of 0V. Furthermore, the first transistor T1 turns on, and the second transistor T2 turns off. After time t1, the driving device is powered off, the voltage of the first power supply terminal DVDD changes from 1.2V to 0V, the timing controller 110 and the first inverter 211 cannot operate, the voltages of the first control terminal INB and the second control terminal IN of the level conversion module 20 are both 0V, the third transistor T3 and the fourth transistor T4 are turned off, the voltage of the output terminal O1 of the level conversion module 20 is 0V, and the voltage of the second power supply connected to the second power supply terminal VDDI remains at 1.8V. Therefore, the first transistor T1 remains on and the second transistor T2 remains off, so that the output terminal O1 of the level conversion module 20 can still output a low-level signal of 0V, and the second control signal Swire2 remains a low-level signal.

[0096] Before time t1, if the voltage value of the first control signal Swire1 output by the timing controller 110 is 1.2V and the first control signal Swire1 is a high-level signal, then the second control terminal IN of the level conversion module 20 inputs a high-level signal and the first control terminal INB inputs a low-level signal. The third transistor T3 is turned on, causing the gate voltage signal of the second transistor T2 to be a low-level signal, turning on the second transistor T2. The output terminal O1 of the level conversion module 20 outputs a high-level signal of 1.8V, turning off the first transistor T1. After time t1, the driving device is powered off, and the voltage of the first power supply terminal DVDD changes from 1.2V to 0V. The timing controller 110 and the first inverter 211 cannot work, so that the first control signal Swire becomes 0V. The signals of the first control terminal INB and the second control terminal IN are both low-level signals. The third transistor T3 and the fourth transistor T4 are both turned off. Since the second power supply voltage connected to the second power supply terminal VDDI remains at 1.8V, the second transistor T2 remains on and the first transistor T1 remains off, so that the output terminal O1 of the level conversion module 20 can still output a high-level signal of 1.8V, and the second control signal Swire2 remains a high-level signal.

[0097] Thus, it can be seen that by setting the signal at the second power supply terminal VDDI to remain at the second power supply voltage during the process of the driving device recovering from the power-off state to the power-on state, when the display device experiences an abnormal state such as a complete device freeze, after the driving device is first powered off and then powered on again, the technical solution of this embodiment can ensure that the level signal output by the level conversion module 20 remains unchanged. That is, if the signal at the output terminal O1 of the level conversion module 20 is a low-level signal before power failure, it will remain a low-level signal after power is restored. If the signal at the output terminal O1 of the level conversion module 20 is a high-level signal before power failure, it will remain a high-level signal after power is restored. Therefore, the output signal of the level conversion module 20 is not affected by the power failure of the first power supply terminal DVDD, which helps to prevent the output signal of the level conversion module 20 from causing display abnormalities such as a green screen and overheating of the display device.

[0098] In addition, combined Figure 11 and Figure 12For example, before time t1, the signal at the reset signal terminal RE is a high-level signal, and the level of the power control signal Swire is determined by the levels of the first control signal Swire1 and the second control signal Swire2. Between time t1 and time t2, and within a set time period after the driving device recovers from the power-off state to the power-on state (i.e., time t2 to t3), the signal at the reset signal terminal RE is a low-level signal, causing the power control signal Swire to be a low-level signal. This prevents the power supply module 40 from erroneously outputting the first driving power supply voltage and the second driving power supply voltage during this stage, thereby preventing display anomalies such as a green screen and overheating of the display device. After time t3, the signal at the reset signal terminal RE is a high-level signal, and the level of the power control signal Swire is still determined by the levels of the first control signal Swire1 and the second control signal Swire2.

[0099] It should be noted that Figures 4 to 9 and Figure 11 Both figures show that the driving device includes a timing control module 10 , a level conversion module 20 , a logic operation module 30 and a power supply module 40 . Figure 13 Schematic diagram of another driving device provided by an embodiment of the present invention. Figure 13 When the driving device does not include the logic operation module 30, by providing the level conversion module 20 to be directly connected to the power supply module 40, and setting the signal of the second power supply terminal VDDI to remain at the second power supply voltage during the process of the driving device recovering from the power-off state to the power-on state, it is also helpful to improve the problem of uncontrollable output signals of the level conversion module 20. In this case, the power supply module 40 can be controlled to directly supply the first driving power supply voltage and the second driving power supply voltage to the pixel circuit PX in the display module 100 according to the level of the second control signal Swire2 output by the level conversion module 20. This also helps to prevent the power supply module 40 from erroneously outputting the first driving power supply voltage and the second driving power supply voltage, thereby avoiding display anomalies such as a green screen and overheating of the display device, thereby eliminating potential safety hazards.

[0100] An embodiment of the present invention further provides a display device comprising a display panel and the driving device of any of the above embodiments. Specifically, the display panel may be an organic light-emitting diode (OLED) display panel or a micro-LED display panel. The display device specifically includes a display device with a display function, such as a mobile phone, a computer, or a tablet computer.

[0101] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A driving device, characterized in that: Used to drive the display module to work, the driving device includes: a timing control module, a level conversion module and a power supply module; The timing control module is connected to the first power supply terminal and is used to generate a first control signal when the first power supply terminal is connected to a voltage signal to control the power supply module; The level conversion module is connected to the second power supply terminal, the timing control module and the power supply module, and is used to perform level conversion on the first control signal according to the signal of the second power supply terminal to obtain a second control signal; The power supply module is connected to the display module and is used to supply a driving power voltage to the display module according to the second control signal; The driving device further includes a logic operation module, the logic operation module is connected to the timing control module, the level conversion module and the power supply module, and the level conversion module is connected to the power supply module through the logic operation module; The logic operation module is used to perform a logic operation on the first control signal and the second control signal to obtain a power control signal. The power supply module is specifically used to supply the driving power voltage to the display module according to the power control signal.

2. The driving device according to claim 1, characterized in that The logic operation module is specifically configured to output a first-level signal as the power control signal when both the first control signal and the second control signal are first-level signals, and output a second-level signal as the power control signal when at least one of the first control signal and the second control signal is a second-level signal; The power supply module is specifically configured to supply the driving power voltage to the display module when the power control signal is the first level signal, and stop supplying the driving power voltage when the power control signal is the second level signal.

3. The driving device according to claim 2, characterized in that The timing control module includes a timing controller.

4. The driving device according to claim 3, characterized in that The logic operation module includes a first AND gate circuit; The first input end of the first AND gate circuit is connected to the level conversion module, the second input end of the first AND gate circuit is connected to the timing control module, the output end of the first AND gate circuit is connected to the power supply module, and the first AND gate circuit is used to perform a logical AND operation on the first control signal and the second control signal to obtain the power control signal.

5. The driving device according to claim 3, characterized in that The logic operation module includes a first AND gate circuit and a second AND gate circuit; A first input end of the first AND gate circuit is connected to the level conversion module, a second input end of the first AND gate circuit is connected to the timing control module, an output end of the first AND gate circuit is connected to the first input end of the second AND gate circuit, and the first AND gate circuit is used to perform a logical AND operation on the first control signal and the second control signal to obtain a third control signal; The second input end of the second AND gate circuit is connected to the reset signal end, the output end of the second AND gate circuit is connected to the power supply module, and the second AND gate circuit is used to perform a logical AND operation on the third control signal and the signal at the reset signal end to obtain the power control signal.

6. The driving device according to claim 5, characterized in that The signal at the reset signal end includes a first level signal and a second level signal. Within a set time after the driving device is powered on, the signal at the reset signal end is the second level signal. After the set time after the driving device is powered on, the signal at the reset signal end is the first level signal.

7. The driving device according to claim 1, characterized in that The signal at the second power supply end is maintained at the second power supply voltage during the process of the driving device recovering from the power-off state to the power-on state.

8. The driving device according to claim 1, characterized in that The level conversion module includes a first inverting unit, a second inverting unit and a level conversion unit; The power supply terminal of the first inverting unit is connected to the first power supply terminal, the input terminal of the first inverting unit is connected to the timing control module, the output terminal of the first inverting unit is connected to the input terminal of the second inverting unit and the first control terminal of the level conversion unit, and the first inverting unit is used to invert the first control signal; The power supply terminal of the second inverting unit is connected to the first power supply terminal, the input terminal of the second inverting unit is connected to the output terminal of the first inverting unit, the output terminal of the second inverting unit is connected to the second control terminal of the level conversion unit, and the second inverting unit is used to invert the output signal of the first inverting unit; The power supply end of the level conversion unit is connected to the second power supply end, and the output end of the level conversion unit is connected to the power supply module. The level conversion unit is used to respond to the signals of its own first control end and second control end, and level-convert the signal of its own second control end according to the signal of its own power supply end to obtain and output the second control signal.

9. The driving device according to claim 1, characterized in that The level conversion module includes a first inverting unit and a level conversion unit; The power supply terminal of the first inverting unit is connected to the first power supply terminal, the input terminal of the first inverting unit and the second control terminal of the level conversion unit are connected to the timing control module, the output terminal of the first inverting unit is connected to the first control terminal of the level conversion unit, and the first inverting unit is used to invert the first control signal and output it; The power supply end of the level conversion unit is connected to the second power supply end, and the output end of the level conversion unit is connected to the power supply module. The level conversion unit is used to respond to the signals of its own first control end and second control end, and level-convert the signal of its own second control end according to the signal of its own power supply end to obtain and output the second control signal.

10. The driving device according to claim 8 or 9, characterized in that: The level conversion unit includes a first switch, a second switch, a third switch and a fourth switch; The first end of the first switch and the first end of the second switch are both connected to the second power supply end as power supply ends of the level conversion unit, the first end of the third switch and the first end of the fourth switch are grounded, the second end of the first switch is connected to the second end of the third switch, the second end of the second switch is connected to the second end of the fourth switch, the control end of the first switch is connected to the second end of the fourth switch, the control end of the second switch is connected to the second end of the third switch, the second end of the second switch serves as the output end of the level conversion unit and is connected to the power supply module, the control end of the third switch serves as the second control end of the level conversion unit, and the control end of the fourth switch serves as the first control end of the level conversion unit; The level signal controlling the first switch and the second switch to be turned on is the same, the level signal controlling the third switch and the fourth switch to be turned on is the same, and the level signal controlling the first switch and the second switch to be turned on is opposite to the level signal controlling the third switch and the fourth switch to be turned on.

11. The driving device according to claim 10, characterized in that: The first switch includes a first transistor, the second switch includes a second transistor, the third switch includes a third transistor, and the fourth switch includes a fourth transistor; The first electrode of the first transistor and the first electrode of the second transistor are both connected to the second power supply end as power supply ends of the level conversion unit, the first electrode of the third transistor and the first electrode of the fourth transistor are grounded, the second electrode of the first transistor is connected to the second electrode of the third transistor, the second electrode of the second transistor is connected to the second electrode of the fourth transistor, the gate of the first transistor is connected to the second electrode of the fourth transistor, the gate of the second transistor is connected to the second electrode of the third transistor, the second electrode of the second transistor is connected to the power supply module as the output end of the level conversion unit, the gate of the third transistor is used as the second control end of the level conversion unit, and the gate of the fourth transistor is used as the first control end of the level conversion unit; The first transistor and the second transistor have the same channel type, the third transistor and the fourth transistor have the same channel type, and the channel type of the first transistor and the second transistor is different from the channel type of the third transistor and the fourth transistor.

12. A display device, characterized in that: The device comprises a display module and a driving device as claimed in any one of claims 1 to 11.

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