A low temperature fusion bonding method for MEMS grade wafers
By depositing an amorphous silicon layer on the surface of a silicon wafer and performing low-temperature annealing, combined with thermal oxidation and atomic beam bombardment to form a silicon dioxide layer, the problems of insufficient bonding strength and voids in low-temperature fusion bonding in the MEMS field are solved, achieving a highly efficient low-temperature bonding effect.
Patent Information
- Application Number
- CN202211378725.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-04
- Publication Date
- 2026-01-16
- Estimated Expiration
- 2042-11-04
AI Technical Summary
Existing low-temperature melt bonding methods have problems in MEMS applications, such as insufficient bonding strength, high requirements for the operating environment, and the tendency for voids to appear at the bonding interface.
An amorphous silicon layer is deposited on the surface of a silicon wafer and annealed at 200-250℃ under inert gas protection. A silicon dioxide layer is formed by thermal oxidation and atomic beam bombardment. The strong reactivity of amorphous silicon is used to form Si-Si covalent bonds, achieving low-temperature bonding.
Strong wafer bonding was achieved under low-temperature conditions, avoiding wafer deformation and doping diffusion problems caused by high-temperature processes. At the same time, the adhesion effect of wet solution processing and the void generation of plasma activation process were avoided, reducing the requirements for vacuum level.
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Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of semiconductor preparation, and particularly relates to a low-temperature fusion bonding method for a MEMS wafer. BACKGROUND
[0002] With the development of semiconductor processing technology, wafer bonding technology as a new process method can tightly bond silicon wafers, silicon wafers and glass wafers or other different materials together through chemical and physical effects to form micro devices with three-dimensional hierarchical structure. Bonding technology used in the field of MEMS devices mainly includes fusion bonding, anodic bonding, adhesive bonding and eutectic bonding.
[0003] Among them, the fusion bonding technology can be applied to the bonding between the same materials, avoiding the problem that the thermal expansion stress of MEMS devices will change with temperature due to the inconsistent thermal expansion coefficients between different materials.
[0004] The traditional fusion bonding process needs to be carried out in a high-temperature and high-pressure environment, and the bonding process temperature is usually as high as 1200℃ or above. The high process temperature will cause the formation of a large amount of residual thermal stress in the wafer, causing the deformation of the wafer. At the same time, the high-temperature process will cause the diffusion of the doped wafer, affecting the doping concentration of the implanted ions. In addition, the high-temperature process will cause the wafer to release trace amounts of gas, which will affect the vacuum degree of some MEMS devices with air tightness requirements. Based on the above-mentioned shortcomings of high-temperature fusion bonding, it is of great significance to use low-temperature fusion bonding process to realize the bonding strength between wafers.
[0005] In the prior art, different chemical solutions are used to treat the wafer surface to increase the surface dangling bond of the wafer, so as to still have a high activation energy at low temperature. However, for the application in the field of MEMS, there are certain limitations because the wafer bonding in the field of MEMS is usually a wafer with a three-dimensional movable structure and another ordinary wafer without a three-dimensional structure. The wafer with a three-dimensional structure is soaked in a wet solution for a long time, which will cause corrosion to the surface structure and easily cause adhesion effect. At the same time, the wafer surface treated by the wet solution has a low bonding energy, and the wafer bonding strength will be insufficient. In the prior art, there is also a method of carrying out in a vacuum environment to achieve the required bonding strength at a lower process temperature. However, this method requires a very harsh process environment, and the vacuum degree needs to be as high as 10 -7The cost of the device and the batch production is also extremely large. In the prior art, two pieces of wafer to be bonded are simultaneously processed by plasma activation treatment, the surfaces of the two pieces of wafer have enough -OH groups and enough surface activation energy, and the strength of the bonding interface is ensured to a certain extent, but the surfaces of the two pieces of wafer will adsorb too many plasma gas groups after the plasma activation treatment, and a large amount of reaction by-products will be generated in the subsequent annealing process, which will cause a large number of holes in the bonding interface and affect the bonding quality. SUMMARY
[0006] In view of the above problems in the prior art, the present application provides a low-temperature fusion bonding method for MEMS-grade wafers, which can effectively solve the problems of insufficient bonding strength, high requirement for the operating environment and easy occurrence of holes in the bonding interface in the existing low-temperature fusion method.
[0007] To achieve the above-mentioned purpose, the technical scheme adopted by the present application to solve its technical problems is as follows:
[0008] A low-temperature fusion bonding method for MEMS-grade wafers, comprising the following steps: depositing amorphous silicon layers on the surfaces of two pieces of silicon wafers respectively, then contacting the amorphous silicon layers of the two pieces of silicon wafers and performing a pressurized pre-bonding treatment on the two pieces of silicon wafers, and finally performing annealing at 200-250 DEG C under the condition of inert gas protection.
[0009] Further, the specific operation is as follows:
[0010] (1) cleaning: cleaning the first wafer and the second wafer respectively to remove impurities on the surfaces;
[0011] (2) thermal oxidation treatment of the first wafer and the second wafer: placing the first wafer and the second wafer in an oxidation furnace respectively for thermal oxidation treatment, so that a silicon dioxide layer is formed on the surfaces of the first wafer and the second wafer;
[0012] (3) depositing amorphous silicon on the surfaces of the first wafer and the second wafer: fixing the first wafer and the second wafer respectively, under vacuum conditions, using inert gas atomic beam to bombard single crystal silicon material, sputtering the single crystal silicon onto the surfaces of the first wafer and the second wafer, and forming amorphous silicon layers on the surfaces of the first wafer and the second wafer;
[0013] (4) pre-bonding: aligning the amorphous silicon layers on the surfaces of the first wafer and the second wafer, setting the initial distance between the two to be 50-100 μm, and then applying a pressure of 1000-1500 N to the two for pressurized treatment for 1-3 h;
[0014] (5) low-temperature annealing: annealing the pre-bonded wafer material at 200-250 DEG C under the condition of inert gas protection for 1-2 h to obtain the wafer.
[0015] Further, the specific operation is as follows:
[0016] (1) Cleaning: cleaning the first wafer and the second wafer respectively to remove impurities on the surface;
[0017] (2) Thermal oxidation treatment of the first wafer: placing the first wafer in an oxidation furnace for thermal oxidation treatment, so that a silicon dioxide layer is formed on the surface of the first wafer;
[0018] (3) Depositing amorphous silicon on the surface of the first wafer: fixing the first wafer, under vacuum conditions, using an inert gas atomic beam to bombard the second wafer, sputtering single crystal silicon onto the surface of the first wafer to form an amorphous silicon layer;
[0019] (4) Thermal oxidation treatment of the second wafer: polishing the surface of the second wafer to make the surface roughness RMS 0.1-0.2 nm, rinsing the second wafer with deionized water, and then placing it in an oxidation furnace for thermal oxidation treatment, so that a silicon dioxide layer is formed on the surface of the second wafer;
[0020] (5) Depositing amorphous silicon on the surface of the second wafer: fixing the second wafer, under vacuum conditions, using an inert gas atomic beam to bombard the first wafer, sputtering single crystal silicon onto the surface of the second wafer to form an amorphous silicon layer;
[0021] (6) Pre-bonding: aligning the amorphous silicon layers on the surfaces of the first wafer and the second wafer, setting the initial distance between them to 50-100 μm, and then applying a pressure of 1000-1500 N to the two for 1-3 h of pressure treatment;
[0022] (7) Low-temperature annealing: annealing the pre-bonded wafer material at 200-250 °C for 1-2 h under inert gas protection to obtain the product.
[0023] Further, the cleaning operation in step (1) is used to remove organic matter, oxides and metal ions on the surfaces of the first wafer and the second wafer.
[0024] Further, the organic matter removal operation is as follows: ultrasonic cleaning the first wafer and the second wafer with acetone and anhydrous ethanol respectively, and then rinsing them with deionized water to remove organic matter on the surfaces of the first wafer and the second wafer; then immersing the first wafer and the second wafer in a mixed solution prepared by mixing hydrofluoric acid and water at a ratio of 1:10 to remove oxides.
[0025] Further, the metal ion removing operation is as follows: the first wafer and the second wafer after removing organic matters are placed in the SPM solution, and boiled at 90-110 ℃ for 15-20 min, then the first wafer and the second wafer are washed with deionized water, then the first wafer and the second wafer are placed in a mixed solution prepared by hydrochloric acid, hydrogen peroxide and water according to a volume ratio of 1:1:5, and boiled at 70-90 ℃ for 10-20 min, then the first wafer and the second wafer are washed with deionized water to remove the metal ions on the surface of the first wafer and the second wafer, and finally drying is performed.
[0026] Further, the first wafer and the second wafer in step (2) are subjected to dry oxygen oxidation treatment at 1000-1200 ℃ in the oxidation furnace.
[0027] Further, the thickness of the silicon dioxide layer formed on the surface of the first wafer and the second wafer in step (2) is 250-350 nm.
[0028] Further, the thickness of the amorphous silicon layer on the surface of the first wafer in step (3) is 10-15 nm, and the thickness of the amorphous silicon layer formed on the surface of the second wafer is 1-4 nm.
[0029] The beneficial effects of the present application are as follows:
[0030] The present application uses atomic beam to bombard single crystal silicon, and deposits single crystal silicon on the surface of the first wafer and the second wafer, and uses the strong activity of amorphous silicon to form Si-Si covalent bond through van der Waals force in the low-temperature annealing process, so that the first wafer and the second wafer are combined together through Si-Si covalent bond to obtain a firm bonding structure, thereby achieving the purpose of low-temperature fusion bonding, avoiding the shortcomings brought by the traditional high-temperature process, and avoiding the adhesion effect caused by long-time wet solution immersion, the generation of a large number of voids in the plasma activation process or the requirement of high vacuum process environment.
[0031] In the present application, the silicon dioxide layer is formed on the surface of the first wafer and the second wafer through thermal oxidation process, and the silicon dioxide layer is used as the substrate for forming amorphous silicon, so as to facilitate the subsequent deposition of amorphous silicon and improve the bonding performance between amorphous silicon and silicon wafer. BRIEF DESCRIPTION OF DRAWINGS
[0032] Figure 1 The bonding process flowchart of the present application is shown in the figure;
[0033] Figure 2 The amorphous silicon deposition process schematic diagram of the present application is shown in the figure;
[0034] Figure 3 The bonding interface micrograph of the present application is shown in the figure;
[0035] Figure 4A schematic diagram of a crack method test;
[0036] Figure 5 A schematic diagram of a wafer surface crack structure. DETAILED DESCRIPTION
[0037] The specific embodiments of the present application will be described in detail below with reference to the accompanying drawings.
[0038] Example 1
[0039] A low-temperature fusion bonding method of a MEMS-grade wafer, comprising the following steps:
[0040] (1) Cleaning: ultrasonic cleaning of the first wafer and the second wafer with acetone and anhydrous ethanol for 5 min, respectively, and then rinsing with deionized water for 5 min to remove organic matter on the surface of the first wafer and the second wafer; then placing the first wafer and the second wafer from which the organic matter has been removed in a solution prepared by mixing hydrofluoric acid and water at a volume ratio of 1:10 for 40 s, rinsing with deionized water for 5 min, then boiling the first wafer and the second wafer in an SPM solution at 95°C for 20 min, then rinsing the first wafer and the second wafer with deionized water, then placing the first wafer and the second wafer in a mixed solution prepared by mixing hydrochloric acid, hydrogen peroxide and water at a volume ratio of 1:1:5, boiling at 70°C for 20 min, then rinsing with deionized water to remove metal ions on the surface of the first wafer and the second wafer, and finally blowing dry the first wafer and the second wafer with a nitrogen gun;
[0041] (2) Thermal oxidation treatment of the first wafer: placing the first wafer in an oxidation furnace for thermal oxidation treatment, dry oxygen oxidation treatment at 1000°C for 4h to form a 250nm-thick silicon dioxide layer on the surface of the first wafer;
[0042] (3) Depositing amorphous silicon on the surface of the first wafer: loading the first wafer into the top wafer carrier of a bonding machine, vacuum pumping the inside of the cavity to 10 -5 Pa, turning on FAB2, using an Ar atomic beam to bombard the second wafer, setting the atomic beam voltage to 1.8KV and the atomic beam current to 100mA, and the bombardment time to 10min, so that the single crystal silicon is sputtered to the surface of the first wafer to form an amorphous silicon layer with a thickness of 10nm after the second wafer is bombarded by Ar atoms;
[0043] (4) Thermal oxidation treatment of the second wafer: CMP polishing of the surface of the second wafer to a surface roughness RMS of 0.1nm, rinsing the second wafer with deionized water for 5min, then placing it in an oxidation furnace for thermal oxidation treatment, dry oxygen oxidation treatment at 1000°C for 4h to form a 250nm-thick silicon dioxide layer on the surface of the second wafer;
[0044] (5) Depositing amorphous silicon on the second wafer surface: load the second wafer into the bottom wafer carrier of the bonder, and pump the cavity to 10 -5 Pa, turn on the FAB1, and make the first wafer be bombarded by an argon atom beam, with the atom beam voltage being set to 1.8 KV, the atom beam current being set to 100 mA, and the bombardment time being 2 min. After the bombardment of the argon atom, amorphous silicon is sputtered onto the surface of the second wafer to form an amorphous silicon material with a thickness of about 2 nm.
[0045] (6) Pre-bonding: load the first wafer and the second wafer into the bonder, and align them through optical imaging. The initial distance between the first wafer and the second wafer is set to 50 um, and a pressure of 1000 N is applied for 2 h.
[0046] (7) Low-temperature annealing: anneal the pre-bonded wafer material at 200℃ for 2 h under the protection of an inert gas to obtain a product.
[0047] Example 2
[0048] A low-temperature fusion bonding method for a MEMS-grade wafer includes the following steps:
[0049] (1) Cleaning: ultrasonically clean the first wafer and the second wafer with acetone and anhydrous ethanol respectively for 10 min, and then rinse them with deionized water for 10 min to remove organic matter on the surfaces of the first wafer and the second wafer. Then, immerse the first wafer and the second wafer from which the organic matter has been removed in a solution prepared by mixing hydrofluoric acid and water at a volume ratio of 1:10 for 60 s, rinse them with deionized water for 5 min, and then boil the first wafer and the second wafer in an SPM solution at 110℃ for 15 min. Then, rinse the first wafer and the second wafer with deionized water, and then immerse the first wafer and the second wafer in a mixed solution prepared by mixing hydrochloric acid, hydrogen peroxide, and water at a volume ratio of 1:1:5, and boil them at 90℃ for 10 min. Then, rinse them with deionized water to remove metal ions on the surfaces of the first wafer and the second wafer, and finally dry the first wafer and the second wafer with a nitrogen gun.
[0050] (2) Thermal oxidation treatment of the first wafer: perform thermal oxidation treatment on the first wafer in an oxidation furnace, and perform dry oxygen oxidation treatment on the first wafer at 1200℃ for 2 h to form a 350-nm-thick silicon dioxide layer on the surface of the first wafer.
[0051] (3) Depositing amorphous silicon on the surface of the first wafer: load the first wafer into the top wafer carrier of the bonder, and pump the cavity to 10 -5Pa, open FAB2, use Ar atom beam to bombard the second wafer, set the atom beam voltage to 1.8KV, set the atom beam current to 100mA, bombard for 10min, after the second wafer is bombarded by Ar atoms, monocrystalline silicon is sputtered to the surface of the first wafer to form an amorphous silicon layer with a thickness of 15nm;
[0052] (4) heat oxidation treatment of the second wafer: polish the surface of the second wafer by CMP grinding to make the surface roughness RMS 0.2nm, wash the second wafer with deionized water for 10min, then place it in an oxidation furnace for heat oxidation treatment, dry oxygen oxidation treatment at 1200℃ for 2h to form a 350nm-thick silicon dioxide layer on the surface of the second wafer;
[0053] (5) deposit amorphous silicon on the surface of the second wafer: load the second wafer into the bottom wafer carrier of the bonder, vacuum pump the cavity to 10 -5 Pa, open FAB1, make Ar atom beam bombard the first wafer, set the atom beam voltage to 1.8KV, set the atom beam current to 100mA, bombard for 2min, after the first wafer is bombarded by Ar atoms, amorphous silicon is sputtered to the surface of the second wafer to form an amorphous silicon material with a thickness of about 2nm;
[0054] (6) pre-bonding: load the first wafer and the second wafer into the bonder, align by optical mirror image, set the initial distance of the first wafer and the second wafer to 100um, apply a pressure of 1500N, load the pressure for 2h,
[0055] (7) low-temperature annealing: anneal the pre-bonded wafer material at 250℃ for 1h under inert gas protection to obtain.
[0056] Example 3
[0057] A low-temperature fusion bonding method of a MEMS-grade wafer, comprising the following steps:
[0058] (1) cleaning: the first wafer and the second wafer were cleaned by ultrasonic cleaning with acetone and anhydrous ethanol respectively for 7 min, and then rinsed with deionized water for 8 min to remove the organic matter on the surface of the first wafer and the second wafer; then the first wafer and the second wafer with the organic matter removed were immersed in a solution prepared by mixing hydrofluoric acid and water in a volume ratio of 1:10 for 50 s, rinsed with deionized water for 8 min, and then boiled in an SPM solution at 100℃ for 15 min, and then the first wafer and the second wafer were rinsed with deionized water, and then the first wafer and the second wafer were placed in a mixed solution prepared by mixing hydrochloric acid, hydrogen peroxide and water in a volume ratio of 1:1:5, and boiled at 80℃ for 15 min, and then rinsed with deionized water to remove the metal ions on the surface of the first wafer and the second wafer, and finally the first wafer and the second wafer were dried with a nitrogen gun;
[0059] (2) thermal oxidation treatment of the first wafer: the first wafer was placed in an oxidation furnace for thermal oxidation treatment, and dry oxygen oxidation treatment was carried out at 1100℃ for 2h to form a 300nm thick silicon dioxide layer on the surface of the first wafer;
[0060] (3) depositing amorphous silicon on the surface of the first wafer: the first wafer was loaded into the top wafer carrier of the bonder, the cavity was pumped to 10 -5 Pa by a vacuum pump, FAB2 was turned on, and the second wafer was bombarded with an Ar atom beam, the atom beam voltage was set to 1.8KV, the atom beam current was set to 100mA, and the bombardment time was 10min, the single crystal silicon was sputtered to the surface of the first wafer by the bombardment of the Ar atoms, and an amorphous silicon layer with a thickness of 13nm was formed;
[0061] (4) thermal oxidation treatment of the second wafer: the surface of the second wafer was polished by CMP grinding to have a surface roughness RMS of 0.1nm, and then rinsed with deionized water for 8 min, and then placed in an oxidation furnace for thermal oxidation treatment, and dry oxygen oxidation treatment was carried out at 1100℃ for 3h to form a 300nm thick silicon dioxide layer on the surface of the second wafer;
[0062] (5) depositing amorphous silicon on the surface of the second wafer: the second wafer was loaded into the bottom wafer carrier of the bonder, the cavity was pumped to 10 -5 Pa by a vacuum pump, FAB1 was turned on, and the first wafer was bombarded with an Ar atom beam, the atom beam voltage was set to 1.8KV, the atom beam current was set to 100mA, and the bombardment time was 2min, the amorphous silicon was sputtered to the surface of the second wafer by the bombardment of the Ar atoms, and an amorphous silicon material with a thickness of about 2nm was formed;
[0063] (6) Pre-bonding: load the first wafer and the second wafer into a bonding machine, align by optical mirror image, set the initial distance of the first wafer and the second wafer to 80 um, apply a pressure of 1300 N, load the pressure for 2 h,
[0064] (7) Low-temperature annealing: anneal the pre-bonded wafer material at 230℃ for 1.5 h under inert gas protection to obtain.
[0065] Comparative Example 1
[0066] A low-temperature fusion bonding method of a MEMS-grade wafer, comprising the following steps:
[0067] (1) Cleaning: ultrasonic cleaning of the first wafer and the second wafer with acetone and anhydrous ethanol for 7 min, respectively, and then rinsing with deionized water for 8 min to remove organic matter on the surface of the first wafer and the second wafer; then placing the first wafer and the second wafer from which the organic matter has been removed in a solution prepared by mixing hydrofluoric acid and water at a volume ratio of 1:10 for 50 s, rinsing with deionized water for 8 min, then boiling the first wafer and the second wafer in an SPM solution at 100℃ for 15 min, then rinsing the first wafer and the second wafer with deionized water, then placing the first wafer and the second wafer in a mixed solution prepared by mixing hydrochloric acid, hydrogen peroxide and water at a volume ratio of 1:1:5, boiling at 80℃ for 15 min, then rinsing with deionized water to remove metal ions on the surface of the first wafer and the second wafer, and finally blowing dry the first wafer and the second wafer with a nitrogen gun;
[0068] (2) Depositing silicon on the surface of the first wafer: loading the first wafer into the top wafer carrier of the bonding machine, vacuum pumping the inside of the cavity to 10 -5 Pa, turning on FAB2, using an Ar atomic beam to bombard the second wafer, setting the atomic beam voltage to 1.8 KV, setting the atomic beam current to 100 mA, and bombarding for 10 min, so that single-crystal silicon is sputtered onto the surface of the first wafer after the Ar atom bombards the second wafer;
[0069] (3) Depositing silicon on the surface of the second wafer: loading the second wafer into the bottom wafer carrier of the bonding machine, vacuum pumping the inside of the cavity to 10 -5 Pa, turning on FAB1, using an Ar atomic beam to bombard the first wafer, setting the atomic beam voltage to 1.8 KV, setting the atomic beam current to 100 mA, and bombarding for 2 min, so that single-crystal silicon is sputtered onto the surface of the second wafer after the Ar atom bombards the first wafer;
[0070] (6) Pre-bonding: load the first wafer and the second wafer into a bonding machine, align by optical mirror image, set the initial distance of the first wafer and the second wafer to 80 um, apply a pressure of 1300 N, load the pressure for 2 h,
[0071] (7) Low temperature annealing: the pre-bonded wafer material was annealed at 230°C for 1.5h under inert gas protection.
[0072] Test Example
[0073] The bonding strength of the wafer was determined by using a conventional crack method, and the specific operation was as follows: a blade with a thickness of 2h was inserted into the bonding interface to generate a crack with a length of c, the wafer thickness was d, the Young's modulus was E, an infrared source was used to emit infrared light on one side of the bonded wafer, and an infrared camera was used to observe the length of the crack in the bonding section on the other side, and the bonding surface energy was calculated by the formula, and the specific results are shown in Table 1.
[0074] Bonding surface energy W = 3Eh 2 d 3 / 16c 4
[0075] Table 1 Surface bonding energy
[0076] Surface bonding energy (J / m 2 ) Example 1 2.50 Example 2 2.50 Example 3 2.51 Comparative Example 1 /
[0077] From the data in the table, it can be seen that the wafer is bonded by the method in the present application, and the surface bonding energy of the bonded wafer is about 2.50J / m 2 , and the wafers have strong bonding energy. In Comparative Example 1, since no silicon dioxide is generated on the wafer surface as a substrate, the amorphous silicon layer cannot be formed in the subsequent atomic beam sputtering process, and the sputtered wafer is still single crystal silicon. Single crystal silicon does not have the strong activity of amorphous silicon, so it cannot complete the bonding process under the same conditions.
[0078] Figure 3 For the bonded wafer in Example 3, the bonding surface was observed by Figure 3 It can be seen that the bonded wafer gap is relatively flat and almost integrated, and no voids are generated between the gaps.
Claims
1. A method of low temperature fusion bonding of a MEMS grade wafer, characterized by, Includes the following steps: Amorphous silicon layers are deposited on the surfaces of two silicon wafers respectively. Then, the amorphous silicon layers of the two silicon wafers are brought into contact and pressure pre-bonding treatment is applied to the two silicon wafers. Finally, annealing is carried out at 200-250℃ under inert gas protection.
2. The method of low temperature fusion bonding of MEMS grade wafers of claim 1, wherein, The specific steps are as follows: (1) Cleaning: The first wafer and the second wafer are cleaned respectively to remove impurities from the surface; (2) Thermal oxidation treatment of the first and second wafers: The first and second wafers are placed in an oxidation furnace for thermal oxidation treatment, so that a silicon dioxide layer is formed on the surface of the first and second wafers respectively. (3) Depositing amorphous silicon on the surface of the first wafer and the second wafer: The first wafer and the second wafer are fixed respectively, and under vacuum conditions, the single crystal silicon material is bombarded with an inert gas atomic beam to sputter the single crystal silicon onto the surface of the first wafer and the second wafer, and an amorphous silicon layer is formed on the surface of the first wafer and the second wafer. (4) Pre-bonding: Align the amorphous silicon layers on the surfaces of the first wafer and the second wafer, set the initial distance between them to 50-100μm, and then apply a pressure of 1000-1500N to both for 1-3h. (5) Low-temperature annealing: The pre-bonded wafer material is annealed at 200-250℃ for 1-2 hours under inert gas protection to obtain the wafer.
3. The method of low temperature fusion bonding of MEMS grade wafers of claim 2, wherein, The specific steps are as follows: (1) Cleaning: The first wafer and the second wafer are cleaned respectively to remove impurities from the surface; (2) Thermal oxidation treatment of the first wafer: The first wafer is placed in an oxidation furnace for thermal oxidation treatment, so that a silicon dioxide layer is formed on the surface of the first wafer; (3) Depositing amorphous silicon on the surface of the first wafer: The first wafer is fixed and under vacuum conditions, an inert gas atomic beam is used to bombard the second wafer to sputter single crystal silicon onto the surface of the first wafer to form an amorphous silicon layer. (4) Thermal oxidation treatment of the second wafer: The surface of the second wafer is ground and polished to make its surface roughness RMS 0.1-0.2nm, the second wafer is rinsed with deionized water, and then placed in an oxidation furnace for thermal oxidation treatment to form a silicon dioxide layer on the surface of the second wafer. (5) Depositing amorphous silicon on the surface of the second wafer: Fix the second wafer and bombard the first wafer with an inert gas atomic beam under vacuum conditions to sputter single crystal silicon onto the surface of the second wafer to form an amorphous silicon layer. (6) Pre-bonding: Align the amorphous silicon layers on the surfaces of the first wafer and the second wafer, set the initial distance between them to 50-100μm, and then apply a pressure of 1000-1500N to both for 1-3h. (7) Low-temperature annealing: The pre-bonded wafer material is annealed at 200-250℃ for 1-2 hours under inert gas protection to obtain the wafer.
4. The method of cryogenic fusion bonding of MEMS grade wafers of claim 2 or 3, wherein, The cleaning operation in step (1) is used to remove organic matter, oxides and metal ions from the surfaces of the first and second wafers.
5. The method of low temperature fusion bonding of MEMS grade wafers of claim 4, wherein, The organic matter removal operation is as follows: the first wafer and the second wafer are respectively subjected to ultrasonic cleaning with acetone and anhydrous ethanol, and then are washed with deionized water to remove the organic matter on the surfaces of the first wafer and the second wafer; then the first wafer and the second wafer are immersed in a mixed solution prepared by hydrogen fluoride and water at a ratio of 1:10 to remove the oxide.
6. The method of low temperature fusion bonding of MEMS grade wafers of claim 4, wherein, The metal ion removal operation is as follows: the first wafer and the second wafer after removal of the organic matter are placed in an SPM solution, and are boiled at 90-110°C for 15-20 min, then the first wafer and the second wafer are washed with deionized water, then the first wafer and the second wafer are placed in a mixed solution prepared by hydrochloric acid, hydrogen peroxide and water at a volume ratio of 1:1:5, and are boiled at 70-90°C for 10-20 min, then the first wafer and the second wafer are washed with deionized water to remove the metal ions on the surfaces of the first wafer and the second wafer, and finally drying is performed.
7. The method of low temperature fusion bonding of MEMS grade wafers of claim 2 or 3, wherein, The first wafer and the second wafer are both subjected to dry oxygen oxidation treatment in an oxidation furnace at 1000-1200°C.
8. The method of low temperature fusion bonding of MEMS grade wafers of claim 2 or 3, wherein, The thickness of the silicon dioxide layer formed on the surface of the first wafer and the surface of the second wafer is 250-350 nm.
9. The method of cryogenic fusion bonding of MEMS grade wafers of claim 2 or 3, wherein, The thickness of the amorphous silicon layer on the surface of the first wafer is 10-15 nm, and the thickness of the amorphous silicon layer formed on the surface of the second wafer is 1-4 nm.
Citation Information
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