Memory fault processing method and device, equipment and storage medium

By using preset interrupt information and exception information tables, memory faults can be quickly identified, solving the problem of complex memory fault troubleshooting and achieving efficient fault analysis and processing.

CN115756923BActive Publication Date: 2025-12-05CHANGXIN MEMORY TECH INC
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Patent Information

Application Number
CN202211446148.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-18
Publication Date
2025-12-05
Estimated Expiration
2042-11-18

AI Technical Summary

Technical Problem

In existing technologies, the process of troubleshooting and address determination for memory faults is complex, leading to increased time costs. Furthermore, the differences between development boards and terminal devices make fault reproduction and analysis difficult.

Method used

By setting preset interrupt information, interrupt information is obtained to determine memory faults and abnormalities. The memory fault information is stored in a pre-established fault information table, and the fault information is queried and displayed using the flash memory chip, providing options for handling methods.

Benefits of technology

Quickly identify memory faults and anomalies, saving time and costs in troubleshooting and analysis, and providing convenient troubleshooting solutions.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides a memory fault processing method, device and equipment and storage medium. The memory fault processing method comprises: obtaining interrupt information, the interrupt information being used to represent that an abnormality occurs in the running process of the terminal device; when the interrupt information is preset interrupt information, determining that the abnormality is a memory fault abnormality; and storing memory fault information into a pre-established abnormality information table. The present disclosure sets a preset interrupt information representing a memory fault abnormality, compares the interrupt information obtained when the terminal device has an abnormality with the preset interrupt information, to quickly determine whether the abnormality type of the terminal device is a memory fault abnormality, thereby saving the time cost of abnormality troubleshooting; and stores the memory fault information corresponding to the memory fault abnormality into the pre-established abnormality information table, so as to facilitate the user to quickly determine the position of the memory fault abnormality by reading the abnormality information table, thereby saving the analysis time cost, and facilitating the user to timely process the memory fault abnormality.
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Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of semiconductor technology, and particularly relates to a memory fault processing method and device, equipment and a storage medium. BACKGROUND

[0002] RAM (Random Access Memory) may occur errors in the use process, causing the terminal device to appear abnormal or unable to work, and various other faults may also occur in the running process of the terminal device. Therefore, when the memory appears errors, the user needs to gradually check multiple aspects to determine that the fault is a memory fault abnormality, which increases the time cost.

[0003] In addition, after determining that the abnormality is a memory fault abnormality, the address of the memory fault needs to be further checked in order to process the memory that appears the fault. At present, the way to determine the memory fault address is usually to use the development board provided by the memory manufacturer for debugging analysis. However, the development board has certain differences with the terminal device, and part of the functions of the development board cannot be realized, which leads to difficulty in fault reproduction and analysis when checking the address of the memory fault, further increasing the time cost. SUMMARY

[0004] The following is an overview of the subject matter of the detailed description of the present disclosure. This overview is not intended to limit the protection scope of the claims.

[0005] The present disclosure provides a memory fault processing method, device, equipment and storage medium.

[0006] According to a first aspect of some embodiments of the present disclosure, a memory fault processing method is provided, applied to a terminal device, and the memory fault processing method comprises:

[0007] Obtaining interrupt information, the interrupt information being used to represent that an abnormality has occurred in the running process of the terminal device;

[0008] When the interrupt information is preset interrupt information, determining that the abnormality is a memory fault abnormality;

[0009] Storing memory fault information to a pre-established abnormality information table. The memory fault information is stored to the pre-established abnormality information table.

[0010] According to some embodiments of the present disclosure, storing the memory fault information to the pre-established abnormality information table comprises:

[0011] Storing memory abnormality information to an error register, the memory abnormality information being different from the data structure of the memory fault information;

[0012] reading the memory exception information and parsing the memory exception information based on configuration information of the terminal device to obtain the memory failure information;

[0013] querying the exception information table in the flash chip and storing the memory failure information in the exception information table.

[0014] According to some embodiments of the present disclosure, querying the exception information table in the flash chip comprises:

[0015] querying the exception information table in the flash chip based on pre-established index information.

[0016] According to some embodiments of the present disclosure, the error register stores exception information of all exceptions occurring during running of the terminal device, and reading the memory exception information comprises:

[0017] reading the memory exception information from the error register in a traversal manner.

[0018] According to some embodiments of the present disclosure, the memory failure information comprises a failure type and a failure address.

[0019] According to some embodiments of the present disclosure, the method further comprises:

[0020] when the terminal device is started, querying the exception information table;

[0021] when the memory failure information is stored in the exception information table, displaying the memory failure information in a preset manner.

[0022] According to some embodiments of the present disclosure, displaying the memory failure information in a preset manner comprises:

[0023] displaying the number of failures, the failure serial number of each memory failure, the failure type of each memory failure and the failure address of each memory failure in a table form.

[0024] According to some embodiments of the present disclosure, the method further comprises:

[0025] displaying prompt information, wherein the prompt information comprises at least one processing manner for the memory failure information;

[0026] based on the received selection instruction for the processing manner, continuing running in a running manner corresponding to the selection instruction.

[0027] According to some embodiments of the present disclosure, the method further comprises:

[0028] when the exception information table is not queried, creating the exception information table.

[0029] According to some embodiments of the present disclosure, the creating the exception information table comprises:

[0030] establishing a target storage volume in a memory of a flash chip;

[0031] establishing a target storage area in the target storage volume, and establishing index information among the memory, the target storage volume and the target storage area;

[0032] creating and storing the exception information table in the target storage area.

[0033] According to some embodiments of the present disclosure, the method further comprises:

[0034] configuring read attributes, write attributes and valid attributes of the target storage area.

[0035] According to some embodiments of the present disclosure, the method further comprises:

[0036] based on the received read instruction, reading the memory failure information stored in the exception information table; and / or,

[0037] when the terminal device is unable to start, reading the memory failure information stored in the exception information table and transmitting the memory failure information to a jig in electrical connection with the terminal device.

[0038] According to a second aspect of the embodiments of the present disclosure, a memory failure processing apparatus is provided, applied to a terminal device, and the memory failure processing apparatus comprises:

[0039] an acquisition module configured to acquire interruption information, the interruption information being used to represent that an exception occurs in a running process of the terminal device;

[0040] a determination module configured to, when the interruption information is preset interruption information, determine that the exception is a memory failure exception;

[0041] a storage module configured to store memory failure information to a pre-established exception information table.

[0042] According to a third aspect of the embodiments of the present disclosure, a terminal device is provided, and the terminal device comprises:

[0043] a processor;

[0044] a memory for storing processor-executable instructions;

[0045] wherein the processor is configured to execute the memory failure processing method according to the first aspect of the embodiments of the present disclosure.

[0046] According to a fourth aspect of the embodiments of the present disclosure, a non-transitory computer readable storage medium is provided, which, when instructions in the storage medium are executed by a processor of a terminal device, enables the terminal device to perform the processing method of memory failure according to the first aspect of the embodiments of the present disclosure.

[0047] In the processing method of memory failure, the device and the equipment, and the storage medium provided by the embodiments of the present disclosure, a preset interrupt information representing memory failure anomaly is set, when the terminal device appears abnormal, the interrupt information is obtained and compared with the preset interrupt information, so as to quickly determine whether the abnormal type of the terminal device is the memory failure anomaly, and save the time cost of abnormal troubleshooting; the memory failure information corresponding to the memory failure anomaly is stored in the pre-established abnormal information table, so as to determine the address of the memory failure anomaly by the user, save the analysis time cost, and facilitate the user to process the memory failure anomaly in time.

[0048] Other aspects can become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating the embodiments of the disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0049] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the embodiments of the present disclosure. In these drawings, like reference numerals are used to represent similar elements throughout. The accompanying drawings are of some embodiments of the present disclosure, but not all embodiments. Other drawings can be derived from these drawings by those skilled in the art without paying creative labor.

[0050] Figure 1 is a flowchart of a processing method of memory failure according to an exemplary embodiment.

[0051] Figure 2 is a flowchart of a processing method of memory failure according to an exemplary embodiment.

[0052] Figure 3 is a flowchart of a processing method of memory failure according to an exemplary embodiment.

[0053] Figure 4 is a schematic diagram of displaying memory failure information in a table according to an exemplary embodiment.

[0054] Figure 5 is a flowchart of a processing method of memory failure according to an exemplary embodiment.

[0055] Figure 6 is a flowchart of a processing method of memory failure according to an exemplary embodiment.

[0056] Figure 7is a structural block diagram of a memory fault processing apparatus according to an exemplary embodiment.

[0057] Figure 8 is a block diagram of a terminal device according to an exemplary embodiment. DETAILED DESCRIPTION

[0058] For the purpose, technical solutions and advantages of the embodiments of the present disclosure to be clearer, the technical solutions in the embodiments of the present disclosure will be described clearly and completely below with reference to the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present disclosure. It should be noted that the embodiments in the present disclosure and the features in the embodiments can be combined with each other in any manner without conflict.

[0059] Errors may occur in the memory during use or debugging, causing the terminal device to be abnormal or unable to work, and various other faults may occur in the terminal device during operation. Therefore, when an error occurs in the memory, the user needs to check multiple aspects step by step to determine that the fault is a memory fault abnormality, which increases the time cost.

[0060] In addition, after determining that the abnormality is a memory fault abnormality, the address of the memory fault needs to be further checked so as to process the memory that has the fault. In the related art, the way to determine the address of the memory fault is usually to use a development board provided by a memory manufacturer, connect the memory with the development board to perform debugging analysis. However, since the development board has certain differences from the terminal device, the result of the debugging analysis may have differences; at the same time, part of the functions of the development board cannot be realized by using the terminal device, which causes difficulty in fault reproduction and analysis when checking the address of the memory fault, further increasing the time cost.

[0061] Therefore, the present disclosure provides a memory fault processing method applied to a terminal device, which comprises the following steps: obtaining interrupt information, the interrupt information being used to represent that an abnormality occurs in the running process of the terminal device; when the interrupt information is preset interrupt information, determining that the abnormality is a memory fault abnormality; and storing memory fault information into a pre-established abnormality information table. The present disclosure sets a preset interrupt information representing a memory fault abnormality, compares the interrupt information obtained when the terminal device has an abnormality with the preset interrupt information, to quickly determine whether the type of the abnormality occurring in the terminal device is a memory fault abnormality, thereby saving the time cost of abnormality checking; stores the memory fault information corresponding to the memory fault abnormality into the pre-established abnormality information table, so as to enable the user to determine the address of the memory fault abnormality, save the analysis time cost, and enable the user to timely process the memory fault abnormality.

[0062] The present disclosure will be described below with reference to the accompanying drawings and specific embodiments. The exemplary embodiments of the present disclosure provide a memory failure processing method. The terminal device can be, for example but not limited to, a desktop computer, a notebook computer, a mobile phone, a tablet computer, and the like. Referring to Figure 1 Figure 1 is a flowchart of a memory failure processing method according to an exemplary embodiment. The memory failure processing method includes the following steps:

[0063] Step S100, obtaining interrupt information, the interrupt information being used to represent that an abnormality occurs in the running process of the terminal device;

[0064] Step S200, when the interrupt information is preset interrupt information, determining that the abnormality is a memory failure abnormality;

[0065] Step S300, storing the memory failure information into a pre-established abnormality information table.

[0066] In this embodiment, the memory can be RAM, including but not limited to DRAM (Dynamic RAM), SRAM (Static RAM), RDRAM (Rambus DRAM), SDRAM (Synchronous DRAM), and the like. The present disclosure does not limit this.

[0067] In step S100, in the running process of the terminal device, when the terminal device executes a regular program or function, various abnormalities can occur in the terminal device. The abnormality of the terminal device can include, for example, reset, instruction fetching abnormality, data abnormality, service reporting interruption, memory failure abnormality, and the like. When an abnormality occurs in the terminal device, interrupt information is transmitted to the CPU (Central Processing Unit) or SOC (System on Chip) of the terminal device, so that the CPU or SOC of the terminal device obtains the interrupt information and processes the abnormality according to an interrupt processing program. The interrupt information can be information that breaks the current execution of the regular function of the terminal device. The interrupt information can include, for example, a string of codes or the running information of a certain program or certain programs, to represent that an abnormality occurs in the terminal device.

[0068] ​The preset interrupt information can be specific interrupt information preset by the technician in the CPU or the SOC of the terminal device, or can be a specific interrupt program set by the technician for the CPU or the SOC, for example, can include SMI (System Management Interrupt, system management interrupt). The preset interrupt information is used to represent that a memory failure exception occurs in the terminal device. The memory failure exception is an exception caused by a failure in the RAM, for example, can include an exception caused by a failure of a storage unit in the RAM, can also include an exception caused by a failure of a word line in the RAM, can also include an exception caused by a failure of a memory bank, and the like. When the obtained interrupt information is the preset interrupt information, it can be determined that the current exception of the terminal device is caused by a memory failure, so that the memory failure exception of the terminal device can be quickly determined, thereby saving the time cost of the user in troubleshooting the exception type. Illustratively, when the obtained interrupt information is not the preset interrupt information, it indicates that the current exception of the terminal device is not related to the memory failure, and at this time, a repair operation process related to other exceptions is performed.

[0069] In step S300, the exception information table can be a table established by the technician in advance, which is used only to store memory failure information corresponding to the memory failure exception. When it is determined that the exception of the terminal device is a memory failure exception, the memory failure information corresponding to the memory failure exception can be stored in the error register, and then the memory failure information is stored in the exception information table established in advance. The memory failure information corresponding to the memory failure exception can also be directly stored in the exception information table established in advance. The exception information table can be set in a non-volatile memory, for example, can be set in a flash memory chip or a ROM (Read Only Memory, read only memory), so that the user can read the flash memory chip to conveniently and quickly obtain the memory failure information corresponding to the memory failure exception, thereby facilitating the timely processing of the memory failure exception and saving the time cost of analyzing the memory failure exception.

[0070] Exemplarily, the memory fault information is information describing details of the memory fault exception, and can include, for example, a fault type and a fault address of the memory fault. The fault type can include a correctable error (CE) and an uncorrectable error (UCE). It should be noted that, since the correctable error can be repaired by the CPU after obtaining the interrupt information, the correctable error here refers to a correctable error that has been repaired, and the uncorrectable error refers to an error that cannot be repaired by the repair program. The fault address is an address of the memory where the fault occurs, and the fault address includes, but is not limited to, the following types of addresses: socket (slot), channel (channel), channel (memory bank), rank (memory block), chip (memory particle), bank (storage array), row (row), and column (column).

[0071] In the above embodiment, the socket is a CPU slot, and can describe which CPU of the terminal device the faulty memory is located on. When the terminal device accesses the memory, the memory controller (Memory Controller) in the CPU selects the channel, dimm, rank, chip, bank, row, and column in sequence to finally locate a certain memory cell on a certain memory. In some embodiments, when the fault address only includes the socket, it indicates that the memory on the CPU corresponding to the socket is damaged. In other embodiments, when the fault address includes the socket, channel, and dimm, it indicates that a certain memory bank accessed through the channel corresponding to the channel in the CPU corresponding to the socket is damaged. It should be noted that, the more address types included in the fault address, the more detailed the fault address corresponding to the memory fault exception, and the smaller the influence range of the memory fault exception.

[0072] In one exemplary embodiment, referring to FIG. 3, the method includes the following steps. Figure 2 In step S300, the memory fault information is stored in the pre-established exception information table, including:

[0073] In step S310, the memory exception information is stored in the error register, and the data structure of the memory exception information is different from that of the memory fault information.

[0074] In step S320, the memory exception information is read and analyzed based on the configuration information of the terminal device to obtain the memory fault information.

[0075] Step S330, querying the exception information table in the flash chip, and storing the memory failure information in the exception information table.

[0076] In step S310, when the terminal device has a memory failure exception, the CPU or SOC of the terminal device obtains the preset interrupt information, and generates memory exception information corresponding to the memory failure exception, and stores the memory exception information in the error register in the CPU or the SOC register. The memory exception information can be a string of characters or codes to record the memory failure exception, for example, it can be a system address such as 0x1234567. Therefore, the data structure of the memory exception information is different from that of the memory failure information. Illustratively, the way in which the memory exception information records the memory failure exception can be determined based on the configuration of the CPU in the current terminal device.

[0077] In step S320, since the way in which the memory exception information records the memory failure exception is determined based on the configuration information of the CPU in the current terminal device, the configuration information of the CPU in the terminal device is a code set by the CPU manufacturer according to the characteristics of the CPU, and the configuration information is set in the CPU when the CPU is shipped. That is, when the CPU generates the memory exception information, it is generated based on the rules set in the configuration information. Therefore, when obtaining the memory failure information describing the detailed content of the memory failure exception, the memory exception information is read from the error register, and the configuration information set in the CPU of the terminal device is further obtained, and the memory exception information is analyzed based on the configuration information to obtain the memory failure information.

[0078] In some possible embodiments, the error register stores exception information of all exceptions occurring in the running process of the terminal device, and in step S320, the memory exception information is read, including:

[0079] The memory exception information is read from the error register by traversal.

[0080] In this embodiment, when various exceptions occur in the running process of the terminal device, the CPU or SOC of the terminal device generates exception information corresponding to the exception when obtaining the interrupt information, and stores the exception information in the error register in the CPU or the SOC register. Therefore, when reading the memory exception information, all the exception information in the error register needs to be traversed to read the memory exception information from the error register.

[0081] In step S330, the flash memory chip is characterized in that the data can be stored after power-off. The flash memory chip can include NOR flash memory and NAND flash memory. The abnormal information table is set in the flash memory chip, so as to ensure the preservation of the memory fault information. When the memory fault information is stored, the pre-set abnormal information table in the flash memory chip is inquired, and the parsed memory fault information is stored in the abnormal information table. For example, the correspondence between the fault type and the fault address in the memory fault information can be set in the abnormal information table, so as to facilitate the user's query and processing.

[0082] In some embodiments, after the memory fault information is parsed from the memory exception information in the error register and stored in the abnormal information table, the memory exception information in the error register can be cleared. So that when a new memory fault exception occurs in the terminal device, the memory exception information corresponding to the newly occurring memory fault exception is stored in the error register and parsed, so as to avoid the memory fault information corresponding to the same or several same memory fault exceptions being repeatedly stored in the abnormal information table.

[0083] In some possible implementations, in step S330, the abnormal information table in the flash memory chip is inquired, including:

[0084] Based on the pre-established index information, the abnormal information table in the flash memory chip is inquired.

[0085] In this embodiment, since the system firmware of the terminal device for initializing the system mainboard and loading the operating system is stored in the flash memory chip, the abnormal information table is set in the idle area of the flash memory chip except for setting the system firmware. The index information is pre-established when the abnormal information table is set in the flash memory chip and is set in the terminal device. The index information can include the path information when the abnormal information table in the flash memory chip is inquired, that is, the position information of the abnormal information table in the flash memory chip. After the memory fault information is obtained, the CPU of the terminal device obtains the pre-established index information, inquires the pre-set abnormal information table in the flash memory chip according to the position of the abnormal information table in the flash memory chip indicated in the index information, and stores the memory fault information in the abnormal information table.

[0086] In one exemplary embodiment, referring to Figure 3 As shown in the figure, the memory fault processing method further includes the following steps:

[0087] Step S400, when the terminal device is started, the abnormal information table is inquired;

[0088] Step S500, when the memory fault information is stored in the abnormal information table, the memory fault information is displayed in a preset manner.

[0089] In step S400, the start of the terminal device can be the first start, or the start after the terminal device is normally shut down after the last use, or the restart due to the abnormality of the terminal device in the last use. In the start process of the terminal device, the abnormality information table in the flash memory chip is queried based on the pre-established index information, so as to read the memory fault information stored in the abnormality information table.

[0090] In step S500, when it is found that the memory fault information is stored in the abnormality information table, it indicates that the memory fault abnormality occurs in the process of the last use of the terminal device. At this time, the terminal device suspends the start, and displays the memory fault information on the display screen of the terminal device in a preset manner. The preset manner is a manner pre-set in the terminal device by the technical personnel to ensure that the user can clearly understand the memory fault information, for example, the memory fault information can be displayed in a sequence, or in a chart in the abnormality information table, or in a pop-up box or a serial port log, etc. In this way, the user can quickly determine the fault abnormality of the memory in the process of the last use of the terminal device through the displayed memory fault information, so that the user can timely and specifically process the memory with the fault abnormality.

[0091] In some embodiments, the abnormality information table can always store the memory fault information of the terminal device. The memory fault information stored in the abnormality information table can be saved and distinguished according to the use times of the terminal device, or can be saved and distinguished according to whether the user processes the memory fault abnormality. When the memory fault information is saved and distinguished according to the use times of the terminal device, for example, the terminal device is started for the fourth time, the abnormality information table can store the memory fault information of the terminal device in the previous three running processes. At this time, the displayed memory fault information is the memory fault information in the third running process of the terminal device. When the memory fault information is saved and distinguished according to whether the user processes the memory fault abnormality, the displayed memory fault information can be the memory fault information ignored and not processed by the user before the current start of the terminal device, so as to remind the user to process it.

[0092] In some embodiments, when the abnormality information table does not store the memory fault information, it indicates that no memory fault abnormality occurs in the terminal device, or the memory fault abnormality occurred before has been processed, and the user has cleared the memory fault information. At this time, the terminal device continues to start and normally runs.

[0093] In some possible implementation manners, in step S500, the memory fault information is displayed in a preset manner, including:

[0094] The fault number and the fault serial number of each memory fault, and the fault type and the fault address of each memory fault are displayed in a table form.

[0095] In this embodiment, the memory fault information is displayed in the form of a table, so that the user can clearly obtain the information. The fault number can be the total number of memory fault exceptions that occurred during the last use of the terminal device, or the total number of memory fault exceptions that were not processed by the terminal device. Each memory fault is displayed in the form of a fault serial number, and the fault type and fault address of the memory fault are displayed in the table corresponding to the fault serial number, so that the user can clearly obtain the type and address of each memory fault, and the user can conveniently process the memory fault.

[0096] The following will be described in conjunction with Figure 4 , and Figure 4 is a schematic diagram of displaying memory fault information in the form of a table according to an example embodiment. Figure 4 In this embodiment, the fault number is 3, that is, the total number of memory fault exceptions is 3. The fault type of the memory fault with the serial number 0 is CE, that is, a repairable and repaired fault. In the address of the memory fault, Socket=00 indicates that the memory fault is located in the first CPU, Channel=01 indicates that the memory fault is located in the second channel, Dimm=01 indicates that the memory fault is located in the second memory bank, Rank=00 indicates that the memory fault is located in the first memory block, Chip=01 indicates that the memory fault is located in the second memory particle, Bank=02 indicates that the memory fault is located in the third storage array, Row=0040 indicates that the memory fault is located in the 41st row, and Column=0030 indicates that the memory fault is located in the 31st column. That is, for the memory fault with the serial number 0, the fault type is CE, and the fault address is located in the second memory bank of the second channel in the first CPU. The specific address is the storage unit at the 41st row and the 31st column of the third storage array on the second memory particle on the first memory block in the memory bank.

[0097] In addition, the fault types of the memory faults with the serial numbers 1 and 2 are UCE, that is, faults that cannot be repaired by the repair program of the terminal device. The fault address of the memory fault with the serial number 1 is located in the first memory bank of the second channel in the third CPU. The specific address is the storage unit at the 54th row and the 65th column of the first storage array on the second memory particle on the third memory block in the memory bank. The fault address of the memory fault with the serial number 2 is located in the third memory bank of the first channel in the first CPU. The specific address is the storage unit at the 184th row and the 13th column of the fourth storage array on the fifth memory particle on the second memory block in the memory bank.

[0098] In one example embodiment, reference is made to Figure 5As shown, the method for processing the memory fault further includes the following steps:

[0099] In step S600, prompt information is displayed, and the prompt information includes at least one processing mode for the memory fault information.

[0100] In step S700, based on the received selection instruction for the processing mode, the terminal device continues to run in a running mode corresponding to the selection instruction.

[0101] When the display screen of the terminal device displays the memory fault information, the display screen continues to display prompt information, and the prompt information is used to provide a user with a processing mode for processing the memory fault information. The processing mode can be one or multiple. The processing mode for processing the memory fault information can include, for example, a "continue" mode, a "shutdown" mode, a "clear" mode, and the like. According to the processing mode displayed by the display screen, the user can select a processing mode according to needs. At this time, the user interacts with the terminal device and issues a selection instruction corresponding to the processing mode. The terminal device can continue to run in a running mode corresponding to the selection instruction based on the received selection instruction of the user for the processing mode.

[0102] In some embodiments, when the user selects the "continue" mode, it can mean that the user chooses to ignore the memory fault information and does not process the memory fault exception corresponding to the memory fault information. Alternatively, it can mean that all the displayed memory fault information is a repairable fault that has been repaired and does not need to be processed by the user. At this time, the terminal device closes the displayed memory fault information based on the received selection instruction for the "continue" mode, and the terminal device continues to start or continue to run. In other embodiments, when the user selects the "shutdown" mode, it means that the user chooses not to continue to run the terminal device and needs to shut down the terminal device. At this time, the terminal device shuts down based on the received selection instruction for the "shutdown" mode. Illustratively, after the user shuts down, the user can replace or repair the corresponding memory based on the displayed memory fault information, for example, disassembling and replacing the memory module that causes the memory fault exception, or disassembling and repairing the memory module and then installing it, and the like. In other embodiments, when the user selects the "clear" mode, it means that the user chooses to clear the memory fault information stored in the exception information table. At this time, the terminal device clears the memory fault information stored in the exception information table based on the received selection instruction for the "clear" mode.

[0103] In one exemplary embodiment, the method for processing the memory fault further includes the following steps:

[0104] In step S410, when the exception information table is not queried, the exception information table is created.

[0105] In the embodiment, when the terminal device starts and no abnormal information table is found, for example, when the terminal device starts for the first time, the abnormal information table is created, for example, the abnormal information table can be created in the flash memory chip, so that when a memory failure abnormality occurs in the terminal device, the memory failure information corresponding to the memory failure abnormality is stored. In order to display the memory failure information on the display screen of the terminal device when the terminal device starts next time.

[0106] In some possible embodiments, in step S410, the abnormal information table is created, including:

[0107] In step S411, a target storage volume is established in the memory of the flash memory chip.

[0108] In step S412, a target storage area is established in the target storage volume, and index information is established between the memory, the target storage volume and the target storage area.

[0109] In step S413, the abnormal information table is created and stored in the target storage area.

[0110] In the embodiment, since the system firmware of the terminal device for initializing the system mainboard and loading the operating system is stored in the flash memory chip, the target storage volume is established in the memory of the flash memory chip, which can be established in the free area of the firmware device of the system firmware in the flash memory chip. The target storage volume can be a firmware volume. The target storage volume is used to store various data which needs to be non-volatile. The target storage volume can be named to distinguish it from other system firmware, and GUID (Globally Unique Identifier) is set for the target storage volume to distinguish different target storage areas. The GUID can be a binary number identifier with a length of 128 bits generated by an algorithm.

[0111] The target storage area, for example, can be a firmware section, and is used to store certain actual data. For example, an exception information table can be created and stored in a target storage area. The target storage area can be named to distinguish the stored data content, and the differently named target storage areas can be set with GUID codes. The name can be any character or string, for example, the target storage area for storing the exception information table is named "DIMMINFO". Index information is established between the memory, the target storage volume, and the target storage area, for example, for the target storage area for storing the exception information table, the index information can be firmware device => target storage volume specific GUID code => target storage area specific GUID code. When it is necessary to query the exception information table or the memory failure information, the firmware device is queried in the memory of the flash memory chip, the target storage volume specific GUID code is queried in the firmware device to locate the target storage volume, and the target storage area specific GUID code is queried in the target storage volume to access the exception information table.

[0112] In some possible embodiments, the method for processing memory failure further includes:

[0113] In step S4121, the read attribute, the write attribute, and the valid attribute of the target storage area are configured.

[0114] When the target storage area is established, the read attribute of the target storage area is configured to facilitate the terminal device to read the exception information table in the target storage area. The write attribute of the target storage area is configured to facilitate the terminal device to store the memory failure information corresponding to the memory failure exception in the exception information table in the target storage area. The valid attribute of the target storage area is configured to avoid erroneous access to the target storage area when the terminal device runs the system firmware, to avoid affecting the running of the system firmware, and to avoid erroneous reading or modification of the memory failure information.

[0115] For example, when the target storage area is established, the storage space of the target storage area can be calculated to determine the space occupied by the memory failure information in the exception information table. For example, in the target storage area, "DRAMINFO" is the keyword to determine that this information is the memory failure information, and the keyword occupies 8 bytes; the number of failures, the failure serial number, the failure type, the socket, the channel, the dimm, the rank, the chip, and the bank each occupy 1 byte, and the row and the column each occupy 2 bytes.

[0116] In some possible embodiments, the method for processing memory failure further includes:

[0117] Step S510, reading the memory fault information stored in the abnormal information table based on the received read instruction.

[0118] In the embodiment, when the terminal device is started, or when the user needs to read the memory fault information, the terminal device queries the abnormal information table according to the index information based on the received read instruction, and reads the memory fault information stored in the abnormal information table to determine the fault address of the memory fault abnormality.

[0119] In some possible implementation manners, the method for processing the memory fault further includes:

[0120] Step S520, when the terminal device cannot be started, reading the memory fault information stored in the abnormal information table and transmitting the memory fault information to a jig in electrical connection with the terminal device.

[0121] In the embodiment, when the terminal device cannot be started due to the abnormality, the abnormal information table is arranged in the flash memory chip, the terminal device can be electrically connected with the jig, the abnormal information table in the flash memory chip is dumped in the jig by operating the jig, for example, by using an external jig to program the flash memory chip, and the memory fault information stored in the abnormal information table is read by reading the jig, so that the address of the memory fault abnormality can be quickly obtained when the terminal device cannot be started, and the memory can be repaired or replaced by the user.

[0122] In some possible implementation manners, the method for processing the memory fault further includes:

[0123] Step S510, reading the memory fault information stored in the abnormal information table based on the received read instruction.

[0124] Step S520, when the terminal device cannot be started, reading the memory fault information stored in the abnormal information table and transmitting the memory fault information to a jig in electrical connection with the terminal device.

[0125] In the embodiment, the specific implementation manners of step S510 and step S520 are similar to those described in the above embodiment, and the difference is that the read instruction received by the terminal device can be issued by the jig in electrical connection with the terminal device. Based on the received read instruction issued by the jig, the memory fault information stored in the abnormal information table is read first, the memory fault information stored in the abnormal information table is dumped in the jig, and the jig is read, so that the address of the memory fault abnormality can be quickly obtained when the terminal device cannot be started.

[0126] The overall working process of the technical solution of the present disclosure will be described below. Referring to Figure 6 , it is shown that Figure 6A flowchart of a memory fault processing method provided for an exemplary embodiment of the present disclosure is shown.

[0127] S1, the terminal device is started, and an abnormal information table is queried.

[0128] S2, it is determined whether the abnormal information table is queried.

[0129] If yes, it indicates that the abnormal information table has been set in the terminal device, and S4 is executed; if no, S3 is executed.

[0130] S3, the abnormal information table is created.

[0131] S4, it is checked whether the memory fault information is stored in the abnormal information table.

[0132] If yes, S11 is executed; if no, it indicates that the memory fault abnormality does not occur in the terminal device before, and S5 is executed.

[0133] S5, the terminal device continues to start.

[0134] S6, when the abnormality occurs in the running process of the terminal device, the interrupt information is acquired.

[0135] S7, it is determined whether the interrupt information is preset interrupt information.

[0136] If yes, S8 is executed; if no, it indicates that the abnormality is other abnormality except the memory fault abnormality, and S10 is executed.

[0137] S8, it is determined that the abnormality is the memory fault abnormality.

[0138] S9, the memory fault information is stored in the abnormal information table established in advance.

[0139] S10, other abnormality processing method is executed.

[0140] S11, the memory fault information is displayed in a preset manner.

[0141] S12, prompt information is displayed, and the prompt information contains at least one processing method for the memory fault information.

[0142] S13, based on the received selection instruction for the processing method, the terminal device continues to run in a running mode corresponding to the selection instruction.

[0143] The present disclosure exemplarily provides a memory fault processing device applied to a terminal device, and the memory fault processing device is configured to be able to execute the memory fault processing method in the above-mentioned embodiments of the present disclosure. Figure 7 The memory fault processing device is shown in Figure 7 is a structural block diagram of the memory fault processing device, and the memory fault processing device is configured to be able to execute the memory fault processing method in the above-mentioned embodiments of the present disclosure, and the memory fault processing device comprises:

[0144] The acquisition module 100 is configured to acquire the interrupt information, the interrupt information being used to represent that an abnormality occurs in the running process of the terminal device;

[0145] The determination module 200 is configured to determine that the abnormality is a memory failure abnormality when the interrupt information is preset interrupt information.

[0146] The storage module 300 is configured to store the memory failure information into a pre-established abnormality information table.

[0147] As to the processing apparatus of the memory failure in the above embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment of the method, and will not be described in detail here.

[0148] Figure 8 is a block diagram of a terminal device, i.e., a terminal device 800, according to an example embodiment. The terminal device 800 can be provided as a computer, a notebook computer, etc. Referring to Figure 8 , the terminal device 800 includes a processor 801, the number of which can be set to one or more as needed. The terminal device 800 further includes a memory 802 for storing instructions, such as an application program, executable by the processor 801. The number of the memory 802 can be set to one or more as needed. The application program stored therein can be one or more. The processor 801 is configured to execute the instructions to perform the processing method of the memory failure described above.

[0149] Those skilled in the art will understand that the embodiments of the disclosure can be provided as a method, apparatus (device), or computer program product. Therefore, the disclosure can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the disclosure can take the form of a computer program product implemented on one or more computer-usable storage media having computer-usable program code embodied in the medium. The computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information such as computer readable instructions, data structures, program modules or other data, including but not limited to RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer, etc. In addition, it is well known to those skilled in the art that communication media generally includes computer readable instructions, data structures, program modules or other data in modulated data signals such as carrier waves or other transmission mechanisms, and can include any information delivery medium.

[0150] In an example embodiment, a non-transitory computer-readable storage medium is provided, for example, a memory 802 including instructions executable by the processor 801 of the terminal device 800 to perform the above-described method for processing memory failure. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disc, and an optical data storage device, etc.

[0151] In an example embodiment of the present disclosure, a non-transitory computer-readable storage medium is provided, which can be arranged in a terminal device, so that the terminal device can perform the method for processing memory failure provided by the example embodiment of the present disclosure.

[0152] The present disclosure is described with reference to the flowcharts and / or block diagrams of the methods, apparatus (devices) and computer program products according to the embodiments of the present disclosure. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to produce a machine, so that the instructions executed by the computer or other programmable data processing devices generate a device that implements the flow Figure 1 The function of one flow or multiple flows and / or blocks Figure 1 The function of one block or multiple blocks.

[0153] These computer program instructions can also be stored in a computer-readable memory that can direct the computer or other programmable data processing devices to work in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including instruction devices that implement the flow Figure 1 The function of one flow or multiple flows and / or blocks Figure 1 The function of one block or multiple blocks.

[0154] These computer program instructions can also be loaded into a computer or other programmable data processing device, so that a series of operation steps are performed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide a process for implementing the flow Figure 1 The function of one flow or multiple flows and / or blocks Figure 1 Figure 1 The function of one block or multiple blocks.

[0155] In this disclosure, the terms "including", "containing" or any other similar forms are intended to cover non-exclusive inclusions, so that the articles or devices including a series of elements not only include those elements, but also include other elements not explicitly listed, or include elements inherent to such articles or devices. Without more limitations, the elements defined by the statement "including" do not exclude the presence of additional identical elements in the articles or devices including the elements.

[0156] Although preferred embodiments of the present disclosure have been described, those skilled in the art who have the benefit of the present disclosure can make additional changes and modifications to the embodiments once the basic inventive concept is known. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present disclosure.

[0157] Obviously, those skilled in the art can make various modifications and variations to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalent technologies, the present disclosure is intended to include these modifications and variations.

Claims

1.A memory fault processing method applied to a terminal device, the method comprising: obtaining interrupt information, wherein the interrupt information is used to represent that an abnormality occurs in the terminal device during operation; determining that the abnormality is a memory fault abnormality when the interrupt information is preset interrupt information; and storing memory fault information in a pre-established abnormality information table. 2.The memory fault processing method of claim 1, wherein the step of storing the memory fault information in the pre-established abnormality information table comprises: storing memory abnormality information in an error register, wherein the memory abnormality information is different from the data structure of the memory fault information; reading the memory abnormality information and analyzing the memory abnormality information based on configuration information of the terminal device to obtain the memory fault information; and querying the abnormality information table in a flash chip and storing the memory fault information in the abnormality information table. 3.The memory fault processing method of claim 2, wherein the step of querying the abnormality information table in the flash chip comprises: querying the abnormality information table in the flash chip based on pre-established index information. 4.The memory fault processing method of claim 2, wherein the error register stores abnormality information of all abnormalities occurring in the terminal device during operation, and the step of reading the memory abnormality information comprises: reading the memory abnormality information from the error register by traversal. 5.The memory fault processing method of claim 1, wherein the method further comprises: querying the abnormality information table when the terminal device is started; and displaying the memory fault information in a preset manner when the memory fault information is stored in the abnormality information table. 6.The memory fault processing method of claim 5, wherein the step of displaying the memory fault information in the preset manner comprises: displaying the number of faults, the fault serial number of each memory fault, the fault type of each memory fault and the fault address of each memory fault in a table form. 7.The memory fault processing method of claim 5, wherein the method further comprises: displaying prompt information, wherein the prompt information contains at least one processing manner for the memory fault information; and continuing to operate in a running manner corresponding to a selection instruction for the processing manner based on the received selection instruction. 8.The memory fault processing method of claim 5, wherein the method further comprises: creating the abnormality information table when the abnormality information table is not queried. 9.The memory fault processing method of claim 8, wherein the step of creating the abnormality information table comprises: establishing a target storage volume in a memory of a flash chip; establishing a target storage area in the target storage volume and establishing index information among the memory, the target storage volume and the target storage area. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ create and store the exception information table in the target storage area. 10.The memory fault processing method of claim 9, wherein the method further comprises: configuring read attributes, write attributes, and valid attributes of the target storage area. 11.The memory fault processing method of claim 5, wherein the method further comprises: reading the memory fault information stored in the exception information table based on a received read instruction; and / or when the terminal device is unable to start, reading the memory fault information stored in the exception information table and transmitting the memory fault information to a jig in electrical connection with the terminal device. 12.A memory fault processing apparatus applied to a terminal device, comprising: an obtaining module configured to obtain interruption information, the interruption information being used to represent that an exception has occurred during operation of the terminal device; a determining module configured to, when the interruption information is preset interruption information, determine that the exception is a memory fault exception; a storage module configured to store memory fault information to a pre-established exception information table; wherein the preset interruption information refers to information representing a memory fault exception that is pre-set; and the memory fault information includes a fault type and a fault address. 13.A terminal device, comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to execute the memory fault processing method of any one of claims 1 to 11. 14.A non-transitory computer-readable storage medium, comprising: when instructions in the storage medium are executed by a processor of a terminal device, the terminal device is enabled to execute the memory fault processing method of any one of claims 1 to 11. ​ ​ ​ ​

Citation Information

Patent Citations

  • Restarting fault location method, mobile terminal and readable storage medium of computer

    CN108052412A

  • Quick vulnerability positioning method, electronic device and storage medium

    CN110866258A