Simulator generation method, apparatus, device, and storage medium

Abstract

The application provides a simulator generation method and device, equipment and storage medium, and belongs to the technical field of software simulation. The method comprises the following steps: obtaining keyword information generated by an initial simulator in a simulation processing process, wherein the keyword information comprises: a cycle number of the initial simulator; determining a target simulator based on the keyword information, and adjusting a simulation file of a target hardware processor corresponding to the target simulator; inputting a target instruction program into the target simulator and the target hardware processor respectively for execution, obtaining a simulator log file and a processor log file, and determining a simulator error according to the simulator log file and the processor log file; and iteratively correcting the target simulator according to the simulator error, to obtain a usable simulator. The application can realize the accuracy of a simulation cycle of the simulator in a simulation process.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of software simulation, in particular to a simulator generation method and device, equipment and storage medium. BACKGROUND

[0002] Due to the constraints of actual hardware structure, in the process of implementing a program, a software structure such as a simulator is usually used to simulate the functions of a hardware processor, for example, the complete execution timing and key events of the hardware processor can be simulated.

[0003] In the prior art, a verification simulator is usually designed based on the verification of the function results of a hardware processor, for example, whether the results of executing a program by the simulator are the same as the results of executing the program by the hardware processor.

[0004] However, in actual implementation, the cycles of the simulator and the hardware processor cannot be one-to-one corresponding, which leads to low accuracy of the simulation results of the simulator in the simulation process involving cycles. SUMMARY

[0005] The present application aims to provide a simulator generation method, device, equipment and storage medium, which can realize the accuracy of the simulation cycles of the simulator in the simulation process.

[0006] Embodiments of the present application are implemented as follows:

[0007] In an aspect of the present application, a simulator generation method is provided, comprising:

[0008] Obtaining key information generated by an initial simulator in a simulation process, the key information comprising: the number of cycles of the initial simulator;

[0009] Determining a target simulator based on the key information, and adjusting the simulation file of a target hardware processor corresponding to the target simulator;

[0010] Inputting a target instruction program into the target simulator and the target hardware processor respectively for execution, obtaining a simulator log file and a processor log file, and determining a simulator error according to the simulator log file and the processor log file;

[0011] According to the simulator error, iteratively correcting the target simulator to obtain a usable simulator.

[0012] Optionally, determining the target simulator based on the key information, and adjusting the simulation file of the target hardware processor corresponding to the target simulator, comprises:

[0013] Adjusting the initial simulator based on the key information to obtain the target simulator;

[0014] adjust the simulation file based on the keyword information and the pre-extracted hardware processing signal.

[0015] Optionally, the adjusting the initial simulator based on the keyword information to obtain the target simulator comprises:

[0016] adding the keyword information in the form of a macro to the source program of the initial simulator to obtain a new source program;

[0017] compiling the new source program to obtain the target simulator.

[0018] Optionally, the adjusting the simulation file based on the keyword information and the pre-extracted hardware processing signal comprises:

[0019] matching the pre-extracted hardware processing signal with the keyword information to obtain a target matching result;

[0020] adding the target matching result to the current simulation file in the hardware processor to obtain an adjusted simulation file.

[0021] Optionally, the executing the target instruction program in the target simulator and the target hardware processor respectively to obtain the simulator log file and the processor log file comprises:

[0022] controlling the sleep timing of the target simulator by a target comparison program to keep the target simulator and the target hardware processor in synchronous execution, wherein the target comparison program is constructed based on the keyword information;

[0023] executing the target instruction program in the synchronized target simulator and the target hardware processor respectively to obtain the simulator log file and the processor log file.

[0024] Optionally, the determining the simulator error according to the simulator log file and the processor log file comprises:

[0025] determining the simulator error by real-time comparison of the simulator log file and the processor log file by the target comparison program.

[0026] Optionally, the determining the simulator error by real-time comparison of the simulator log file and the processor log file by the target comparison program comprises:

[0027] running the target comparison program, if the target comparison program identifies that there is error information in the simulator log file, stopping the comparison and determining the error position, storing the error position and data information of the position related to the error position;

[0028] determining the simulator error according to the error position and the data information of the position related to the error position.

[0029] Optionally, the keyword information generated by the initial simulator in the simulation process is acquired, including:

[0030] The initial keyword is determined based on the original keyword generated by the initial simulator in the simulation process.

[0031] The multi-level keyword is determined based on the category of the initial keyword.

[0032] The initial keyword and the multi-level keyword are taken as the keyword information.

[0033] In another aspect of the embodiment of the application, a simulator generation device is provided, including an acquisition module, a determination module, a comparison module and a correction module.

[0034] The acquisition module is configured to acquire keyword information generated by an initial simulator in a simulation process, the keyword information including the number of cycles of the initial simulator.

[0035] The determination module is configured to determine a target simulator based on the keyword information and adjust a simulation file of a target hardware processor corresponding to the target simulator.

[0036] The comparison module is configured to input a target instruction program into the target simulator and the target hardware processor respectively to execute, to obtain a simulator log file and a processor log file, and to determine a simulator error based on the simulator log file and the processor log file.

[0037] The correction module is configured to correct the target simulator iteratively based on the simulator error to obtain an available simulator.

[0038] Optionally, the determination module is specifically configured to adjust the initial simulator based on the keyword information to obtain the target simulator, and to adjust the simulation file based on the keyword information and a hardware processing signal extracted in advance.

[0039] Optionally, the determination module is specifically configured to add the keyword information in the form of a macro to a source program of the initial simulator to obtain a new source program, and to compile the new source program to obtain the target simulator.

[0040] Optionally, the determination module is specifically configured to match the hardware processing signal extracted in advance with the keyword information to obtain a target matching result, and to add the target matching result to a current simulation file of the hardware processor to obtain an adjusted simulation file.

[0041] Optionally, the comparison module is specifically configured to control the sleep timing of the target simulator by a target comparison program, so that the target simulator and the target hardware processor are kept in synchronization execution, wherein the target comparison program is constructed based on the keyword information; and the target instruction program is input into the synchronized target simulator and the target hardware processor for execution, to obtain the simulator log file and the processor log file.

[0042] Optionally, the comparison module is specifically configured to compare the simulator log file and the processor log file in real time by the target comparison program, to determine the simulator error.

[0043] Optionally, the comparison module is specifically configured to run the target comparison program, and if the target comparison program identifies that there is error information in the simulator log file, stop the comparison and determine the error position, store the error position and the data information of the position related to the error position; and determine the simulator error according to the error position and the data information of the position related to the error position.

[0044] Optionally, the acquisition module is specifically configured to determine the initial keyword based on the original keyword generated by the initial simulator in the processing process; determine the multi-level keyword based on the category of the initial keyword; and take the initial keyword and the multi-level keyword as the keyword information.

[0045] In another aspect of the embodiment of the application, a computer device is provided, which comprises a memory and a processor, and the memory stores a computer program capable of running on the processor; when the processor executes the computer program, the steps of the simulator generation method are implemented.

[0046] In another aspect of the embodiment of the application, a computer readable storage medium is provided, which stores a computer program; when the processor executes the computer program, the steps of the simulator generation method are implemented.

[0047] The beneficial effects of the embodiment of the application include:

[0048] The simulator generation method, device, equipment and storage medium provided by the embodiment of the present application can first acquire keyword information generated by an initial simulator in a simulation processing process, and then determine a target simulator based on the keyword information, and adjust a simulation file of a target hardware processor corresponding to the target simulator. Since the keyword information includes the cycle number of the initial simulator, the target simulator determined based on the keyword information and the target hardware adjusted based on the keyword information can maintain a uniform relationship in cycles, and then after the target instruction program is executed by the target simulator and the target hardware processor respectively, a simulator log file and a processor log file can be obtained, and then the simulator error can be determined according to the simulator log file and the processor log file, and accordingly, the target simulator can be iteratively corrected according to the simulator error, and finally, the available simulator that maintains uniformity in cycles and has high accuracy can be obtained. BRIEF DESCRIPTION OF DRAWINGS

[0049] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0050] Figure 1 The flowchart of the simulator generation method provided by the embodiment of the present application is shown in the figure.

[0051] Figure 2 Another flowchart of the simulator generation method provided by the embodiment of the present application is shown in the figure.

[0052] Figure 3 Another flowchart of the simulator generation method provided by the embodiment of the present application is shown in the figure.

[0053] Figure 4 Another flowchart of the simulator generation method provided by the embodiment of the present application is shown in the figure.

[0054] Figure 5 Another flowchart of the simulator generation method provided by the embodiment of the present application is shown in the figure.

[0055] Figure 6 Another flowchart of the simulator generation method provided by the embodiment of the present application is shown in the figure.

[0056] Figure 7 Another flowchart of the simulator generation method provided by the embodiment of the present application is shown in the figure.

[0057] Figure 8A structural schematic diagram of a simulator generation apparatus provided by an embodiment of the present application is shown in the figure.

[0058] Figure 9 A structural schematic diagram of a computer device provided by an embodiment of the present application is shown in the figure. DETAILED DESCRIPTION

[0059] In order to make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some but not all of the embodiments of the present application. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0060] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative labor are within the scope of protection of the present application.

[0061] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, thus, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0062] In the description of the present application, it should be noted that the terms "first", "second", "third" and the like are only used to distinguish description, and cannot be understood as indicating or implying relative importance.

[0063] The specific implementation process of the simulator generation method provided in the embodiments of the present application will be specifically explained below.

[0064] Figure 1 A flowchart of the simulator generation method provided by an embodiment of the present application is shown in the figure. Figure 1 The simulator generation method comprises:

[0065] S110: Obtain keyword information generated by an initial simulator in a simulation processing process.

[0066] The keyword information comprises: a cycle number of the initial simulator.

[0067] Optionally, the execution subject of the method can be any type of computer device, the computer device can comprise a hardware processor, and the computer device can be configured with a simulator through a software program.

[0068] The hardware processor refers to a processing device that performs hardware processing, such as a central processing unit (CPU) or a microcontroller unit (MCU), without specific limitation.

[0069] The simulator specifically refers to a virtual device that simulates a physical device through a software program in a computer. The simulator can be used to simulate the processing function of the hardware processor. For example, the hardware processor can complete a processing task by executing an instruction program, and the simulator can also complete the same processing task by executing the same instruction.

[0070] Optionally, the initial simulator can be a simulator pre-configured in the computer device.

[0071] The keyword information generated by the initial simulator during the simulation process can be information directly obtained by the simulator during execution, or information recorded by the staff based on the simulation process and input, without specific limitation.

[0072] The keyword information can include various types of information, such as the number of cycles, the unit name, the sub-unit name, the transaction behavior type, and the effective information carried by the transaction.

[0073] The number of cycles can be the duration of each cycle and the number of cycles during the execution of the initial simulator; the unit name can refer to the name of each unit of the initial simulator used to simulate the real hardware processor; accordingly, the sub-unit name can be the name of the sub-unit in the corresponding unit; the transaction behavior type can be the type of work performed by each sub-unit or unit; and the effective information carried by the transaction can be the content or location of the effective information involved in the execution of the initial simulator.

[0074] For example, the unit name can include an instruction fetch unit (IFU), an instruction sequence unit (ISU), and a load store unit (LSU); the sub-unit name can include a memory, a queue, and a pipeline controller; the transaction behavior type can include query, addition, modification, result, and data structure; and the effective information carried by the transaction can include a data address, data content, data content stored in a data structure, and a key effective signal.

[0075] It should be noted that the keyword information can be specific information determined in the relevant underlying code involved in the execution process of the initial simulator, and can be specific information in the form of a string.

[0076] S120: Determine the target simulator based on the keyword information, and adjust the simulation file of the target hardware processor corresponding to the target simulator.

[0077] Optionally, the target simulator can be a simulator obtained by adjusting the initial simulator based on the keyword information.

[0078] The target simulator can correspond to the target hardware processor, and the target simulator can be used to perform related work executable by the target hardware processor corresponding to the target simulator.

[0079] The simulation file of the target hardware processor can be corresponding software simulation data in the hardware processor. It should be noted that the change of the simulation file will not interfere with other processes in the hardware processor development process.

[0080] That is, after obtaining the keyword information, the initial simulator can be adjusted to obtain the target simulator, and the simulation file of the target hardware processor corresponding to the target simulator can also be adjusted to obtain the adjusted simulation file, thereby achieving the adjustment of the target hardware processor.

[0081] S130: Input the target instruction program into the target simulator and the target hardware processor for execution to obtain a simulator log file and a processor log file, and determine a simulator error based on the simulator log file and the processor log file.

[0082] Optionally, the target instruction program can be any type of task program that can be executed by the target simulator. The target instruction program can be input into the target simulator and the target hardware processor for execution, wherein the target simulator can generate a simulator log file during execution of the target instruction program, and correspondingly, the hardware processor can generate a processor log file during execution of the target instruction program.

[0083] The simulator error can be determined based on the simulator log file and the processor log file through a computer device. Specifically, real-time error comparison can be performed to determine whether the simulator log file and the processor log file are the same.

[0084] S140: According to the simulator error, iteratively correct the target simulator to obtain a usable simulator.

[0085] Optionally, after the simulator error is determined, the target simulator can be corrected based on the simulator error to obtain an available simulator. Alternatively, if there is no simulator error, the target simulator can be used as the available simulator.

[0086] It should be noted that after the simulator error is determined and corrected, the above steps can be repeated until there is no simulator error or the simulator error is within a certain threshold range, and the available simulator can be obtained.

[0087] That is, the correction of the target simulator can be iterative correction, and the available simulator can be obtained by correcting the target simulator multiple times.

[0088] In the simulator generation method provided by the embodiment of the present application, the keyword information generated by the initial simulator in the simulation process can be obtained first, and then the target simulator can be determined based on the keyword information, and the simulation file of the target hardware processor corresponding to the target simulator can be adjusted. Since the number of cycles of the initial simulator is included in the keyword information, the target simulator determined based on the keyword information and the target hardware adjusted based on the keyword information can maintain a uniform relationship in the cycle, and then after the target instruction program is executed by the target simulator and the target hardware processor respectively, the simulator log file and the processor log file can be obtained, and then the simulator error can be determined according to the simulator log file and the processor log file. Accordingly, the target simulator can be iteratively corrected according to the simulator error, and finally an available simulator that maintains uniformity in the cycle and has high accuracy can be obtained.

[0089] The following will specifically explain another specific implementation process of the simulator generation method provided in the embodiment of the present application.

[0090] Figure 2 For another flowchart of the simulator generation method provided by the embodiment of the present application, please refer to Figure 2 , the target simulator is determined based on the keyword information, and the simulation file of the target hardware processor corresponding to the target simulator is adjusted, which includes:

[0091] S210: Adjusting the initial simulator based on the keyword information to obtain the target simulator.

[0092] Optionally, after the keyword information is obtained, the initial simulator can be adjusted based on the keyword information. Specifically, the source program of the initial simulator can be replaced, added or deleted, etc., to build the target simulator.

[0093] It should be noted that the source program of the target simulator can be added with the keyword information, for example, the period number, the unit name, the subunit name, the transaction behavior type, and the valid information carried by the transaction can be added to the source program of the target simulator.

[0094] S220: adjusting the simulation file based on the keyword information and the pre-extracted hardware processing signal.

[0095] It should be noted that, Figure 2 In the above embodiment, the S210 is performed first and then the S220 is performed. In actual implementation, the execution order of the above two steps can be changed according to actual needs, and there is no fixed order limitation.

[0096] Optionally, the hardware processing signal can be a signal pre-extracted by a staff member, or can be a signal automatically extracted by the processor based on a preset rule, which is not limited herein.

[0097] After the keyword information and the hardware processing signal are determined, the simulation file can be specifically adjusted based on the keyword information and the hardware processing signal, for example, the content in the file can be replaced, or part of the content can be modified, which is not specifically limited herein.

[0098] It should be noted that the simulation file can be adjusted based on each keyword information, for example, the period number, the unit name, the subunit name, the transaction behavior type, and the valid information carried by the transaction can be adjusted correspondingly, which can be specifically constructing related file data as a new simulation file, or rewriting the original simulation file based on the above information, so as to realize the adjustment of the simulation file.

[0099] By performing the above steps S210 and S220, the target simulator constructed and the target hardware processor after the simulation file is adjusted can be obtained.

[0100] In the simulator generation method provided in the embodiment of the present application, the initial simulator can be adjusted based on the keyword information to obtain the target simulator, and the simulation file can be adjusted based on the keyword information and the pre-extracted hardware processing signal. The target simulator and the simulation file of the target hardware processor are both obtained based on the keyword information, and the keyword information can include the period number. On this basis, the target simulator and the target hardware processor can ensure the uniformity of the period in the process of executing the test program, thereby improving the processing accuracy.

[0101] The specific implementation process of determining the target simulator in the simulator generation method provided in the embodiment of the present application will be explained below.

[0102] Figure 3 Another flowchart of the simulator generation method provided in the embodiments of the present application is shown in FIG. 3. Figure 3 The initial simulator is adjusted based on the keyword information to obtain a target simulator, including:

[0103] S310: The keyword information is added to the source program of the initial simulator in the form of a macro to obtain a new source program.

[0104] Optionally, the macro can be a named code segment, and the content of the macro can be replaced by a corresponding code segment when the macro is needed.

[0105] In actual implementation, the initial simulator can be decomposed into multiple modules, the source code corresponding to each module can be obtained, and the keyword information can be added to each block of source code in the form of a macro to obtain a new source program.

[0106] The corresponding macro switch can be added to the macro part, and the corresponding macro can be used or not used in the subsequent compiling process through the switch, that is, the new auxiliary function can be inserted without affecting the original function of the simulator, and the switch can be flexibly set to determine whether to use the code segment.

[0107] In addition, the source code of the sleep mechanism can also be added in the source program modification process to control the simulation speed of the simulator.

[0108] S320: The new source program is compiled to obtain a target simulator.

[0109] Optionally, after obtaining the new source program through the above process, the source program can be compiled to obtain a target simulator, that is, the target simulator is a new simulator obtained by modifying the source code and recompiling based on the initial simulator.

[0110] Optionally, the source code of multiple modules of the initial simulator can be obtained through the above steps, and the new source code of each module can be obtained after the corresponding macro is added. In the process of obtaining the target simulator, the new source code of each module can be compiled to obtain the target simulator.

[0111] In the simulator generation method provided in the embodiments of the present application, the keyword information can be added to the source program of the initial simulator in the form of a macro to obtain a new source program, and the new source program is compiled to obtain a target simulator. The keyword information added in the form of a macro can make the target simulator more flexible in selecting the addition of a macro, so that a new auxiliary function can be added without affecting the function of the simulator, and the flexibility of the target simulator is improved.

[0112] The following will specifically explain the specific implementation process of adjusting the simulation file of the hardware processor in the simulator generation method provided in the embodiments of the present application.

[0113] Figure 4 Another flowchart of the simulator generation method provided in the embodiments of the present application is shown in Figure 4 The simulation file is adjusted based on the keyword information and the pre-extracted hardware processing signals, including:

[0114] S410: The pre-extracted hardware processing signals are matched with the keyword information to obtain a target matching result.

[0115] It should be noted that the hardware processing signals can be signals generated by the hardware processor in the processing process, and it can be determined whether each hardware processing signal and the keyword information match each other. If they match each other, the corresponding matching result can be obtained. If they do not match, the matching process continues until all the keyword information has a hardware processing signal that can be matched.

[0116] Each matching result can be a simulation file formed in the form of a $display function, and each matching result can be obtained as the above target matching result.

[0117] S420: The target matching result is added to the current simulation file of the hardware processor to obtain an adjusted simulation file.

[0118] Optionally, after obtaining the above target matching result, the target matching result can be added to the simulation file of the hardware processor to obtain an adjusted simulation file. The adjusted simulation file can be a test stimulus of the hardware processor. For the adjusted simulation file, the target hardware processor can obtain a corresponding processor log file through the adjusted simulation file when running.

[0119] It should be noted that adding the target matching result to the current simulation file of the hardware processor does not interfere with other processes in the development process of the target hardware processor.

[0120] In the simulator generation method provided in the embodiments of the present application, the pre-extracted hardware processing signals can be matched with the keyword information to obtain a target matching result. The target matching result is added to the current simulation file of the hardware processor to obtain an adjusted simulation file. By adding the target matching result to the current simulation file of the hardware processor, the influence on other processes in the development process of the target hardware processor can be avoided, thereby improving the stability of the target hardware processor and the accuracy of subsequent operation processing.

[0121] The specific implementation process of obtaining each log file in the simulator generation method provided in the embodiments of the present application is explained below.

[0122] Figure 5 Another flowchart of the simulator generation method provided in the embodiments of the present application is shown in FIG. 6. Figure 5 The target instruction program is respectively input into the target simulator and the target hardware processor for execution to obtain the simulator log file and the processor log file, including:

[0123] S510: The target simulator is controlled to enter the sleep timing by the target comparison program, so that the target simulator and the target hardware processor are kept in synchronous execution.

[0124] The target comparison program is constructed based on the keyword information.

[0125] Optionally, in the foregoing explanation of S310, the source code of the target simulator is added with the source code of the sleep mechanism, that is, the target simulator can have the sleep function, and the computer device can control the sleep timing of the target simulator through the target comparison program, so as to keep the target simulator and the target hardware processor in synchronous execution.

[0126] It should be noted that the target program can be a background service program constructed based on the keyword, which can be specifically represented as "hw_sw_log_compare". The simulation speed of the target simulator can be 100KIPS (kiloinstructions per second), and the normal simulation execution speed of the target hardware processor can be 1KIPS. In order to match the execution speeds of the two, the target simulator can be controlled to enter the sleep timing at the appropriate time through the target comparison program, so as to ensure the synchronous execution in the subsequent comparison process.

[0127] For example, based on the above speed explanation, it can be obtained that the processing speed of the target simulator is faster than that of the target hardware processor. When the speeds of the two do not match, the processing of the target simulator can be paused based on the sleep mechanism, and the target simulator is started again after the target hardware processor is emulated to the synchronization position.

[0128] S520: The target instruction program is respectively input into the synchronized target simulator and the target hardware processor for execution to obtain the simulator log file and the processor log file.

[0129] Optionally, the target instruction program can be respectively input into the synchronized target simulator and the target hardware processor for execution, wherein the simulator log file can be obtained through the target simulator, and the processor log file can be obtained through the target hardware processor.

[0130] Optionally, determining the simulator error according to the simulator log file and the processor log file comprises: determining the simulator error by real-time comparison of the simulator log file and the processor log file through the target comparison program.

[0131] It should be noted that real-time comparison can avoid generation of a large number of log files and occupation of excessive storage space.

[0132] In the simulator generation method provided in the embodiments of the present application, the sleep timing of the target simulator can be controlled through the target comparison program, so that the target simulator and the target hardware processor are kept in synchronization and executed; the target instruction program is input into the synchronized target simulator and the target hardware processor for execution, to obtain the simulator log file and the processor log file, and the simulator error can be determined by real-time comparison of the simulator log file and the processor log file through the target comparison program. Through synchronization of the target simulator and the target hardware processor, real-time comparison can be realized when the two are compared subsequently, and the occupation of storage space can be reduced and the efficiency of comparison of the target simulator can be improved in the process of real-time comparison.

[0133] The specific implementation process of determining the simulator error in the simulator generation method provided in the embodiments of the present application will be explained below.

[0134] Figure 6 Another flowchart of the simulator generation method provided in the embodiments of the present application is shown in Figure 6 The simulator error is determined by real-time comparison of the simulator log file and the processor log file through the target comparison program, which comprises:

[0135] S610: The target comparison program is run, if the target comparison program identifies that error information appears in the simulator log file, the comparison is stopped and the error position is determined, and the error position and the data information of the position related to the error position are stored.

[0136] Optionally, in the process of real-time comparison, the target comparison program can be run, comparison is performed according to the key field based on each period, and if error conditions such as appearance of a transaction that should not appear or absence of some transactions, or inconsistency of contents in some data structures are found, they can be regarded as error information, the comparison can be stopped, the current position can be recorded as the error position, and after the error position is obtained, the error position and the data information of the position related to the error position can be stored.

[0137] The related position can be a position adjacent to the error position, for example, all transaction behaviors of the previous 2 periods of the error subunit in the error period can be saved, to facilitate subsequent simulator error correction.

[0138] S620: determining the simulator error according to the error position and the data information of the position related to the error position.

[0139] Optionally, after storing the error position and the data information of the position related to the error position, the simulator error can be determined according to the error position and the data information of the position related to the error position.

[0140] In the simulator generation method provided in the embodiments of the present application, the target comparison program can be run, if the target comparison program identifies that error information appears in the simulator log file, the comparison is stopped and the error position is determined, the error position and the data information of the position related to the error position are stored, and the simulator error is determined according to the error position and the data information of the position related to the error position. Through the determination of the error position and the data information of the related position, the simulator error can be determined more quickly.

[0141] The specific implementation process of obtaining the keyword information in the simulator generation method provided in the embodiments of the present application will be explained below.

[0142] Figure 7 Another flowchart of the simulator generation method provided in the embodiments of the present application is shown in Figure 7 The keyword information generated by the initial simulator in the simulation process is obtained, including:

[0143] S710: determining the initial keyword based on the original keyword generated by the initial simulator in the processing process.

[0144] It should be noted that the original keyword can be any type of character or string, and the original keyword generated by the initial simulator in the processing process can be used as the initial keyword.

[0145] S720: determining the multi-level keyword based on the category of the initial keyword.

[0146] Optionally, the initial keyword can be classified based on the pre-defined keyword level division method, so as to determine the multi-level keyword. For example, the initial keyword can be classified according to the position where the keyword is generated, or the time when the keyword is generated, or the symbol type of the keyword itself, and a large category can be determined, and a plurality of small categories can be set under each category, and the multi-level keyword can be determined in a hierarchical manner.

[0147] S730: taking the initial keyword and the multi-level keyword as the keyword information.

[0148] Optionally, the initial keyword and the multi-level keyword can be obtained based on the above method, and both of them can be taken as the keyword information.

[0149] In the subsequent processing process, for example, when the synchronization comparison in S610 is performed, the comparison can be performed according to the keywords at each level, thereby improving the efficiency of the synchronization comparison and accelerating the speed of character matching.

[0150] In the simulator generation method provided in the embodiments of the present application, the initial keyword can be determined based on the original keyword generated by the initial simulator in the processing process; the multi-level keyword can be determined based on the category of the initial keyword; and the initial keyword and the multi-level keyword can be used as the keyword information. The keyword information obtained through the above method can have a hierarchical level. In the subsequent process of using the keyword to construct the target simulator, adjust the simulation file of the target hardware processor, construct the target comparison program, and perform the keyword synchronization comparison, the keyword with multiple levels can be used to more quickly implement the corresponding process and accelerate the speed of character matching.

[0151] The following describes the device, equipment, and storage medium corresponding to the simulator generation method provided by the present application, and the specific implementation process and technical effects are described above. The following will not be described again.

[0152] Figure 8 For the structure diagram of the simulator generation device provided in the embodiments of the present application, please refer to Figure 8 The simulator generation device includes an acquisition module 810, a determination module 820, a comparison module 830, and a correction module 840.

[0153] The acquisition module 810 is configured to acquire the keyword information generated by the initial simulator in the simulation processing process, and the keyword information includes the number of cycles of the initial simulator.

[0154] The determination module 820 is configured to determine the target simulator based on the keyword information, and adjust the simulation file of the target hardware processor corresponding to the target simulator.

[0155] The comparison module 830 is configured to input the target instruction program into the target simulator and the target hardware processor to execute, to obtain the simulator log file and the processor log file, and to determine the simulator error based on the simulator log file and the processor log file.

[0156] The correction module 840 is configured to iteratively correct the target simulator based on the simulator error to obtain the available simulator.

[0157] Optionally, the determination module 820 is specifically configured to adjust the initial simulator based on the keyword information to obtain the target simulator, and adjust the simulation file based on the keyword information and the pre-extracted hardware processing signal.

[0158] Optionally, the determining module 820 is specifically configured to add the keyword information in the form of a macro into the source program of the initial simulator to obtain a new source program; and compile the new source program to obtain a target simulator.

[0159] Optionally, the determining module 820 is specifically further configured to match the pre-extracted hardware processing signal with the keyword information to obtain a target matching result; and add the target matching result into a current simulation file of the hardware processor to obtain an adjusted simulation file.

[0160] Optionally, the comparing module 830 is specifically configured to control a sleep timing of the target simulator through a target comparison program to enable the target simulator to execute synchronously with the target hardware processor, wherein the target comparison program is constructed based on the keyword information; and input the target instruction program into the synchronized target simulator and the target hardware processor respectively to execute to obtain a simulator log file and a processor log file.

[0161] Optionally, the comparing module 830 is specifically configured to compare the simulator log file and the processor log file in real time through the target comparison program to determine a simulator error.

[0162] Optionally, the comparing module 830 is specifically configured to run the target comparison program, if the target comparison program identifies that there is error information in the simulator log file, stop the comparison and determine an error position, store the error position and data information of a position related to the error position; and determine the simulator error according to the error position and the data information of the position related to the error position.

[0163] Optionally, the obtaining module 810 is specifically configured to determine an initial keyword based on an original keyword generated by the initial simulator in a processing process; determine a multi-level keyword based on a category of the initial keyword; and take the initial keyword and the multi-level keyword as the keyword information.

[0164] In the simulator generation apparatus provided by the embodiment, the keyword information generated by the initial simulator in the simulation processing process can be obtained first, and then the target simulator can be determined based on the keyword information, and the simulation file of the target hardware processor corresponding to the target simulator can be adjusted, wherein, since the keyword information includes the cycle number of the initial simulator, the target simulator determined based on the keyword information and the target hardware determined based on the keyword information for the simulation file adjustment can keep a uniform relationship in the cycle, and then after the target instruction program is executed by the target simulator and the target hardware processor respectively, the simulator log file and the processor log file can be obtained, and then the simulator error can be determined according to the simulator log file and the processor log file, accordingly, the target simulator can be iteratively corrected according to the simulator error, and finally the available simulator which keeps uniform in the cycle and has high accuracy can be obtained.

[0165] The apparatus is configured to perform the method provided by the foregoing embodiments, and has similar implementation principles and technical effects, which will not be repeated here.

[0166] The above modules can be one or more integrated circuits configured to implement the above method, for example, one or more application specific integrated circuits (ASICs), or one or more microprocessors, or one or more field programmable gate arrays (FPGAs), etc. For another example, when a certain module above is implemented in the form of a processing element scheduling code, the processing element can be a general-purpose processor, such as a central processing unit (CPU) or other processor that can invoke program code. For another example, the modules can be integrated together to implement in the form of a system on a chip (SOC).

[0167] Figure 9 For the structure of the computer device provided in the embodiments of the present application, please refer to Figure 9 The computer device includes a memory 910 and a processor 920. The memory 910 stores a computer program that can run on the processor 920. When the processor 920 executes the computer program, the steps of the simulator generation method are implemented.

[0168] Another aspect of the embodiments of the present application also provides a computer readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps of the simulator generation method are implemented.

[0169] In several embodiments of the present application, it should be understood that the disclosed apparatus and method can be implemented in other ways. For example, the apparatus embodiments described above are only schematic. For example, the division of units is only a logical function division. In actual implementation, there can be another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed elements can be indirect coupling or communication connection through some interface, device or unit, which can be electrical, mechanical or other forms.

[0170] The units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, i.e. may be located in one place, or may be distributed on multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment of the present application.

[0171] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of hardware plus software functional unit.

[0172] The integrated unit realized in the form of software functional unit can be stored in a computer readable storage medium. The software functional unit is stored in a storage medium, including a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to execute part of the steps of the method of each embodiment of the present application. The storage medium mentioned above includes: U disk, mobile hard disk, read-only memory (English: Read-Only Memory, for short: ROM), random access memory (English: Random Access Memory, for short: RAM), magnetic disk or optical disk and various program code storage media.

[0173] The above is only a specific embodiment of the present application, but the protection scope of the present application is not limited thereto, any skilled person in the art can easily think of changes or replacements within the technical range disclosed in the present application, which should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be limited by the protection scope of the claims.

[0174] The above is only a preferred embodiment of the present application, and is not used to limit the present application. For those skilled in the art, the present application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A simulator generation method characterized by, The method comprises the following steps: acquiring keyword information generated by an initial simulator during simulation processing, wherein the keyword information comprises a cycle number of the initial simulator, and the cycle number of the initial simulator comprises a time length of each cycle and a number of cycles during execution of the initial simulator; determining a target simulator based on the keyword information, and adjusting a simulation file of a target hardware processor corresponding to the target simulator; inputting a target instruction program into the target simulator and the target hardware processor respectively for execution to obtain a simulator log file and a processor log file, and determining a simulator error based on the simulator log file and the processor log file; iteratively correcting the target simulator based on the simulator error to obtain a usable simulator. The method further comprises the following steps: controlling a sleep timing of the target simulator by a target comparison program to enable the target simulator to be executed synchronously with the target hardware processor, wherein the target comparison program is constructed based on the keyword information; inputting the target instruction program into the target simulator and the target hardware processor respectively for execution to obtain the simulator log file and the processor log file.

2. The simulator generation method of claim 1, wherein, The method further comprises the following steps: adjusting the initial simulator based on the keyword information to obtain the target simulator; adjusting the simulation file based on the keyword information and a hardware processing signal extracted in advance.

3. The simulator generation method of claim 2, wherein, The method further comprises the following steps: adding the keyword information in the form of a macro to a source program of the initial simulator to obtain a new source program; compiling the new source program to obtain the target simulator.

4. The simulator generation method of claim 2, wherein, The method further comprises the following steps: matching the hardware processing signal extracted in advance with the keyword information to obtain a target matching result; adding the target matching result to a current simulation file of the hardware processor to obtain an adjusted simulation file.

5. The simulator generation method of claim 1, wherein, The method further comprises the following steps: comparing the simulator log file and the processor log file in real time by the target comparison program to determine a simulator error.

6. The simulator generation method of claim 5, wherein, The method further comprises the following steps: running the target comparison program, and if the target comparison program identifies that error information appears in the simulator log file, stopping comparison and determining an error position, and storing the error position and data information of positions related to the error position. According to the error position and data information related to the error position, the simulator error is determined.

7. The simulator generation method according to any one of claims 1 to 6, characterized by, The keyword information generated by the initial simulator in the simulation process is acquired, including: Based on the original keyword generated by the initial simulator in the process, an initial keyword is determined. Based on the category of the initial keyword, a multi-level keyword is determined. The initial keyword and the multi-level keyword are taken as the keyword information.

8. A simulator generation apparatus characterized by comprising: Including: An acquisition module, a determination module, a comparison module, and a correction module. The acquisition module is configured to acquire keyword information generated by an initial simulator in a simulation process, the keyword information including a cycle number of the initial simulator, the cycle number of the initial simulator including a time length of each cycle and a number of cycles in an execution process of the initial simulator. The determination module is configured to determine a target simulator based on the keyword information, and adjust a simulation file of a target hardware processor corresponding to the target simulator. The comparison module is configured to input a target instruction program into the target simulator and the target hardware processor for execution to obtain a simulator log file and a processor log file, and determine a simulator error based on the simulator log file and the processor log file. The correction module is configured to perform iterative correction on the target simulator based on the simulator error to obtain a usable simulator. The comparison module is specifically configured to control a sleep timing of the target simulator through a target comparison program to enable the target simulator and the target hardware processor to be executed synchronously, wherein the target comparison program is constructed based on the keyword information; and the target instruction program is input into the target simulator and the target hardware processor for execution after synchronization to obtain the simulator log file and the processor log file.

9. A computer device, comprising: Including: A memory and a processor, the memory storing a computer program executable on the processor, and the processor executing the computer program to implement the steps of the method in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The storage medium stores a computer program, and the computer program is executed by the processor to implement the steps of the method in any one of claims 1 to 7.

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