Self-healing device and chip

Abstract

The application discloses a self-healing device and a chip, and relates to the technical field of electronics. The self-healing device comprises a first self-healing electrode, a second self-healing electrode, an intermediate silicon layer, first silicon layer doping, second silicon layer doping, a sealing layer and a substrate. A first preset threshold voltage signal is applied to the first self-healing electrode, a second preset threshold voltage signal is applied to the second self-healing electrode, a third preset threshold voltage signal is applied to the substrate, the intermediate silicon layer is heated in a closed space, and self-healing is started. The voltage application is stopped after a fourth preset threshold duration, one cycle is completed after the fourth preset threshold duration, and the operation of one cycle is repeated to complete self-healing after a fifth preset threshold duration. The application has small control granularity, is easy to integrate with a silicon-based functional circuit, has low cost and high integration.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronics, and in particular to a self-healing device and chip. BACKGROUND

[0002] Integrated circuits face complex total dose problems in space environments. Total dose effects can induce trap charges and interface states in the SiO2 layer of semiconductor devices, which affect the channel potential and further cause the threshold voltage of the device to drift, the subthreshold slope to degrade, and the device leakage current to increase, resulting in circuit failure. Using thermal annealing repair methods, irradiation-induced trap charges can be annealed and released, thereby restoring device performance. Common repair methods include additional heater heating. The additional heater heating method performs periodic thermal annealing inside or outside the device package. However, the heating system is too bulky, lacks selectivity in annealing repair, has a large control granularity, and is prone to overheat and damage adjacent devices in the chip, causing "misinjury". SUMMARY

[0003] The present application aims to provide a self-healing device and chip with a small control granularity, easy integration with silicon-based functional circuits, low cost, and high integration.

[0004] To solve the above technical problems, the present application adopts the following technical solutions:

[0005] A first aspect of the embodiments of the present application provides a self-healing device and chip, which includes: a first self-healing electrode and a second self-healing electrode; an intermediate silicon layer, a first silicon layer doping, and a second silicon layer doping, one side of the intermediate silicon layer being connected to the first self-healing electrode through the first silicon layer doping, the other side of the intermediate silicon layer being connected to the second self-healing electrode through the second silicon layer doping; a sealing layer, which, in cooperation with the first silicon layer doping and the second silicon layer doping, encloses the intermediate silicon layer; a substrate connected to the sealing layer; a first preset threshold electrical signal applied to the first self-healing electrode, a second preset threshold electrical signal applied to the second self-healing electrode, and a third preset threshold electrical signal applied to the substrate; the intermediate silicon layer is heated in the enclosed space and starts self-healing, the voltage is stopped after a fourth preset threshold duration, one cycle is completed after the fourth preset threshold duration is stopped, and the operation of one cycle is repeated to complete self-healing after a fifth preset threshold duration.

[0006] In some embodiments, the sealing layer is made of a material with low thermal conductivity.

[0007] In some embodiments, the sealing layer comprises a first buried oxide layer and a second buried oxide layer, a bottom of the first buried oxide layer is connected with a top of the intermediate silicon layer, two sides of the first buried oxide layer are respectively connected with inner sides of the first self-healing electrode and the second self-healing electrode, a top of the second buried oxide layer is respectively connected with a bottom of the first silicon layer doping, a bottom of the intermediate silicon layer and a bottom of the second silicon layer doping, and a substrate is arranged at a bottom of the second buried oxide layer.

[0008] In some embodiments, the self-healing device further comprises a parasitic transistor, the parasitic transistor comprises a source doping, a drain doping, a gate electrode and a top layer silicon, two ends of a top of the top layer silicon are respectively connected with the source doping and the drain doping, a middle end of the top of the top layer silicon is connected with the gate electrode, and a top of the first buried oxide layer is connected with a bottom of the top layer silicon.

[0009] In some embodiments, the self-healing device further comprises a first isolation layer and a second isolation layer, the first isolation layer and the second isolation layer are arranged at a top of the second buried oxide layer, the first isolation layer is arranged at outer sides of the first self-healing electrode and the first silicon layer doping, and the second isolation layer is arranged at outer sides of the second self-healing electrode and the second silicon layer doping.

[0010] In some embodiments, the self-healing device further comprises a third isolation layer and a fourth isolation layer, the third isolation layer and the fourth isolation layer are arranged at a top of the first buried oxide layer, the third isolation layer is arranged at outer sides of the top layer silicon and the source doping, the fourth isolation layer is arranged at outer sides of the top layer silicon and the drain doping, the parasitic transistor is separated from the first self-healing electrode by the third isolation layer, and the parasitic transistor is separated from the second self-healing electrode by the fourth isolation layer.

[0011] In some embodiments, a thickness of the top layer silicon is 40-70 nm, a thickness of the intermediate silicon layer is 130-160 nm, a thickness of the first buried oxide layer is 130-160 nm, and a thickness of the second buried oxide layer is 130-160 nm.

[0012] In some embodiments, the first preset threshold value is a positive value, the first preset threshold value is greater than the second preset threshold value, an absolute value of a voltage difference between the first preset threshold value electric signal and the second preset threshold value electric signal is 10-15 V, and a voltage of the third preset threshold value electric signal is 8 V.

[0013] In some embodiments, the fourth preset threshold time length is set as 1 s, and the fifth preset threshold time length is set as 10 s.

[0014] A second aspect of the embodiment of the present application provides a chip, the chip comprising the self-healing device as described above.

[0015] According to the self-healing device and chip, the collision ionization caused by the periodic voltage applied by the first self-healing electrode, the second self-healing electrode and the substrate generates Joule heat, the temperature of the first buried oxygen layer and the second buried oxygen layer sharply increases, and the trap charges in the first buried oxygen layer and the second buried oxygen layer are excited by heat to achieve the annealing repair purpose. The self-healing device and chip are positioned at the transistor level, have small regulation granularity, are easy to integrate with a silicon-based functional circuit, have low cost and high integration.

[0016] It should be understood that the foregoing general description and the following detailed description are only exemplary and are not limiting to the disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0018] Figure 1 The self-healing device structure according to the embodiment is shown in the figure.

[0019] The reference signs are explained as follows: 1, first self-healing electrode; 2, second self-healing electrode; 3, middle silicon layer; 4, first silicon layer doping; 5, second silicon layer doping; 6, substrate; 7, first buried oxygen layer; 8, second buried oxygen layer; 9, source doping; 10, drain doping; 11, gate electrode; 12, top silicon layer; 13, first isolation layer; 14, second isolation layer; 15, third isolation layer; 16, fourth isolation layer. DETAILED DESCRIPTION

[0020] The technical solutions in the embodiments of the present application will be described clearly and completely in the following with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0021] In the description of the present application, it should be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0022] The terms "first", "second", "third", etc. are used only to describe purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second", "third" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specified.

[0023] In the description of the present application, it should be noted that, unless otherwise explicitly specified and limited, the terms "communication", "installation", "connection", "connection" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium, or it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0024] Example implementations will now be described more fully with reference to the accompanying drawings. Example implementations may, however, be implemented in many different forms and should not be construed as limited to the examples set forth herein; rather, these example implementations are provided so that this disclosure will be thorough and complete, and will fully convey the inventive concept to those skilled in the art. The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification. The drawings are not necessarily to scale, the descriptions and numerical ranges provided herein should also be understood as not being limited by the particular values provided. Identical reference numerals have been used in the drawings and the description to represent the same or similar components.

[0025] The technical solutions of the embodiments of the present application will be described below:

[0026] According to some embodiments, the present application provides a self-healing device, the self-healing device comprising:

[0027] A first self-healing electrode and a second self-healing electrode;

[0028] An intermediate silicon layer, a first silicon layer doping and a second silicon layer doping, one side of the intermediate silicon layer is connected to the first self-healing electrode through the first silicon layer doping, the other side of the intermediate silicon layer is connected to the second self-healing electrode through the second silicon layer doping;

[0029] A sealing layer, the sealing layer seals the intermediate silicon layer in cooperation with the first silicon layer doping and the second silicon layer doping;

[0030] A substrate, the substrate is connected to the sealing layer;

[0031] The first preset threshold electrical signal is applied to the first self-healing electrode, the second preset threshold electrical signal is applied to the second self-healing electrode, the third preset threshold electrical signal is applied to the substrate, the intermediate silicon layer is heated in the closed space, and self-healing is started. The voltage is stopped after a fourth preset threshold duration, and one cycle is completed after the fourth preset threshold duration is stopped, and the operation of one cycle is repeated to complete self-healing after a fifth preset threshold duration.

[0032] The electrical signal includes a voltage signal and a current signal.

[0033] Based on the above embodiment, the first preset threshold electrical signal, the second preset threshold electrical signal, the third preset threshold electrical signal, the fourth preset threshold duration and the fifth preset threshold duration can be set according to actual needs. The voltage difference between the first preset threshold electrical signal and the second preset threshold electrical signal needs to reach or exceed the voltage difference required for device self-healing; the third preset threshold electrical signal is the electrical signal value required for starting device self-healing, the fourth preset threshold duration is the duration of half a cycle of device self-healing, and the fifth preset threshold duration is the total duration required for device self-healing.

[0034] When the device is self-healing, electrical signals are applied to the substrate 6, the first self-healing electrode 1 and the second self-healing electrode 2. If the voltage of the first preset threshold electrical signal is greater than the voltage of the second preset threshold electrical signal, the current flows from the first self-healing electrode 1 to the first silicon layer doping 4, from the first silicon layer doping 4 to the intermediate silicon layer 3, from the intermediate silicon layer 3 to the second silicon layer doping 5, and finally from the second silicon layer doping 5 to the second self-healing electrode 2. If the voltage of the first preset threshold electrical signal is less than the voltage of the second preset threshold electrical signal, the current flows from the second self-healing electrode 2 to the second silicon layer doping 5, from the second silicon layer doping 5 to the intermediate silicon layer 3, from the intermediate silicon layer 3 to the first silicon layer doping 4, and finally from the first silicon layer doping 4 to the first self-healing electrode 1. In the process of current flow, Joule heat is generated. The heat calculation method is Joule's law Q=I 2 ×R×t. The sealing layer makes it difficult for the heat of the intermediate silicon layer 3 to dissipate, and the temperature rises sharply, so that the trap charges in the first buried oxide layer and the second buried oxide layer are excited by heat, achieving the purpose of annealing repair.

[0035] Excessive temperature can damage the device. Therefore, in this application, a small electrical signal is applied to both ends of the first self-healing electrode 1 and the second self-healing electrode 2 for a short duration. The application of the electrical signal to the substrate 6, the first self-healing electrode 1, and the second self-healing electrode 2 is stopped after reaching a fourth preset threshold duration, causing a brief reduction in internal heat and preventing damage due to excessive internal temperature. After the fourth preset threshold duration is reached, one cycle is completed. This cycle is repeated, applying the electrical signal to the substrate 6, the first self-healing electrode 1, and the second self-healing electrode 2 for another fourth preset threshold duration, then stopping again. This process is repeated until a fifth preset threshold duration is reached, completing the device self-healing process.

[0036] The following is in conjunction with the appendix to this instruction manual. Figure 1 The preferred embodiments of this disclosure will be further described in detail below.

[0037] According to some embodiments, the sealing layer is made of a material with low thermal conductivity.

[0038] Based on the above embodiments, materials with low thermal conductivity can make it difficult for heat in the intermediate silicon layer 3 to be transferred out. During device self-healing, the temperature of the intermediate silicon layer 3 can rise rapidly, and the device can quickly self-heal due to high temperature.

[0039] According to some embodiments, such as Figure 1 As shown, the sealing layer includes a first buried oxide layer 7 and a second buried oxide layer 8. The bottom of the first buried oxide layer 7 is connected to the top of the intermediate silicon layer 3. The two sides of the first buried oxide layer 7 are respectively connected to the inner sides of the first self-healing electrode 1 and the second self-healing electrode 2. The top of the second buried oxide layer 8 is respectively connected to the bottom of the first silicon layer doped 4, the bottom of the intermediate silicon layer 3, and the bottom of the second silicon layer doped 5. The substrate 6 is disposed at the bottom of the second buried oxide layer 8.

[0040] Among them, such as Figure 1 As shown, the substrate 6 can be used as a support device, and the second buried oxide layer 8 is used to isolate the intermediate silicon layer 3 and the substrate 6.

[0041] Furthermore, the thickness of the first buried oxide layer 7 and the second buried oxide layer 8 is set to 145 nm, and they are made of materials with low thermal conductivity, so that the intermediate silicon layer 3 can be heated up quickly.

[0042] like Figure 1As shown, the first silicon layer 4 and the second silicon layer 5 are connected to the two sides of the intermediate silicon layer 3, respectively. The first self-healing electrode 1 is connected to the upper side of the first silicon layer 4, and the second self-healing electrode 2 is connected to the upper side of the second silicon layer 5. The top of the second buried oxide layer 8 is connected to the bottom of the first silicon layer 4, the bottom of the intermediate silicon layer 3, and the bottom of the second silicon layer 5, respectively. The intermediate silicon layer 3 and the first silicon layer 4 and the second silicon layer 5 on both sides form an NPN device. The substrate 6 is used to turn on the NPN device. According to Joule's law, Q = I 2 ×R×t, When the current flowing through an NPN device is large, it generates heat to perform self-healing.

[0043] According to some embodiments, the self-healing device further includes a parasitic transistor comprising a source doped layer 9, a drain doped layer 10, a gate electrode 11, and a top silicon layer 12. The top two ends of the top silicon layer 12 are respectively connected to the source doped layer 9 and the drain doped layer 10, and the top middle of the top silicon layer 12 is connected to the gate electrode 11. The top of the first buried oxide layer 7 is connected to the bottom of the top silicon layer 12.

[0044] Among them, such as Figure 1 As shown, the first buried oxide layer 7 is used to isolate the intermediate silicon layer 3 and the top silicon layer 12. The source doping layer 9, the drain doping layer 10, the gate electrode 11, and the top silicon layer 12 form another NPN device. The parasitic transistor can be used normally without device self-healing to prevent the parasitic transistor from being affected by device self-healing.

[0045] According to some embodiments, such as Figure 1 As shown, the self-healing device further includes a first isolation layer 13 and a second isolation layer 14. The first isolation layer 13 and the second isolation layer 14 are both disposed on the top of the second buried oxide layer 8. The first isolation layer 13 is disposed outside the first self-healing electrode 1 and the first silicon layer doped 4, and the second isolation layer 14 is disposed outside the second self-healing electrode 2 and the second silicon layer doped 5.

[0046] Among them, such as Figure 1 As shown, the first isolation layer 13 and the second isolation layer 14 are used to separate the devices on the left and right sides to prevent the devices on the left and right sides from coming into contact with the first self-healing electrode 1 and the second self-healing electrode 2, which would cause a short circuit.

[0047] According to some embodiments, such as Figure 1As shown, the self-healing device further includes a third isolation layer 15 and a fourth isolation layer 16. The third isolation layer 15 and the fourth isolation layer 16 are both disposed on top of the first buried oxide layer 7. The third isolation layer 15 is disposed outside the top silicon layer 12 and the source doped layer 9, and the fourth isolation layer 16 is disposed outside the top silicon layer 12 and the drain doped layer 10. The parasitic transistor is separated from the first self-healing electrode 1 by the third isolation layer 15, and the parasitic transistor is separated from the second self-healing electrode 2 by the fourth isolation layer 16.

[0048] Based on the above embodiments, such as Figure 1 As shown, the top of the first buried oxide layer 7 is sequentially connected to a third isolation layer 15, a parasitic transistor, and a fourth isolation layer 16. The left side of the first buried oxide layer 7 and the third isolation layer 15 is connected to a first self-healing electrode 1, and the right side of the first buried oxide layer 7 and the fourth isolation layer 16 is connected to a second self-healing electrode 2. The third isolation layer 15 is used to prevent short circuits or mutual interference between the first self-healing electrode 1 and the source doped electrode 9 and the top silicon layer 12, and the fourth isolation layer 16 is used to prevent short circuits or mutual interference between the second self-healing electrode 2 and the drain doped electrode 10 and the top silicon layer 12.

[0049] In some preferred embodiments, the thickness of the top silicon layer 12 is set to be between 40 and 70 nm, the thickness of the intermediate silicon layer 3 is set to be between 130 and 160 nm, the thickness of the first buried oxide layer 7 is set to be between 130 and 160 nm, and the thickness of the second buried oxide layer 8 is set to be between 130 and 160 nm.

[0050] According to some embodiments, the first preset threshold is a positive value, the first preset threshold is greater than the second preset threshold, the absolute value of the voltage difference between the first preset threshold electrical signal and the second preset threshold electrical signal is 10V to 15V, and the voltage of the third preset threshold electrical signal is 8V.

[0051] Based on the above embodiments, the first preset threshold and the second preset threshold can be set according to actual needs. In some embodiments, the turn-on voltage of the substrate 6 of the self-healing device is 8V, and the absolute value of the voltage difference between the first preset threshold electrical signal and the second preset threshold electrical signal is between 10V and 15V. In other embodiments, the second preset threshold can also be set to a positive value, which is greater than the first preset threshold, and the absolute value of the voltage difference between the first preset threshold electrical signal and the second preset threshold electrical signal is between 10V and 15V, that is, the voltage difference between the first self-healing electrode 1 and the second self-healing electrode 2 is between 10V and 15V. When the first self-healing electrode 1, the second self-healing electrode 2, and the substrate 6 are energized, the device can heat up rapidly to achieve the purpose of self-healing.

[0052] According to some embodiments, the fourth preset threshold time length is set to 1s, and the fifth preset threshold time length is set to 10s.

[0053] Based on the above embodiments, when the device is self-healing, the first self-healing electrode 1, the second self-healing electrode 2 and the substrate 6 are powered on, and after 1s, the power supply is stopped, and after 1s, one cycle is completed, and the operation of one cycle is repeated to complete self-healing after 10s.

[0054] According to some embodiments, the application provides a chip, which comprises the self-healing device as described above.

[0055] In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0056] Although the present disclosure has been described with reference to several exemplary embodiments, it is understood that the terms used are illustrative and not restrictive, and the present disclosure is not limited to any of the above-described details. Since the present disclosure can be embodied in various forms without departing from the spirit or essential characteristics thereof, it should be understood that the above-described embodiments are not limited to any of the above-described details, but are to be interpreted broadly and liberally in the spirit and scope of the appended claims, and all modifications and changes coming within the scope of the claims or their equivalents are intended to be embraced by the claims.

Claims

1. A self-healing device, characterized in that, The self-healing device includes: First self-healing electrode and second self-healing electrode; An intermediate silicon layer, a first silicon layer doped, and a second silicon layer doped are provided. One side of the intermediate silicon layer is connected to the first self-healing electrode through the first silicon layer doping, and the other side of the intermediate silicon layer is connected to the second self-healing electrode through the second silicon layer doping. The intermediate silicon layer, together with the first and second silicon layer doping on both sides, forms an NPN device. A sealing layer, which, in conjunction with the doping of the first silicon layer and the doping of the second silicon layer, seals the intermediate silicon layer; Substrate, the substrate being connected to the sealing layer; A first preset threshold electrical signal is applied to the first self-healing electrode, a second preset threshold electrical signal is applied to the second self-healing electrode, and a third preset threshold electrical signal is applied to the substrate to turn on the NPN device. This causes collisional ionization, generating Joule heating. The intermediate silicon layer heats up in the enclosed space and begins self-healing. The applied voltage is stopped after a fourth preset threshold duration. After the fourth preset threshold duration is reached, one cycle is completed. The operation is repeated for one cycle until a fifth preset threshold duration is reached to complete self-healing. This causes the trapped charges in the first buried oxide layer and the second buried oxide layer to be excited by heat, achieving the purpose of annealing repair. The sealing layer is made of a material with low thermal conductivity; The sealing layer includes a first buried oxide layer and a second buried oxide layer. The bottom of the first buried oxide layer is connected to the top of the intermediate silicon layer. The two sides of the first buried oxide layer are respectively connected to the inner sides of the first self-healing electrode and the second self-healing electrode. The top of the second buried oxide layer is respectively connected to the bottom of the first silicon layer doped, the bottom of the intermediate silicon layer and the bottom of the second silicon layer doped. The substrate is disposed at the bottom of the second buried oxide layer.

2. The self-healing device according to claim 1, characterized in that, The self-healing device further includes a parasitic transistor, which includes a source dopant, a drain dopant, a gate electrode, and a top silicon layer. The top two ends of the top silicon layer are respectively connected to the source dopant and the drain dopant, and the top middle of the top silicon layer is connected to the gate electrode. The top of the first buried oxide layer is connected to the bottom of the top silicon layer.

3. The self-healing device according to claim 2, characterized in that, The self-healing device further includes a first isolation layer and a second isolation layer, both of which are disposed on top of the second buried oxide layer. The first isolation layer is disposed outside the first self-healing electrode and the first silicon layer doped, and the second isolation layer is disposed outside the second self-healing electrode and the second silicon layer doped.

4. The self-healing device according to claim 2, characterized in that, The self-healing device further includes a third isolation layer and a fourth isolation layer, both of which are disposed on top of the first buried oxide layer. The third isolation layer is disposed outside the top silicon and source doping, and the fourth isolation layer is disposed outside the top silicon and drain doping. The parasitic transistor is separated from the first self-healing electrode by the third isolation layer, and the parasitic transistor is separated from the second self-healing electrode by the fourth isolation layer.

5. The self-healing device according to claim 2, characterized in that, The thickness of the top silicon layer is 40~70nm, the thickness of the intermediate silicon layer is 130~160nm, the thickness of the first buried oxide layer is 130~160nm, and the thickness of the second buried oxide layer is 130~160nm.

6. The self-healing device according to claim 1, characterized in that, The first preset threshold is a positive value, the first preset threshold is greater than the second preset threshold, the absolute value of the voltage difference between the first preset threshold electrical signal and the second preset threshold electrical signal is 10V~15V, and the voltage of the third preset threshold electrical signal is 8V.

7. The self-healing device according to claim 1, characterized in that, The fourth preset threshold duration is set to 1 second, and the fifth preset threshold duration is set to 10 seconds.

8. A chip, characterized in that, The chip includes a self-healing device as described in any one of claims 1 to 7.

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