A power distribution method for a dual DC port asymmetric three-level grid-connected inverter
By adjusting the modulation wave correction component in a dual DC port asymmetric three-level grid-connected inverter, the DC power control loop is used to adjust the modulation wave correction component and monitor the DC port voltage in real time, the problems of unstable output waveform and unsmooth power adjustment when the DC port voltage is asymmetric are solved, and stable output waveform and smooth power adjustment are achieved.
Patent Information
- Application Number
- CN202211611695.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-14
- Publication Date
- 2025-05-23
- Estimated Expiration
- 2042-12-14
AI Technical Summary
The existing dual DC port asymmetric three-level grid-connected inverters are difficult to achieve stable output waveform and smooth power adjustment when the DC port voltage is asymmetric.
Adjust the modulation wave correction component through the DC power control loop, and monitor the voltages of the two DC ports in real time, adjust the corresponding modulation waves to achieve the compensation duty cycle when the DC port voltage is asymmetric and stabilize the output waveform.
The stable output waveform and smooth power adjustment are achieved when the voltage asymmetry of the dual DC ports are applied to power adjustment between the three voltage ports in a single-stage system.
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Figure CN115765509B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of control of power electronic converters, in particular to a power distribution method of an asymmetric three-level grid-connected inverter with dual DC ports. Background Art
[0002] In the fields of new energy vehicles, photovoltaic power generation, aviation power supply, etc., inverters play an important role, and their key indicators such as conversion efficiency and cost have also attracted much attention. The three-level inverter has been widely used in the industry due to its advantages such as small output voltage harmonics, small filter size, low switching loss, and high efficiency. Among them, the dual DC port asymmetric three-level inverter is improved from the three-level inverter. Its DC side can be connected to two DC sources at the same time, and has broad application prospects in occasions such as photovoltaic storage integration and hybrid energy storage. Summary of the invention
[0003] 1. Technical issues to be resolved
[0004] In view of the deficiencies in the prior art, the present invention provides a power distribution method for an asymmetric three-level grid-connected inverter with dual DC ports. The method adjusts the modulation wave correction component by outputting a control parameter of a DC power control loop, thereby controlling the power distribution of two DC ports of the three-level grid-connected inverter with dual DC ports; at the same time, by real-time monitoring the voltages of the two DC ports and adjusting the corresponding modulation wave, the duty cycle is compensated when the voltages of the two DC ports are asymmetric, so that the output waveform is stable.
[0005] (II) Technical solution
[0006] To achieve the above objectives, the present invention is implemented through the following technical solutions:
[0007] In a first aspect, a power allocation method for a dual DC port asymmetric three-level grid-connected inverter is provided, comprising:
[0008] Measure the three-phase AC side voltage and three-phase AC side current, and track the three-phase AC side voltage phase angle through a phase-locked loop, and convert the three-phase AC side current into direct-axis current and quadrature-axis current through Park transformation;
[0009] The direct-axis current and quadrature-axis current are respectively subtracted from the set value and sent to the PI regulator. The output of the PI regulator can generate a three-phase initial modulation wave signal after Park inverse transformation and limiting.
[0010] The control parameter p is generated by any DC port power control loop after passing through the PI regulator;
[0011] The modulation wave correction component is generated by controlling the parameter p, and is superimposed with the three-phase initial modulation wave signal to generate a corrected modulation signal;
[0012] The voltages of the two DC ports are measured, and the coordinates of the corrected modulation signals are transformed according to the measured values to generate two groups of modulation waves;
[0013] The two groups of modulated waves after coordinate transformation are respectively intersected with the same triangular carrier wave, and the driving pulse signal of the switch tube is generated by comparison.
[0014] Preferably, the value range of the control parameter p is from -1 to 1.
[0015] Preferably, the three-phase initial modulation wave signal is expressed as:
[0016]
[0017] Where: v ma0 ,v mb0 ,v mc0 represents the three-phase initial modulation wave signal, m and ω are the modulation ratio and angular frequency respectively.
[0018] Preferably, the minimum and maximum values of the three-phase initial modulation wave signal are expressed as:
[0019] v min =min(v ma0 ,v mb0 ,v mc0 )
[0020] v max =max(v ma0 ,v mb0 ,v mc0 )
[0021] Among them, v min Indicates the minimum value of the three-phase initial modulation wave signal, v max Indicates the maximum value of the three-phase initial modulation wave signal.
[0022] Preferably, the generating of the modulated wave correction component by controlling the parameter p specifically includes:
[0023]
[0024] The corrected modulation signal is:
[0025]
[0026] Among them, v ma ,v mb ,v mc represents the modified modulation signal.
[0027] Preferably, the measuring of the voltages of the two DC ports and the coordinate transformation of the corrected modulation signal according to the measured values to generate two groups of modulation waves specifically include:
[0028] The modified modulated signal with a range of [-1,1] is proportionally compressed to the interval [0,1], recorded as waveform v mx ', the waveform v mx 'According to the vertical axis, the height is divided into h 1 and h 2 The ratio of the heights of the two parts can be expressed as:
[0029]
[0030] Among them, V DC1 、V DC2 Respectively represent the voltages of the two DC ports;
[0031] The waveform v mx ' Input two limit modules respectively, the limit values are 0 to h 2 and h 2 to (h 1 +h 2 ), the generated signals are recorded as v mx1 ' and v mx2 ';
[0032] v mx1 ' and v mx2 'Map from the interval [0, h2] and [h2, h1+h2] to the interval [0,1], and the two sets of modulation waves after coordinate transformation are recorded as v mx1 * and v mx2 * :
[0033] v mx1 * =hv mx1 '
[0034]
[0035] In the formula is the ratio of the voltages at the two ports, v mx1 * and v mx2 * That is the modulation wave that completes the coordinate transformation, where x is a, b or c.
[0036] In a second aspect, a computer-readable storage medium storing one or more programs is provided, wherein the one or more programs include instructions, which, when executed by a computing device, cause the computing device to perform any of the methods described.
[0037] According to a third aspect, a computing device is provided, including:
[0038] One or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs include instructions for executing any of the methods described.
[0039] (III) Beneficial effects
[0040] (1) The present invention discloses a power distribution method for a dual-DC-port asymmetric three-level grid-connected inverter, which is applicable to the dual-DC-port asymmetric three-level grid-connected inverter. The method adjusts the modulation wave correction component by outputting a control parameter of a DC power control loop, thereby controlling the power distribution of two DC ports of the dual-DC-port three-level grid-connected inverter. At the same time, by real-time monitoring the voltage of the two DC ports and adjusting the corresponding modulation wave, the duty cycle is compensated to stabilize the output waveform when the voltage of the two DC ports is asymmetric. In a single-stage system, smooth power regulation between the three voltage ports is achieved.
[0041] (2) The power distribution method of the dual DC port asymmetric three-level grid-connected inverter of the present invention is based on an improved carrier pulse width modulation algorithm, and the control algorithm is simple and easy to be digitally implemented. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] Figure 1 This is a flow chart of a control method in an embodiment of the present invention;
[0043] Figure 2 A topological structure diagram of an asymmetric T-type three-level converter with dual DC ports in an embodiment of the present invention;
[0044] Figure 3 is a diagram of a modified modulation wave signal when 0≤p≤1 in an embodiment of the present invention;
[0045] Figure 4 is a diagram of a modulated wave signal after correction when -1≤p<0 in an embodiment of the present invention;
[0046] Figure 5 It is a modulation wave coordinate transformation diagram in the embodiment of the present invention;
[0047] Figure 6 This is a system control block diagram in an embodiment of the present invention;
[0048] Figure 7 The inverter output voltage, current and port power distribution diagram when p=0.5 in the embodiment of the present invention;
[0049] Figure 8 1 is a diagram showing the inverter output voltage, current and port power distribution when p=-0.5 in an embodiment of the present invention. DETAILED DESCRIPTION
[0050] The following will be combined with the accompanying drawings of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0051] Example
[0052] like Figure 1 As shown, an embodiment of the present invention provides a power distribution method for a dual DC port asymmetric three-level grid-connected inverter, the method comprising the following steps:
[0053] Measure the three-phase AC side voltage and three-phase AC side current, and track the three-phase AC side voltage phase angle through a phase-locked loop, and convert the three-phase AC side current into direct-axis current and quadrature-axis current through Park transformation;
[0054] The direct-axis current and quadrature-axis current are respectively subtracted from the set value and sent to the PI regulator. The output of the PI regulator can generate a three-phase initial modulation wave signal after Park inverse transformation and amplitude limiting. The set value is determined according to the power output to the three-phase AC power grid. The magnitude of the direct-axis current depends on the active power to be output; the quadrature-axis current depends on the reactive power to be output. The positive quadrature-axis current indicates the output of inductive reactive power, and the negative quadrature-axis current indicates the output of capacitive reactive power.
[0055] The control parameter p is generated by any DC port power control loop after passing through the PI regulator;
[0056] The modulation wave correction component is generated by controlling the parameter p, and is superimposed with the three-phase initial modulation wave signal to generate a corrected modulation signal;
[0057] The voltages of the two DC ports are measured, and the coordinates of the corrected modulation signals are transformed according to the measured values to generate two groups of modulation waves;
[0058] The two groups of modulated waves after coordinate transformation are respectively intersected with the same triangular carrier wave, and the driving pulse signal of the switch tube is generated by comparison.
[0059] Specific:
[0060] Dual DC port asymmetric T-type three-level grid-connected inverter Figure 2 As shown, its DC side port 1 and port 2 are connected to the DC source V DC1 ,V DC2 , the AC grid voltage is recorded as v a ,v b ,v c The main power circuit of the inverter includes 12 switching tubes and 3 filter inductors.
[0061] The control block diagram of the control method provided by the present invention is as follows: Figure 6 As shown, it mainly includes three parts: DC side power distribution controller, modulation wave converter and carrier pulse width modulator.
[0062] The flow chart of the control method provided by the present invention is as follows: Figure 1 As shown, the following steps are included:
[0063] Step 1: Measure the three-phase AC side voltage v a ,v b ,v c , three-phase AC side current i a ,i b ,i c , the AC side voltage phase angle θ is tracked by the phase-locked loop, and the three-phase AC side current is converted into the direct axis current i through Park transformation d and the quadrature axis current i q ;
[0064] Step 2: i d ,i q Respectively with the set direct and quadrature axis current i d * ,i q * The difference is sent to the PI regulator. After the PI regulator output is Park inverse transformed and limited, the three-phase initial modulation wave signal v is generated. ma0 ,v mb0 ,v mc0 ;
[0065] Step 3: Measure the power P of a DC port DC , subtracted from the set value, and input into the PI regulator to generate the control parameter p, the range of p is -1≤p≤1;
[0066] Step 4: Generate correction component v by controlling parameter p m0 , and superimposed with the initial modulation wave signal generated in the second step to generate a modified modulation signal v ma ,v mb ,v mc ;
[0067] Step 5: Measure the voltage V of the two DC ports DC1 ,V DC2 , according to the measured value, the modified modulation signal v ma ,v mb ,v mc Coordinate transformation is performed to compress it to the [0,1] interval first, and then the waveform is divided according to the voltage ratio of the corresponding DC port and mapped to the [0,1] interval respectively, generating two sets of modulation waves vma1 * ,v mb1 * ,v mc1 * and v ma2 * ,v mb2 * ,v mc2 * ;
[0068] Step 6: Intersect the two groups of modulated waves after coordinate transformation with the same triangular carrier respectively, and generate a driving pulse signal for the switch tube by comparing the sizes.
[0069] The three-phase initial modulation wave signal v generated in step 2 of the above technical solution ma0 ,v mb0 ,v mc0 In form, it is a sinusoidal signal with equal frequency and amplitude and a phase difference of 120°. The specific generation process is: input the three-phase AC voltage into the phase-locked loop to track its phase angle θ, and use the phase angle θ to perform Park transformation on the three-phase AC current to obtain the direct-axis current i d and the quadrature axis current i q , and respectively compare it with the set direct and quadrature axis current i d * ,i q * The difference is sent to the PI regulator. Here, the direct-axis current corresponds to the output active power, and the quadrature-axis current corresponds to the output reactive power. The output of the PI regulator can generate a three-phase initial modulation wave signal v after Park inverse transformation and limiting. a0 ,v b0 ,v c0 .
[0070] The three-phase initial modulation wave signal can be expressed as:
[0071]
[0072] Where: m and ω are the modulation ratio and angular frequency respectively.
[0073] The action logic of the control parameter p (-1≤p≤1) in step 3 of the above technical solution can be expressed as follows: when p=1, the DC sources connected to port 1 and port 2 simultaneously transmit energy to the AC side through the inverter. The closer the value of p is to 1, the higher the power provided by port 2 accounts for the total AC side output power; when p=-1, port 2 is in a power absorption state, part of the power output from port 1 is transmitted to the AC side, and the remaining part is fed into port 2. The closer the value of p is to -1, the higher the proportion of power fed into port 2.
[0074] The modified modulation signal generated by controlling the parameter p in step 4 of the above technical solution can be described in detail as follows:
[0075] Find the minimum and maximum values of the three-phase initial modulation wave signal. The expression is:
[0076] v min =min(v ma0 ,v mb0 ,v mc0 )
[0077] v max =max(v ma0 ,v mb0 ,v mc0 )
[0078] Combined with the control parameter p, the correction amount of the modulation wave is calculated according to the following expression:
[0079]
[0080] Finally, the correction value is added to the initial modulation wave, and the corrected three-phase modulation wave v is calculated according to the following expression ma ,v mb ,v mc :
[0081]
[0082] When 0≤p≤1, the curve of the modified modulated wave signal is as follows Figure 3 As shown in the figure, the modulation wave after the correction component is injected is no longer symmetrical based on the zero coordinate axis, and contains a negative DC bias; the active power changes with the modulation ratio m and the parameter p, and is a positive value. This is because the negative current flowing through the midpoint is blocked, and its average value is positive, which can achieve DC ports 1 and 2 to output energy simultaneously.
[0083] When -1≤p<0, the curve of the modified modulated wave signal is as follows Figure 4 As shown in the figure, the modulated wave after the correction component is injected is no longer symmetrical based on the zero coordinate axis, and contains a positive DC bias; the active power changes with the modulation ratio m and the parameter p, and is a negative value. The maximum positive current flowing through the midpoint is blocked, which causes its average value to be negative, allowing power to flow into DC port 2, which absorbs power.
[0084] In order to adapt to the change of the voltage of DC ports 1 and 2, the above technical solution step 5 performs coordinate transformation on the modified modulation signal to generate two sets of modulation waves v ma1 * ,v mb1 * ,v mc1 * and v a2* ,v b2 * ,v c2 * , with the modulation wave v of phase A when p=1 ma Taking the example, the specific principle and process are described as follows:
[0085] First, v whose value range is [-1,1] a Compressed to the interval [0,1], such as Figure 5 As shown, the generated waveform is recorded as v ma ':
[0086]
[0087] Then the waveform is divided into two parts according to the vertical axis: 1 and h 2 The height ratio of the two parts satisfies the following relationship:
[0088]
[0089] Then the waveform v ma ' Input two limit modules respectively, the limit values are 0-h 2 and h 1 -h 2 The generated signals are denoted as v ma1 ' and v ma2 '.
[0090] Finally, v ma1 ' and v ma2 'Map from the interval [0, h2] and [h2, h1+h2] to the interval [0,1], and the resulting transformed modulation wave is recorded as v ma1 * and v ma2 * :
[0091] v ma1 * =hv ma1 '
[0092]
[0093] In the formula is the ratio of the voltages at the two ports, and the coordinate transformation of the corrected modulated wave is completed.
[0094] The modulation process of step 6 of the above technical solution is as follows: the two groups of modulation waves generated in step 5 are respectively combined with the same triangular carrier v with a value range of [0,1] * The intersection generates twelve switch tube drive signals through comparison. The judgment conditions and device switch states are shown in the following table:
[0095] Table 1 Switch tube driving conditions
[0096]
[0097] In the table, x=a,b,c.
[0098] In order to verify the effectiveness of the power control method of the present invention, the present invention provides a specific example, and its main parameters are as follows:
[0099] DC port 1 voltage V DC1 =200V;
[0100] DC port 2 voltage V DC2 =100V;
[0101] AC grid line voltage effective value V AB =95V;
[0102] AC grid frequency f = 50 Hz;
[0103] Inverter rated output power P = 1kW;
[0104] Switching frequency f s =10kHz;
[0105] Filter inductor L a =L b =L c =3mH;
[0106] When the control parameter p = 0.5, Figure 5 The simulation waveform of the control method provided by the present invention is shown as follows Figure 7 As shown in the figure, the inverter outputs 1kW of power to the AC side, port 1 provides 0.7kW of power, and port 2 provides the remaining 0.3kW of power required; when the control parameter p = -0.5, the simulation waveform is as follows Figure 8 As shown in the figure, the inverter outputs 1kW of power to the AC side, port 1 outputs 1.3kW of power, and port 2 is in a power absorption state with an input power of 0.3kW. Power regulation between DC ports 1 and 2 and the AC side is achieved, verifying the effectiveness of the control method of the present invention.
[0107] The embodiments of the present application can be provided as methods or computer program products. Therefore, the present application can adopt the form of complete hardware embodiment, complete software embodiment, or the embodiment in combination with software and hardware. Moreover, the present application can adopt the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code. The scheme in the embodiments of the present application can be implemented in various computer languages, for example, object-oriented programming language Java and literal scripting language JavaScript, etc.
[0108] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0109] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0110] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0111] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
Claims
1. A power allocation method for a dual DC port asymmetric three-level grid-connected inverter. It is characterized in that include: Measure the three-phase AC side voltage and three-phase AC side current, and track the three-phase AC side voltage phase angle through a phase-locked loop, and convert the three-phase AC side current into direct-axis current and quadrature-axis current through Park transformation; The direct-axis current and quadrature-axis current are respectively subtracted from the set value and sent to the PI regulator. The output of the PI regulator is subjected to Park inverse transformation and amplitude limiting to generate a three-phase initial modulation wave signal. The control parameters are generated by any DC port power control loop after passing through the PI regulator. p , control parameters p The value range is from -1 to 1; By controlling the parameters p Generate a modulated wave correction component and superimpose it with the three-phase initial modulated wave signal to generate a corrected modulated signal; The voltages of the two DC ports are measured, and the coordinates of the corrected modulation signals are transformed according to the measured values to generate two groups of modulation waves; The two groups of modulated waves after coordinate transformation are respectively intersected with the same triangular carrier wave, and the driving pulse signal of the switch tube is generated by comparison; The three-phase initial modulation wave signal is expressed as: Wherein: represents a three-phase initial modulation wave signal, and are the modulation ratio and angular frequency respectively; The minimum and maximum values of the three-phase initial modulation wave signal are expressed as: in, Indicates the minimum value of the three-phase initial modulation wave signal, Indicates the maximum value of the three-phase initial modulation wave signal; The control parameters p Generate the modulated wave correction component, including: The corrected modulation signal is: in, represents the modified modulation signal.
2. The power distribution method of a dual DC port asymmetric three-level grid-connected inverter according to claim 1, Features: The voltages of the two DC ports are measured, and coordinate transformation is performed on the corrected modulation signal according to the measured values to generate two groups of modulation waves, specifically including: The modified modulation signal with a value range of [-1,1] is proportionally compressed to the interval [0,1], recorded as waveform , the waveform According to the vertical axis, the height is divided into and The ratio of the heights of the two parts can be expressed as: in, , Respectively represent the voltages of the two DC ports; The waveform Input two limit modules respectively, and the limit values are 0 to as well as arrive The generated signals are recorded as and ; Will and Mapping from the intervals [0, h2] and [h2, h1+h2] to the interval [0, 1], the two sets of modulation waves after coordinate transformation are recorded as and : In the formula is the ratio of the voltages at the two ports, and That is the modulation wave that completes the coordinate transformation, where x is a, b or c.
3. A computer-readable storage medium storing one or more programs, It is characterized in that The one or more programs include instructions which, when executed by a computing device, cause the computing device to perform any one of the methods according to claims 1-2.
4. A computing device, It is characterized in that include: One or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs include instructions for executing any of the methods according to claims 1-2.
Citation Information
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