A heterogeneously integrated artificial retinal memristor device and its preparation method
By heterogeneously integrating high-k dielectric materials and semiconductor nanosheets, an artificial retinal memristor device that integrates perception, storage and computing is constructed, which solves the bottleneck problem in traditional chip computing architecture and realizes real-time information processing and efficient integration.
Patent Information
- Application Number
- CN202211489475.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-25
- Publication Date
- 2025-09-05
- Estimated Expiration
- 2042-11-25
AI Technical Summary
In the von Neumann computing architecture of traditional chips, the storage unit and the computing unit are physically separated, resulting in limited computing speed and capabilities, making it difficult to keep up with the growing computing power gap. Traditional memristors also lack perception functions and cannot achieve the integration of perception, storage, and computing.
A heterogeneously integrated artificial retinal memristive device is designed, high-k dielectric materials are heterogeneously integrated with semiconductor nanosheets, a device that integrates perception, storage and computing is constructed, the integration of photoelectric sensing units and storage units is achieved through silicon-silicon bonding, and the functional characteristics of different materials are utilized to achieve integrated sensing, storage and computing.
It achieves an improvement in the ability to process information instantly, breaks the bottleneck of traditional computing, and enables a single device unit to complete data collection, processing, and storage tasks, thus avoiding energy consumption and loss in information transmission and improving the integration density and work efficiency of the chip.
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Figure CN115768252B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a heterogeneously integrated artificial retinal memristor device and a preparation method thereof. Background Art
[0002] Traditional chips are based on the von Neumann computing architecture, where the memory and computing units are physically separated, significantly limiting their computing speed and capabilities. Despite efforts to improve computing power through continuous reductions in chip size and increased integration density, chip performance continues to struggle to keep pace with the growing computing power gap. In particular, as integrated circuits continue to shrink, the minimum chip size and integration density are approaching physical limits. Developing new integrated circuit chips for the post-Moore era is crucial to the development of the semiconductor industry.
[0003] The human eye, a crucial optical information acquisition unit in the human body, not only captures a wide range of image information but also effectively identifies and judges it. To enable electronic devices to possess optical signal perception and processing capabilities similar to those of the human eye, the development of neuromorphic electronic devices that integrate sensing, storage, and computing is of great significance.
[0004] Memristors, as a new type of electronic component, possess a certain memory effect on the current flowing through them. They can be used for functions such as storage and logical calculations, and have the potential to achieve integrated storage and computing. However, traditional memristors lack sensing capabilities and cannot achieve the functional integration of perception, storage, and computing similar to artificial retina, and their information processing efficiency remains limited. Therefore, it is necessary to start from the underlying design of the memristor and design heterogeneous functional layers with the potential for photoelectric sensing, storage and memory, and neuromorphic computing. Using heterogeneous integrated material systems, artificial retina devices with integrated sensing, storage, and computing functions are constructed. Summary of the Invention
[0005] The present invention designs an artificial retinal memristive device that integrates perception, storage, and computing. It heterogeneously integrates a high-k dielectric material with a resistance transition function with a semiconductor nanosheet with a photoelectric response, cleverly utilizing the unique functional characteristics of different materials to achieve the ultimate integrated sensing, storage, and computing functions and bionic retina functions. It avoids the information delay and transmission energy consumption at the data acquisition, data processing, and data storage ends in traditional CMOS chips, solves and surpasses the computing bottleneck problem of the traditional von Neumann computing architecture, completes data acquisition, processing, and storage in the same device unit, and greatly improves the chip's ability to process information in real time.
[0006] The heterogeneous integrated artificial retinal memristor device is composed of two silicon wafers containing artificial retinal memristors bonded to each other on the back to achieve silicon-silicon bonding, interconnection and integration into a heterogeneous integrated artificial retinal memristor device. The upper artificial retinal memristor serves as a photoelectric sensing unit, and the lower artificial retinal memristor serves as a storage unit and processing unit. Both the upper and lower devices can independently complete the tasks of light signal acquisition, processing and storage. The upper artificial retinal memristor / lower artificial retinal memristor includes: a substrate with a first groove formed therein; a first isolation layer formed on the surface of the first groove; nanopillars, which are mutually connected. The first groove is distributed at intervals, and its height is the same as the depth of the first groove; the covering electrode covers the surface of the first isolation layer and the surface of the nanopillar; the resistance conversion functional layer covers the surface of the covering electrode and extends to cover the upper surface of the substrate on both sides of the first groove; the photoelectric sensing layer is formed on the surface of the resistance conversion functional layer and forms a heterogeneous integration with the resistance conversion functional layer to realize the acquisition and processing of photoelectric signals; the central electrode is formed on the photoelectric sensing layer and completely fills the first groove, thereby forming a ring electrode together with the covering electrode; the second groove is located at the first isolation layer at the edge of the first groove, The first insulating layer is formed by a first insulating layer and a second insulating layer. The first insulating layer is formed by a first insulating layer and a second insulating layer. The first insulating layer is formed by a first insulating layer and a second insulating layer. The first insulating layer is formed by a first insulating layer and a second insulating layer. The first insulating layer is formed by a first insulating layer and a second insulating layer. The first insulating layer is formed by a first insulating layer and a second insulating layer. The first insulating layer is formed by a first insulating layer and a second insulating layer. The bottom of the groove is flush with the bottom of the substrate, and the top is higher than the lowest point of the coating electrode and lower than the highest point of the coating electrode; the external interconnection point is formed above the lower part of the third isolation layer and is connected to the coating electrode, thereby leading out the coating electrode; the upper part of the third isolation layer is filled in the third groove, the bottom is connected to the external interconnection point, and the top is higher than the upper surface of the central electrode and lower than the top of the interconnection line; the contact electrode is formed above the central electrode filled in the first groove, and acts together with the annular electrode on the heterogeneously integrated photoelectric sensing layer and the resistance conversion functional layer to form an annular loop in the artificial retinal device.
[0007] In the heterogeneously integrated artificial retinal memristive device of the present invention, preferably, the first isolation layer is at least one or a combination of Si3N4, SiCOH, SiON, SiOH, and Al2O3.
[0008] In the heterogeneously integrated artificial retinal memristive device of the present invention, preferably, the coating electrode is Pt, Al, Pd, Au, Cr, Ni, Zn or Ag.
[0009] In the heterogeneously integrated artificial retinal memristive device of the present invention, preferably, the resistance switching functional layer is a ternary high-k oxide medium.
[0010] In the heterogeneously integrated artificial retinal memristor device of the present invention, preferably, the photoelectric sensing layer is a combination of one or more of CdS, CdSe, PtS, PtSe, GeS, and GeSe.
[0011] The method for preparing a heterogeneously integrated artificial retinal memristor device of the present invention comprises the following steps: forming a first groove on a substrate; forming a first isolation layer on the surface of the first groove; forming nanocolumns spaced apart from each other in the first groove, and the height of the nanocolumns being the same as the depth of the first groove; forming a coating electrode covering the surface of the first isolation layer and the surface of the nanocolumns; forming a resistance conversion functional layer so that it covers the surface of the coating electrode and extends to cover the upper surface of the substrate on both sides of the first groove; forming a photoelectric sensing layer on the surface of the resistance conversion functional layer so that it forms a heterogeneous integration with the resistance conversion functional layer for realizing the acquisition and processing of photoelectric signals; forming a center electrode on the photoelectric sensing layer; electrode, and completely fill the first groove, thereby forming a ring electrode together with the cladding electrode; forming a second groove at the first isolation layer at the edge of the first groove, etching through the central electrode layer, the photoelectric sensing layer, and the resistance conversion functional layer in sequence, and stopping at the first isolation layer; filling the second isolation layer in the second groove; etching along the vertical direction of the silicon nanocolumn to form a through hole, so that it passes through the central electrode, the photoelectric sensing layer, the resistance conversion functional layer, the cladding electrode, the silicon nanocolumn, the first isolation layer and the substrate silicon; filling the through hole with an interconnection line, the bottom of which is flush with the bottom of the substrate and the top position exceeds the upper surface of the central electrode, for realizing the interconnection of multi-layer devices; along the vertical direction of the silicon nanocolumn Etching is performed in the direction to form a third groove, the width of which is the same as that of the silicon nanocolumn, and passes through the central electrode, the photoelectric sensing layer, the resistance conversion functional layer, the coating electrode, the silicon nanocolumn, the first isolation layer and the substrate silicon; the lower part of the third isolation layer is filled in the third groove, the bottom of which is flush with the bottom of the substrate, the top is higher than the lowest point of the coating electrode, and lower than the highest point of the coating electrode; an external interconnection point is formed above the lower part of the third isolation layer, and is connected to the coating electrode, thereby leading out the coating electrode; the upper part of the third isolation layer is filled in the third groove, the bottom of which is connected to the external interconnection point, the top is higher than the upper surface of the central electrode, and lower than the top of the interconnection line; A contact electrode is formed above the central electrode filled in the first groove, and acts together with the annular electrode on the heterogeneously integrated photoelectric sensing layer and the resistance conversion functional layer to form a ring loop in the artificial retinal device. The back of the silicon wafer is polished, and then the back of the silicon wafer is activated. The backs of the two silicon wafers containing artificial retinal memristors are bonded to each other to achieve silicon-silicon bonding. The two silicon wafers are interconnected and integrated into a heterogeneously integrated artificial retinal memristor device, wherein the upper artificial retinal memristor serves as a photoelectric sensing unit, and the lower artificial retinal memristor serves as a storage unit and processing unit, and both the upper and lower devices can independently complete the tasks of optical signal acquisition, processing and storage.
[0012] In the method for preparing the heterogeneously integrated artificial retinal memristive device of the present invention, preferably, the coating electrode is Pt, Al, Pd, Au, Cr, Ni, Zn or Ag.
[0013] In the method for preparing the heterogeneously integrated artificial retinal memristive device of the present invention, preferably, the resistance switching functional layer is a ternary high-k oxide medium.
[0014] In the method for preparing the heterogeneously integrated artificial retinal memristor device of the present invention, preferably, the photoelectric sensing layer is a combination of one or more of CdS, CdSe, PtS, PtSe, GeS, and GeSe.
[0015] In the method for preparing the heterogeneously integrated artificial retinal memristor device of the present invention, preferably, the nanorods are silicon nanorods, silicon oxide nanorods, aluminum oxide nanorods, zinc oxide nanorods or hafnium oxide nanorods.
[0016] Beneficial effects:
[0017] (1) By learning and simulating the retinal functions of organisms in the natural environment, we can break the bottleneck of the computing architecture of traditional chips and build an artificial retinal device that integrates information perception, information processing and information storage beyond the von Neumann architecture, providing a new direction for the development of devices in the post-Moore era.
[0018] (2) Since high-k dielectric materials only have the storage function of resistance transition, while semiconductor nanosheets mostly have photoelectric sensing functions, we take advantage of the complementary advantages of the two materials and design a sensing, storage and computing integrated memristor device that heterogeneously integrates high-k dielectric materials and semiconductor nanosheets from the bottom of the materials, laying the foundation for heterogeneously integrated multifunctional memristors.
[0019] (3) The constructed heterogeneous integrated artificial retina device can complete the tasks that the three parts of the traditional CMOS chip need to complete in coordination with only a single device unit, avoiding energy consumption and loss of information during transmission and realizing in-situ information processing. It is a new type of electronic device with great development potential. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 This is a flow chart of the preparation method of heterogeneously integrated artificial retinal memristive devices.
[0021] Figures 2 to 13 This is a structural schematic diagram of each stage of the preparation method of heterogeneously integrated artificial retinal memristive devices. DETAILED DESCRIPTION
[0022] In order to make the purpose, technical solutions and advantages of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. The described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0023] In the description of the present invention, it should be noted that the terms "upper," "lower," "vertical," and "horizontal," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate and simplify the description of the present invention. They are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limitations on the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0024] In addition, many specific details of the present invention are described below, such as device structure, materials, dimensions, processing techniques, and technologies, to facilitate a clearer understanding of the present invention. However, as will be appreciated by those skilled in the art, the present invention may be practiced without following these specific details. Unless otherwise noted below, various components of the device may be constructed from materials known to those skilled in the art, or materials with similar functions developed in the future may be used.
[0025] Figure 1 This is a flow chart of the preparation method of heterogeneously integrated artificial retinal memristor devices. Figure 1 As shown, the method for preparing a heterogeneously integrated artificial retinal memristor device includes the following steps:
[0026] In step S1, low-doped silicon is selected as the substrate 100, and a first groove is etched in the silicon substrate by deep plasma etching, reactive ion etching, ion milling, laser ablation or wet etching. Then, a 10-50 nm thick SiO2 is grown in the first groove as a first isolation layer 101 by chemical vapor deposition, atomic layer deposition, physical vapor deposition, thermal oxidation or the like, and the SiO2 portion exceeding the first groove is etched by photolithography and etching. The resulting structure is as shown in FIG. Figure 2 The etching gas is preferably CF4, HBr, HCl, CHF3, SF4, etc., and the isolation layer material can also be at least one or a combination of Si3N4, SiCOH, SiON, SiOH, Al2O3, etc.
[0027] Step S2, using photolithography to define the effective area of the nanorod array, and using low pressure chemical vapor deposition (LPCVD) to directionally grow silicon nanorods 102 spaced apart from each other in the non-mask area, the resulting structure is as follows: Figure 3 As shown. The width of the silicon nanopillar is 50 to 100 nm, and the height of the silicon nanopillar needs to be consistent with the depth of the first groove to form an isolation structure for separating devices. High-purity silane is used as the reaction gas for LPCVD preparation of silicon nanopillars, and the deposition pressure is controlled at 0.2 to 0.6 Torr. Preparation methods can also use physical vapor deposition, chemical vapor deposition, atomic layer deposition, thermal evaporation, pulsed laser deposition, etc. The material of the nanopillar can be selected from silicon oxide nanopillars, aluminum oxide nanopillars, zinc oxide nanopillars, hafnium oxide nanopillars, etc.
[0028] In step S3, a Pt layer with a thickness of 10-30 nm is grown on the substrate having the silicon nanopillar array by physical vapor deposition as the device's cladding electrode 103, and the Pt 103 outside the outer edge of the first silicon oxide isolation layer 101 on both sides of the first groove is etched away by photolithography and dry etching, so that the cladding electrode is aligned with the first silicon oxide isolation layer 101 in the horizontal direction, that is, covering the surface of the first isolation layer SiO2101 and the surface of the silicon nanopillar 102. The resulting structure is as shown in FIG. Figure 4 As shown. The coating electrode can also be grown using thermal evaporation or electron beam evaporation. The coating electrode can also be made of Al, Pd, Au, Cr, Ni, Zn, Ag, etc. Dry etching gases include CCl4, BCl3, SiCl4, or a mixture thereof.
[0029] Step S4, using atomic layer deposition technology to continue growing a 5-10 nm thick high-k type HfAlOx film on the surface of the above structure as a resistance conversion functional layer 104, so that it covers the surface of the coating electrode 103 and extends to cover the upper surface of the silicon wafer 100 on both sides of the first groove. The resulting structure is as follows Figure 5 As shown. Other growth processes include physical vapor deposition, thermal evaporation, chemical vapor deposition, and pulsed laser deposition. The thin film can be made from one or a combination of ternary high-k oxides such as HfAlOx, HfZrOx, HfLaOx, HfTaOx, HfTiOx, HfZnOx, and HfSiOx.
[0030] Step S5, oxygen plasma is used to treat the surface of the resistance conversion functional layer HfAlOx104 using oxygen and argon (flow ratio 3:1), and CdS semiconductor nanosheets 105 are grown on the surface of the HfAlOx resistance conversion functional layer 104 by electroplating. The resulting structure is as shown in FIG. Figure 6As shown. The thickness of the CdS semiconductor nanosheet is controlled at 5-10nm, and it is used as a photoelectric sensing layer to form a heterogeneous integration with the resistance conversion functional layer HfAlOx functional layer to realize the acquisition and processing of photoelectric signals. The above heterogeneous integrated structure is then annealed at 400℃ for 10-60 minutes in a pure N2 atmosphere to improve the photoelectric response performance of CdS and optimize the interface layer defects of different functional materials. The semiconductor nanosheet material can be selected from one or more combinations of CdS, CdSe, PtS, PtSe, GeS, GeSe, etc.; the annealing atmosphere is preferably an inert gas atmosphere such as N2, Ar, etc.; the annealing temperature is preferably 400-600℃.
[0031] Step S6, using physical vapor deposition to grow the ITO center electrode 106 of the artificial retina device on the surface of the CdS semiconductor nanosheet 105, and to completely fill the first groove, thereby forming a ring electrode together with the covering electrode 103 in the artificial retina device. The resulting structure is as follows Figure 7 As shown in the figure, the center electrode can be made of transparent electrode materials such as ITO, In2O3, and PEDOT:PSS.
[0032] Step S7, etching is performed at the SiO2 first isolation layer 101 at the edge of the first groove by photolithography and deep plasma etching, and etching is performed sequentially to penetrate the central electrode 106, the CdS photoelectric sensing layer 105, and the HfAlOx resistance conversion functional layer 104, and the etching stops at the SiO2 first isolation layer 101 to form a second groove. Subsequently, the second groove is filled with a SiCOH second isolation layer 107 by plasma enhanced chemical vapor deposition (PECVD). The resulting structure is as shown in FIG. Figure 8 The etching method may also be at least one or a combination of reactive ion etching, ion milling, laser ablation, or wet etching. The material of the second isolation layer may be one or a combination of carbon- or fluorine-doped silicon oxide-type low dielectric constant films such as SiCOH and SiOF.
[0033] Step S8, in order to separate the artificial retina array into independent device units, etching is performed along the vertical direction of the silicon nanopillar 102 by means of photolithography and deep plasma etching, and the etching depth penetrates the central electrode 106, CdS photoelectric sensing layer 105, HfAlOx resistance conversion functional layer 104, coating electrode 103, silicon nanopillar 102, SiO2 first isolation layer 101 and substrate silicon 100, forming a through hole that runs through the entire substrate, which is used to realize the interconnection of multi-layer devices and reduce production costs and transmission losses. The through hole width is preferably 5-10nm. Subsequently, a Cu electrode is filled in the through hole as an interconnection line 108 by physical vapor deposition, and the resulting structure is as shown. Figure 9As shown, the bottom of the Cu electrode 108 is located at the bottom of the substrate 100, and the top thereof exceeds the upper surface of the central electrode 106 by 30-40 nm.
[0034] In step S9, etching is performed along the vertical direction of the silicon nanocolumn by photolithography and deep plasma etching. The etching width is the same as that of the silicon nanocolumn 102 (10-50 nm), and the etching depth sequentially penetrates the central electrode 106, the CdS photoelectric sensing layer 105, the HfAlOx resistance conversion functional layer 104, the coating electrode 103, the silicon nanocolumn 102, the SiO2 first isolation layer 101 and the substrate silicon 100 to form a third groove that runs through the entire substrate. Subsequently, SiCOH is filled in the third groove by plasma enhanced chemical vapor deposition as the lower third isolation layer 109. The third isolation layer is divided into two parts. The height requirements of the lower third isolation layer are as follows: the bottom part needs to cover the bottom layer of the silicon substrate 100, and the top part needs to be higher than the lowest point of the coating electrode Pt103, but lower than the highest point of the coating electrode Pt103. Subsequently, a Cu electrode with a thickness of 5-10 nm is grown by physical vapor deposition to connect it to the coating electrode 103 as the external interconnection point 110 of the coating electrode. The resulting structure is as shown in FIG. Figure 10 The material of the third isolation layer can be selected from one or a combination of low dielectric constant films such as SiCOH, SiOF, and other carbon- or fluorine-doped silicon oxide films.
[0035] Step S10, as Figure 11 As shown, the third recess is further filled with an upper third isolation layer 109 using plasma-enhanced chemical vapor deposition (PECVD). The bottom of the upper third isolation layer 109 is in contact with the Cu external interconnect 110, and the top height is required to extend 10-20 nm beyond the upper surface of the center electrode 106, thereby forming a complete third isolation layer 109. This ensures that each device has an independent cladding electrode 103 connected via the Cu external interconnect 110, allowing for independent and uninterrupted operation. The third isolation layer can be made of one or a combination of low-dielectric-constant films such as SiCOH and SiOF, or other carbon- or fluorine-doped silicon oxide films.
[0036] Step S11, using photolithography and physical vapor deposition to grow 10-20nm thick Au as a contact electrode 111 above the center electrode 106 filled in the first groove, the resulting structure is as follows Figure 12As shown, a ring electrode composed of a central electrode and a covering electrode acts together with the heterogeneously integrated CdS photoelectric sensing layer 105 and HfAlOx resistive switching functional layer 104, forming a ring loop in the artificial retina device, increasing the device's effective operating area and improving its light sensing efficiency. The contact electrode can be formed using one or a combination of growth processes such as physical vapor deposition, thermal evaporation, and electron beam evaporation. The electrode material can be selected from one or a combination of Au, Al, Ti, Ta, Ni, Pt, TiN, and TaN.
[0037] Repeat the above steps S1-S11 using a new silicon wafer to achieve the same device structure to realize the vertical integration and interconnection of two artificial retinal memristive device arrays.
[0038] Step S12: polish the back of the two silicon wafers, and then use oxygen plasma to activate the back of the silicon wafers with oxygen. The backs of the two silicon wafers are bonded together and annealed in a nitrogen environment for 1-5 hours to complete the silicon-silicon bonding. Figure 13 As shown, two silicon chips containing artificial retinal memristors are interconnected and integrated, which improves the integration density and collaborative working efficiency of the devices and reduces the complexity of leads and integration.
[0039] like Figure 13 As shown, the two bonded silicon wafers are attracted together by intermolecular forces, forming a heterogeneously integrated artificial retinal memristor device. The device consists of two layers, each with a ring structure, which can achieve efficient acquisition, processing, and storage of optical signals. Compared with traditional optical signal sensing, processing, and storage units, the device of the present invention does not need to consider the complex signal conversion and integration difficulties between the sensing unit, storage unit, and computing unit. The artificial retinal memristor on the upper layer replaces the traditional photoelectric sensing unit, and the artificial retinal memristor on the lower layer replaces the traditional storage unit and processing unit. Moreover, the retinal memristors on both the upper and lower layers can independently complete the optical signal acquisition, processing, and storage tasks, greatly improving the working efficiency and integration density of chips in the post-Moore era.
[0040] The above description is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by any technician familiar with this technical field within the technical scope disclosed in the present invention should be covered by the scope of protection of the present invention.
Claims
1. A heterogeneously integrated artificial retinal memristor device, characterized in that: Two pieces of substrate silicon containing artificial retinal memristors are bonded to each other to achieve silicon-silicon bonding, interconnection and integration into a heterogeneous integrated artificial retinal memristor device. The upper artificial retinal memristor serves as a photoelectric sensing unit, and the lower artificial retinal memristor serves as a storage unit and processing unit. Both the upper and lower devices can independently complete the tasks of optical signal acquisition, processing, and storage. Among them, the upper artificial retinal memristor / lower artificial retinal memristor includes: The silicon substrate is formed with a first groove; a first isolation layer formed on a surface of the first groove; Nanopillars are spaced apart and distributed in the first groove, and the height of the nanopillars is the same as the depth of the first groove; A coating electrode covering the surface of the first isolation layer and the surface of the nanopillars; a resistance conversion functional layer, covering the surface of the cladding electrode and extending to cover the upper surface of the silicon substrate on both sides of the first groove; A photoelectric sensing layer is formed on the surface of the resistance conversion functional layer and is heterogeneously integrated with the resistance conversion functional layer to realize the acquisition and processing of photoelectric signals; a central electrode formed on the photoelectric sensing layer and completely filling the first groove, thereby forming a ring electrode together with the covering electrode; The second groove is located at the first isolation layer at the edge of the first groove and penetrates the central electrode, the photoelectric sensing layer and the resistance conversion functional layer; a second isolation layer filling the second groove; A through hole penetrates the central electrode, the photoelectric sensing layer, the resistance conversion functional layer, the cladding electrode, the nanocolumn, the first isolation layer and the substrate silicon; Interconnection lines are filled in the through holes, with their bottoms flush with the bottom of the silicon substrate and their tops exceeding the upper surface of the central electrode, for interconnecting multi-layer devices; The third groove has the same width as the nanocolumn and passes through the central electrode, the photoelectric sensing layer, the resistance conversion functional layer, the cladding electrode, the nanocolumn, the first isolation layer and the substrate silicon; The lower portion of the third isolation layer is filled in the third groove, the bottom of the third isolation layer is flush with the bottom of the silicon substrate, and the top of the third isolation layer is higher than the lowest point of the cladding electrode and lower than the highest point of the cladding electrode; an external interconnection point formed above the lower portion of the third isolation layer and connected to the cladding electrode, thereby leading out the cladding electrode; The upper portion of the third isolation layer is filled in the third groove, the bottom of the third isolation layer is connected to the external interconnection point, and the top of the third isolation layer is higher than the upper surface of the central electrode and lower than the top of the interconnection line. The contact electrode is formed above the central electrode filled in the first groove, and acts together with the annular electrode on the heterogeneously integrated photoelectric sensing layer and the resistance conversion functional layer to form an annular loop in the artificial retinal device.
2. The heterogeneously integrated artificial retinal memristor device according to claim 1, characterized in that: The first isolation layer is at least one of Si3N4, SiCOH, SiON, SiOH, and Al2O3, or a combination thereof.
3. The heterogeneously integrated artificial retinal memristor device according to claim 1, characterized in that: The coating electrode is Pt, Al, Pd, Au, Cr, Ni, Zn or Ag.
4. The heterogeneously integrated artificial retinal memristor device according to claim 1, characterized in that: The resistance conversion functional layer is a ternary high-k oxide medium.
5. The heterogeneously integrated artificial retinal memristor device according to claim 1, characterized in that: The photoelectric sensing layer is a combination of one or more of CdS, CdSe, PtS, PtSe, GeS, and GeSe.
6. A method for preparing a heterogeneously integrated artificial retinal memristor device, characterized in that: The following steps are involved: forming a first groove on the silicon substrate; forming a first isolation layer on a surface of the first groove; forming nanorods spaced apart from each other in the first groove, wherein the height of the nanorods is the same as the depth of the first groove; forming a coating electrode covering the surface of the first isolation layer and the surface of the nanopillars; forming a resistance conversion functional layer so as to cover the surface of the cladding electrode and extend to cover the upper surface of the silicon substrate on both sides of the first groove; forming a photoelectric sensing layer on the surface of the resistance conversion functional layer to form a heterogeneous integration with the resistance conversion functional layer for collecting and processing photoelectric signals; forming a central electrode on the photoelectric sensing layer and completely filling the first groove to form a ring electrode together with the covering electrode; Forming a second groove at the first isolation layer at the edge of the first groove, etching through the central electrode layer, the photoelectric sensing layer, and the resistance conversion functional layer in sequence, and stopping at the first isolation layer; filling the second groove with a second isolation layer; Etching is performed along the vertical direction of the nanocolumn to form a through hole, so that the through hole passes through the central electrode, the photoelectric sensing layer, the resistance conversion functional layer, the cladding electrode, the nanocolumn, the first isolation layer and the substrate silicon; Filling the through hole with an interconnection line, with its bottom flush with the bottom of the silicon substrate and its top exceeding the upper surface of the central electrode, for interconnecting multi-layer devices; Etching is performed along the vertical direction of the nanopillar to form a third groove, the width of which is the same as that of the nanopillar, and passes through the central electrode, the photoelectric sensing layer, the resistance conversion functional layer, the cladding electrode, the nanopillar, the first isolation layer and the substrate silicon; Filling the third groove with a lower portion of a third isolation layer, wherein the bottom of the third isolation layer is flush with the bottom of the silicon substrate and the top is higher than the lowest point of the cladding electrode and lower than the highest point of the cladding electrode; forming an external interconnection point above the lower portion of the third isolation layer, connected to the cladding electrode, thereby leading out the cladding electrode; Filling the third groove with an upper portion of a third isolation layer, wherein the bottom of the third isolation layer is in contact with the external interconnection point and the top of the third isolation layer is higher than the upper surface of the central electrode and lower than the top of the interconnection line; A contact electrode is formed above the central electrode filled in the first groove, and acts together with the annular electrode on the heterogeneously integrated photoelectric sensing layer and the resistance conversion functional layer to form an annular loop in the artificial retinal device. The back of the substrate silicon is polished and then activated. The backs of two substrate silicon pieces containing artificial retinal memristors are bonded together to achieve silicon-silicon bonding. The two pieces are interconnected and integrated into a heterogeneous integrated artificial retinal memristor device, in which the upper artificial retinal memristor serves as a photoelectric sensing unit, and the lower artificial retinal memristor serves as a storage unit and processing unit. Both the upper and lower devices can independently complete the tasks of optical signal acquisition, processing and storage.
7. The method for preparing a heterogeneously integrated artificial retinal memristor device according to claim 6, characterized in that The coating electrode is Pt, Al, Pd, Au, Cr, Ni, Zn or Ag.
8. The method for preparing a heterogeneously integrated artificial retinal memristor device according to claim 6, characterized in that The resistance conversion functional layer is a ternary high-k oxide medium.
9. The method for preparing a heterogeneously integrated artificial retinal memristor device according to claim 6, characterized in that The photoelectric sensing layer is a combination of one or more of CdS, CdSe, PtS, PtSe, GeS, and GeSe.
10. The method for preparing a heterogeneously integrated artificial retinal memristor device according to claim 6, characterized in that The nanorods are silicon nanorods, silicon oxide nanorods, aluminum oxide nanorods, zinc oxide nanorods or hafnium oxide nanorods.
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