Data shifting method and apparatus and related products

Abstract

The present disclosure relates to a data shift method and device and related products, the products including a combination processing device, the combination processing device including a computing processing device, an interface device, other processing devices and a storage device. The computing processing device can include one or more computing devices. The computing processing device can be configured to perform user-specified operations, and the computing processing device can be implemented as a single-core artificial intelligence processor or a multi-core artificial intelligence processor, or one or more computing devices included in the computing processing device can be implemented as an artificial intelligence processor core or part of the hardware structure of an artificial intelligence processor core. By using the above combination processing device, the present disclosure can improve the operation efficiency of related products when performing operations on neural network models.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of computer, and particularly relates to a data shifting method and device and related products. BACKGROUND

[0002] In the data shifting process, a shifter is usually selected according to the bit length of the data to be shifted, and shifters of different bit lengths are difficult to be reused, so more shifters need to be set to meet the shifting needs, resulting in increased power consumption, increased required devices, and increased area occupied by the devices. SUMMARY

[0003] The present disclosure provides a data shifting method and device and related products.

[0004] According to an aspect of the present disclosure, a data shifting method comprises: segmenting data to be shifted to obtain at least two sub-data to be shifted; determining second shifting information of the sub-data to be shifted according to first shifting information of the data to be shifted and a number of the sub-data to be shifted obtained by the segmentation; performing shifting processing on the sub-data to be shifted according to the second shifting information to obtain target sub-data; and determining target data obtained after the data to be shifted is shifted according to the target sub-data.

[0005] In a possible implementation, the first shifting information comprises a first shifting direction of the data to be shifted, and the second shifting information comprises a second shifting direction of the sub-data to be shifted, wherein the second shifting information of the sub-data to be shifted is determined according to the first shifting information of the data to be shifted and the number of the sub-data to be shifted obtained by the segmentation, comprising: determining the first shifting direction as the second shifting direction.

[0006] In a possible implementation, the first shifting information comprises a first shifting step of the data to be shifted, and the second shifting information comprises a second shifting step of the sub-data to be shifted, wherein the second shifting information of the sub-data to be shifted is determined according to the first shifting information of the data to be shifted and the number of the sub-data to be shifted obtained by the segmentation, comprising: determining a ratio between the first shifting step and the number of the sub-data to be shifted; and determining the second shifting step according to the ratio.

[0007] In a possible implementation, the second shifting step is determined according to the ratio, comprising: in a case where the ratio is an integer, determining the ratio as the second shifting step; or in a case where the ratio is a non-integer, obtaining the second shifting step by rounding down the ratio.

[0008] In a possible implementation, the splitting of the data to be shifted to obtain at least two sub-data to be shifted includes: extracting odd bit data and even bit data of the data to be shifted respectively, obtaining first sub-data to be shifted composed of the odd bit data, and second sub-data to be shifted composed of the even bit data.

[0009] In a possible implementation, the determining of the target data after the data to be shifted is shifted according to the target sub-data includes: determining odd bit data of the target data according to target sub-data obtained after the first sub-data to be shifted is shifted; determining even bit data of the target data according to target sub-data obtained after the second sub-data to be shifted is shifted; and obtaining the target data according to the odd bit data of the target data and the even bit data of the target data.

[0010] In a possible implementation, the obtaining of the target data according to the odd bit data of the target data and the even bit data of the target data includes: in a case where a first shift step of the data to be shifted is odd, obtaining merged data according to the odd bit data of the target data and the even bit data of the target data; and performing one-bit shift processing on the merged data in a first shift direction of the data to be shifted to obtain the target data.

[0011] In a possible implementation, the method further includes: in a case where a bit length of the data to be shifted is greater than a bit length of a shifter used for shift processing, determining a number of the split sub-data to be shifted according to the bit length of the data to be shifted and the bit length of the shifter.

[0012] In a possible implementation, the data to be shifted includes at least one of image data, audio data, and text data.

[0013] According to another aspect of the present disclosure, a block diagram of a data shift device is provided, which includes: a splitting module configured to split data to be shifted to obtain at least two sub-data to be shifted; a shift information determining module configured to determine second shift information of the sub-data to be shifted according to first shift information of the data to be shifted and a number of the sub-data to be shifted obtained by splitting; a shift module configured to perform shift processing on the sub-data to be shifted according to the second shift information to obtain target sub-data; and a determining module configured to determine target data after the data to be shifted is shifted according to the target sub-data.

[0014] In a possible implementation, the first shift information includes a first shift direction of the to-be-shifted data, and the second shift information includes a second shift direction of the to-be-shifted sub-data, and the shift information determination module is further configured to: determine the first shift direction as the second shift direction.

[0015] In a possible implementation, the first shift information includes a first shift step of the to-be-shifted data, and the second shift information includes a second shift step of the to-be-shifted sub-data, and the shift information determination module is further configured to: determine a ratio between the first shift step and a quantity of the to-be-shifted sub-data; and determine the second shift step according to the ratio.

[0016] In a possible implementation, the shift information determination module is further configured to: in a case where the ratio is an integer, determine the ratio as the second shift step; or in a case where the ratio is not an integer, perform floor operation on the ratio to obtain the second shift step.

[0017] In a possible implementation, the splitting module is further configured to: extract odd bit data and even bit data of the to-be-shifted data respectively, to obtain a first to-be-shifted sub-data composed of the odd bit data, and a second to-be-shifted sub-data composed of the even bit data.

[0018] In a possible implementation, the determination module is further configured to: determine odd bit data of the target data according to target sub-data obtained after the first to-be-shifted sub-data is shifted; determine even bit data of the target data according to target sub-data obtained after the second to-be-shifted sub-data is shifted; and obtain the target data according to the odd bit data of the target data and the even bit data of the target data.

[0019] In a possible implementation, the determination module is further configured to: in a case where the first shift step of the to-be-shifted data is odd, obtain merged data according to the odd bit data of the target data and the even bit data of the target data; and perform one-bit shift processing on the merged data according to the first shift direction of the to-be-shifted data to obtain the target data.

[0020] In a possible implementation, the apparatus further includes a quantity determination module configured to: in a case where a bit length of the to-be-shifted data is greater than a bit length of a shifter used for shift processing, determine a quantity of the to-be-shifted sub-data split according to the bit length of the to-be-shifted data and the bit length of the shifter.

[0021] In a possible implementation, the data to be shifted comprises at least one of image data, audio data, and text data.

[0022] According to another aspect of the present disclosure, there is provided an artificial intelligence chip, comprising the data shifting apparatus.

[0023] According to another aspect of the present disclosure, there is provided an electronic device, comprising the artificial intelligence chip.

[0024] According to another aspect of the present disclosure, there is provided a board card, comprising a memory device, an interface apparatus, a control device, and the artificial intelligence chip; wherein the artificial intelligence chip is connected to the memory device, the control device, and the interface apparatus respectively; the memory device is configured to store data; the interface apparatus is configured to realize data transmission between the artificial intelligence chip and an external device; and the control device is configured to monitor a state of the artificial intelligence chip.

[0025] According to another aspect of the present disclosure, there is provided an electronic device, comprising a processor, and a memory configured to store processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to execute the data shifting method.

[0026] According to another aspect of the present disclosure, there is provided a computer-readable storage medium, having stored thereon computer program instructions, which, when executed by a processor, implement the data shifting method.

[0027] According to the data shifting method of the embodiments of the present disclosure, the data to be shifted can be segmented to obtain data to be shifted with a smaller bit length, so as to perform shifting processing on each data to be shifted respectively, thereby eliminating the need to perform shifting processing on data to be shifted with a longer bit length, making the same kind of shifter capable of shifting data with multiple bit lengths, improving the multiplexing efficiency of the shifter, reducing the number of required components and the occupied area, and reducing power consumption.

[0028] According to an aspect of the present disclosure, there is provided an electronic device, comprising a processor, and a memory configured to store processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to execute the above method.

[0029] According to an aspect of the present disclosure, there is provided a computer-readable storage medium, having stored thereon computer program instructions, which, when executed by a processor, implement the above method.

[0030] It should be understood that the general description and detailed description of the following are only exemplary and explanatory, but not limiting the present disclosure. Other features and aspects of the present disclosure will become apparent based on the following detailed description of exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0031] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments consistent with the present disclosure and serve to explain the technical solutions of the present disclosure together with the specification.

[0032] Figure 1 A flow chart of a data shifting method according to an embodiment of the present disclosure is shown;

[0033] Figure 2 An application schematic diagram of a data shifting method according to an embodiment of the present disclosure is shown;

[0034] Figure 3 A block diagram of a data shifting device according to an embodiment of the present disclosure is shown;

[0035] Figure 4 A structural diagram of a combination processing device according to an embodiment of the present disclosure is shown;

[0036] Figure 5 A structural schematic diagram of a board card according to an embodiment of the present disclosure is shown;

[0037] Figure 6 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0038] The technical solutions in the embodiments of the present disclosure will be described clearly and completely below with reference to the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present disclosure.

[0039] It should be understood that the terms “first”, “second”, etc. in the claims, specification and drawings of the present disclosure are used to distinguish different objects, rather than to describe a specific order. The terms “include” and “contain” used in the specification and claims of the present disclosure indicate the presence of the described features, whole, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, whole, steps, operations, elements, components and / or sets thereof.

[0040] It should also be understood that the words used in the specification are words of description rather than limitation, and it is not intended to limit the present disclosure in any way except as it pertains to the attached claim set. As used herein, the singular articles "a," "an" and "the" are intended to mean one or more unless otherwise indicated with specific context. It will be further understood that the terms "includes," "including," "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, items, components, elements, and / or the like but do not preclude the presence or addition of one or more other features, items, components, elements, and / or the like.

[0041] As used in this specification and claims, the terms "if' can be construed to mean "when" or "once," or "in response to a determination" or "in response to the occurrence of an event" depending on the context. Similarly, the phrase "if it is determined" or "if [a described condition or event] is detected" can be construed to mean "once it is determined" or "in response to a determination" or "once [the described condition or event] is detected" or "in response to the occurrence of [a described condition or event]" depending on the context.

[0042] The data shifting method according to the embodiments of the present disclosure can be applied to a processor to improve the processing efficiency of the processor. The processor can be a general-purpose processor, such as a CPU (Central Processing Unit), or an artificial intelligence processor (IPU) for performing artificial intelligence operations. The artificial intelligence operations can include machine learning operations, brain-like operations, and the like. The machine learning operations include neural network operations, k-means operations, support vector machine operations, and the like. The artificial intelligence processor can include one or a combination of a GPU (Graphics Processing Unit), a NPU (Neural-Network Processing Unit), a DSP (Digital Signal Process), and an FPGA (Field-Programmable Gate Array) chip, for example. The present disclosure does not limit the specific type of the processor.

[0043] In a possible implementation, the processor mentioned in the present disclosure can include a plurality of processing units, each of which can independently run various tasks assigned thereto, such as convolution operation tasks, pooling tasks, or fully connected tasks, and the like. The present disclosure does not limit the processing units and the tasks run by the processing units.

[0044] Figure 1 A flowchart of a data shifting method according to an embodiment of the present disclosure is shown, which includes:

[0045] In step S11, the to-be-shifted data is segmented to obtain at least two to-be-shifted sub-data;

[0046] In step S12, the second shift information of the to-be-shifted sub-data is determined according to the first shift information of the to-be-shifted data and the number of the to-be-shifted sub-data obtained by segmentation.

[0047] In step S13, the to-be-shifted sub-data is subjected to shift processing according to the second shift information to obtain target sub-data.

[0048] In step S14, the target data after the to-be-shifted data is shifted is determined according to the target sub-data.

[0049] According to the data shift method of the embodiment of the present disclosure, the to-be-shifted data can be segmented to obtain to-be-shifted sub-data with smaller bit length for shift, which is suitable for a shifter with smaller bit length, so that the same shifter can shift data with multiple bit lengths, improve the multiplexing efficiency of the shifter, reduce the number of required components and the occupied area, and reduce power consumption.

[0050] In a possible implementation, data shift processing is often used in data transmission and other processing processes. The data processed by a computer is usually binary data. In examples, the to-be-shifted data includes at least one of image data, audio data, and text data. The computer can convert these data into binary data that can be processed by the computer for processing, for example, shift processing. When data is shifted, a shifter with a bit length greater than or equal to the bit length of the data can be used to shift the data. For example, a shifter with a bit length greater than 3 (for example, 5) can be used to shift data with a bit length of 3. The part of the data bit with a bit length greater than the bit length of the data can be filled with 0 or 1, etc. For example, when binary data 101 with a bit length of 3 is right-shifted by a shifter with a bit length of 3 (for example, the step length is 2), the low bits can be filled with 0 to make the data right-shift, for example, when the data 101 is input into the shifter, the data in the shifter is 10100, and after moving 2 bits to the right, the data is 00101. The effect of right shift is to multiply the data by 2 n , where n is the step length of the shift, and n is a positive integer. Similarly, the effect of left shift is to divide the data by 2 n . The data bits that exceed the bit length of the shifter can be discarded or arranged in a circular manner if the shifter is not enough to accommodate the to-be-shifted data or the data after the shift. The present disclosure does not limit the specific value, bit length, shift step length, and bit length of the shifter of the to-be-shifted data.

[0051] In a possible implementation, when data is shifted by the shifter, if the bit length of the shifter is smaller than the data before or after the shift, the data bits that are too long can be discarded or arranged in a loop, causing data loss or a decrease in data processing accuracy. Therefore, a shifter with a bit length greater than the data can be used. However, the bit length of the data can change frequently, and the same shifter is difficult to adapt to multiple types of data, resulting in a low shifter reuse rate. Meanwhile, multiple shifters are provided, which increases power consumption and the number and area of components.

[0052] In a possible implementation, to address the above problem, the data to be shifted can be segmented according to a predetermined rule to obtain sub data with a smaller bit length. The sub data has a lower requirement for the shifter, and the shifter is more likely to adapt to the shift of the sub data. For example, the data to be shifted is 8-bit data, and the bit length of the shifter is 6. It is difficult to ensure the processing accuracy when the shifter is used to shift the data to be shifted. However, after the data to be shifted is segmented into two 4-bit sub data to be shifted, the shifter can be used to shift the sub data to be shifted. After the shift, the results of the two sub data to be shifted are recombined according to the predetermined rule, and the target data obtained by shifting the data to be shifted is obtained. The above method can ensure the accuracy of the shift, and does not need to provide more shifters, thereby reducing the number and area of components, lowering power consumption, and improving the reuse rate of the shifter.

[0053] In a possible implementation, whether the data to be shifted needs to be segmented and the number of the sub data to be shifted segmented can be determined first. The method further includes: in a case where the bit length of the data to be shifted is greater than the bit length of a shifter used for shift processing, determining the number of the sub data to be shifted segmented according to the bit length of the data to be shifted and the bit length of the shifter.

[0054] In an example, if the bit length of the data to be shifted is greater than the bit length of the shifter used for shift processing, the shifter is difficult to ensure the processing accuracy, and the data to be shifted can be segmented. The number of the sub data to be shifted segmented can be determined based on the bit length of the data to be shifted and the bit length of the shifter. For example, the ratio of the bit length of the data to be shifted to the bit length of the shifter can be determined, and the ratio is rounded up to obtain the number of the sub data to be shifted. For example, the data to be shifted is 8-bit data, and the bit length of the shifter is 6 bits. It can be determined that the number of the sub data to be shifted segmented is 2.

[0055] In an example, whether the to-be-shifted data needs to be split and the number of to-be-shifted sub-data obtained by splitting can be determined based on a sum of a bit length of the to-be-shifted data and a step length of the shift and a bit length of the shifter. For example, if the sum is greater than the bit length of the shifter, the to-be-shifted data can be split, and the number of to-be-shifted sub-data is obtained by rounding up the ratio of the sum to the bit length of the shifter. For example, the to-be-shifted data is 8 bits, the step length of the shift is 2 bits, the sum is 10 bits, and the bit length of the shifter is 8 bits. It can be determined that the number of to-be-shifted sub-data obtained by splitting is 2. The disclosure does not limit the judgment standard of splitting.

[0056] In a possible implementation, in step S11, if the to-be-shifted data needs to be split, the to-be-shifted data can be split according to a preset splitting manner. For example, the to-be-shifted data is divided into two to-be-shifted sub-data, the odd bits of the to-be-shifted data can be grouped into one to-be-shifted sub-data, and the even bits of the to-be-shifted data can be grouped into another to-be-shifted sub-data. Step S11 can include: extracting the odd bits and the even bits of the to-be-shifted data respectively, obtaining a first to-be-shifted sub-data composed of the odd bits, and a second to-be-shifted sub-data composed of the even bits.

[0057] In an example, the to-be-shifted data is 10110101, the first to-be-shifted sub-data composed of the odd bits is 1100, and the second to-be-shifted sub-data composed of the even bits is 0111. The disclosure does not limit the splitting manner.

[0058] In an example, the to-be-shifted data can also be split into more to-be-shifted sub-data. For example, the to-be-shifted data can be split into three to-be-shifted sub-data. The first to-be-shifted sub-data is composed of the 1st bit, the 4th bit, and the 7th bit of the to-be-shifted data, that is, 110. The second to-be-shifted sub-data is composed of the 2nd bit, the 5th bit, and the 8th bit of the to-be-shifted data, that is, 001. The third to-be-shifted sub-data is composed of the 3rd bit and the 6th bit of the to-be-shifted data, and the last bit can be supplemented with 0, that is, 110. The to-be-shifted data can also be split into more to-be-shifted sub-data. The disclosure does not limit the number of to-be-shifted sub-data obtained by splitting.

[0059] In a possible implementation, after obtaining the to-be-shifted sub-data, each to-be-shifted sub-data can be shifted respectively. The second shift information of each to-be-shifted sub-data can be determined based on the first shift information of the to-be-shifted data. The first shift information can include a first shift direction (for example, left shift or right shift) and a first shift step length. The second shift direction can include a second shift direction and a second shift step length.

[0060] In a possible implementation, the shift direction of the to-be-shifted data and the shift direction of the to-be-shifted sub-data can be kept consistent when determining the second shift direction of each to-be-shifted sub-data. Step S12 can include: determining the first shift direction as the second shift direction. That is, when the first shift direction of the to-be-shifted data is leftward shift, the second shift direction of each to-be-shifted sub-data is also leftward shift, and when the first shift direction of the to-be-shifted data is rightward shift, the second shift direction of each to-be-shifted sub-data is also rightward shift. The disclosure does not limit the specific direction of the first shift direction and the second shift direction.

[0061] In a possible implementation, the second shift step of each to-be-shifted sub-data can also be determined. The first shift step of the to-be-shifted data and the second shift step of the to-be-shifted sub-data are not equal. Since the to-be-shifted sub-data is obtained by dividing the to-be-shifted data (for example, according to the number described above), and the to-be-shifted sub-data is recombined after the shift processing, the data obtained is the data of the to-be-shifted data after the shift, therefore, the shift step of the to-be-shifted sub-data is smaller than the shift step of the to-be-shifted data (for example, the ratio between the shift step of the to-be-shifted sub-data and the shift step of the to-be-shifted data can be determined according to the number described above). For example, the to-be-shifted data is 10110101, the first to-be-shifted sub-data composed of odd bit data is 1100, the second to-be-shifted sub-data composed of even bit data is 0111, if the to-be-shifted data moves rightward by 2 bits, the two to-be-shifted sub-data moves rightward by 1 bit. The disclosure does not limit the shift step.

[0062] In a possible implementation, the first shift information includes the first shift step of the to-be-shifted data, and the second shift information includes the second shift step of the to-be-shifted sub-data, wherein step S12 can include: determining the ratio between the first shift step and the number of to-be-shifted sub-data; and determining the second shift step according to the ratio.

[0063] In an example, the ratio is the ratio between the first shift step and the number of to-be-shifted sub-data, for example, the first shift step is 4, and the number of to-be-shifted sub-data is 2, then the ratio is 2. In an example, the first shift step is 4, and the number of to-be-shifted sub-data is 3, then the ratio is 1.33. In an example, the first shift step is 3, and the number of to-be-shifted sub-data is 2, then the ratio is 1.5. In an example, the first shift step is 3, and the number of to-be-shifted sub-data is 3, then the ratio is 1. The disclosure does not limit the specific value of the ratio.

[0064] In a possible implementation, the second shift step can be determined based on the ratio, and the step can include: in a case where the ratio is an integer, determining the ratio as the second shift step; or in a case where the ratio is not an integer, performing down rounding on the ratio to obtain the second shift step.

[0065] In an example, if the ratio is an integer, the ratio can be determined as the second shift step. For example, the first shift step is 4, the number of sub data to be shifted is 2, and the ratio is 2, so the second shift step of the sub data to be shifted is 2. For another example, the first shift step is 3, the number of sub data to be shifted is 3, and the ratio is 1, so the second shift step of the sub data to be shifted is 1. The present disclosure does not limit the specific value of the second shift step.

[0066] In an example, if the ratio is not an integer, in order to avoid excessive shifting of the target data obtained after recombination, the ratio can be down rounded to obtain the second shift step. For example, the first shift step is 4, the number of sub data to be shifted is 3, and the ratio is 1.33. After down rounding, the second shift step of each sub data to be shifted is 1, so the data obtained after shifting and recombination of the sub data to be shifted is the data obtained after shifting of the sub data to be shifted by a shift step of 3 bits, and the data can be further shifted by a shift step of 1 bit to obtain the target data. If the ratio is up rounded, the second shift step of each sub data to be shifted is 2, so the data obtained after shifting and recombination of the sub data to be shifted is the data obtained after shifting of the sub data to be shifted by a shift step of 6 bits, which is 2 bits more than the target data obtained after shifting of the sub data to be shifted by a shift step of 4 bits. The two bits of data can be lost, and even if the two bits are shifted in the opposite direction, the target data cannot be obtained. Therefore, when the second shift step is determined, if the ratio is not an integer, down rounding can be performed to obtain the second shift step.

[0067] In a possible implementation, after the second shift information (including the second shift direction and the second shift step) of each sub data to be shifted is obtained, the sub data to be shifted can be shifted according to the second shift information in step S13 to obtain target sub data.

[0068] In this way, the shift direction and the shift step of each sub data to be shifted can be determined to shift each sub data to be shifted respectively, so that the sub data to be shifted with a longer bit length does not need to be shifted, and the applicability and multiplexing rate of the shifter can be improved.

[0069] In a possible implementation, after the target sub data is shifted, the target sub data can be recombined in step S14 to obtain target data.

[0070] In a possible implementation, taking an example of splitting the to-be-shifted data into two to-be-shifted sub-data, the odd bits of the to-be-shifted data constitute the first to-be-shifted sub-data, and the even bits of the to-be-shifted data constitute the second to-be-shifted sub-data. After the shift processing, the target sub-data obtained by shifting the first to-be-shifted sub-data corresponds to the odd bits of the target data obtained by shifting the to-be-shifted data, and the target sub-data obtained by shifting the second to-be-shifted sub-data corresponds to the even bits of the target data obtained by shifting the to-be-shifted data. The target data can be determined according to the above correspondence.

[0071] In an example, the step S14 can include: determining the odd bit data of the target data according to the target sub-data obtained by shifting the first to-be-shifted sub-data; determining the even bit data of the target data according to the target sub-data obtained by shifting the second to-be-shifted sub-data; and obtaining the target data according to the odd bit data of the target data and the even bit data of the target data.

[0072] In an example, the to-be-shifted data is 10110101, the first to-be-shifted sub-data is 1100, and the second to-be-shifted sub-data is 0111. If the to-be-shifted data is shifted right by 4 bits, each to-be-shifted sub-data is shifted right by 2 bits, the target sub-data determined after shifting the first to-be-shifted sub-data is 0011, and the target sub-data determined after shifting the second to-be-shifted sub-data is 0001. If the to-be-shifted data is shifted right by 5 bits, the step length of each to-be-shifted sub-data is still 2 bits. After the shift processing, the odd bit data of the target data can be determined based on the target sub-data determined after shifting the first to-be-shifted sub-data, and the even bit data of the target data can be determined based on the target sub-data determined after shifting the second to-be-shifted sub-data.

[0073] In a possible implementation, if the first shift step length of the to-be-shifted data is even, that is, when the second shift step length of the to-be-shifted sub-data is determined, the ratio between the first shift step length and the number of to-be-shifted sub-data is directly taken as the second shift step length without taking the integer part, and then the target sub-data obtained after the to-be-shifted sub-data is shifted according to the second shift step length can be directly recombined into the target data, that is, the data of the to-be-shifted data based on the first shift step length.

[0074] In an example, if the to-be-shifted data is 10110101 shifted right by 4 bits, that is, the first shift step length is even, the target sub-data obtained after the shift can be recombined to obtain the target data, that is, the target sub-data 0011 determined after shifting the first to-be-shifted sub-data is taken as the odd bit of the target data, and the target sub-data 0001 determined after shifting the second to-be-shifted sub-data is taken as the even bit of the target data, and then the target data is 00001011.

[0075] In a possible implementation, if the first shift step of the to-be-shifted data is odd, that is, the second shift step of the to-be-shifted sub-data is determined by taking the value obtained by rounding down the ratio between the first shift step and the number of the to-be-shifted sub-data as the second shift step, the target sub-data obtained after the to-be-shifted sub-data is shifted according to the second shift step cannot be directly used as the target data after recombination. Because of the rounding down process, the second shift step of the to-be-shifted sub-data is smaller than the ratio, and thus the sum of the second shift steps of the to-be-shifted sub-data is smaller than the first shift step. For example, if the to-be-shifted data is divided into two to-be-shifted sub-data, and the second shift step needs to be rounded down when it is determined, the sum of the second shift steps of the two to-be-shifted sub-data is smaller than the first shift step by 1. In this case, after the target sub-data obtained after the to-be-shifted sub-data is shifted is recombined, the combined data obtained after recombination still needs to be shifted until the sum of the second shift steps is equal to the first shift step. For example, after the target sub-data obtained after the two to-be-shifted sub-data is shifted is recombined, the combined data obtained after recombination still needs to be shifted by 1 bit, and then the target data can be obtained. That is, the target data is obtained according to the odd bit data of the target data and the even bit data of the target data, including: in the case where the first shift step of the to-be-shifted data is odd, obtaining combined data according to the odd bit data of the target data and the even bit data of the target data; and performing one-bit shift processing on the combined data in the first shift direction of the to-be-shifted data to obtain the target data.

[0076] In an example, if the to-be-shifted data is 10110101 and is shifted to the right by 5 bits, that is, the first shift step is odd, the target sub-data obtained after the shift can be recombined to obtain combined data, that is, the target sub-data 0011 obtained after the first to-be-shifted sub-data is shifted is used as the odd bit of the combined data, and the target sub-data 0001 obtained after the second to-be-shifted sub-data is shifted is used as the even bit of the combined data, and then the combined data is 00001011. The combined data is shifted by 1 bit to obtain the target data, that is, 00000101.

[0077] In a possible implementation, if the number of obtained to-be-shifted sub-data exceeds two, whether the merged data after recombination of the target sub-data needs to be shifted can still be determined in the manner described above, that is, if the number obtained by rounding down the ratio between the first shift step and the number of to-be-shifted sub-data is taken as the second shift step when the second shift step of the to-be-shifted sub-data is determined, the merged data after recombination of the target sub-data still needs to be shifted to obtain the target data after the to-be-shifted sub-data is shifted according to the second shift step, and the step for the continued shift is the difference between the first shift step and the sum of the second shift steps of the to-be-shifted sub-data. If the second shift step of the to-be-shifted sub-data does not need to be rounded down when the second shift step is determined, the merged data can be directly determined as the target data.

[0078] According to the data shift method of the embodiment of the present disclosure, the to-be-shifted data can be split to obtain to-be-shifted sub-data with a smaller bit length, and the to-be-shifted sub-data is shifted respectively, so that the to-be-shifted data with a longer bit length does not need to be shifted, which is suitable for a shifter with a smaller bit length, so that the same shifter can shift data with multiple bit lengths, improves the multiplexing efficiency of the shifter, reduces the number of required components and the occupied area, and reduces power consumption.

[0079] Figure 2 An application schematic diagram of the data shift method according to the embodiment of the present disclosure is shown as follows, Figure 2 As shown in the figure, the to-be-shifted data is 8-bit data, for example, 10110101, the odd bits are represented by grid-shaped blocks, and the even bits are represented by vertical bar-shaped blocks. In the example, the to-be-shifted data can be split to obtain first to-be-shifted sub-data and second to-be-shifted sub-data, for example, the first to-be-shifted sub-data composed of odd bits is 1100, and the second to-be-shifted sub-data composed of even bits is 0111.

[0080] In a possible implementation, the shift information of each to-be-shifted sub-data can be determined, for example, the first shift information of the to-be-shifted data is to shift 4 bits to the right, and the second shift information of each to-be-shifted sub-data is to shift 2 bits to the right.

[0081] In a possible implementation, the target sub-data is obtained after the to-be-shifted sub-data is shifted according to the second shift information described above. The odd bit data of the target data can be determined through the target sub-data obtained by shifting the first to-be-shifted sub-data, and the even bit data of the target data can be determined through the target sub-data obtained by shifting the second to-be-shifted sub-data. For example, the target sub-data obtained by shifting the first to-be-shifted sub-data is 0011, and the target sub-data obtained by shifting the second to-be-shifted sub-data is 0001.

[0082] In a possible implementation, the target data can be obtained by recombining the two target sub-data, i.e., the target sub-data 0011 obtained by shifting the first to-be-shifted sub-data is the odd bit of the target data, the target sub-data 0001 obtained by shifting the second to-be-shifted sub-data is the even bit of the target data, and the obtained target data is 00001011.

[0083] In a possible implementation, the data shifting method can be used in a processing process such as data transmission, and the multiplexing rate and working efficiency of a shifter are improved, and the power consumption and the number of components and the area occupied thereby are reduced by shifting the segmented data and recombining.

[0084] Figure 3 A block diagram of a data shifting apparatus according to an embodiment of the present disclosure is shown in FIG. 1. Figure 3 As shown in FIG. 1, the apparatus includes a segmentation module 11 configured to segment to-be-shifted data to obtain at least two to-be-shifted sub-data, a shift information determination module 12 configured to determine second shift information of the to-be-shifted sub-data according to first shift information of the to-be-shifted data and a number of the to-be-shifted sub-data obtained by segmentation, a shift module 13 configured to perform shift processing on the to-be-shifted sub-data according to the second shift information to obtain target sub-data, and a determination module 14 configured to determine target data of the to-be-shifted data after shifting according to the target sub-data.

[0085] In a possible implementation, the first shift information includes a first shift direction of the to-be-shifted data, the second shift information includes a second shift direction of the to-be-shifted sub-data, and the shift information determination module is further configured to determine the first shift direction as the second shift direction.

[0086] In a possible implementation, the first shift information includes a first shift step of the to-be-shifted data, the second shift information includes a second shift step of the to-be-shifted sub-data, and the shift information determination module is further configured to determine a ratio between the first shift step and the number of the to-be-shifted sub-data, and determine the second shift step according to the ratio.

[0087] In a possible implementation, the shift information determination module is further configured to, in a case where the ratio is an integer, determine the ratio as the second shift step, or in a case where the ratio is not an integer, obtain the second shift step by rounding down the ratio.

[0088] In one possible implementation, the segmentation module is further configured to: extract the odd-numbered bits and even-numbered bits of the data to be shifted, respectively, to obtain a first sub-data to be shifted composed of the odd-numbered bits and a second sub-data to be shifted composed of the even-numbered bits.

[0089] In one possible implementation, the determining module is further configured to: determine the odd-numbered bits of the target data based on the target sub-data obtained after shifting the first sub-data to be shifted; determine the even-numbered bits of the target data based on the target sub-data obtained after shifting the second sub-data to be shifted; and obtain the target data based on the odd-numbered bits and the even-numbered bits of the target data.

[0090] In one possible implementation, the determining module is further configured to: when the first shift step of the data to be shifted is odd, obtain merged data based on the odd-numbered bits of the target data and the even-numbered bits of the target data; and perform a shift operation of the merged data with a step size of one bit according to the first shift direction of the data to be shifted to obtain the target data.

[0091] In one possible implementation, the apparatus further includes a quantity determination module, configured to determine the number of the segmented sub-data to be shifted based on the bit length of the data to be shifted and the bit length of the shifter, when the bit length of the data to be shifted is greater than the bit length of the shifter used for shifting processing.

[0092] In one possible implementation, the data to be shifted includes at least one of image data, audio data, and text data.

[0093] Figure 4 This is a structural diagram illustrating a combined processing apparatus 1200 according to an embodiment of the present disclosure. Figure 4 As shown, the combined processing device 1200 includes a computing processing device 1202, an interface device 1204, other processing devices 1206, and a storage device 1208. Depending on the application scenario, the computing processing device may include one or more computing devices 1210, which can be configured to perform the functions described herein. Figure 1 The described operation.

[0094] In different embodiments, the computing processing apparatus of the present disclosure can be configured to perform user-specified operations. In exemplary applications, the computing processing apparatus can be implemented as a single-core artificial intelligence processor or a multi-core artificial intelligence processor. Similarly, one or more computing devices included in the computing processing apparatus can be implemented as an artificial intelligence processor core or a partial hardware structure of an artificial intelligence processor core. When multiple computing devices are implemented as an artificial intelligence processor core or a partial hardware structure of an artificial intelligence processor core, the computing processing apparatus of the present disclosure can be considered to have a single-core structure or a homogeneous multi-core structure.

[0095] In exemplary operations, the computing processing apparatus of the present disclosure can interact with other processing devices through an interface device to jointly complete user-specified operations. Depending on the implementation, the other processing devices of the present disclosure can include one or more types of processors such as a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), an artificial intelligence processor, and other general-purpose and / or special-purpose processors. These processors can include, but are not limited to, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, and the like, and their number can be determined according to actual needs. As mentioned earlier, only in terms of the computing processing apparatus of the present disclosure, it can be considered to have a single-core structure or a homogeneous multi-core structure. However, when the computing processing apparatus and the other processing devices are considered together, they can be considered to form a heterogeneous multi-core structure.

[0096] In one or more embodiments, the other processing devices can serve as an interface for external data and control for the computing processing apparatus of the present disclosure (which can embody the relevant computing devices for artificial intelligence such as neural network operations), and perform basic controls including but not limited to data transfer, starting and / or stopping of the computing devices, and the like. In additional embodiments, the other processing devices can also cooperate with the computing processing apparatus to jointly complete the computing tasks.

[0097] In one or more embodiments, the interface device can be used to transfer data and control instructions between the computing processing device and other processing devices. For example, the computing processing device can obtain input data from other processing devices via the interface device and write the data into a storage device (or memory) on the computing processing device chip. Further, the computing processing device can obtain control instructions from other processing devices via the interface device and write the control instructions into a control buffer on the computing processing device chip. Alternatively or optionally, the interface device can also read data from the storage device of the computing processing device and transfer the data to other processing devices.

[0098] Additionally or optionally, the combined processing device of the present disclosure can further include a storage device. As shown in the figures, the storage device is connected to the computing processing device and the other processing device, respectively. In one or more embodiments, the storage device can be used to save data of the computing processing device and / or the other processing device. For example, the data can be data that cannot be saved in the internal or on-chip storage device of the computing processing device or the other processing device.

[0099] In some embodiments, the present disclosure further discloses an artificial intelligence chip (e.g., chip 1302) including the above-mentioned data shifting device. In one implementation, the chip is a system on chip (SoC) and integrates one or more combined processing devices. The chip can be connected to other related components through an external interface device (e.g., external interface device 1306). The related components can be, for example, a camera, a display, a mouse, a keyboard, a network card, or a wifi interface. In some application scenarios, other processing units (e.g., video codecs) and / or interface modules (e.g., DRAM interfaces) can be integrated on the chip. In some embodiments, the present disclosure further discloses a chip package structure including the above-mentioned chip. In some embodiments, the present disclosure further discloses a board including the above-mentioned chip package structure.

[0100] Figure 5 is a structural schematic diagram of a board 1300 according to an embodiment of the present disclosure. As shown in the figure, the board 1300 includes a chip package structure 1302 and a plurality of other components 1304. The chip package structure 1302 includes a chip 1302 and an external interface device 1306. The chip 1302 is a system on chip (SoC) and integrates one or more combined processing devices. The chip 1302 can be connected to other related components through the external interface device 1306. The related components can be, for example, a camera, a display, a mouse, a keyboard, a network card, or a wifi interface. In some application scenarios, other processing units (e.g., video codecs) and / or interface modules (e.g., DRAM interfaces) can be integrated on the chip. In some embodiments, the present disclosure further discloses a chip package structure including the above-mentioned chip. In some embodiments, the present disclosure further discloses a board including the above-mentioned chip package structure. Figure 5As shown in FIG. 13, the board card includes a memory device 1304 for storing data, which includes one or more memory units 1310. The memory device can be connected and transmit data with the controller device 1308 and the artificial intelligence chip 1302 described above through, for example, a bus. Further, the board card also includes an external interface device 1306 configured for data relay or switching function between the chip (or the chip in the chip package structure) and an external device 1312 (such as a server or a computer, etc.). For example, data to be processed can be delivered by the external device to the chip through the external interface device. For another example, the calculation result of the chip can be transmitted back to the external device via the external interface device. According to different application scenarios, the external interface device can have different interface forms, for example, it can adopt a standard PCIE interface, etc.

[0101] Each group of the memory units is connected with the artificial intelligence chip through a bus. It can be understood that each group of the memory units can be a DDR SDRAM (English: Double Data Rate SDRAM, double data rate synchronous dynamic random access memory).

[0102] DDR does not need to increase the clock frequency to double the speed of SDRAM. DDR allows reading data on the rising and falling edges of the clock pulse. The speed of DDR is twice that of standard SDRAM. In an embodiment, the memory device can include 4 groups of the memory units. Each group of the memory units can include a plurality of DDR4 particles (chips). In an embodiment, the artificial intelligence chip can internally include 4 72-bit DDR4 controllers, of which 64 bits are used for data transmission and 8 bits are used for ECC verification. It can be understood that when DDR4-3200 particles are used in each group of the memory units, the theoretical bandwidth of data transmission can reach 25600 MB / s.

[0103] In an embodiment, each group of the memory units includes a plurality of double data rate synchronous dynamic random access memories arranged in parallel. DDR can transmit data twice in one clock cycle. A controller for controlling DDR is arranged in the chip, for controlling data transmission and data storage of each of the memory units.

[0104] The interface device is electrically connected with the artificial intelligence chip. The interface device is used to realize data transmission between the artificial intelligence chip and an external device (for example, a server or a computer). For example, in an embodiment, the interface device can be a standard PCIE interface. For example, data to be processed is transmitted by the server to the chip through the standard PCIE interface, so as to realize data transfer. Preferably, when PCIE 3.0X 16 interface transmission is adopted, the theoretical bandwidth can reach 16000 MB / s. In another embodiment, the interface device can also be other interfaces, and the disclosure does not limit the specific forms of the above-mentioned other interfaces. The interface unit can only realize the switching function. In addition, the calculation result of the artificial intelligence chip is still transmitted back to the external device (for example, the server) by the interface device.

[0105] The control device is electrically connected with the artificial intelligence chip. The control device is used to regulate the state of the artificial intelligence chip. Specifically, the artificial intelligence chip and the control device can be electrically connected through an SPI interface. The control device can include a single-chip microcomputer (MCU). As the artificial intelligence chip can include multiple processing chips, multiple processing cores or multiple processing circuits, it can drive multiple loads. Therefore, the artificial intelligence chip can be in different working states such as multiple loads and light loads. Through the control device, the working states of the multiple processing chips, the multiple processing cores and / or the multiple processing circuits in the artificial intelligence chip can be regulated.

[0106] Those skilled in the art can understand that the disclosure also discloses an electronic device or apparatus, which can include one or more of the above-mentioned board cards, one or more of the above-mentioned chips and / or one or more of the above-mentioned combined processing devices.

[0107] According to different application scenarios, the electronic device or apparatus of the disclosure can include a server, a cloud server, a server cluster, a data processing device, a robot, a computer, a printer, a scanner, a tablet computer, a smart terminal, a PC device, an Internet of Things terminal, a mobile terminal, a mobile phone, a vehicle recording device, a navigation device, a sensor, a camera, a camera, a video camera, a projector, a watch, a headset, a mobile storage, a wearable device, a visual terminal, an automatic driving terminal, a vehicle, a household appliance and / or a medical device. The vehicle includes an airplane, a ship and / or a vehicle; the household appliance includes a television, an air conditioner, a microwave oven, a refrigerator, an electric rice cooker, a humidifier, a washing machine, an electric lamp, a gas stove, an exhaust hood; the medical device includes a nuclear magnetic resonance instrument, a B-ultrasound instrument and / or an electrocardiograph.

[0108] The embodiment of the present disclosure further provides a computer readable storage medium, which stores computer program instructions. The computer program instructions are executed by a processor to implement the method.

[0109] The embodiment of the present disclosure further provides an electronic device, which comprises a processor, and a memory for storing processor-executable instructions. The processor is configured to invoke the instructions stored in the memory to execute the method.

[0110] The electronic device can be provided as a terminal, a server or other forms of devices.

[0111] Figure 6 A block diagram of an electronic device 1900 according to an embodiment of the present disclosure is shown. For example, the electronic device 1900 can be provided as a server. Referring to Figure 6 , the electronic device 1900 comprises a processing component 1922, which further comprises one or more processors, and a memory resource represented by a memory 1932 for storing instructions executable by the processing component 1922, such as an application program. The application program stored in the memory 1932 can comprise one or more than one module each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute the instructions to perform the method.

[0112] The electronic device 1900 can further comprise a power supply component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input / output (I / O) interface 1958. The electronic device 1900 can operate based on an operating system stored in the memory 1932, such as Windows Server TM , Mac OS XTM , Unix TM , Linux TM , FreeBSD TM or the like.

[0113] In an exemplary embodiment, a non-volatile computer readable storage medium, such as the memory 1932 comprising computer program instructions, is also provided. The computer program instructions can be executed by the processing component 1922 of the electronic device 1900 to complete the method.

[0114] It should be noted that, for the purpose of simplicity, the present disclosure expresses some methods and embodiments thereof as a series of actions and combinations thereof, but those skilled in the art can understand that the solutions of the present disclosure are not limited by the order of the actions described. Therefore, those skilled in the art can understand that some of the steps can be performed in other orders or at the same time according to the disclosure or teaching of the present disclosure. Further, those skilled in the art can understand that the embodiments described in the present disclosure can be regarded as optional embodiments, that is, the actions or modules involved are not necessarily essential for the implementation of one or more solutions of the present disclosure. In addition, the description of some embodiments in the present disclosure also focuses on different solutions. Therefore, those skilled in the art can understand that the parts not described in detail in one embodiment of the present disclosure can also refer to the relevant description of other embodiments.

[0115] In terms of specific implementation, those skilled in the art can understand that the several embodiments disclosed in the present disclosure can also be implemented in other ways not disclosed herein based on the disclosure and teaching of the present disclosure. For example, as for each unit in the foregoing electronic device or apparatus embodiments, the units are divided herein based on the logical functions, and there can be another division manner in actual implementation. For another example, a plurality of units or components can be combined or integrated into another system, or some features or functions of the units or components can be selectively disabled. As for the connection relationship between different units or components, the foregoing connections discussed in conjunction with the drawings can be direct or indirect coupling between the units or components.

[0116] In the present disclosure, the units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units. The foregoing components or units can be located in the same place or distributed on a plurality of network units. In addition, according to actual needs, some or all of the units can be selected to achieve the purpose of the solutions described in the embodiments of the present disclosure. In addition, in some scenarios, a plurality of units in the embodiments of the present disclosure can be integrated into one unit or each unit physically exists separately.

[0117] In the foregoing embodiments, the description of each embodiment focuses on different aspects, and the parts not described in detail in one embodiment can refer to the relevant description of other embodiments. Each technical feature of the foregoing embodiments can be combined arbitrarily, and in order to make the description concise, not all possible combinations of the technical features in the foregoing embodiments are described, however, as long as the combinations of the technical features do not exist contradictions, they should be regarded as the scope disclosed in the present disclosure.

[0118] The electronic device or apparatus of the present disclosure can also be applied to the fields of Internet, Internet of Things, data center, energy, transportation, public management, manufacturing, education, power grid, telecommunications, finance, retail, construction site, medical treatment, etc. Further, the electronic device or apparatus of the present disclosure can also be used in cloud, edge, terminal and other application scenarios related to artificial intelligence, big data and / or cloud computing. In one or more embodiments, the electronic device or apparatus with high computing power according to the present disclosure scheme can be applied to a cloud device (e.g., a cloud server), and the electronic device or apparatus with small power consumption can be applied to a terminal device and / or an edge device (e.g., a smart phone or a camera). In one or more embodiments, the hardware information of the cloud device and the hardware information of the terminal device and / or the edge device are compatible with each other, so that suitable hardware resources can be matched from the hardware resources of the cloud device according to the hardware information of the terminal device and / or the edge device to simulate the hardware resources of the terminal device and / or the edge device, so as to complete unified management, scheduling and collaborative work of end-cloud integration or cloud-edge integration.

[0119] The foregoing can be better understood in accordance with the following clauses:

[0120] For example, clause A1, a data shifting method, comprising: segmenting to-be-shifted data to obtain at least two to-be-shifted sub-data; determining second shifting information of the to-be-shifted sub-data according to first shifting information of the to-be-shifted data and a number of the to-be-shifted sub-data obtained by segmentation; performing shifting processing on the to-be-shifted sub-data according to the second shifting information to obtain target sub-data; and determining target data of the to-be-shifted data after shifting according to the target sub-data.

[0121] Clause A2, the method according to clause A1, the first shifting information comprises a first shifting direction of the to-be-shifted data, and the second shifting information comprises a second shifting direction of the to-be-shifted sub-data, wherein the second shifting information of the to-be-shifted sub-data is determined according to the first shifting information of the to-be-shifted data and the number of the to-be-shifted sub-data obtained by segmentation, comprising: determining the first shifting direction as the second shifting direction.

[0122] Clause A3, the method according to clause A1 or A2, the first shifting information comprises a first shifting step of the to-be-shifted data, and the second shifting information comprises a second shifting step of the to-be-shifted sub-data, wherein the second shifting information of the to-be-shifted sub-data is determined according to the first shifting information of the to-be-shifted data and the number of the to-be-shifted sub-data obtained by segmentation, comprising: determining a ratio between the first shifting step and the number of the to-be-shifted sub-data; and determining the second shifting step according to the ratio.

[0123] Clause A4, the method according to clause A3, determining the second shift step according to the ratio comprises: in a case where the ratio is an integer, determining the ratio as the second shift step; or in a case where the ratio is a non-integer, rounding down the ratio to obtain the second shift step.

[0124] Clause A5, the method according to any one of clauses A1-A4, segmenting the data to be shifted to obtain at least two sub-data to be shifted comprises: extracting odd bit data and even bit data of the data to be shifted respectively to obtain first sub-data to be shifted composed of the odd bit data and second sub-data to be shifted composed of the even bit data.

[0125] Clause A6, the method according to clause A5, determining target data after the data to be shifted is shifted according to the target sub-data comprises: determining odd bit data of the target data according to target sub-data obtained after the first sub-data to be shifted is shifted; determining even bit data of the target data according to target sub-data obtained after the second sub-data to be shifted is shifted; and obtaining the target data according to the odd bit data of the target data and the even bit data of the target data.

[0126] Clause A7, the method according to clause A6, obtaining the target data according to the odd bit data of the target data and the even bit data of the target data comprises: in a case where the first shift step of the data to be shifted is odd, obtaining merged data according to the odd bit data of the target data and the even bit data of the target data; and performing one-bit shift processing on the merged data according to the first shift direction of the data to be shifted to obtain the target data.

[0127] Clause A8, the method according to any one of clauses A1-A7, the method further comprising: in a case where the bit length of the data to be shifted is greater than the bit length of a shifter used for shift processing, determining the number of the segmented sub-data to be shifted according to the bit length of the data to be shifted and the bit length of the shifter.

[0128] Clause A9, the method according to any one of clauses A1-A8, the data to be shifted comprises at least one of image data, audio data, and text data.

[0129] Clause A10, the apparatus data shifting apparatus comprises: a splitting module configured to split to-be-shifted data to obtain at least two to-be-shifted sub-data; a shift information determining module configured to determine second shift information of the to-be-shifted sub-data according to first shift information of the to-be-shifted data and a quantity of the to-be-shifted sub-data obtained by splitting; a shifting module configured to perform shift processing on the to-be-shifted sub-data according to the second shift information to obtain target sub-data; and a determining module configured to determine target data obtained after the to-be-shifted data is shifted according to the target sub-data.

[0130] Clause A11, the apparatus according to clause A10, the first shift information comprises a first shift direction of the to-be-shifted data, the second shift information comprises a second shift direction of the to-be-shifted sub-data, and the shift information determining module is further configured to: determine the first shift direction as the second shift direction.

[0131] Clause A12, the apparatus according to clause A10 or A11, the first shift information comprises a first shift step of the to-be-shifted data, the second shift information comprises a second shift step of the to-be-shifted sub-data, and the shift information determining module is further configured to: determine a ratio between the first shift step and the quantity of the to-be-shifted sub-data; and determine the second shift step according to the ratio.

[0132] Clause A13, the apparatus according to clause A12, the shift information determining module is further configured to: in a case where the ratio is an integer, determine the ratio as the second shift step; or in a case where the ratio is a non-integer, obtain the second shift step by rounding down the ratio.

[0133] Clause A14, the apparatus according to any one of clauses A10-A13, the splitting module is further configured to: extract odd bit data and even bit data of the to-be-shifted data respectively to obtain first to-be-shifted sub-data composed of the odd bit data and second to-be-shifted sub-data composed of the even bit data.

[0134] Clause A15, the apparatus according to clause A14, the determining module is further configured to: determine odd bit data of the target data according to target sub-data obtained after the first to-be-shifted sub-data is shifted; determine even bit data of the target data according to target sub-data obtained after the second to-be-shifted sub-data is shifted; and obtain the target data according to the odd bit data of the target data and the even bit data of the target data.

[0135] Clause A16, the apparatus according to any one of clauses A10-A15, wherein the determining module is further configured to: in a case that the first shift step of the data to be shifted is an odd number, obtain merged data according to odd bit data of the target data and even bit data of the target data; and perform a one-bit shift processing on the merged data according to the first shift direction of the data to be shifted to obtain the target data.

[0136] Clause A17, the apparatus according to any one of clauses A10-A16, further comprising: a number determining module configured to, in a case that a bit length of the data to be shifted is greater than a bit length of a shifter used for the shift processing, determine a number of the divided data to be shifted according to the bit length of the data to be shifted and the bit length of the shifter.

[0137] Clause A18, the apparatus according to any one of clauses A10-A17, wherein the data to be shifted comprises at least one of image data, audio data, and text data.

[0138] While several embodiments of the present disclosure have been shown and described herein, it is to be understood that the embodiments are merely devised by way of example. Those skilled in the art can conceive many alterations, changes and alternative ways without departing from the idea and spirit of the present disclosure. It should be understood that various alternatives to the embodiments of the present disclosure described herein can be employed in practicing the present disclosure. The appended claims are intended to define the scope of protection of the present disclosure and thus cover equivalents or alternatives within the scope of the claims.

Claims

1. A data shifting method, characterized by, The method comprises: segmenting the data to be shifted to obtain at least two sub-data to be shifted; determining second shift information of the sub-data to be shifted according to first shift information of the data to be shifted and a number of the sub-data to be shifted obtained by the segmentation; performing shift processing on the sub-data to be shifted according to the second shift information to obtain target sub-data; determining target data of the data to be shifted after the shift according to the target sub-data; The method further comprises: in a case where a bit length of the data to be shifted is greater than a bit length of a shifter used for the shift processing, determining the number of the sub-data to be shifted segmented according to the bit length of the data to be shifted and the bit length of the shifter; the first shift information comprises a first shift step length of the data to be shifted, and the second shift information comprises a second shift step length of the sub-data to be shifted, and the determining of the second shift information of the sub-data to be shifted according to the first shift information of the data to be shifted and the number of the sub-data to be shifted obtained by the segmentation comprises: determining the second shift step length according to the first shift step length and the number of the sub-data to be shifted.

2. The method of claim 1, wherein, the first shift information comprises a first shift direction of the data to be shifted, and the second shift information comprises a second shift direction of the sub-data to be shifted, wherein the determining of the second shift information of the sub-data to be shifted according to the first shift information of the data to be shifted and the number of the sub-data to be shifted obtained by the segmentation comprises: determining the first shift direction as the second shift direction.

3. The method according to claim 1 or 2, characterized in that, the first shift information comprises a first shift step length of the data to be shifted, and the second shift information comprises a second shift step length of the sub-data to be shifted, wherein the determining of the second shift information of the sub-data to be shifted according to the first shift information of the data to be shifted and the number of the sub-data to be shifted obtained by the segmentation comprises: determining a ratio between the first shift step length and the number of the sub-data to be shifted; determining the second shift step length according to the ratio.

4. The method of claim 3, wherein, The determining of the second shift step length according to the ratio comprises: in a case where the ratio is an integer, determining the ratio as the second shift step length; or in a case where the ratio is a non-integer, performing down-rounding on the ratio to obtain the second shift step length.

5. The method according to any one of claims 1 or 2, characterized in that, The segmenting of the data to be shifted to obtain at least two sub-data to be shifted comprises: extracting odd bit data and even bit data of the data to be shifted respectively to obtain first sub-data to be shifted composed of the odd bit data and second sub-data to be shifted composed of the even bit data.

6. The method of claim 5, wherein, The determining of target data of the data to be shifted after the shift according to the target sub-data comprises: determining odd bit data of the target data according to target sub-data obtained after the shift of the first sub-data to be shifted; determining even bit data of the target data according to target sub-data obtained after the shift of the second sub-data to be shifted; obtaining the target data according to the odd bit data of the target data and the even bit data of the target data.

7. The method of claim 6, wherein, The target data is obtained according to the odd bit data of the target data and the even bit data of the target data, and the method comprises the steps of: In the case that the first shift step of the to-be-shifted data is odd, the merged data is obtained according to the odd bit data of the target data and the even bit data of the target data; The merged data is subjected to one-bit shift processing in the first shift direction of the to-be-shifted data to obtain the target data.

8. The method of any one of claims 1 or 2, wherein, The to-be-shifted data comprises at least one of image data, audio data and text data.

9. A data shift apparatus, characterized by, The method comprises the steps of: The to-be-shifted data is segmented to obtain at least two to-be-shifted sub-data; Second shift information of the to-be-shifted sub-data is determined according to the first shift information of the to-be-shifted data and the number of the to-be-shifted sub-data obtained by segmentation; The to-be-shifted sub-data is subjected to shift processing according to the second shift information to obtain target sub-data; The target data after shift of the to-be-shifted data is determined according to the target sub-data; The device further comprises a number determination module configured to determine the number of the to-be-shifted sub-data segmented out according to the bit length of the to-be-shifted data and the bit length of a shifter used for shift processing in the case that the bit length of the to-be-shifted data is greater than the bit length of the shifter; The first shift information comprises a first shift step of the to-be-shifted data, and the second shift information comprises a second shift step of the to-be-shifted sub-data, and the shift information determination module is further configured to: Determine the second shift step according to the first shift step and the number of the to-be-shifted sub-data.

10. An electronic device, comprising: The method comprises the steps of: A processor; A memory for storing processor-executable instructions; The processor is configured to invoke the instructions stored in the memory to execute the method in any one of claims 1 to 8.

11. A computer-readable storage medium having stored thereon computer program instructions, wherein, The computer program instructions are executed by the processor to implement the method in any one of claims 1 to 8.

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