Redundant circuit for electrical stimulation output protection
By employing redundant design of hardware and software protection circuits and combining multiple monitoring data, the problem of a single monitoring method in electrical stimulation output protection is solved, enabling a more reliable and comprehensive safety assessment and ensuring the safety of the electrical stimulation process.
Patent Information
- Application Number
- CN202511854616.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-10
- Publication Date
- 2026-03-17
AI Technical Summary
The existing technology for monitoring the output protection of electrical stimulation is based on a single method, which leads to false detections and insufficient reliability in safety assessment, and cannot comprehensively and effectively ensure the safety of the electrical stimulation process.
The system employs hardware protection circuits (including hardware switching circuits, charge protection circuits, and overcurrent protection circuits) and software protection circuits (software switching circuits) to comprehensively evaluate the electrical stimulation output through various monitoring data. It also incorporates internationally standardized charge balance, single-phase pulse charge limitation, and total current limitation to achieve redundant protection.
This improves the reliability and comprehensiveness of electrical stimulation output protection, avoids monitoring failures and false detections, and ensures the safety of the electrical stimulation process.
Smart Images

Figure CN121690176A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit protection technology, and in particular to a redundant circuit for electrical stimulation output protection. Background Technology
[0002] Functional electrical stimulation (FESPS) is an important rehabilitation engineering technique that uses electrical pulses with specific parameters to stimulate nerve or muscle tissue, thereby reconstructing or restoring lost physiological functions (such as limb movement and bladder control). As a key means in the field of nerve repair and treatment, its safety is directly related to the patient's treatment effect and the risks of use; therefore, the electrical stimulation output needs to be monitored during treatment.
[0003] Since electrical stimulation pulses need to act on the human body, international standards have made safety requirements from three perspectives, including charge balance, single-phase pulse charge limitation, and total current limitation. However, current technology only selects one of these parameters for collection to determine whether the electrical stimulation output is safe, which has the problem of a single judgment method. Furthermore, in practical implementation, when the circuit fails, it will lead to monitoring failure, which seriously affects the reliability of the monitoring system in protecting the electrical stimulation output.
[0004] Therefore, how to achieve more comprehensive and reliable protection of electrical stimulation output is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention
[0005] The purpose of this invention is to address the problems in current technologies where only one type of monitoring data is used to assess the safety of electrical stimulation output, resulting in false detections and insufficient reliability due to the single monitoring method. Therefore, this invention provides a redundant circuit for electrical stimulation output protection, which monitors electrical stimulation from both software and hardware perspectives, improving the reliability of the circuit and the comprehensiveness of the monitoring.
[0006] To address the aforementioned technical problems, this invention provides a redundant circuit for electrical stimulation output protection, comprising: a hardware protection circuit, a software protection circuit, and a current acquisition circuit.
[0007] The hardware protection circuit includes a hardware switching circuit, a charge protection circuit, and an overcurrent protection circuit.
[0008] The software protection circuit is a software switching circuit;
[0009] The hardware switch circuit and the software switch circuit are disposed on the line connecting the electrical stimulation output circuit and the positive electrode and / or negative electrode, and are used to cut off the stimulation circuit when a protection logic level signal is received.
[0010] The current acquisition circuit is used to acquire the voltage drop across the sampling resistor in the stimulation circuit, and its output terminal is connected to the voltage signal input terminal of the charge protection circuit, the overcurrent protection circuit, and the control unit, respectively.
[0011] The charge protection circuit is used to calculate the charge accumulation based on the output signal of the current acquisition circuit, generate a protection logic level signal when the charge accumulation exceeds the charge threshold, and transmit it to the hardware switching circuit to cut off the stimulation circuit.
[0012] The overcurrent protection circuit is used to calculate the pulse current based on the output signal of the current acquisition circuit, generate a protection logic level signal when the pulse current exceeds the current threshold, and transmit it to the hardware switching circuit to cut off the stimulation circuit.
[0013] The software switching circuit is connected to the control unit and is used to cut off the stimulation circuit when the control unit receives a control command generated by the control unit when it detects that the pulse signal parameter exceeds the parameter threshold based on the output signal of the current acquisition circuit.
[0014] Preferably, the current acquisition circuit includes: a hardware current acquisition circuit and a software current acquisition circuit;
[0015] The hardware current acquisition circuit acquires the voltage drop across the first sampling resistor in the connection line between the electrical stimulation output circuit and the negative electrode plate, and the output terminal is connected to the voltage signal input terminal of the overcurrent protection circuit and the charge protection circuit, respectively.
[0016] The software current acquisition circuit acquires the voltage drop across the second sampling resistor in the connection line between the electrical stimulation output circuit and the positive electrode plate, and its output terminal is connected to the voltage signal input terminal of the control unit.
[0017] Preferably, the hardware switching circuit includes: a NAND gate circuit, a clock-controlled D latch circuit, and an optocoupler switching circuit;
[0018] The first input terminal of the NAND gate is connected to the output terminal of the overcurrent protection circuit, the second input terminal is connected to the output terminal of the charge protection circuit, and the output terminal is connected to the input terminal of the clock-controlled D latch circuit.
[0019] The output terminal of the clock-controlled D latch circuit is connected to the control terminal of the optocoupler switch circuit.
[0020] The first output terminal of the optocoupler switch circuit is connected to the pulse signal output terminal of the electrical stimulation output circuit, and the second output terminal is connected to the negative electrode plate.
[0021] Preferably, the overcurrent protection circuit includes: a first voltage follower, a differential operational amplifier circuit, and a first window comparator;
[0022] The input terminal of the first voltage follower is connected to the output terminal of the hardware current acquisition circuit, and the output terminal of the first voltage follower is connected to the input terminal of the differential operational amplifier circuit.
[0023] The output of the differential operational amplifier circuit is connected to the input of the first window comparator.
[0024] The output of the first window comparator is connected to the first input of the NAND gate circuit.
[0025] Preferably, the first voltage follower includes: a first operational amplifier, a first resistor, and a first capacitor; the differential operational amplifier circuit includes a second operational amplifier, a second resistor, a third resistor, a fourth resistor, a first bidirectional Zener diode, and a second bidirectional Zener diode;
[0026] The first end of the first resistor serves as the input terminal of the first voltage follower and is connected to the output terminal of the hardware current acquisition circuit. The second end of the first resistor and the first end of the first capacitor are both connected to the non-inverting input terminal of the first operational amplifier. The second end of the first capacitor is grounded. The output terminal of the first operational amplifier is connected to the first end of the second resistor and the inverting input terminal of the first operational amplifier. The second end of the second resistor is connected to the non-inverting input terminal of the second operational amplifier. The first ends of the third resistor and the fourth resistor are both connected to the inverting input terminal of the second operational amplifier. The second end of the third resistor is connected to the power supply. The second end of the fourth resistor, the output terminal of the second operational amplifier, and the first ends of the first bidirectional Zener diode and the second bidirectional Zener diode are all connected together. The connection point serves as the output terminal of the differential operational amplifier circuit. The second ends of the first bidirectional Zener diode and the second bidirectional Zener diode are respectively connected to the power supply.
[0027] Preferably, the charge protection circuit includes: an output detection circuit, a solid-state relay, a second voltage follower, an operational integrator circuit, and a second window comparator;
[0028] The input terminal of the output detection circuit is connected to the output terminal of the hardware current acquisition circuit, and the output terminal is connected to the control terminal of the solid-state relay.
[0029] The input terminal of the second voltage follower is connected to the connection point, and the output terminal and the connection terminal of the solid-state relay are both connected to the input terminal of the operational integration circuit;
[0030] The output of the computational integration circuit is connected to the input of the second window comparator.
[0031] The output of the second window comparator is connected to the second input of the NAND gate circuit.
[0032] Preferably, the second voltage follower is a third operational amplifier; the operational integrator circuit includes: a fifth resistor, a sixth resistor, a seventh resistor, a second capacitor, and a fourth operational amplifier;
[0033] The fifth resistor, the sixth resistor, the seventh resistor, and the first terminal of the second capacitor are all connected to the inverting input terminal of the fourth operational amplifier, and the non-inverting input terminal of the fourth operational amplifier is grounded; the non-inverting input terminal of the third operational amplifier is connected to the connection point, and the inverting input terminal and the output terminal are all connected to the second terminal of the fifth resistor; the second terminal of the sixth resistor is connected to the first connection terminal of the solid-state relay; the second terminal of the seventh resistor, the second terminal of the second capacitor, and the second connection terminal of the solid-state relay are connected to the output terminal of the fourth operational amplifier, serving as the output terminal of the operational integrator circuit and connected to the input terminal of the second window comparator.
[0034] Preferably, the pulse signal parameters include amplitude, pulse width, and frequency.
[0035] Preferably, the software protection circuit further includes a watchdog circuit;
[0036] The watchdog circuit is connected to the control unit to restart the control unit when an abnormal operating state of the control unit is detected.
[0037] Preferably, the control unit is further configured to: stop the output of the electrical stimulation output circuit when the pulse signal parameter exceeds the parameter threshold.
[0038] This invention provides a redundant circuit for protecting the output of electrical stimulation. Compared to current technologies that rely on only one monitoring method to assess the safety of electrical stimulation output, leading to missed detections and insufficient reliability due to the simplistic monitoring approach, this invention monitors electrical stimulation from both hardware and software perspectives. It addresses three safety requirements according to international standards: charge balance, single-phase pulse charge limitation, and total current limitation. Charge balance protection is achieved through biphasic current stimulation pulses with identical output charges. Single-phase pulse charge limitation and total current limitation utilize a hardware structure to compare the current and charge in the stimulation circuit with threshold values. This hardware-based comparison of multiple pulse data points cuts off the stimulation circuit when thresholds are exceeded, providing hardware protection. Furthermore, a control unit performs electrical analysis on the sampled signals, comparing pulse signal parameters with threshold values to determine whether to cut off the stimulation circuit, thus providing software-based protection. This invention monitors electrical stimulation from both hardware and software perspectives, improving circuit reliability. The collection and analysis of multiple data points enhances the comprehensiveness of monitoring and prevents missed detections. Attached Figure Description
[0039] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0040] Figure 1 A structural diagram of a redundant circuit for electrical stimulation output protection provided in an embodiment of the present invention;
[0041] Figure 2 A circuit diagram of a hardware protection circuit provided in an embodiment of the present invention;
[0042] The attached diagram is labeled as follows: 10 is the electrical stimulation output circuit, 11 is the hardware current acquisition circuit, 12 is the software current acquisition circuit, 13 is the overcurrent protection circuit, 14 is the charge protection circuit, 15 is the hardware switching circuit, 16 is the software switching circuit, 17 is the control unit, 18 is the negative electrode plate, 19 is the positive electrode plate, and 20 is the watchdog circuit. Detailed Implementation
[0043] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present invention.
[0044] The core of this invention is to provide a redundant circuit for electrical stimulation output protection, which monitors electrical stimulation from both software and hardware perspectives to improve circuit reliability and the comprehensiveness of monitoring.
[0045] To enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0046] Figure 1 A structural diagram of a redundant circuit for electrical stimulation output protection provided in an embodiment of the present invention is shown below. Figure 1 As shown, the circuit includes: a hardware protection circuit, a software protection circuit, and a current acquisition circuit;
[0047] The hardware protection circuit includes a hardware switching circuit 15, a charge protection circuit 14, and an overcurrent protection circuit 13; the software protection circuit is a software switching circuit 16; the hardware switching circuit 15 and the software switching circuit 16 are located on the lines connecting the electrical stimulation output circuit 10 to the positive electrode and / or negative electrode, and are used to cut off the stimulation circuit when a protection logic level signal is received; the current acquisition circuit is used to acquire the voltage drop across the sampling resistor in the stimulation circuit, and its output terminal is connected to the voltage signal input terminals of the charge protection circuit 14, the overcurrent protection circuit 13, and the control unit 17, respectively; the charge protection circuit 14 is used to... The output signal calculates the accumulated charge, and when the accumulated charge exceeds the charge threshold, it generates a protection logic level signal and transmits it to the hardware switch circuit 15 to cut off the stimulation circuit. The overcurrent protection circuit 13 calculates the pulse current based on the output signal of the current acquisition circuit, and generates a protection logic level signal when the pulse current exceeds the current threshold, and transmits it to the hardware switch circuit 15 to cut off the stimulation circuit. The software switch circuit 16 is connected to the control unit 17 and is used to cut off the stimulation circuit when it receives a control command generated by the control unit 17 when it detects that the pulse signal parameter exceeds the parameter threshold based on the output signal of the current acquisition circuit.
[0048] The redundant circuit for output protection of electrical stimulation provided by this invention is mainly used in functional electrical stimulation devices for hand rehabilitation to prevent harm to the human body from electrical stimulation. Functional electrical stimulation is an important rehabilitation engineering technology that uses electrical pulses with specific parameters to stimulate nerve or muscle tissue, thereby reconstructing or restoring lost physiological functions (such as limb movement, bladder control, etc.). Since the electrical stimulation pulses need to act on the human body, their safety is directly related to the patient's treatment effect and usage risks. Considering the possible situations that may occur during specific rehabilitation processes, the redundant circuit for output protection of electrical stimulation provided by this invention provides output protection from both hardware and software protection perspectives.
[0049] First, the hardware protection circuit compares the pulse signals during the rehabilitation process with preset reference values by constructing a specific circuit structure. When the pulse signal exceeds the reference value, the electrical stimulation transmission circuit is cut off. The software protection circuit analyzes the pulse signals through a control unit. When relevant parameters of the pulse signal exceed thresholds, it issues a command to cut off the electrical stimulation transmission circuit. Thus, this invention monitors electrical stimulation from both hardware and software perspectives, avoiding the problem of abnormal monitoring due to structural failures or program malfunctions, which could lead to a loss of protection for the body.
[0050] Specifically, the hardware protection circuit includes a hardware switching circuit 15, a charge protection circuit 14, and an overcurrent protection circuit 13, while the software protection circuit is a software switching circuit 16. The hardware switching circuit 15 and the software switching circuit 16 connect the electrical stimulation output circuit 10 and the electrode pads to promptly disconnect the stimulation circuit in case of abnormalities. In practice, the electrical stimulation output circuit 10 serves as the core signal source, generating dual-stimulation constant current source pulses that meet therapeutic requirements. The output of this circuit is connected to the positive and negative electrode pads attached to the body via a dedicated therapeutic wire, forming a complete stimulation circuit. The therapeutic wire employs a branched design, with one end receiving the pulse signal generated by the electrical stimulation output circuit 10, and the other end connected to the positive electrode pad 19 and the negative electrode pad 18 placed on the body surface. This electrode arrangement creates a directional electric field, allowing the stimulation pulses to flow through the target tissue area of the body in a controllable manner. The electrical stimulation output circuit 10 uses a constant current output mode to ensure a stable stimulation dose under different human body impedance conditions. The generated dual-stimulation pulses have adjustable amplitude, frequency, and pulse width parameters to meet the needs of different treatment scenarios. The therapy line, as the signal transmission medium, employs a shielded structure to reduce external electromagnetic interference and ensure the integrity of the stimulation waveform. The positive electrode 19 and negative electrode 18 are made of Ag / AgCl material, exhibiting good biocompatibility and stable interfacial impedance characteristics. It is understood that there are two circuits between the electrical stimulation output circuit 10 and the positive and negative electrode plates. The hardware switching circuit 15 and the software switching circuit 16 can be connected in series on the same circuit or separately on the two circuits to prevent a failure of one therapy line from causing both protection circuits to fail.
[0051] The current acquisition circuit is used to sample the pulse signal. In a specific implementation, a sampling resistor is provided between the electrical stimulation output circuit 10 and the electrode plate. The current acquisition circuit acquires the voltage signal by measuring the voltage drop across the sampling resistor, and then calculates the current value of the circuit. For both hardware and software protection circuits, the same current acquisition circuit can be used to acquire the pulse signal. However, to achieve a safer redundant protection effect, a hardware current acquisition circuit 11 and a software current acquisition circuit 12 can be set up separately to provide pulse signal detection information for the hardware and software protection circuits, respectively. Specifically, to enhance the safety and reliability of the circuit, in this embodiment, two current acquisition circuits are configured, including a hardware current acquisition circuit 11 and a software current acquisition circuit 12. The hardware current acquisition circuit 11 acquires the voltage drop across the first sampling resistor R in the connection line between the electrical stimulation output circuit 10 and the negative electrode 18, and its output terminal is connected to the voltage signal input terminals of the overcurrent protection circuit 13 and the charge protection circuit 14, respectively. The software current acquisition circuit 12 acquires the voltage drop across the second sampling resistor in the connection line between the electrical stimulation output circuit 10 and the positive electrode 19, and its output terminal is connected to the voltage signal input terminal of the control unit 17.
[0052] The charge protection circuit 14 and overcurrent protection circuit 13 in the hardware protection circuit provide protection from the perspectives of charge quantity and current value, respectively. The overcurrent protection circuit 13 compares the voltage signal output by the hardware current acquisition circuit 11 with the voltage signal corresponding to a preset current threshold in real time. When the voltage signal exceeds the range, a protection logic level signal is immediately generated, which is directly transmitted to the hardware switching circuit 15 to control it to cut off the stimulation circuit, thus realizing the overcurrent protection function. The charge protection circuit 14 calculates the accumulated charge by integrating the current over time and converts it into a corresponding voltage value. When the calculated voltage value exceeds the voltage value corresponding to the charge threshold, the charge protection circuit 14 generates a protection logic level signal and transmits it to the hardware switching circuit 15 to cut off the stimulation circuit.
[0053] The hardware switching circuit 15 is responsible for receiving the protection logic level signals generated by the charge protection circuit 14 and the overcurrent protection circuit 13. It realizes the rapid on / off control of the stimulation circuit through hardware logic, ensuring that the stimulation signal can be cut off immediately when an abnormality is detected.
[0054] The software switch circuit 16 is connected to the control unit 17 and is used to cut off the stimulation circuit upon receiving a control command generated by the control unit 17 when it detects that the pulse signal parameter exceeds the parameter threshold based on the output signal of the current acquisition circuit. This control unit can be a standalone unit or part of a functional electrical stimulation device. This unit can generate parameter thresholds according to the international standard IEC 60601-2-10. The signal output from the current acquisition circuit can be transmitted to the control unit via its ADC sampling module. In addition to cutting off the stimulation circuit by switching off the software switch circuit, the control unit can also stop the output of the electrical stimulation output circuit when the pulse signal parameter exceeds the parameter threshold, thus cutting off the stimulation from both the transmission process and the output source, achieving a dual protection effect.
[0055] The redundant circuit for electrical stimulation output protection provided by this invention addresses the shortcomings of current technologies that rely on only one monitoring method to assess the safety of electrical stimulation output, leading to missed detections and insufficient reliability due to the simplistic monitoring approach. This technical solution monitors electrical stimulation from both hardware and software perspectives, addressing safety requirements from three international standards: charge balance, single-phase pulse charge limitation, and total current limitation. Charge balance protection is achieved through biphasic current stimulation pulses with identical output charges. Single-phase pulse charge limitation and total current limitation utilize a constructed hardware structure to compare the current and charge in the stimulation circuit with threshold values. This hardware-based comparison of multiple pulse data points cuts off the stimulation circuit when thresholds are exceeded, providing hardware protection. Furthermore, the control unit performs electrical analysis on the sampled signals, determining whether to cut off the stimulation circuit by comparing pulse signal parameters with thresholds, thus providing software-based protection. This invention monitors electrical stimulation from both hardware and software perspectives, improving circuit reliability and enhancing monitoring comprehensiveness by collecting and analyzing multiple data points, thus preventing missed detections.
[0056] The above embodiments describe a hardware switching circuit 15 used to cut off the stimulation circuit in case of an abnormality. Since the hardware protection circuit provides two monitoring angles, this embodiment provides a specific hardware structure to simplify the circuit structure while implementing the judgment logic. Specifically, the hardware switching circuit 15 includes: a NAND gate circuit, a clock-controlled D latch circuit, and an optocoupler switch circuit; the first input terminal of the NAND gate circuit is connected to the output terminal of the overcurrent protection circuit 13, the second input terminal is connected to the output terminal of the charge protection circuit 14, and the output terminal is connected to the input terminal of the clock-controlled D latch circuit; the output terminal of the clock-controlled D latch circuit is connected to the control terminal of the optocoupler switch circuit; the first output terminal of the optocoupler switch circuit is connected to the pulse signal output terminal of the electrical stimulation output circuit 10, and the second output terminal is connected to the negative electrode plate 18.
[0057] A NAND gate has two input pins and one output pin. The output is low only when all inputs are high; otherwise, the output is high. It is known that the overcurrent protection circuit 13 and the charge protection circuit 14 output signals at a high logic level under normal conditions, and at a low logic level when an error is detected. Therefore, a NAND gate is used to integrate the output signals of the overcurrent protection circuit 13 and the charge protection circuit 14, resulting in a low output under normal conditions and a high output when an error signal is detected.
[0058] The core function of the clock-controlled D latch circuit is to transparently transmit data during the effective period of a specific clock level and to latch and retain the data when the clock level is invalid. In this invention, if the clock-controlled D latch circuit is not used, the circuit will be directly shut down when the overcurrent protection circuit 13 and the charge protection circuit 14 generate a shutdown signal. After the stimulus passes through the shutdown, the hardware protection circuit will return to normal, thereby opening the stimulus channel and causing the safety protection to fail. Therefore, a clock-controlled D latch circuit is added to save the shutdown signal. The difference between the clock-controlled D latch circuit and the ordinary D latch circuit is that the clock-controlled D latch only samples the input data on the rising edge of the clock signal and changes the output. The clock-controlled D latch circuit is controlled by four pins: PRE preset pin, CLR clear pin, CLK clock pin, and D data input pin. In this invention, in order to achieve the above functions, the PRE preset pin and CLR clear pin are connected to the control unit 17, the CLK clock pin is used to receive the logic level of the NAND gate output, and the D data input pin is connected to a fixed logic high level of 5V. When no level output is being performed, the control unit 17 closes the electrical stimulation channel, sets the PRE preset pin to logic low and the CLR clear pin to logic high, and the Q output pin outputs a high level, controlling the optocoupler switch circuit to close the stimulation channel. When electrical stimulation output begins, the control unit 17 opens the electrical stimulation channel, requiring D latch initialization, i.e., setting the PRE preset pin to logic high and the CLR clear pin to logic low. At this time, the Q output pin outputs a low level, controlling the optocoupler switch circuit to open the stimulation channel. After initialization, detection of electrical stimulation will be enabled, so both the PRE preset pin and the CLR clear pin are set to logic high, and the hardware protection function is now in operation. When an error signal is generated, i.e., the NAND gate outputs a high level, generating a rising edge, this triggers the clock-controlled D latch. The D latch writes the fixed logic high level (5V) connected to the data input pin to the Q output pin, causing the Q output pin to output a high level, controlling the optocoupler switch circuit to close the stimulation channel to achieve the protection function. Only after re-initialization can the output function be restarted.
[0059] Based on the above embodiments, this embodiment also provides a specific circuit structure. The overcurrent protection circuit 13 includes: a first voltage follower, a differential operational amplifier circuit, and a first window comparator; the input terminal of the first voltage follower is connected to the output terminal of the hardware current acquisition circuit 11, and the output terminal of the first voltage follower is connected to the input terminal of the differential operational amplifier circuit; the output terminal of the differential operational amplifier circuit is connected to the input terminal of the first window comparator; and the output terminal of the first window comparator is connected to the first input terminal of the NAND gate circuit.
[0060] The first voltage follower, characterized by high input impedance and low output impedance, is used to achieve efficient isolation and drive enhancement between the preceding and following circuits, ensuring stable signal transmission. The overcurrent protection circuit 13 primarily isolates the output signal of the hardware current acquisition circuit 11 from the influence of subsequent circuits. Its circuit structure typically consists of an operational amplifier, with its output connected to the inverting input to achieve voltage following. The differential operational amplifier circuit amplifies the voltage difference between the two input signals and effectively suppresses common-mode noise. The first window comparator determines whether the voltage signal corresponding to the pulse current exceeds the voltage threshold corresponding to the current threshold.
[0061] The charge protection circuit 14 includes: an output detection circuit, a solid-state relay, a second voltage follower, an operational integrator circuit, and a second window comparator; the input terminal of the output detection circuit is connected to the output terminal of the hardware current acquisition circuit 11, and the output terminal is connected to the control terminal of the solid-state relay; the input terminal of the second voltage follower is connected to the connection point, and the output terminal and the connection terminal of the solid-state relay are both connected to the input terminal of the operational integrator circuit; the output terminal of the operational integrator circuit is connected to the input terminal of the second window comparator; the output terminal of the second window comparator is connected to the second input terminal of the NAND gate circuit.
[0062] The output detection circuit detects whether a waveform pulse is continuously output in the loop to meet the switching requirements of the charge protection circuit 14 for charge discharge. A solid-state relay acts as a flood discharge switch. A second voltage follower isolates the overcurrent protection circuit 13 from the charge protection circuit 14. An operational integrator circuit performs integration, using an operational amplifier as its core and external components to achieve the integration function. These external circuits mainly consist of an input resistor, a feedback capacitor, and a feedback resistor. The input resistor and feedback capacitor together determine the integrator's time constant and integration scale, while the feedback resistor provides a DC feedback path to prevent operational amplifier saturation due to input offset voltage. The second window comparator functions similarly to the first window comparator, determining whether the voltage value corresponding to the monitored charge signal exceeds the voltage threshold corresponding to the charge threshold.
[0063] To facilitate a more intuitive understanding and implementation of the solution provided by this invention, this embodiment also provides a specific circuit structure, which is described in conjunction with a specific implementation scenario. Figure 2 A circuit diagram of a hardware protection circuit provided in an embodiment of the present invention is shown below. Figure 2 As shown, when applying the solution provided by this invention to a functional electrical stimulation device for hand rehabilitation, a biphasic constant current source pulse signal with a frequency of 0-50Hz, a pulse width of 100µS-500µS, and an amplitude of -50mA-50mA is selected as the electrical stimulation parameters for rehabilitation. Since the impedance of human skin is approximately 0-1KΩ, the voltage range of the pulse signal output by the electrical stimulation output circuit 10 is set to 0-60V.
[0064] First, a high-precision sampling resistor is connected in series in the path of the electrical stimulation output pulse. According to Ohm's law, when current flows through this resistor, a proportional voltage drop is generated across it. The hardware current acquisition circuit 11 uses a differential operational amplifier with two input terminals: a non-inverting input (+) and an inverting input (-). These are directly connected to the two ends of the sampling resistor to measure the voltage drop across it. The differential operational amplifier amplifies the voltage difference between the two input terminals with a certain gain to output a voltage level (0-5V) that can be processed by subsequent circuits (such as the ADC of a microcontroller).
[0065] Regarding the selection of the differential amplifier, since the pulse signal is a two-phase pulse, a differential operational amplifier capable of measuring two-phase voltage is selected. Considering the voltage range of the pulse signal is set to 0-60V, a differential operational amplifier with a wide common-mode voltage greater than 60V is chosen. Furthermore, the maximum frequency of the pulse signal is 50Hz, and the maximum pulse width is 100µs-500µs. Extremely high accuracy is required for the measurement of pulse rise time, fall time, and pulse width; therefore, a higher signal bandwidth is selected, with a maximum sampling period of 5µs and a minimum frequency of 200kHz. Combining these requirements, the INA296x series is selected as the differential operational amplifier model for this example. Its wide common-mode voltage of up to 110V, signal bandwidth of 1.1MHz, and two-phase measurement capability perfectly meet the above requirements. After configuring the amplification gain, the corresponding output voltage of the hardware current acquisition circuit 11 is 0.5V-4.5V, corresponding to -50mA-50mA for the two-phase pulse circuit.
[0066] This embodiment provides a specific first voltage follower, including: a first operational amplifier U1, a first resistor R1 and a first capacitor C1; the differential operational amplifier circuit includes a second operational amplifier U2, a second resistor R2, a third resistor R3, a fourth resistor R4, a first bidirectional Zener diode D1 and a second bidirectional Zener diode D2;
[0067] The first end of the first resistor R1 is connected to the output of the hardware current acquisition circuit 11 as the input of the first voltage follower. The second end of the first resistor R1 and the first end of the first capacitor C1 are connected to the non-inverting input of the first operational amplifier U1. The second end of the first capacitor C1 is grounded. The output of the first operational amplifier U1 is connected to the first end of the second resistor R2 and the inverting input of the first operational amplifier U1. The second end of the second resistor R2 is connected to the non-inverting input of the second operational amplifier U2. The first ends of the third resistor R3 and the fourth resistor R4 are connected to the inverting input of the second operational amplifier U2. The second end of the third resistor R3 is connected to the power supply. The second end of the fourth resistor R4 is connected to the output of the second operational amplifier U2 and the first ends of the first bidirectional Zener diode D1 and the second bidirectional Zener diode D2. The connection point is connected to the output of the differential operational amplifier circuit and the input of the first window comparator. The second ends of the first bidirectional Zener diode D1 and the second bidirectional Zener diode D2 are respectively connected to the power supply.
[0068] The differential operational amplifier circuit processes the voltage data (0.5V-4.5V) output from the hardware current acquisition circuit 11 into the required dual-phase voltage (-3-3V) for subsequent circuit operations, facilitating integration. Therefore, the non-inverting input voltage of the second differential operational amplifier is determined to be 0.5V-4.5V, which needs to be converted to -3-3V. Thus, the inverting input voltage is 2.5V. To achieve equal amplification at both ends, the amplification ratio is set to 3 times, calculated by dividing the fourth resistor R4 by the third resistor R3. The resistance of the third resistor R3 is chosen to be 10KΩ, and the resistance of the fourth resistor R4 is 30KΩ. Because the -50mA-50mA range (0.5V-4.5V) is converted to -3V-3V using a voltage follower and differential operational amplifier circuit, a window comparison is needed for the -3V-3V range. Considering potential noise and stability issues, a certain margin is given to the comparison threshold, limiting the pulse current to between -55mA and -55mA, i.e., the window comparator threshold voltage is between -3.3V and -3.3V. Window comparators typically have two configurations: dedicated comparators and comparators constructed using operational amplifiers. For accuracy and response speed considerations, this invention uses a dedicated comparator, model TLV1702, to build the window comparator. In this embodiment, the first bidirectional Zener diode D1 and the second bidirectional Zener diode D2 provide overvoltage protection.
[0069] For the charge protection circuit 14, this embodiment also provides a specific structure, wherein the second voltage follower is the third operational amplifier U3; the operational integrator circuit includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a second capacitor C2, and a fourth operational amplifier U4; the first ends of the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, and the second capacitor C2 are connected to the inverting input terminal of the fourth operational amplifier U4, and the non-inverting input terminal of the fourth operational amplifier U4 is grounded; the non-inverting input terminal of the third operational amplifier U3 is connected to the connection point, and the inverting input terminal and the output terminal are connected to the second end of the fifth resistor R5; the second end of the sixth resistor R6 is connected to the first connection terminal of the solid-state relay; the second end of the seventh resistor R7, the second end of the second capacitor C2, and the second connection terminal of the solid-state relay are connected to the output terminal of the fourth operational amplifier U4, serving as the output terminal of the operational integrator circuit and connected to the input terminal of the second window comparator.
[0070] The charge protection circuit 14 is used to prevent the charge of a single-phase pulse from reaching its upper limit. After the hardware current acquisition circuit 11 converts the current signal of the stimulation pulse into a corresponding voltage signal, the voltage signal is integrated by the operational integrator circuit to calculate the amount of charge generated by the pulse. Then, the output voltage of the operational integrator circuit is compared by the second window comparator. If the output voltage exceeds the corresponding threshold, it means that the amount of charge has reached the corresponding maximum threshold, and the safety protection mechanism is triggered to shut down the entire stimulation channel.
[0071] In this embodiment, the fifth resistor R5, serving as the input resistor, is selected with a resistance value of 100KΩ. The capacitance value of the second capacitor C2, serving as the feedback capacitor, is determined by both the unity-gain integral frequency and the resistance value of the input resistor. The unity-gain integral frequency defines the upper limit of the frequency range of the integrator circuit. When the electrical stimulation pulse frequency is 20-50Hz, the effectiveness of the integral function usually decreases when the unity-gain integral frequency is within ten times the operating frequency. Therefore, the unity-gain integral frequency of 1kHz is selected, which is much greater than ten times the electrical stimulation pulse frequency. The capacitance value of the feedback capacitor can be determined to be 1.59nF using the unity-gain integral frequency of 1kHz and the input resistor value of 100KΩ. The value of the feedback resistor must ensure that the lower limit operating frequency of the integrator is much lower than the minimum frequency required for practical application. This invention sets its low-frequency cutoff frequency to be ten times smaller than the minimum operating frequency, therefore, the low-frequency cutoff frequency is set to 2Hz. The seventh resistor R7, serving as the feedback resistor, needs a resistance value greater than 50MΩ, so 100MΩ is selected.
[0072] To prevent the accumulation of charge due to the delayed release of the integral quantity of a single pulse signal, which could affect the normal operation of the circuit and the safety of the operators, a charge relief circuit was added. The charge relief circuit operates in two ways: when the power supply is accidentally cut off or the power switch is turned off, there is no voltage in the entire circuit, and the feedback resistor slowly discharges the current (the discharge time is calculated). When the electrical stimulation is running normally, after the accumulation of one pulse signal is completed, but before the next output, the integral quantity needs to be discharged. We achieve rapid release of the integral quantity through a discharge switch and a discharge resistor. Since the frequency of the electrical stimulation pulse is 20-50Hz, the interval between each pulse is approximately 20ms, and the discharge operation only needs to be completed within 20ms. In this invention, a firmware relay is selected as the flood discharge switch.
[0073] The software protection circuit detects relevant parameters of the pulse signal through the control unit 17. These parameters include amplitude, pulse width, and frequency. The control unit 17 then samples and analyzes the voltage output from the software current acquisition circuit 12 using its built-in ADC function to obtain the pulse width, amplitude, and frequency of the pulse signal. It also calculates the charge amount of the single-phase pulse output. The calculation results are compared with the set parameters. If the parameters are abnormal, the protection mode is triggered. The software shuts down the electrical stimulation output and simultaneously controls the software switching circuit 16 to close the circuit channel, thus implementing a safety protection mechanism.
[0074] In this embodiment, in order to further improve the reliability and security of the circuit, a monitoring method is also provided for the program operation of the control unit 17. The software protection circuit further includes a watchdog circuit 20. The watchdog circuit 20 is connected to the control unit 17 to restart the control unit 17 when an abnormal operating state of the control unit 17 is detected.
[0075] The redundant circuit for electrical stimulation output protection provided by this invention has been described in detail above. The various embodiments in the specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. It should be noted that those skilled in the art can make various improvements and modifications to this invention without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this invention.
Claims
1. A redundant circuit for electrical stimulus output protection, characterized by, The application relates to a protection circuit for an electrostimulation device, comprising: a hardware protection circuit, a software protection circuit and a current acquisition circuit; the hardware protection circuit comprises a hardware switch circuit (15), a charge protection circuit (14) and an overcurrent protection circuit (13); the software protection circuit is a software switch circuit (16); the hardware switch circuit (15) and the software switch circuit (16) are arranged on a line connecting an electrostimulation output circuit (10) and a positive electrode sheet and / or a negative electrode sheet, and are used for cutting off a stimulation loop when a protection logic level signal is received; the current acquisition circuit is used for acquiring a voltage drop across a sampling resistor in the stimulation loop, and output ends are respectively connected to voltage signal input ends of the charge protection circuit (14) and the overcurrent protection circuit (13) and a control unit (17); the charge protection circuit (14) is used for calculating a charge accumulation amount according to an output signal of the current acquisition circuit, generating a protection logic level signal when the charge accumulation amount exceeds a charge threshold value, and transmitting the protection logic level signal to the hardware switch circuit (15) to cut off the stimulation loop; the overcurrent protection circuit (13) is used for calculating a pulse current according to the output signal of the current acquisition circuit, generating a protection logic level signal when the pulse current exceeds a current threshold value, and transmitting the protection logic level signal to the hardware switch circuit (15) to cut off the stimulation loop; the software switch circuit (16) is connected with the control unit (17), and is used for cutting off the stimulation loop when a control instruction generated by the control unit (17) according to detection of a pulse signal parameter exceeding a parameter threshold value by the output signal of the current acquisition circuit is received.
2. The redundant circuit for electrical stimulus output protection of claim 1, wherein, the current acquisition circuit comprises a hardware current acquisition circuit (11) and a software current acquisition circuit (12); the hardware current acquisition circuit (11) acquires a voltage drop across a first sampling resistor in a line connecting the electrostimulation output circuit (10) and a negative electrode sheet (18), and output ends are respectively connected to voltage signal input ends of the overcurrent protection circuit (13) and the charge protection circuit (14); the software current acquisition circuit (12) acquires a voltage drop across a second sampling resistor in a line connecting the electrostimulation output circuit (10) and a positive electrode sheet (19), and an output end is connected to a voltage signal input end of the control unit (17).
3. The redundant circuit for electrical stimulus output protection of claim 2, wherein, the hardware switch circuit (15) comprises an NAND gate circuit, a clock-controlled D-latch circuit and an optocoupler switch circuit; a first input end of the NAND gate circuit is connected with an output end of the overcurrent protection circuit (13), a second input end is connected with an output end of the charge protection circuit (14), and an output end is connected with an input end of the clock-controlled D-latch circuit; an output end of the clock-controlled D-latch circuit is connected with a control end of the optocoupler switch circuit; a first output end of the optocoupler switch circuit is connected with a pulse signal output end of the electrostimulation output circuit (10), and a second output end is connected with the negative electrode sheet (18).
4. The redundant circuit for electrical stimulus output protection of claim 3, wherein, the overcurrent protection circuit (13) comprises a first voltage follower, a differential operational amplifier circuit and a first window comparator; The input end of the first voltage follower is connected with the output end of the hardware current acquisition circuit (11), and the output end of the first voltage follower is connected with the input end of the differential operational amplifier circuit; The output end of the differential operational amplifier circuit is connected with the input end of the first window comparator; The output end of the first window comparator is connected with the first input end of the NAND gate circuit.
5. The redundant circuit for electrical stimulus output protection of claim 4, wherein, The first voltage follower comprises a first operational amplifier, a first resistor and a first capacitor; the differential operational amplifier circuit comprises a second operational amplifier, a second resistor, a third resistor, a fourth resistor, a first bidirectional voltage stabilizing diode and a second bidirectional voltage stabilizing diode; The first end of the first resistor is used as the input end of the first voltage follower and is connected with the output end of the hardware current acquisition circuit (11), the second end and the first end of the first capacitor are commonly connected with the non-inverting input end of the first operational amplifier; the second end of the first capacitor is grounded; the output end of the first operational amplifier is respectively connected with the first end of the second resistor and the inverting input end of the first operational amplifier; the second end of the second resistor is connected with the non-inverting input end of the second operational amplifier, the first end of the third resistor and the first end of the fourth resistor are commonly connected with the inverting input end of the second operational amplifier, and the second end of the third resistor is connected with a power supply; the second end of the fourth resistor and the output end of the second operational amplifier and the first end of the first bidirectional voltage stabilizing diode and the second bidirectional voltage stabilizing diode are commonly connected, and the connecting point is used as the output end of the differential operational amplifier circuit, and the second end of the first bidirectional voltage stabilizing diode and the second bidirectional voltage stabilizing diode is respectively connected with a power supply.
6. The redundant circuit for electrical stimulus output protection of claim 5, wherein, The charge protection circuit (14) comprises an output detection circuit, a solid-state relay, a second voltage follower, an operational integration circuit and a second window comparator; The input end of the output detection circuit is connected with the output end of the hardware current acquisition circuit (11), and the output end is connected with the control end of the solid-state relay; The input end of the second voltage follower is connected with the connecting point, and the output end and the connecting end of the solid-state relay are commonly connected with the input end of the operational integration circuit; The output end of the operational integration circuit is connected with the input end of the second window comparator; The output end of the second window comparator is connected with the second input end of the NAND gate circuit.
7. The redundant circuit for electrical stimulus output protection of claim 6, wherein, The second voltage follower is a third operational amplifier; the operational integration circuit comprises a fifth resistor, a sixth resistor, a seventh resistor, a second capacitor and a fourth operational amplifier; The first end of the fifth resistor, the sixth resistor, the seventh resistor and the second capacitor are connected to the inverting input of the fourth operational amplifier, and the non-inverting input of the fourth operational amplifier is grounded; the non-inverting input of the third operational amplifier is connected to the connection point, and the inverting input and the output are connected to the second end of the fifth resistor; the second end of the sixth resistor is connected to the first connection end of the solid-state relay; the second end of the seventh resistor, the second end of the second capacitor and the second connection end of the solid-state relay are connected to the output of the fourth operational amplifier, and the input of the second window comparator is connected to the output of the operational integration circuit.
8. The redundant circuit for electrical stimulus output protection of claim 1, wherein, The pulse signal parameters include: amplitude, pulse width and frequency.
9. The redundant circuit for electrical stimulus output protection according to any one of claims 1 to 8, characterized in that, The software protection circuit further comprises a watchdog circuit (20). The watchdog circuit (20) is connected with the control unit (17) to restart the control unit (17) when an abnormal running state of the control unit (17) is monitored.
10. The redundant circuit for electrical stimulus output protection of claim 9, wherein, The control unit (17) is further configured to stop the output of the electric stimulation output circuit (10) when the pulse signal parameters exceed the parameter threshold.