Method for manufacturing a semiconductor structure and semiconductor structure
By performing pre-defined plasma etching on the upper surface of the first etched structure within the reaction chamber during the pre-defined plasma etching process, etching byproducts are removed, and the formation of particulate solids by plasma bombardment of the inner wall of the chamber is avoided, thereby improving the yield of semiconductor products.
Patent Information
- Application Number
- CN202111062721.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-09-10
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2041-09-10
AI Technical Summary
In traditional etching processes, etching byproducts form particulate matter on the wafer surface, affecting the yield of semiconductor products.
A preset plasma etching process is adopted, which uses a gas with a molecular mass less than or equal to helium atoms to form plasma to remove etching byproducts on the surface of the etched structure. The byproducts are then removed by a vacuum pump to prevent them from being cleaned on the inner wall of the cavity. A protective film is deposited on the inner wall of the cavity to prevent them from having any impact.
The granular solid formed on the inner wall surface of the preset plasma etching chamber without affecting the granular solid formed on the upper surface of the first etched structure falls onto the granular solid, thus improving the yield of semiconductor products.
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Figure CN115799028B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of semiconductor manufacturing, in particular to a preparation method of a semiconductor structure and the semiconductor structure. BACKGROUND
[0002] With the rapid development of integrated circuit manufacturing process, the market requires higher efficiency and yield of semiconductor manufacturing. In the semiconductor manufacturing process, etching is an important process of patterning, and the yield of etching structure directly affects the yield of the semiconductor product.
[0003] However, the traditional etching process produces a lot of by-products. During the plasma etching of the wafer, the granular by-products fall on the surface of the wafer, affecting the yield of the semiconductor product. SUMMARY
[0004] Therefore, it is necessary to provide a preparation method of a semiconductor structure and the semiconductor structure to avoid the formation of granular etching by-products falling on the upper surface of the semiconductor structure during etching, which affects the yield of the semiconductor product.
[0005] To achieve the above object and other related objects, one aspect of the present application provides a preparation method of a semiconductor structure, comprising the following steps:
[0006] Etching the semiconductor structure in the reaction chamber to obtain a first etching structure;
[0007] Performing a preset plasma etching treatment on the upper surface of the first etching structure in the reaction chamber to obtain a second etching structure after removing the etching by-products; wherein the maximum molecular weight of the gas used to form the preset plasma is less than or equal to the atomic weight of helium.
[0008] The preparation method of the semiconductor structure in the above embodiment, by performing a preset plasma etching treatment on the upper surface of the first etching structure obtained by etching in the reaction chamber, obtains a second etching structure after removing the etching by-products, and the maximum molecular weight of the gas used to form the preset plasma is less than or equal to the atomic weight of helium. Therefore, the travel distance of the preset plasma under the same etching conditions is less than that of the helium atom. In the process of removing the etching by-products on the upper surface of the first etching structure by using the preset plasma etching, the preset plasma is prevented from bombarding the inner wall surface of the etching chamber to form granular solid, which falls on the upper surface of the first etching structure, thereby improving the yield of the semiconductor product.
[0009] In one of the embodiments, the method for preparing the semiconductor structure further comprises: continuing etching with the second etching structure as a mask to obtain a target etching structure, so as to improve the quality and yield of the prepared target etching structure.
[0010] In one of the embodiments, before the preset plasma etching treatment is performed on the upper surface of the first etching structure, the method further comprises: cleaning the inner wall of the cavity of the reaction chamber by using a cleaning gas. The etching by-products on the inner wall of the cavity of the reaction chamber are avoided to affect the yield of the semiconductor structure prepared in the subsequent process.
[0011] In one of the embodiments, the method for preparing the semiconductor structure further comprises: depositing a protective film layer on the surface of the inner wall of the cavity after the cleaning treatment, so as to repair the etching damage to the inner wall of the cavity in the cleaning treatment process.
[0012] In one of the embodiments, the cleaning gas comprises nitrogen trifluoride, so that the active fluorine ions generated by the nitrogen trifluoride after the deposition of the thin film generate acidic substances to clean the inner wall of the cavity of the reaction chamber.
[0013] In one of the embodiments, the material for forming the protective film layer comprises silicon dioxide, so as to repair the etching damage to the inner wall of the cavity in the cleaning treatment process, and the silicon dioxide covers and protects the inner wall of the cavity, which can avoid the damage to the inner wall of the cavity in the subsequent etching process.
[0014] In one of the embodiments, the gas for forming the preset plasma comprises at least one of nitrous oxide, nitrogen or oxygen, so that the travel of the formed preset plasma is less than the travel of the helium atom under the same etching condition, and the preset plasma is avoided to form granular solid by bombarding the surface of the inner wall of the etching cavity in the process of removing the etching by-products on the upper surface of the first etching structure by using the preset plasma etching, and the granular solid falls on the upper surface of the first etching structure, so as to improve the yield of the semiconductor product.
[0015] In one embodiment, the gas used to form the preset plasma further comprises helium, the atomic mass of helium is smaller than that of any one of nitrous oxide, nitrogen or oxygen, and the travel distance of the plasma formed by helium is greater than that of the plasma formed by any one of nitrous oxide, nitrogen or oxygen under the same etching conditions, so that the etching byproducts on the inner wall of the chamber and the upper surface of the first etching structure can be effectively removed; since the gas used to form the plasma further comprises at least one of nitrous oxide, nitrogen or oxygen, compared with the cleaning process of the inner wall of the chamber by forming the plasma with helium, the process of removing the etching byproducts on the upper surface of the first etching structure by using the preset plasma can be avoided, in which the particles formed by the preset plasma bombarding the inner wall surface of the etching chamber fall on the upper surface of the first etching structure, so that the yield of the semiconductor product is improved.
[0016] In one embodiment, the flow rate of the gas used to form the preset plasma is greater than 0 and less than or equal to 6300sccm, so that the process of removing the etching byproducts on the upper surface of the first etching structure by using the preset plasma can be avoided, in which the particles formed by the preset plasma bombarding the inner wall surface of the etching chamber fall on the upper surface of the first etching structure, so that the yield of the semiconductor product is improved.
[0017] In one embodiment, the gas used to form the preset plasma comprises nitrous oxide, and the content of nitrous oxide in the gas is 70%-90%, so that the etching byproducts on the upper surface of the first etching structure can be effectively removed, and the particles formed by the preset plasma bombarding the inner wall surface of the etching chamber fall on the upper surface of the first etching structure, so that the yield of the semiconductor product is improved.
[0018] In one embodiment, the flow rate of the helium is greater than 0 and less than or equal to 3000sccm, so that the etching byproducts on the upper surface of the first etching structure can be effectively removed, the etching efficiency is ensured, the waste of etching gas is avoided, and the cost of the etching process is controlled.
[0019] In one embodiment, the gas used to form the preset plasma comprises nitrous oxide and helium, and the ratio of the number of molecules of the nitrous oxide to the total number of molecules of the gas is 0.5-1.0, so that the etching byproducts on the upper surface of the first etching structure can be effectively removed, and the particles formed by the preset plasma bombarding the inner wall surface of the etching chamber fall on the upper surface of the first etching structure, so that the yield of the semiconductor product is improved.
[0020] In one of the embodiments, the pressure of the preset plasma etching process on the upper surface of the first etching structure is 4-6 torr, so as to effectively remove the etching byproducts on the upper surface of the first etching structure, while avoiding the preset plasma bombarding the inner wall surface of the etching chamber to form granular solid, which falls on the upper surface of the first etching structure, thereby improving the yield of the semiconductor product.
[0021] In one of the embodiments, the radio frequency energy of the preset plasma etching process on the upper surface of the first etching structure is 500-700 W, so as to effectively remove the etching byproducts on the upper surface of the first etching structure, while avoiding the preset plasma bombarding the inner wall surface of the etching chamber to form granular solid, which falls on the upper surface of the first etching structure, thereby improving the yield of the semiconductor product.
[0022] Another aspect of the present application provides a semiconductor structure, which is prepared by the method for preparing a semiconductor structure according to any one of the embodiments of the present application. The upper surface of the first etching structure obtained by etching in the reaction chamber is subjected to a preset plasma etching process to obtain a second etching structure after removing the etching byproducts. The maximum molecular mass of the gas used to form the preset plasma is less than or equal to the mass of a helium atom, so that the travel of the preset plasma under the same etching condition is less than the travel of the helium atom. In the process of removing the etching byproducts on the upper surface of the first etching structure by using the preset plasma etching, the preset plasma bombards the inner wall surface of the etching chamber to form granular solid, which falls on the upper surface of the first etching structure, thereby improving the yield of the semiconductor product. BRIEF DESCRIPTION OF DRAWINGS
[0023] For better describing and illustrating the embodiments and / or examples of the disclosed application, one or more drawings can be referred to. The additional details or examples used to describe the drawings should not be considered as limiting the scope of any one of the disclosed application, the presently described embodiments and / or examples, and the best mode presently understood of these applications.
[0024] Figure 1 A flow chart of a method for preparing a semiconductor structure according to an embodiment of the present application is shown;
[0025] Figure 2 A flow chart of a method for preparing a semiconductor structure according to another embodiment of the present application is shown;
[0026] Figure 3 A flow chart of a method for preparing a semiconductor structure according to still another embodiment of the present application is shown;
[0027] Figure 4 A schematic diagram of a cross-sectional structure of a reaction chamber according to an embodiment of the present application is shown;
[0028] Figure 5 is shown as Figure 4 is shown as an enlarged schematic view of the A region in the middle;
[0029] Figure 6 is shown as a cross-sectional structure schematic view of a first etching structure provided in an embodiment of the present application;
[0030] Figure 7 is shown as a cross-sectional structure schematic view of a second etching structure provided in an embodiment of the present application;
[0031] Figure 8 is shown as a top view structure schematic view of a target etching structure provided in an embodiment of the present application;
[0032] Figure 9 is shown as a corresponding relationship curve schematic view of a ratio of the number of nitrous oxide molecules to the total number of gas molecules in a gas used for forming a preset plasma and a yield of a semiconductor structure prepared in an embodiment of the present application.
[0033] BRIEF DESCRIPTION OF DRAWINGS
[0034] 10, first etching structure; 11, second mask layer; 111, first dielectric layer; 112, second dielectric layer; 12, first mask layer; 121, silicon oxynitride layer; 122, carbon layer; 13, first patterned mask layer; 14, granular etching byproduct; 15, substrate; 20, second etching structure; 30, preset plasma; 40, target etching structure; 41, capacitive hole; 50, gas outlet; 200, reaction chamber; 202, cavity inner wall; 203, cleaning byproduct layer; 204, protective film layer. DETAILED DESCRIPTION
[0035] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present application is more thorough and comprehensive.
[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0037] It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or layer, there are no intervening elements or layers present. It will also be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application.
[0038] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or
[0039] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0040] Embodiments of the application will be described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the application. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, embodiments of the application should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. The regions illustrated in the figures are schematic and many of the regions are not drawn to scale. The same reference numerals will be used throughout for like or similar items and features.
[0041] Referring now to the drawings, and more particularly to Figures 1-9 It is also noted that the illustrative figures are not drawn to scale. Only those structures necessary for an understanding of the present application have been depicted in the drawings. Therefore, the present application should not be considered limited to the particular examples illustrated in the drawings, but encompasses any and all implementations within the scope of the appended claims and their equivalents.
[0042] Referring now to the drawings, and more particularly to Figure 1 In one embodiment of the present application, a method for preparing a semiconductor structure is provided, comprising the following steps:
[0043] Step S110: performing etching treatment on the semiconductor structure in a reaction chamber to obtain a first etching structure;
[0044] Step S120: performing preset plasma etching treatment on the upper surface of the first etching structure in the reaction chamber to obtain a second etching structure after removing etching byproducts; wherein the maximum molecular mass in the gas used to form the preset plasma is less than or equal to the mass of a helium atom.
[0045] In particular, referring to Figure 1 , by performing preset plasma etching treatment on the upper surface of the first etching structure obtained by etching in the reaction chamber, a second etching structure after removing etching byproducts is obtained. The maximum molecular mass in the gas used to form the preset plasma is less than or equal to the mass of a helium atom. Therefore, the travel distance of the preset plasma under the same etching conditions is less than that of a helium atom. In the process of removing etching byproducts on the upper surface of the first etching structure by using the preset plasma etching, the formation of particulate solids on the inner wall surface of the etching chamber by bombarding the preset plasma is avoided, which falls on the upper surface of the first etching structure, thereby improving the yield of the semiconductor product.
[0046] Referring now to the drawings, and more particularly to Figure 2 In one embodiment of the present application, the method for preparing a semiconductor structure further comprises the following steps:
[0047] Step S130: continuing etching with the second etching structure as a mask to obtain a target etching structure.
[0048] Specifically, for the integrated circuit semiconductor structure, due to the complexity of the integrated circuit structure, multiple pattern transfers are required in the etching process to prepare a semiconductor structure meeting the functional requirements of the integrated circuit. After obtaining the first etching structure, continue etching based on the first etching structure as a mask to obtain a target etching structure meeting the functional requirements of the integrated circuit, or continue etching with the target etching structure as a mask to further transfer the pattern to the target etching structure to obtain a more complex semiconductor structure. In the process of removing the etching by-products on the upper surface of the first etching structure by using the preset plasma etching, the formation of granular solid on the inner wall surface of the etching chamber by the bombardment of the preset plasma is avoided, which falls on the upper surface of the first etching structure, thereby improving the quality and yield of the prepared second etching structure, and thus improving the yield of the semiconductor product.
[0049] The above embodiments are intended to illustrate the principles of the application, and the number of times of performing the etching process is not specifically limited.
[0050] Please refer to Figure 3 In an embodiment of the present application, before the preset plasma etching treatment is performed on the upper surface of the first etching structure, the method further comprises:
[0051] Step S112: cleaning the inner wall of the cavity of the reaction chamber with a cleaning gas.
[0052] For example, please refer to Figures 4-7 After the wafer is etched by using the preset plasma 30 in the reaction chamber 200, a structure as shown in FIG. 4 is obtained. Figure 6The first etching structure 10 is shown, wherein the first etching structure 10 can include, from bottom to top, a substrate 15, a second mask layer 11, a first mask layer 12, and a first patterned mask layer 13. The second mask layer 11 includes a first dielectric layer 111 and a second dielectric layer 112 stacked in sequence, and the second dielectric layer 112 is adjacent to the first mask layer 12. During the etching process, a cleaning gas is introduced to clean the cavity inner wall 202 of the reaction chamber 200 to avoid the influence of etching by-products on the cavity inner wall 202 of the reaction chamber 200 on the yield of the semiconductor structure prepared in the subsequent process. The cleaning gas will chemically react with the material of the cavity inner wall 202 to form a cleaning by-product layer 203. For example, after depositing a thin film, active fluorine ions can be generated by using nitrogen trifluoride to generate acidic substances to clean the cavity inner wall of the reaction chamber, and the fluoride may chemically react with the surface of the cavity inner wall of the reaction chamber and produce aluminum fluoride (AlF). Then a protective film layer 204 is grown on the surface of the cleaned cavity inner wall 202 to avoid damage to the cavity inner wall by plasma during the etching process. For example, the material forming the protective film layer 204 includes silicon dioxide to repair the etching damage to the cavity inner wall 202 during the cleaning process, and the silicon dioxide covers and protects the cavity inner wall 202, which can avoid damage to the cavity inner wall 202 in the subsequent etching process. Please continue to refer to Figure 5 Due to the complexity of the internal structure of the cavity, some positions of the cavity inner wall 202 are not uniformly covered by the protective film layer 204. During the etching process, the plasma bombards the area not uniformly covered by the protective film layer 204, resulting in the accumulation of granular etching by-products 14 on the upper surface of the prepared first etching structure 10, as shown in Figure 6 which affects the quality and yield of the semiconductor structure obtained by continuing to etch based on the first etching structure 10 as a mask.
[0053] For example, please refer to Figure 4 The reaction chamber 200 can be connected to the outside through the exhaust port 50, and an exhaust pump (not shown) is connected to the exhaust port 50. The exhaust pump can remove the etching by-products / granular solids and the like from the reaction chamber 200 through the exhaust port 50.
[0054] For example, please refer to Figure 7, the first etching structure 20 is obtained by performing a preset plasma etching treatment on the upper surface of the first etching structure obtained by etching in the reaction chamber, the gas used to form the preset plasma includes at least one of nitrous oxide, nitrogen or oxygen, so that the travel of the formed preset plasma is smaller than the travel of helium atoms under the same etching conditions, avoiding the formation of particulate solids on the inner wall surface of the etching chamber by bombarding the preset plasma during the process of removing the etching byproducts on the upper surface of the first etching structure by etching with the preset plasma, thereby improving the yield of the semiconductor products. The gas used to form the preset plasma can also include helium, and the mass of a helium atom is smaller than the molecular mass of any one of nitrous oxide, nitrogen or oxygen, so that the travel of the plasma formed by helium is greater than the travel of the plasma formed by any one of nitrous oxide, nitrogen or oxygen under the same etching conditions, which can effectively remove the etching byproducts on the inner wall surface of the chamber and the upper surface of the first etching structure. Since the gas used to form the plasma also includes at least one of nitrous oxide, nitrogen or oxygen, compared with the cleaning treatment of the inner wall surface of the chamber by forming the plasma with helium, the formation of particulate solids on the upper surface of the first etching structure by bombarding the preset plasma during the process of removing the etching byproducts on the upper surface of the first etching structure by etching with the preset plasma can be avoided, thereby improving the yield of the semiconductor products. As an example, the etching byproducts / particulate solids can be removed by a gas suction pump (not shown). The gas suction pump is connected to the gas suction port 50 and is used to remove the etching byproducts or particulate matter in the reaction chamber 200.
[0055] As an example, please refer to Figure 8 The second etching structure is used as a mask to continue etching to obtain a target etching structure 40 including a plurality of capacitor holes 41. For example, please continue to refer to Figure 7 The second etching structure 20 can include a substrate 15, a second mask layer 11, a first mask layer 12 and a first patterned mask layer 13 stacked in order from bottom to top, the first patterned mask layer 13 is used as a mask to etch the first mask layer 12, the second mask layer 11 and the substrate 15 to obtain a target etching structure 40 including a plurality of capacitor holes 41, wherein the second mask layer 11 includes a first dielectric layer 111 and a second dielectric layer 112 stacked in order, and the second dielectric layer 112 is adjacent to the first mask layer 12. Compared with the first etching structure 20 obtained by etching the first mask layer 12, the second mask layer 11 and the substrate 15 with the first mask layer 12 as a mask, the target etching structure 40 obtained by etching the first mask layer 12, the second mask layer 11 and the substrate 15 with the first patterned mask layer 13 as a mask can further include the first dielectric layer 111 and the second dielectric layer 112, and the second dielectric layer 112 is adjacent to the first mask layer 12. Figure 7The first etching structure 10 in the first etching structure 10 is a mask for continuing etching to obtain a target etching structure 400 including a plurality of capacitor holes 41. In the embodiment, since the granular etching byproducts 14 on the upper surface of the first etching structure 10 are removed, the uniformity of the capacitor hole pattern transfer is avoided to be affected by the granular etching byproducts 14, so that the size of the capacitor holes 41 in the prepared target etching structure 40 is more uniform, the coupling between the capacitor holes 41 is avoided, and the quality and yield of the prepared semiconductor structure are effectively improved.
[0056] As an example, please continue to refer to Figures 7-8 The preparation material of the first dielectric layer 111 can include silicon dioxide; the preparation material of the second dielectric layer 112 can include carbon; the first mask layer 12 can include a silicon oxynitride layer 121 and a carbon layer 122 which are sequentially stacked, and the carbon layer 122 is adjacent to the first patterned mask layer 13; and the preparation material of the first patterned mask layer 13 can include silicon dioxide.
[0057] As an example, the flow rate of the gas used to form the preset plasma is greater than 0 and less than or equal to 6300 sccm. For example, the flow rate of the gas used to form the preset plasma can be greater than 0 and less than or equal to 6300 sccm, which avoids the formation of granular solids on the inner wall surface of the etching chamber by the preset plasma during the process of removing the etching byproducts on the upper surface of the first etching structure by using the preset plasma, and the granular solids fall on the upper surface of the first etching structure, thereby improving the yield of the semiconductor product.
[0058] As an example, the gas used to form the preset plasma includes nitrous oxide, and the content of the nitrous oxide in the gas is 70%-90%. For example, the content of the nitrous oxide in the gas used to form the preset plasma can be 70%, 75%, 80%, 85%, or 90%, etc., which effectively removes the etching byproducts on the upper surface of the first etching structure, while avoiding the formation of granular solids on the inner wall surface of the etching chamber by the preset plasma, and the granular solids fall on the upper surface of the first etching structure, thereby improving the yield of the semiconductor product.
[0059] As an example, the gas used to form the preset plasma includes nitrous oxide and helium, Figure 9The horizontal axis represents the ratio of the number of nitrous oxide molecules in the gas used to form the preset plasma to the total number of molecules of the gas, and the vertical axis represents the yield corresponding to each ratio. It can be found that when the ratio of the number of nitrous oxide molecules in the gas used to form the preset plasma to the total number of molecules of the gas is 0.5-1.0, for example, the ratio of the number of nitrous oxide molecules in the gas used to form the preset plasma to the total number of molecules of the gas is 0.5, 0.6, 0.75, 0.8, 0.9 or 1.0, etc., the yield of the second etching structure or the target etching structure is relatively high, and when the ratio of the number of nitrous oxide molecules in the gas used to form the preset plasma to the total number of molecules of the gas is 0.75, the corresponding yield can be the highest. Therefore, the ratio of the number of nitrous oxide molecules in the gas used to form the preset plasma to the total number of molecules of the gas can be set to 0.5-1.0 to effectively remove the etching byproducts on the upper surface of the first etching structure, while avoiding the formation of particulate solids on the inner wall surface of the etching chamber by the preset plasma bombardment, which can fall on the upper surface of the first etching structure, thereby improving the yield of the semiconductor product. Moreover, the cost of nitrous oxide is lower than that of helium, and compared with the conventional etching process in which helium is completely used to form a plasma for etching, the use of nitrous oxide to replace part or all of the helium can reduce the etching cost.
[0060] As an example, the flow rate of helium in the gas used to form the preset plasma is greater than 0 and less than or equal to 3000 sccm. For example, the flow rate of helium in the gas used to form the preset plasma can be 500 sccm, 1000 sccm, 1500 sccm, 2000 sccm, 2500 sccm or 3000 sccm, etc., to effectively remove the etching byproducts on the upper surface of the first etching structure, ensure the etching efficiency, avoid waste of etching gas, and thereby control the etching process cost.
[0061] As an example, the pressure of the preset plasma etching process for the upper surface of the first etching structure is 4-6 torr. For example, the pressure of the preset plasma etching process for the upper surface of the first etching structure can be 4 torr, 5 torr or 6 torr, etc., to effectively remove the etching byproducts on the upper surface of the first etching structure, while avoiding the formation of particulate solids on the inner wall surface of the etching chamber by the preset plasma bombardment, which can fall on the upper surface of the first etching structure, thereby improving the yield of the semiconductor product.
[0062] As an example, the radio frequency energy of the preset plasma etching process performed on the upper surface of the first etching structure is 500W-700W. For example, the radio frequency energy of the preset plasma etching process performed on the upper surface of the first etching structure can be 500W, 600W or 700W, etc., so as to effectively remove the etching byproducts on the upper surface of the first etching structure, while avoiding the formation of granular solid on the inner wall surface of the etching chamber by the bombardment of the preset plasma, which falls on the upper surface of the first etching structure, thereby improving the yield of the semiconductor product.
[0063] In an embodiment of the present application, a semiconductor structure is provided, which is manufactured by the method for manufacturing a semiconductor structure described in any embodiment of the present application. The upper surface of the first etching structure obtained by etching in the reaction chamber is subjected to a preset plasma etching process to obtain a second etching structure after removing the etching byproducts. The maximum molecular mass of the gas used to form the preset plasma is less than or equal to the mass of a helium atom, so that the travel distance of the preset plasma under the same etching condition is less than that of a helium atom. In the process of removing the etching byproducts on the upper surface of the first etching structure by the preset plasma etching, the granular solid formed on the inner wall surface of the etching chamber by the bombardment of the preset plasma is avoided from falling on the upper surface of the first etching structure, thereby improving the yield of the semiconductor product.
[0064] In an embodiment of the present application, the removed etching byproducts / granular solid, etc. can be pumped out of the reaction chamber by a gas pump.
[0065] It should be noted that the above embodiments are only for illustrative purposes and do not mean to limit the present application.
[0066] It should be understood that, unless otherwise explicitly stated herein, the execution of the steps described is not strictly limited in sequence, and the steps can be executed in other sequences. Moreover, at least a part of the steps described can include multiple sub-steps or multiple stages, which are not necessarily executed at the same time, but can be executed at different times, and the execution sequence of the sub-steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least a part of other steps or sub-steps or stages of other steps.
[0067] Each embodiment in the specification is described in a progressive manner, and each embodiment focuses on the difference from other embodiments, and the same or similar parts between the embodiments can be referred to each other.
[0068] Any combination of the technical features in the above-described embodiments can be made, and for the sake of brevity, not all possible combinations are described, however, it is to be understood that the application embraces all such possible combinations.
[0069] The above-described embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the patent scope of the application. It should be pointed out that for ordinary skilled persons in the art, some modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the patent protection scope of the present application should be subject to the appended claims.
Claims
1. A method for fabricating a semiconductor structure, characterized in that, include: The semiconductor structure is etched in the reaction chamber to obtain the first etched structure; The inner wall of the reaction chamber is cleaned using a cleaning gas; A protective film is deposited on the surface of the inner wall of the cavity after cleaning, and the material of the protective film includes silicon dioxide; The upper surface of the first etched structure is subjected to a preset plasma etching treatment in the reaction chamber to obtain a second etched structure after removing etching byproducts; wherein, the maximum molecular mass of the gas used to form the preset plasma is less than or equal to the mass of a helium atom; Using the second etched structure as a mask, etching continues to obtain the target etched structure; The gas used to form the preset plasma includes nitrous oxide and helium; wherein the ratio of the number of nitrous oxide molecules to the total number of gas molecules is 0.
75.
2. The method for preparing a semiconductor structure according to claim 1, characterized in that, The cleaning gas includes nitrogen trifluoride.
3. The method for preparing a semiconductor structure according to claim 1, characterized in that, The flow rate of the gas used to form the preset plasma is greater than 0 and less than or equal to 6300 sccm.
4. The method for preparing a semiconductor structure according to claim 1, characterized in that, The gas contains 70%-90% nitrous oxide.
5. The method for preparing a semiconductor structure according to claim 1, characterized in that, The flow rate of the helium gas is greater than 0 and less than or equal to 3000 sccm.
6. The method for preparing a semiconductor structure according to any one of claims 1-2, characterized in that, The pressure of the preset plasma etching process on the upper surface of the first etched structure is 4 torr-6 torr.
7. The method for preparing a semiconductor structure according to any one of claims 1-2, characterized in that, The radio frequency energy of the preset plasma etching process on the upper surface of the first etched structure is 500W-700W.
8. A semiconductor structure, characterized in that, It is prepared using the semiconductor structure preparation method according to any one of claims 1-7.
Citation Information
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