Clock synchronization method, device, system, equipment and storage medium

Abstract

The embodiments of the present application disclose a clock synchronization method, apparatus, system, device and storage medium, which belong to the field of communication technology. The method includes: receiving adjacent pulse signals sent by a master device; determining a first clock difference based on the receiving time interval of the adjacent pulse signals and the sending time interval of the adjacent pulse signals sent by the master device, the first clock difference being used for clock synchronization between the first slave device and the master device; when the clocks of the first slave device and the master device are synchronized, sending adjacent pulse signals to the second slave device so that the second slave device determines a second clock difference, the second clock difference being used for clock synchronization between the second slave device and the first slave device. The method provided by the embodiments of the present application can realize progressive clock synchronization, reduce interference in the communication process of multiple devices, and improve communication quality.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of communication technology, and in particular to a clock synchronization method, apparatus, system, device, and storage medium. Background Art

[0002] During device communication, low-latency communication is required in some scenarios, such as the need to maintain low-latency communication between devices in augmented reality technology and virtual reality technology.

[0003] Related technologies use the Bluetooth Low Energy (BLE) protocol to achieve low-latency communication. However, packet loss may occur during device communication. Furthermore, when multiple devices are communicating, interference between them may occur, impacting device performance. Summary of the Invention

[0004] The embodiments of the present application provide a clock synchronization method, apparatus, system, device, and storage medium. The technical solution is as follows:

[0005] In one aspect, an embodiment of the present application provides a clock synchronization method, which is used for a first slave device, and includes:

[0006] Receive adjacent pulse signals sent by the master device;

[0007] Determine a first clock difference based on a reception time interval of the adjacent pulse signals and a sending time interval of the adjacent pulse signals sent by the master device, where the first clock difference is used for clock synchronization between the first slave device and the master device;

[0008] When the first slave device is clock-synchronized with the master device, adjacent pulse signals are sent to the second slave device so that the second slave device determines a second clock difference, where the second clock difference is used for clock synchronization between the second slave device and the first slave device.

[0009] On the other hand, an embodiment of the present application provides a clock synchronization method, which is used for a master device and includes:

[0010] Sending adjacent pulse signals to a first slave device, where the first slave device is configured to determine a first clock difference based on a receiving time interval for receiving the adjacent pulse signals and a sending time interval for sending the adjacent pulse signals by the master device, where the first clock difference is used for clock synchronization between the first slave device and the master device;

[0011] When the first slave device is clock-synchronized with the master device, the first slave device is further configured to send adjacent pulse signals to the second slave device so that the second slave device determines a second clock difference, and the second clock difference is used for clock synchronization between the second slave device and the first slave device.

[0012] On the other hand, an embodiment of the present application provides a clock synchronization device, the device comprising:

[0013] A first receiving module, configured to receive adjacent pulse signals sent by a master device;

[0014] A first determining module is configured to determine a first clock difference based on a reception time interval of the adjacent pulse signals and a sending time interval of the adjacent pulse signals sent by the master device, where the first clock difference is used for clock synchronization between the first slave device and the master device;

[0015] The first sending module is used to send adjacent pulse signals to the second slave device when the first slave device maintains clock synchronization with the master device, so that the second slave device determines a second clock difference, and the second clock difference is used for the second slave device to synchronize clocks with the first slave device.

[0016] On the other hand, an embodiment of the present application provides a clock synchronization device, the device comprising:

[0017] The second sending module is used to send adjacent pulse signals to the first slave device, and the first slave device is used to determine a first clock difference based on the receiving time interval of the adjacent pulse signals and the sending time interval of the adjacent pulse signals sent by the master device, and the first clock difference is used for the first slave device to maintain clock synchronization with the master device; when the first slave device is clock-synchronized with the master device, the first slave device is also used to send adjacent pulse signals to the second slave device, so that the second slave device determines a second clock difference, and the second clock difference is used for the second slave device to perform clock synchronization with the first slave device.

[0018] On the other hand, an embodiment of the present application provides a clock synchronization system, the system including a master device, a first slave device, and a second slave device;

[0019] The master device is used to send adjacent pulse signals to the first slave device;

[0020] The first slave device is configured to receive adjacent pulse signals sent by the master device; determine a first clock difference based on a receiving time interval of adjacent pulse signals and a sending time interval of adjacent pulse signals sent by the master device, wherein the first clock difference is used for clock synchronization between the first slave device and the master device; and send adjacent pulse signals to the second slave device when the first slave device maintains clock synchronization with the master device;

[0021] The second slave device is used to determine a second clock difference, and the second clock difference is used for clock synchronization between the second slave device and the first slave device.

[0022] On the other hand, an embodiment of the present application provides an electronic device, which includes a processor and a memory; the memory stores at least one instruction, and the at least one instruction is used to be executed by the processor to implement the clock synchronization method as described in the above aspect.

[0023] On the other hand, an embodiment of the present application provides a computer-readable storage medium, which stores at least one instruction, and the at least one instruction is used to be executed by a processor to implement the clock synchronization method as described in the above aspects.

[0024] In another aspect, embodiments of the present application provide a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of an electronic device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the electronic device to perform the clock synchronization method provided in various optional implementations of the above aspects.

[0025] The beneficial effects of the technical solutions provided in the embodiments of the present application include at least:

[0026] In an embodiment of the present application, a master device may send adjacent pulse signals to a first slave device. The first slave device may determine a first clock difference between itself and the master device based on the time interval between receiving the adjacent pulse signals and the time interval between sending the pulse signals from the master device. The first slave device may then use the first clock difference to perform clock adjustment and maintain clock synchronization with the master device. Furthermore, after the first slave device is clock-synchronized with the master device, the first slave device may also send adjacent pulse signals to a second slave device to synchronize the second slave device with the first slave device, thereby enabling the second slave device to also synchronize with the master device, thereby achieving progressive clock synchronization. This may reduce interference during multi-device communication and improve communication quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0028] Figure 1 A schematic diagram showing an implementation environment provided by an exemplary embodiment of the present application is shown;

[0029] Figure 2 A flowchart of a clock synchronization method provided by an exemplary embodiment of the present application is shown;

[0030] Figure 3 A schematic diagram of signal transmission in a clock synchronization process provided by an exemplary embodiment of the present application is shown;

[0031] Figure 4 A flowchart of a clock synchronization method provided by another exemplary embodiment of the present application is shown;

[0032] Figure 5 A schematic diagram of signal transmission in a clock synchronization process provided by another exemplary embodiment of the present application is shown;

[0033] Figure 6 A flowchart of a clock synchronization method provided by another exemplary embodiment of the present application is shown;

[0034] Figure 7 A schematic diagram of signal transmission in a clock synchronization process provided by another exemplary embodiment of the present application is shown;

[0035] Figure 8 A flowchart of a clock synchronization method provided by another exemplary embodiment of the present application is shown;

[0036] Figure 9 A schematic diagram of signal transmission in a clock synchronization process provided by another exemplary embodiment of the present application is shown;

[0037] Figure 10 A schematic diagram of a signal frame of a clock synchronization process provided by an exemplary embodiment of the present application is shown;

[0038] Figure 11 A structural block diagram of a clock synchronization device provided by an exemplary embodiment of the present application is shown;

[0039] Figure 12 A structural block diagram of a clock synchronization device provided by an exemplary embodiment of the present application is shown;

[0040] Figure 13A structural block diagram of an electronic device provided by an exemplary embodiment of the present application is shown. DETAILED DESCRIPTION

[0041] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0042] Please refer to Figure 1 , which shows a schematic diagram of an implementation environment provided by an exemplary embodiment of the present application, the implementation environment includes a master device 101, a first slave device 102 and a second slave device 103.

[0043] The master device 101 is an electronic device with communication capabilities. Optionally, the master device may be a head-mounted display device. The head-mounted display device may be an augmented reality (AR) device, a virtual reality (VR) device, or an audio-visual device that combines AR and VR.

[0044] The first slave device 102 and the second slave device 103 are electronic devices that can communicate with the master device 101. A communication connection is established between the first slave device 102 and the second slave device 103. When the master device 101 is a head-mounted display device, the first slave device 102 and the second slave device 103 can be control devices for sending instructions to the master device 101.

[0045] The master device 101, the first slave device 102, and the second slave device 103 may also be other electronic devices with communication functions, such as smart phones, tablet computers, wearable devices, personal computers, etc., which is not limited in this embodiment.

[0046] The communication connection between the master device 101 and the first slave device 102 and the second slave device 103 can be established wirelessly, for example, a Bluetooth connection, a Wireless Fidelity (WiFi) connection, or a mobile data network connection, etc., which is not limited in this embodiment.

[0047] In the embodiment of the present application, the master device 101 may send adjacent pulse signals to the first slave device 102, so that the first slave device 102 determines a first clock difference between the two, thereby achieving clock synchronization with the master device 101. The first slave device 102 may also send a pulse signal to the second slave device 103, so that the second slave device determines a second clock difference, thereby achieving clock synchronization with the first slave device 102, thereby achieving progressive clock synchronization between multiple devices.

[0048] Please refer to Figure 2 , which shows a flowchart of a clock synchronization method provided by an exemplary embodiment of the present application, the method comprising:

[0049] Step 201: The master device sends an adjacent pulse signal to the first slave device.

[0050] In one possible implementation, during synchronization, the master device transmits a pulse signal to the first slave device at intervals. The master device also transmits at least one set of adjacent pulse signals to the first slave device, where a set of adjacent pulse signals includes two adjacent pulse signals. The pulse signals carry time information, enabling the first slave device to determine the transmission interval. Optionally, the time information includes at least one of timestamp information and transmission interval information. The timestamp information indicates the transmission time of the pulse signal.

[0051] Optionally, the master device continuously sends a pulse signal to the first slave device. During the continuous transmission of the pulse signal, the master device may send the pulse signal at random intervals, or may send the pulse signal at fixed target intervals, which is not limited in this embodiment. For example, the target interval may be 30 μs, and the master device may send a pulse signal to the first slave device every 30 μs.

[0052] Step 202: The first slave device receives adjacent pulse signals sent by the master device.

[0053] After the first slave device receives at least one group of pulse signals sent by the master device, the first slave device may record the receiving time of the at least one group of pulse signals for clock synchronization.

[0054] Step 203: The first slave device determines a first clock difference based on a reception time interval of adjacent pulse signals and a transmission time interval of adjacent pulse signals sent by the master device. The first clock difference is used for clock synchronization between the first slave device and the master device.

[0055] When the clocks between the master device and the first slave device are synchronized, the time interval for the first slave device to receive the pulse signal is the same as the time interval for the master device to send the pulse signal; when the clocks between the master device and the first slave device are not synchronized, there is a deviation between the time interval for the first slave device to receive the pulse signal and the time interval for the master device to send the pulse signal. Therefore, in an embodiment of the present application, the difference between the receiving time interval and the sending time interval is used to determine the clock difference between the devices and perform clock correction.

[0056] The receiving time interval and the sending time interval are the time intervals between the receiving end and the sending end of the same group of adjacent pulse signals.

[0057] In one possible implementation, after receiving the pulse signal sent by the master device, the first slave device can record the reception time and obtain the reception time of the last pulse signal sent by the master device, thereby determining the reception time interval based on the current reception time and the last reception time.

[0058] After receiving the pulse signal sent by the master device, the first slave device can obtain the timestamp information in the pulse signal and the timestamp information in the last pulse signal received from the master device, thereby determining the sending time interval based on the current timestamp information and the last timestamp information.

[0059] Alternatively, when the pulse signal includes the sending time interval information, the sending time interval for sending adjacent pulse information in the pulse signal may be directly obtained.

[0060] After determining the receiving time interval and the sending time interval, the first slave device may determine a first clock difference according to the difference between the receiving time interval and the sending time interval.

[0061] In order to further improve the accuracy of the first clock difference, the first slave device may determine the first clock difference according to an average of differences between multiple groups of receiving time intervals and sending time intervals.

[0062] Indicative, such as Figure 3 As shown, when the first pulse signal 301, the second pulse signal 302 and the third pulse signal 303 sent by the master device are received, the receiving time interval T2 can be determined based on the receiving time of the first pulse signal 301 and the second pulse signal 302, and the sending time interval T1 can be determined based on the sending time of the first pulse signal 301 and the second pulse signal 302, and the clock difference t1 is determined according to the sending time interval T1 and the receiving time interval T2; and the receiving time interval T2 can also be determined based on the receiving time of the second pulse signal 302 and the third pulse signal 303, and the sending time interval T1 can be determined based on the sending time of the second pulse signal 302 and the third pulse signal 303, and the clock difference t2 is determined according to the sending time interval T1 and the receiving time interval T2, so as to determine the first clock difference according to the average of the clock difference t1 and the clock difference t2.

[0063] After determining the first clock difference, the first slave device may adjust clock parameters according to the first clock difference, so that the first slave device maintains clock synchronization with the master device.

[0064] Step 204: When the clocks of the first slave device and the master device are synchronized, the first slave device sends adjacent pulse signals to the second slave device so that the second slave device determines a second clock difference. The second clock difference is used for clock synchronization between the second slave device and the first slave device.

[0065] During the communication process, in addition to communication between the master device and the first slave device, communication with a second slave device may also be included, where the second slave device is a different device from the first slave device. To enable the second slave device to maintain clock synchronization with the master device and the first slave device, in one possible embodiment, the first slave device, after maintaining clock synchronization with the master device using the first clock difference, sends adjacent pulse signals to the second slave device. After receiving the adjacent pulse signals, the second slave device can determine the transmission time interval of the adjacent pulse signals sent by the first slave device and the reception time interval of the adjacent pulse signals received by the first slave device, thereby determining the second clock difference using the reception time interval and the transmission time interval.

[0066] After determining the second clock difference, the second slave device adjusts its clock parameters based on the second clock difference, thereby maintaining clock synchronization with the first slave device. Since the first slave device maintains clock synchronization with the master device, after the second slave device maintains clock synchronization with the first slave device, progressive clock synchronization can be achieved among the master device, the first slave device, and the second slave device.

[0067] Indicative, such as Figure 3 As shown, the first slave device sends a pulse signal to the second slave device, and the second slave device determines a second clock difference according to the receiving time interval T4 and the sending time interval T3, thereby adjusting the clock parameters according to the second clock difference to maintain clock synchronization with the first slave device.

[0068] In summary, in the embodiments of the present application, the master device can send adjacent pulse signals to the first slave device. The first slave device determines a first clock difference between itself and the master device based on the time interval between receiving the adjacent pulse signals and the time interval between sending the pulse signals from the master device. The first clock difference can then be used to adjust the clock and maintain clock synchronization with the master device. Furthermore, after the first slave device is clock-synchronized with the master device, the first slave device can also send adjacent pulse signals to the second slave device to synchronize the second slave device with the first slave device, thereby enabling the second slave device to also synchronize with the master device. This achieves progressive clock synchronization, reduces interference during multi-device communication, and improves communication quality.

[0069] During signal transmission, problems such as channel interference may occur, which may cause clock error. Therefore, to improve the accuracy of the clock error, frequency hopping synchronization can be used to reduce the clock error. This will be explained below using an exemplary embodiment.

[0070] Please refer to Figure 4 , which shows a flowchart of a clock synchronization method provided by another exemplary embodiment of the present application, the method comprising:

[0071] Step 401: The master device sends adjacent pulse signals to the first slave device on at least two frequency hopping channels.

[0072] During synchronization, interference on the channel transmitting the pulse signal can affect the accuracy of the received time interval and, consequently, the accuracy of the clock difference. Therefore, to improve the accuracy of the clock difference, the master device can transmit pulse signals on at least two frequency-hopping channels. These at least two frequency-hopping channels are preconfigured channels consisting of channels in different frequency bands. For example, the at least two frequency-hopping channels may include channel 0, channel 39, and channel 78. The master device can transmit at least one set of pulse signals on three different operating channels.

[0073] In one possible implementation, the master device transmits pulse signals alternately on at least two frequency-hopping channels. That is, adjacent pulse signals transmitted by the master device are transmitted via different channels. For example, when the at least two frequency-hopping channels include ch0, ch39, and ch78, the master device may transmit pulse signals alternately on ch0, ch39, and ch78.

[0074] Furthermore, the master device may cyclically send pulse signals on at least two frequency hopping channels. Schematically, the master device may cyclically send pulse signals on ch0, ch39, and ch78 to the first slave device.

[0075] Step 402: The first slave device receives adjacent pulse signals sent by the master device on at least two frequency hopping channels.

[0076] The first slave device can receive adjacent pulse signals sent by the master device on the frequency hopping channel, thereby determining the first clock difference according to the adjacent pulse signals received on different channels, which can reduce the probability of synchronization failure due to interference in the synchronization channel.

[0077] Step 403: The first slave device determines a time interval difference based on a reception time interval of adjacent pulse signals received on the frequency hopping channel and a transmission time interval of adjacent pulse signals sent by the master device.

[0078] In a possible implementation, the first slave device determines the receiving time interval according to the receiving times of adjacent pulse signals received on two frequency hopping channels.

[0079] Indicative, such as Figure 5 As shown, the master device sequentially sends pulse signals to the first slave device on channels 0, 39, and 78. The pulse signals transmitted on channels 0 and 39 are adjacent pulse signals, and the pulse signals transmitted on channels 39 and 78 are adjacent pulse signals. The first slave device can determine the receiving time interval T2 based on the reception times of the adjacent pulse signals received on channels 0 and 39. It can also determine the receiving time interval T2 based on the reception times of the adjacent pulse signals received on channels 39 and 78.

[0080] After determining the receiving time interval, the first slave device can determine the sending time interval of adjacent pulse signals sent by the master device on the two frequency hopping channels. In one possible implementation, the first slave device can calculate the sending time interval of adjacent pulse signals using timestamp information in the adjacent pulse signals.

[0081] Indicative, such as Figure 5 As shown, after the first slave device determines the receiving time interval based on the receiving time of adjacent pulse signals received on ch0 and ch39, it can also determine the sending time interval T1 of adjacent pulse signals transmitted on ch0 and ch39 based on the timestamp information in the pulse signal; when the first slave device determines the receiving time interval based on the receiving time of adjacent pulse signals received on ch39 and ch78, it can also determine the sending time interval T1 of adjacent pulse signals transmitted on ch39 and ch78 based on the timestamp information in the pulse signal.

[0082] In a possible implementation, the first slave device determines the first clock difference based on the difference between the determined receiving time interval and the sending time interval. The receiving time interval and the sending time interval are for adjacent pulse signals in the same group, for example, Figure 5 As shown, the first clock difference is determined based on the receiving time interval and the sending time interval of adjacent pulse signals transmitted on ch0 and ch39; the first clock difference can also be determined based on the receiving time interval and the sending time interval of adjacent pulse signals transmitted on ch39 and ch78.

[0083] To improve the accuracy of the clock difference, the first slave device may determine the first clock difference based on the difference between multiple groups of receiving time intervals and transmitting time intervals, i.e., the time interval difference. Optionally, the first slave device determines the first clock difference based on the average of the time interval differences, where different time interval differences are determined based on the receiving time intervals and transmitting time intervals of different groups of adjacent pulse signals, where the adjacent pulse signals of different groups correspond to different adjacent frequency hopping channels.

[0084] When the master device sends pulse signals in turn on the frequency hopping channel, the first slave device can receive multiple groups of adjacent pulse signals. Thereafter, the time interval difference can be determined based on the receiving time interval and the sending time interval of the multiple groups of adjacent pulse signals. Finally, the first clock difference is determined based on the average of the multiple groups of time interval differences.

[0085] Indicative, such as Figure 5As shown, the first slave device can determine the first clock difference based on the average of the time difference t1 determined by the receiving time interval and the sending time interval of adjacent pulse signals transmitted on ch0 and ch39 and the time difference t2 determined by the receiving time interval and the sending time interval of adjacent pulse signals transmitted on ch39 and ch78.

[0086] Alternatively, it can be further determined based on the time interval difference corresponding to the multiple groups of pulse signals sent cyclically. Figure 5 As shown, the first slave device may determine the average of the time interval differences corresponding to each group of adjacent pulse signals cycled twice by the master device on ch0, ch39, and ch78 as the first clock difference.

[0087] Step 404: When the clocks of the first slave device and the master device are synchronized, the first slave device sends adjacent pulse signals to the second slave device on at least two frequency hopping channels.

[0088] In one possible embodiment, when the first slave device sends a pulse signal to the second slave device, it can also be sent on at least two frequency hopping channels, so that the second slave device determines the second clock difference based on the receiving time interval and the sending time interval of adjacent pulse signals received on different channels, thereby reducing the error of the second clock difference.

[0089] In this embodiment, during the device synchronization process, a pulse signal can be sent on the frequency hopping channel, so that the clock difference between the devices can be determined based on the receiving time interval and the sending time interval of the pulse signals received on different channels. This can reduce the probability of synchronization failure due to channel interference and improve the synchronization success rate.

[0090] During signal transmission, electromagnetic wave transmission, reflection, and multipath issues may occur, causing clock error. Therefore, to improve the accuracy of the clock error, bidirectional synchronization can be used to reduce the error. This will be explained below using an exemplary embodiment.

[0091] Please refer to Figure 6 , which shows a flowchart of a clock synchronization method provided by another exemplary embodiment of the present application. The embodiment of the present application takes the method applied to the first slave device as an example for explanation. The method includes:

[0092] Step 601: The master device sends an adjacent pulse signal to the first slave device.

[0093] Step 602: The first slave device receives adjacent pulse signals sent by the master device.

[0094] The implementation of steps 601-602 may refer to the above steps 201-202, which will not be described in detail in this embodiment.

[0095] Step 603: The first slave device determines a first clock difference based on a reception time interval of adjacent pulse signals and a transmission time interval of adjacent pulse signals sent by the master device.

[0096] In one possible implementation, determining the first clock difference by the first slave device may include the following steps:

[0097] Step 603a: Determine a receiving time interval based on the receiving times of adjacent pulse signals.

[0098] After the first slave device receives the pulse signal, the reception time of two adjacent pulse signals can be determined according to the current reception time and the reception time of the last received pulse signal, thereby determining the reception time interval according to the reception time.

[0099] Step 603b: Determine the sending time interval based on the timestamp information contained in the adjacent pulse signals.

[0100] The first slave device may also determine the time interval between the two adjacent pulse signals sent by the master device according to the timestamp information respectively included in the two adjacent pulse signals.

[0101] Step 603c: Determine a first clock difference based on the time difference between the receiving time interval and the sending time interval.

[0102] After determining the receiving time interval and the sending time interval, the first slave device can use the time difference between the two to determine the first clock difference. The receiving time interval and the sending time interval are determined based on the receiving time and sending time of the same group of pulse signals.

[0103] In a possible implementation, the first slave device may determine the first clock difference by using an average of clock differences obtained by determining multiple groups of pulse signals, thereby improving the accuracy of the first clock difference.

[0104] Step 604: The first slave device sends adjacent pulse signals to the master device, so that the master device determines a third clock difference.

[0105] To reduce errors caused by electromagnetic wave transmission, reflection, and multipath issues during the transmission of pulse signals from the master device to the first slave device, in one possible implementation, the first slave device may send at least one set of pulse signals to the master device, allowing the master device to determine the clock difference between the two devices based on the received pulse signals. Because the pulse signals sent from the master device to the first slave device and the pulse signals sent from the first slave device to the master device do not travel over the same physical path, synchronization errors can be reduced.

[0106] Step 605: The master device receives adjacent pulse signals sent by the first slave device.

[0107] Step 606: The master device determines a third clock difference based on a time interval between receiving adjacent pulse signals and a time interval between sending adjacent pulse signals by the first slave device.

[0108] After the master device receives the pulse signal sent by the first slave device, the master device determines the third clock difference based on the receiving time interval of adjacent pulse signals and the sending time interval of adjacent pulse signals, that is, the master device calculates the clock difference between itself and the first slave device to realize the two-way synchronization process.

[0109] The process of the master device determining the third clock difference may refer to the process of the first slave device determining the first clock difference, which will not be described in detail in this embodiment.

[0110] Indicative, such as Figure 7 As shown, the master device sends a pulse signal to the first slave device, and the first slave device can determine the first clock difference based on the receiving time interval T2 and the sending time interval T1; the first slave device can also send a pulse signal to the master device, and the master device can determine the third clock difference based on the receiving time interval T4 and the sending time interval T3.

[0111] Step 607: The master device sends the third clock difference to the first slave device.

[0112] After the master device determines the third clock difference, it can adjust its own clock parameters based on the third clock difference to maintain clock synchronization with the first slave device. Alternatively, the master device can send the third clock difference to the first slave device. The first slave device can then determine the clock difference between itself and the master device based on the first clock difference it has determined and the third clock difference sent by the master device, thereby improving the accuracy of the clock difference.

[0113] It should be noted that this embodiment only describes the method in which the master device sends a pulse signal to synchronize the first slave device and the first slave device sends a pulse signal to synchronize the master device, and does not limit the timing of the master device sending the pulse signal and the first slave device sending the pulse signal.

[0114] In a possible implementation, the master device sends the third clock difference to the first slave device by sending a pulse signal including the third clock difference.

[0115] Step 608: The first slave device receives the third clock difference sent by the master device.

[0116] The first slave device may determine the third clock difference from time information included in the received pulse signal.

[0117] Step 609: Adjust the clock parameters based on the average of the first clock difference and the third clock difference to synchronize with the master device clock.

[0118] In one possible implementation, after receiving the third clock difference sent by the master device, the first slave device determines the average of the first clock difference and the third clock difference as the clock difference between itself and the master device, and adjusts the clock parameters according to the clock difference, thereby maintaining clock synchronization with the master device.

[0119] In the above embodiment, during synchronization between the first slave device and the master device, frequency hopping synchronization or bidirectional synchronization can be used to reduce synchronization error. In another possible implementation, frequency hopping synchronization and bidirectional synchronization can be used simultaneously to improve synchronization accuracy.

[0120] The master device may transmit a pulse signal to the first slave device on a frequency hopping channel, so that the first slave device determines a first clock difference with the master device based on adjacent pulse signals received on the frequency hopping channel. Subsequently, the first slave device may also transmit a pulse signal to the master device on the frequency hopping channel, so that the master device determines a third clock difference with the first slave device based on adjacent pulse signals received on the frequency hopping channel. The frequency hopping channel through which the master device transmits the pulse signal may be the same as or different from the frequency hopping channel through which the first slave device transmits the pulse signal. This embodiment does not limit this.

[0121] Frequency hopping synchronization and two-way synchronization can reduce synchronization errors caused by channel interference and electromagnetic wave transmission problems.

[0122] Step 610: When the clocks of the first slave device and the master device are synchronized, the first slave device sends adjacent pulse signals to the second slave device, so that the second slave device determines a second clock difference.

[0123] After adjusting the clock parameters to synchronize with the master device, a pulse signal may be sent to the second slave device to enable the second slave device to determine a second clock difference between the second slave device and the first slave device.

[0124] Step 611: The first slave device receives adjacent pulse signals sent by the second slave device.

[0125] Furthermore, the second slave device may also send at least one set of pulse signals to the first slave device, so that the first slave device can determine the clock difference between the first slave device and the second slave device.

[0126] In step 612 , the first slave device determines a ninth clock difference between itself and the second slave device based on the received adjacent pulse signals.

[0127] The first slave device determines the ninth clock difference between itself and the second slave device based on the sending time interval of adjacent pulse signals sent by the second slave device and the receiving time interval of pulse signals received by the second slave device. Then, the ninth clock difference can be sent to the second slave device to improve the accuracy of the clock difference determined by the second slave device.

[0128] In step 613 , the first slave device sends the ninth clock difference to the second slave device, so that the second slave device adjusts the clock parameters according to the average of the second clock difference and the ninth clock difference.

[0129] After the first slave device sends the ninth clock difference to the second slave device, the second slave device determines the clock difference between itself and the first slave device based on the average of the second clock difference and the ninth clock difference, thereby adjusting its clock parameters. This enables bidirectional synchronization between the first and second slave devices and reduces synchronization errors.

[0130] In this embodiment, bidirectional synchronization is achieved through a bidirectional transmission process in which the master device sends a pulse signal to the first slave device and the first slave device sends a pulse signal to the master device, thereby reducing the impact of electromagnetic wave transmission, reflection and multipath on synchronization during signal transmission, improving clock synchronization accuracy, and thus improving synchronization quality.

[0131] In the above embodiment, clock synchronization between the master device, the first slave device, and the second slave device is achieved through progressive synchronization. When the master device and the second slave device are able to communicate, the second slave device can directly determine the clock difference based on the pulse signal sent by the master device to achieve clock synchronization. This will be explained below using an exemplary embodiment.

[0132] Please refer to Figure 8 , which shows a flowchart of a clock synchronization method provided by another exemplary embodiment of the present application. The embodiment of the present application takes the method applied to the first slave device as an example for explanation. The method includes:

[0133] Step 801: The master device sends an adjacent pulse signal to the first slave device.

[0134] Step 802: The first slave device receives adjacent pulse signals sent by the master device.

[0135] Step 803: The first slave device determines a first clock difference based on a reception time interval of adjacent pulse signals and a transmission time interval of adjacent pulse signals sent by the master device.

[0136] The implementation of steps 801-803 may refer to the above steps 201-203, which will not be described in detail in this embodiment.

[0137] Step 804: The master device sends adjacent pulse signals to the second slave device, so that the second slave device determines a fourth clock difference. The fourth clock difference is used for clock synchronization between the second slave device and the master device.

[0138] In one possible implementation, when the master device and the second slave device are in a non-communicative state, progressive clock synchronization may be used to achieve clock synchronization among the master device, the first slave device, and the second slave device. That is, after the first slave device is clock-synchronized with the master device, the first slave device may send adjacent pulse signals to the second slave device to synchronize the second slave device with the first slave device. When the second slave device is outside the communication range of the master device, or when the signal strength of the signal sent by the master device received by the second slave device is lower than a strength threshold, it is determined that the master device and the second slave device are in a non-communicative state.

[0139] When the master device and the second slave device are in a communicative state, that is, the second slave device is within the communication range of the master device, or the received signal strength of the signal sent by the master device received by the second slave device is higher than the strength threshold, the communication process between the master device and the second slave device can be used to achieve clock synchronization between the master device and the second slave device.

[0140] In a possible implementation, the master device sends adjacent pulse signals to the second slave device, so that the second slave device determines a fourth clock difference, where the fourth clock difference is used to maintain clock synchronization between the second slave device and the master device.

[0141] That is, the master device sends adjacent pulse signals to the second slave device, and the second slave device determines the fourth clock difference between itself and the master device based on the receiving time interval and sending time interval of the adjacent pulse signals, thereby adjusting the clock parameters according to the fourth clock difference and maintaining clock synchronization with the master device.

[0142] Step 805: The first slave device receives adjacent pulse signals sent by the second slave device.

[0143] In the above approach, when the master device and the second slave device are in a communicative state, the master device can send a pulse signal to the first and second slave devices, thereby achieving clock synchronization between the three. To further improve the accuracy of clock synchronization, in one possible implementation, the first and second slave devices can also send adjacent pulse signals, thereby determining the clock difference between the devices based on the transmission process of pulse signals in different directions.

[0144] Optionally, the second slave device is further configured to send adjacent pulse signals to the first slave device and the master device, and the master device determines the fifth clock difference after receiving the adjacent pulse signals.

[0145] The second slave device may send pulse signals to the master device and the first slave device at regular intervals. The master device may determine the fifth clock difference based on the receiving time interval and the sending time interval. The fifth clock difference is the clock difference between the master device and the second slave device.

[0146] The first slave device may receive the pulse signal sent by the second slave device at intervals, and thus may determine the clock difference between the first slave device and the second slave device based on the received pulse signal.

[0147] Step 806: The first slave device determines a sixth clock difference based on a receiving time interval for receiving adjacent pulse signals and a sending time interval for sending adjacent pulse signals by the second slave device.

[0148] In one possible implementation, the first slave device determines the receiving time interval based on the receiving time of adjacent pulse signals, and determines the sending time interval based on the timestamp information carried in the adjacent pulse signals, thereby obtaining the sixth clock difference between the first slave device and the second slave device.

[0149] In step 807 , the first slave device sends adjacent pulse signals to the master device and the second slave device, so that the master device determines the seventh clock difference and the second slave device determines the eighth clock difference.

[0150] The first slave device may also send adjacent pulse signals to the master device and the second slave device. After receiving the adjacent pulse signals sent by the first slave device, the master device may determine a seventh clock difference between itself and the first slave device based on the receiving time interval and the sending time interval. After receiving the adjacent pulse signals sent by the first slave device, the second slave device may determine an eighth clock difference between itself and the first slave device based on the receiving time interval and the sending time interval.

[0151] In step 808 , the first slave device determines a master clock difference with the master device and a slave clock difference with the second slave device based on the clock differences.

[0152] In the above process, the master device, the first slave device, and the second slave device each send a pulse signal to the other device, thereby obtaining clock differences between multiple groups of devices. The first slave device can determine the master clock difference between itself and the master device based on the multiple clock differences, and can also determine the slave clock difference between itself and the second slave device based on the multiple clock differences. The process of determining the master clock difference between itself and the master device may include the following steps:

[0153] Step 1: Determine the indirect master clock difference between the first slave device and the master device based on the difference between the fifth clock difference and the sixth clock difference.

[0154] The fifth clock difference is the clock difference between the master device and the second slave device after the second slave device sends a pulse signal to the master device; the sixth clock difference is the clock difference between the first slave device and the second slave device after the second slave device sends a pulse signal to the first slave device. The first slave device can obtain the fifth clock difference from the master device and the sixth clock difference from the second slave device.

[0155] Since the fifth clock difference is the clock difference between the master device and the second slave device, and the sixth clock difference is the clock difference between the first slave device and the second slave device, the first slave device can determine the indirect master clock difference between itself and the master device based on the difference between the two.

[0156] Step 2: Determine the master clock difference based on the average of the first clock difference, the seventh clock difference, and the indirect master clock difference.

[0157] Since the master device sends a pulse signal to the first slave device, the first slave device can directly determine the clock difference between itself and the master device. The first slave device also sends a pulse signal to the master device, so the master device can directly determine the clock difference between itself and the first slave device.

[0158] That is, in one possible implementation, the first slave device may determine the clock difference between itself and the master device based on the clock difference between itself and the master device directly determined by pulse signal transmission between the devices, and the average of the clock differences between itself and the master device indirectly determined.

[0159] Schematic, such as Figure 9 As shown, the master device may send a pulse signal to the first slave device and the second slave device. The first slave device may determine a first clock difference based on the receiving time interval T2 and the sending time interval T1, and the second slave device may determine a fourth clock difference based on the receiving time interval T3 and the sending time interval T1. The first slave device may send a pulse signal to the master device and the second slave device. The master device may determine a seventh clock difference based on the receiving time interval T6 and the sending time interval T4, and the second slave device may determine an eighth clock difference based on the receiving time interval T5 and the sending time interval T4. The second slave device may send a pulse signal to the master device and the first slave device. The master device may determine a fifth clock difference based on the receiving time interval T9 and the sending time interval T8, and the first slave device may determine a sixth clock difference based on the receiving time interval T7 and the sending time interval T8. Subsequently, the first slave device may determine the clock difference between the first slave device and the master device based on the first clock difference determined with the first slave device, the seventh clock difference determined by the master device, and the indirect master clock difference indirectly determined based on the fifth clock difference and the sixth clock difference.

[0160] Step 1: Determine an indirect slave clock difference between the first slave device and the second slave device based on a difference between the first clock difference and the fourth clock difference.

[0161] The first clock difference is the clock difference between the first slave device and the master device after the master device sends a pulse signal to the first slave device; the fourth clock difference is the clock difference between the second slave device and the master device after the master device sends a pulse signal to the second slave device. In other words, the first clock difference and the fourth clock difference are the clock differences between different slave devices relative to the master device. Therefore, the indirect slave clock difference between the first and second slave devices can be determined based on the difference between the first and fourth clock differences.

[0162] Step 2: Determine the slave clock difference based on the average of the sixth clock difference, the eighth clock difference, and the indirect slave clock difference.

[0163] Among them, the sixth clock difference and the eighth clock difference are clock differences directly determined according to the transmission process of the pulse model between the first slave device and the second slave device. The first slave clock can determine the slave clock difference between the first slave clock difference and the second slave clock difference based on the average of the sixth clock difference, the eighth clock difference and the indirect slave clock difference.

[0164] After the first slave device synchronizes with the master device using the master clock difference, it can also send the slave clock difference to the second slave device, so that the second slave device adjusts its clock parameters according to the slave clock difference and maintains clock synchronization with the first slave device, thereby achieving clock synchronization between multiple devices.

[0165] In another possible implementation, the first slave device does not need to determine the slave clock difference. Instead, the second slave device determines the master clock difference with the master device based on the fourth clock difference, the fifth clock difference, and the indirect master clock difference determined by the difference between the seventh and eighth clock differences, and adjusts clock parameters based on the master clock difference. In other words, each slave device determines its clock difference with the master device based on the clock difference obtained from pulse signals sent alternately between the devices, thereby maintaining clock synchronization with the master device.

[0166] In a possible implementation, the master device, the first slave device, and the second slave device cyclically send pulse signals.

[0167] In the nth round of synchronization, based on the clock differences in the nth round, a master clock difference with the master device and a slave clock difference with the second slave device are determined, where n is a positive integer.

[0168] The master, first slave, and second slave cyclically transmit pulse signals to achieve cyclic synchronization. During one round of synchronization, the master, first slave, and second slave each transmit pulse signals in turn. During the nth round of synchronization, the master, first slave, and second slave each transmit pulse signals for the nth time. The clock difference corresponding to the nth round is determined based on the nth pulse signal transmitted by each device, and clock synchronization is then performed based on the nth round of clock differences.

[0169] It should be noted that, in each round of synchronization, this embodiment does not limit the timing of the master device, the first slave device and the second slave device sending pulse signals to the other two devices respectively. It is only necessary for the master device, the first slave device and the second slave device to send pulse signals to the other two devices respectively.

[0170] In this embodiment, when the master device can communicate with the second slave device, the master device can send a pulse signal to the second slave device, so that the second slave device can directly synchronize its clock according to the clock difference with the master device, thereby improving the accuracy of clock synchronization.

[0171] Furthermore, the master device, the first slave device and the second slave device can also send pulse signals in turn, and obtain multiple sets of clock differences between the three based on the cyclically sent pulse signals, thereby reducing the error of the clock difference and achieving more accurate clock synchronization.

[0172] Optionally, the method provided in the embodiment of the present application can be applied to the communication process of Extended Reality (XR) devices, wherein the XR devices include AR devices and VR devices. For example, when applied to VR devices, the master device is a head-mounted display device, and the first slave device and the second slave device are handle devices. Figure 10 As shown, the headset sends a synchronization signal (Synch), which is then received by the left and right handles. Afterwards, the left handle responds to the synchronization signal (Reply), which is then received by the headset and the right handle. The right handle responds to the synchronization signal (Reply), which is then received by the headset and the left handle. Each synchronized frame carries time parameter information, including timestamp information and time interval information, so that the clock difference between the three can be determined based on the time parameter information, so that the left handle, right handle, and headset maintain clock synchronization. Schematically, in each round of synch, reception (RX), and transmission (TX), the frame length is approximately 20 bytes and the duration is 10us. In the case of 5 channels, a round of 6 frames and 2 idle times (idle) takes 400us, which can save time and improve communication efficiency.

[0173] Optionally, the head display device and the handle device can be synchronized first and then communicate; or they can be synchronized in real time during the communication process, which is not limited in the embodiments of the present application.

[0174] Please refer to Figure 11 , which shows a block diagram of the clock synchronization device provided by one embodiment of the present application. The device may include:

[0175] The first receiving module 1101 is configured to receive adjacent pulse signals sent by the master device;

[0176] A first determining module 1102 is configured to determine a first clock difference based on a reception time interval of the adjacent pulse signals and a transmission time interval of the adjacent pulse signals sent by the master device, where the first clock difference is used for clock synchronization between the first slave device and the master device;

[0177] The first sending module 1103 is used to send adjacent pulse signals to the second slave device when the clock of the first slave device is synchronized with the clock of the master device, so that the second slave device determines a second clock difference, and the second clock difference is used for the second slave device to synchronize the clock with the first slave device.

[0178] Optionally, the first receiving module 1101 is further configured to:

[0179] receiving adjacent pulse signals sent by the master device on at least two frequency hopping channels;

[0180] The first determining module 1102 is further configured to:

[0181] determining a time interval difference based on a reception time interval of adjacent pulse signals received on the frequency hopping channel and a transmission time interval of the adjacent pulse signals sent by the master device;

[0182] The first clock difference is determined based on an average of the time interval differences.

[0183] Optionally, the first sending module 1103 is further configured to:

[0184] sending adjacent pulse signals to the master device so that the master device determines a third clock difference;

[0185] The first receiving module 1101 is further configured to:

[0186] receiving the third clock difference sent by the master device;

[0187] The device further comprises:

[0188] A clock adjustment module is used to adjust clock parameters based on the average of the first clock difference and the third clock difference so as to synchronize with the master device clock.

[0189] Optionally, the pulse signal includes timestamp information;

[0190] The first determining module 1102 is further configured to:

[0191] Determining the receiving time interval based on the receiving time of the adjacent pulse signals;

[0192] Determining the sending time interval based on timestamp information included in the adjacent pulse signals;

[0193] The first clock difference is determined based on a time difference between the receiving time interval and the sending time interval.

[0194] Optionally, the master device is used to send adjacent pulse signals to the second slave device, so that the second slave device determines a fourth clock difference, and the fourth clock difference is used for clock synchronization of the second slave device and the master device.

[0195] Optionally, the second slave device is further configured to send adjacent pulse signals to the first slave device and the master device, and the master device is configured to determine a fifth clock difference after receiving the adjacent pulse signals.

[0196] Optionally, the first receiving module 1101 is further configured to:

[0197] receiving adjacent pulse signals sent by the second slave device;

[0198] The first determining module 1102 is further configured to:

[0199] determining a sixth clock difference based on a reception time interval of the adjacent pulse signals and a transmission time interval of the adjacent pulse signals transmitted by the second slave device;

[0200] The first sending module 1103 is further configured to:

[0201] sending adjacent pulse signals to the master device and the second slave device, so that the master device determines a seventh clock difference and the second slave device determines an eighth clock difference;

[0202] The first determining module 1102 is further configured to:

[0203] Based on the respective clock differences, a master clock difference with the master device is determined, and a slave clock difference with the second slave device is determined.

[0204] Optionally, the first determining module 1102 is further configured to:

[0205] determining an indirect master clock difference between the first slave device and the master device based on a time difference between the fifth clock difference and the sixth clock difference;

[0206] determining the master clock difference based on the first clock difference, the seventh clock difference, and an average of the indirect master clock difference;

[0207] determining an indirect slave clock difference between the first slave device and the second slave device based on a difference between the first clock difference and the fourth clock difference;

[0208] The slave clock difference is determined based on an average of the sixth clock difference, the eighth clock difference, and the indirect slave clock difference.

[0209] Optionally, the master device, the first slave device, and the second slave device cyclically send the adjacent pulse signals;

[0210] The first determining module 1102 is further configured to:

[0211] In the nth round of synchronization, based on the clock differences in the nth round, a master clock difference with the master device and a slave clock difference with the second slave device are determined, where n is a positive integer.

[0212] Optionally, the first sending module 1103 is further configured to:

[0213] The adjacent pulse signals are sent to the second slave device on at least two frequency hopping channels.

[0214] Optionally, the first receiving module 1101 is further configured to receive an adjacent pulse signal sent by the second slave device;

[0215] The first determining module 1102 is further configured to determine a ninth clock difference between the first slave device and the second slave device based on the received adjacent pulse signals;

[0216] The first sending module 1103 is further configured to send the ninth clock difference to the second slave device, so that the second slave device adjusts a clock parameter according to an average of the second clock difference and the ninth clock difference.

[0217] Optionally, the master device is a head-mounted display device, and the first slave device and the second slave device are handle devices.

[0218] In an embodiment of the present application, a master device may send adjacent pulse signals to a first slave device. The first slave device may determine a first clock difference between itself and the master device based on the time interval between receiving the adjacent pulse signals and the time interval between sending the pulse signals from the master device. The first slave device may then use the first clock difference to perform clock adjustment and maintain clock synchronization with the master device. Furthermore, after the first slave device is clock-synchronized with the master device, the first slave device may also send adjacent pulse signals to a second slave device to synchronize the second slave device with the first slave device, thereby enabling the second slave device to also synchronize with the master device, thereby achieving progressive clock synchronization. This may reduce interference during multi-device communication and improve communication quality.

[0219] Please refer to Figure 12 , which shows a block diagram of a clock synchronization device provided by another embodiment of the present application. The device may include:

[0220] The second sending module 1201 is used to send adjacent pulse signals to the first slave device, and the first slave device is used to determine a first clock difference based on the receiving time interval of the adjacent pulse signals and the sending time interval of the adjacent pulse signals sent by the master device, and the first clock difference is used for the first slave device to perform clock synchronization with the master device; when the first slave device is clock synchronized with the master device, the first slave device is also used to send adjacent pulse signals to the second slave device, so that the second slave device determines a second clock difference, and the second clock difference is used for the second slave device to perform clock synchronization with the first slave device.

[0221] Optionally, the second sending module 1201 is also used to send adjacent pulse signals to the first slave device on at least two frequency hopping channels, and the first slave device is also used to determine the first clock difference based on the average of each time interval difference, and the time interval difference is determined based on the receiving time interval of adjacent pulse signals received on the frequency hopping channel and the sending time interval of the adjacent pulse signals sent by the master device.

[0222] Optionally, the device further includes:

[0223] A second receiving module, configured to receive adjacent pulse signals sent by the first slave device;

[0224] A second determining module is configured to determine a third clock difference based on a reception time interval of the adjacent pulse signals and a transmission time interval of the adjacent pulse signals sent by the first slave device;

[0225] The second sending module 1201 is further configured to send the third clock difference to the first slave device, so that the first slave device adjusts clock parameters based on the average of the first clock difference and the third clock difference to synchronize with the master device clock.

[0226] Optionally, the second sending module 1201 is further used to send adjacent pulse signals to the second slave device, so that the second slave device determines a fourth clock difference, and the fourth clock difference is used for clock synchronization between the second slave device and the master device.

[0227] It should be noted that the above embodiments provide devices that implement their functions using only the division of the above functional modules as examples. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the devices and method embodiments provided in the above embodiments are based on the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.

[0228] Please refer to Figure 13, which shows a structural block diagram of an electronic device 1300 provided by an exemplary embodiment of the present application. The electronic device 1300 in the present application may include one or more of the following components: a memory 1320 and a processor 1310.

[0229] The processor 1310 may include one or more processing cores. The processor 1310 utilizes various interfaces and circuits to connect various components within the electronic device 1300. It executes instructions, programs, code sets, or instruction sets stored in the memory 1320, and accesses data stored in the memory 1320 to perform various functions and process data within the electronic device 1300. Optionally, the processor 1310 may be implemented using at least one of the following hardware forms: a digital signal processing (DSP), a field-programmable gate array (FPGA), or a programmable logic array (PLA). The processor 1310 may integrate one or a combination of a central processing unit (CPU), a graphics processing unit (GPU), and a modem. The CPU primarily processes the operating system, user interface, and application programs; the GPU is responsible for rendering and drawing content displayed on the display screen 1330; and the modem handles wireless communications. It is understood that the modem may not be integrated into the processor 1310 and may be implemented separately via a communication chip.

[0230] The memory 1320 may include a random access memory (RAM) or a read-only memory (ROM). Optionally, the memory 1320 includes a non-transitory computer-readable storage medium. The memory 1320 may be used to store instructions, programs, codes, code sets, or instruction sets. The memory 1320 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for implementing at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above-mentioned various method embodiments, etc. The operating system may be an Android system (including a system developed based on the depth of the Android system), an iOS system developed by Apple (including a system developed based on the depth of the iOS system), or other systems. The data storage area may also store data (such as a phone book, audio and video data, chat history data), etc., created by the electronic device 1300 during use.

[0231] In addition, those skilled in the art will understand that the structure of the electronic device 1300 shown in the above figures does not constitute a limitation of the electronic device 1300. The electronic device may include more or fewer components than shown, or may combine certain components, or arrange the components differently. For example, the electronic device 1300 also includes a radio frequency circuit, a camera component, a sensor, an audio circuit, a wireless fidelity (WiFi) component, a power supply, a Bluetooth component, and other components, which will not be described in detail here.

[0232] An embodiment of the present application further provides a computer-readable storage medium, which stores at least one program code, and the program code is loaded and executed by a processor to implement the clock synchronization method described in the above embodiments.

[0233] Embodiments of the present application provide a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of an electronic device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the terminal to perform the clock synchronization method provided in various optional implementations of the above aspects.

[0234] It should be understood that the "multiple" mentioned in this article refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent three situations: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship. In addition, the step numbers described in this article only illustrate a possible execution sequence between the steps. In some other embodiments, the above steps may not be executed in the order of the numbers, such as two steps with different numbers are executed at the same time, or two steps with different numbers are executed in the opposite order to the diagram. The embodiments of the present application do not limit this.

[0235] The above description is merely an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A clock synchronization method, characterized in that: The method is used for a first slave device, and the method includes: receiving adjacent pulse signals sent by a master device on at least two frequency hopping channels, where the master device is a head-mounted display device, and the adjacent pulse signals sent by the master device are transmitted through different frequency hopping channels; determining a time interval difference based on a reception time interval of the adjacent pulse signals received on the frequency hopping channel and a transmission time interval of the adjacent pulse signals sent by the master device; determining a first clock difference based on an average of the time interval differences, where the first clock difference is used for clock synchronization between the first slave device and the master device; When the clocks of the first slave device and the master device are synchronized, adjacent pulse signals are sent to the second slave device on at least two frequency hopping channels so that the second slave device can determine a second clock difference. The second clock difference is used for clock synchronization between the second slave device and the first slave device. The first slave device and the second slave device are handle devices.

2. The method according to claim 1, characterized in that The method further comprises: sending adjacent pulse signals to the master device so that the master device determines a third clock difference; receiving the third clock difference sent by the master device; Based on the average of the first clock difference and the third clock difference, a clock parameter is adjusted to synchronize with the master device clock.

3. The method according to any one of claims 1 to 2, characterized in that: The pulse signal contains timestamp information; The method further comprises: Determining the receiving time interval based on the receiving time of the adjacent pulse signals; Determining the sending time interval based on timestamp information included in the adjacent pulse signals; The first clock difference is determined based on a time difference between the receiving time interval and the sending time interval.

4. The method according to any one of claims 1 to 2, characterized in that: The master device is used to send adjacent pulse signals to the second slave device, so that the second slave device determines a fourth clock difference, and the fourth clock difference is used for the second slave device to perform clock synchronization with the master device.

5. The method according to claim 4, characterized in that The second slave device is further configured to send adjacent pulse signals to the first slave device and the master device, and the master device is configured to determine a fifth clock difference after receiving the adjacent pulse signals; The method further comprises: receiving adjacent pulse signals sent by the second slave device; determining a sixth clock difference based on a reception time interval for receiving the adjacent pulse signals and a transmission time interval for transmitting the adjacent pulse signals by the second slave device; sending adjacent pulse signals to the master device and the second slave device, so that the master device determines a seventh clock difference and the second slave device determines an eighth clock difference; Based on the respective clock differences, a master clock difference with the master device is determined, and a slave clock difference with the second slave device is determined.

6. The method according to claim 5, characterized in that The determining, based on the respective clock differences, a master clock difference with the master device, includes: determining an indirect master clock difference between the first slave device and the master device based on a time difference between the fifth clock difference and the sixth clock difference; determining the master clock difference based on the first clock difference, the seventh clock difference, and an average of the indirect master clock difference; The determining, based on the respective clock differences, a slave clock difference between the slave device and the second slave device, includes: determining an indirect slave clock difference between the first slave device and the second slave device based on a difference between the first clock difference and the fourth clock difference; The slave clock difference is determined based on an average of the sixth clock difference, the eighth clock difference, and the indirect slave clock difference.

7. The method according to claim 5, characterized in that The master device, the first slave device, and the second slave device cyclically send the adjacent pulse signals; The determining, based on the respective clock differences, a master clock difference with the master device and a slave clock difference with the second slave device, comprises: In the nth round of synchronization, based on the clock differences in the nth round, a master clock difference with the master device and a slave clock difference with the second slave device are determined, where n is a positive integer.

8. The method according to any one of claims 1 to 2, characterized in that: After sending the adjacent pulse signal to the second slave device, the method further includes: receiving adjacent pulse signals sent by the second slave device; determining a ninth clock difference between the second slave device and the second slave device based on the received adjacent pulse signals; The ninth clock difference is sent to the second slave device, so that the second slave device adjusts a clock parameter according to an average of the second clock difference and the ninth clock difference.

9. A clock synchronization method, characterized in that: The method is used for a master device, which is a head-mounted display device, and includes: Sending adjacent pulse signals to a first slave device on at least two frequency hopping channels, the adjacent pulse signals sent by the master device being transmitted through different frequency hopping channels, the first slave device being configured to determine a first clock difference based on an average of respective time interval differences, the time interval difference being determined based on a receiving time interval of the adjacent pulse signals received on the frequency hopping channels and a sending time interval of the adjacent pulse signals sent by the master device, the first clock difference being used for clock synchronization between the first slave device and the master device; When the clocks of the first slave device and the master device are synchronized, the first slave device is also used to send adjacent pulse signals to the second slave device on at least two frequency hopping channels so that the second slave device can determine a second clock difference. The second clock difference is used for clock synchronization between the second slave device and the first slave device. The first slave device and the second slave device are handle devices.

10. The method according to claim 9, characterized in that The method further comprises: receiving adjacent pulse signals sent by the first slave device; determining a third clock difference based on a reception time interval of the adjacent pulse signals and a transmission time interval of the adjacent pulse signals transmitted by the first slave device; The third clock difference is sent to the first slave device, so that the first slave device adjusts a clock parameter based on an average of the first clock difference and the third clock difference, so as to synchronize with the master device clock.

11. The method according to any one of claims 9 to 10, characterized in that: The method further comprises: An adjacent pulse signal is sent to the second slave device, so that the second slave device determines a fourth clock difference, where the fourth clock difference is used for clock synchronization between the second slave device and the master device.

12. A clock synchronization device, characterized in that: The device comprises: A first receiving module is configured to receive adjacent pulse signals sent by a master device on at least two frequency hopping channels, where the adjacent pulse signals sent by the master device are transmitted via different frequency hopping channels; A first determining module is configured to determine a time interval difference based on a reception time interval of the adjacent pulse signals received on the frequency hopping channel and a transmission time interval of the adjacent pulse signals sent by the master device; Determine a first clock difference based on an average of the time interval differences, where the first clock difference is used for clock synchronization between the first slave device and the master device; The first sending module is used to send adjacent pulse signals to the second slave device on at least two frequency hopping channels when the clocks of the first slave device are synchronized with the master device, so that the second slave device can determine a second clock difference. The second clock difference is used for clock synchronization between the second slave device and the first slave device. The first slave device and the second slave device are handle devices.

13. A clock synchronization device, characterized in that: The device comprises: The second sending module is used to send adjacent pulse signals to the first slave device on at least two frequency hopping channels. The adjacent pulse signals sent by the master device are transmitted through different frequency hopping channels. The first slave device is used to determine a first clock difference based on the average of each time interval difference. The time interval difference is determined based on the receiving time interval of the adjacent pulse signals received on the frequency hopping channel and the sending time interval of the adjacent pulse signals sent by the master device. The first clock difference is used for clock synchronization between the first slave device and the master device; when the first slave device maintains clock synchronization with the master device, the first slave device is also used to send adjacent pulse signals to the second slave device on at least two frequency hopping channels, so that the second slave device determines a second clock difference. The second clock difference is used for clock synchronization between the second slave device and the first slave device. The first slave device and the second slave device are handle devices.

14. A clock synchronization system, characterized in that: The system includes a master device, a first slave device, and a second slave device; The master device is configured to send adjacent pulse signals to the first slave device on at least two frequency hopping channels, wherein the adjacent pulse signals sent by the master device are transmitted via different frequency hopping channels; The first slave device is used to receive the adjacent pulse signal sent by the master device; determining a time interval difference based on a reception time interval of the adjacent pulse signals received on the frequency hopping channel and a transmission time interval of the adjacent pulse signals sent by the master device; determining a first clock difference based on an average of the time interval differences, where the first clock difference is used for clock synchronization between the first slave device and the master device; When the first slave device maintains clock synchronization with the master device, sending adjacent pulse signals to the second slave device on at least two frequency hopping channels; The second slave device is used to determine a second clock difference, and the second clock difference is used for clock synchronization between the second slave device and the first slave device, and the first slave device and the second slave device are handle devices.

15. An electronic device, characterized in that: The electronic device includes a processor and a memory, wherein the memory stores at least one program, and the at least one program is loaded and executed by the processor to implement the clock synchronization method as described in any one of claims 1 to 8, or to execute the clock synchronization method as described in any one of claims 9 to 11.

16. A computer-readable storage medium, characterized in that The storage medium stores at least one instruction, and the at least one instruction is used to be executed by a processor to implement the clock synchronization method according to any one of claims 1 to 8, or to execute the clock synchronization method according to any one of claims 9 to 11.

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