A system and method for processing frame switching during FC frame conversion to Srio frame

Abstract

The present invention provides a system and method for processing frame switching during the conversion of FC frames to srio frames, wherein the system includes: an FC frame disassembly module, which is used to receive FC frames of each channel and disassemble the first data; an interconnection module, which is used to obtain the first data from each FC frame disassembly module according to a preset rule, so as to send it to a data processing module; the data processing module is used to obtain and store the content data and content length in the first data, obtain the corresponding target data according to the channel number of the first data, and store the descriptor data of the interrupted first data when the first data of different channels are interrupted by frame insertion; when retransmitting, the corresponding descriptor data is fed back according to the channel number to retransmit the remaining content data of the first data, and finally the content data and target data of the first data, or the retransmitted content data and descriptor data are integrated into a srio frame output. In this way, it is possible to support the processing of multiple frame alternation / frame switching, so that the data frames in the communication process are allowed to be interrupted multiple times.

Description

Technical Field

[0001] The present invention relates to optical fiber communication technology, and in particular to a system and method for processing frame switching in the process of converting FC frames to Srio frames. Background Art

[0002] With the development of network interconnection, one-to-many or many-to-many protocol conversion devices have emerged. For example, in the case of FC and Srio conversion, multiple FC ports may be converted to one Srio port or multiple FC ports may be converted to multiple Srio ports. In this environment, the protocol conversion device is required to handle the frame conversion sent by different FC ports. Therefore, there may be a problem that when a certain FC frame has not been transmitted yet, there is a new urgent FC frame (high priority frame) that needs to be transmitted.

[0003] However, the current protocol conversion technology cannot handle the problem of multiple frame alternation / frame switching well. For example, the prior art discloses "A Compatible Network High Real-time Data Transmission Device and Method" (Application No.: 202210381729.2), which includes: the data link layer and physical layer of the OSI system, the data link layer includes a MAC client support preemption function module, a MAC control module and a MAC merging module, the physical layer includes a coordination sublayer module and a PHY module, and the method includes slicing of low-priority data, low-priority frame packaging, slicing combination and combination verification.

[0004] In fact, this method mainly involves solving the problem of frame preemption in Ethernet. Although it has inspiration for solving the frame switching scheme in the process of converting FC frames to srio frames in this case, the recorded scheme is that when the preemption switch is turned on, the high-priority frame cuts off the low-priority frame, and the cut low-priority frame is re-joined at the receiving end. Therefore, in this technology, frames are only divided into high priority and low priority according to priority. The high priority can cut off the low priority frame, and the high priority can no longer be preempted by a higher priority, that is, only 2 levels of priority / one interruption can be achieved. Summary of the invention

[0005] To this end, the main purpose of the present invention is to provide a system and method for processing frame switching during FC frame conversion to Srio frame, so as to support processing multiple frame alternation / frame switching, so that data frames in the communication process can be interrupted multiple times.

[0006] In order to achieve the above object, according to a first aspect of the present invention, a system for processing frame switching during conversion of FC frames to Srio frames is provided, comprising:

[0007] An FC frame disassembling module, used for receiving the FC frames of each channel and disassembling the first data;

[0008] An interconnection module, used for acquiring first data from each FC frame disassembly module according to a preset rule, so as to send the first data to the data processing module;

[0009] The data processing module includes: a frame content FIFO unit, a transmission continuation recording unit, a frame information recording unit, and a srio framing unit.

[0010] The frame content FIFO unit is used to obtain and store the content data and content length in the first data,

[0011] The frame information recording unit stores a first mapping table for obtaining the channel number of the first data and then looking up the table to obtain the corresponding target data.

[0012] The resuming recording unit is used to store the descriptor data of the interrupted first data when the first data of different channels are interrupted by frame insertion; and to feed back the corresponding descriptor data according to the channel number when resuming transmission to resume the transmission of the remaining content data of the first data;

[0013] The srio frame assembly unit is used to integrate the content data and target data of the first data, or the content data and descriptor data of the continued transmission into a srio frame output.

[0014] In a possible preferred implementation, the preset rule is a polling mechanism rule, and the interconnection module adopts a polling mechanism to sequentially switch channels according to a specified number of beats to obtain the first data transmitted by each FC frame disassembly module.

[0015] In a possible preferred implementation, the preset rule is a priority preemption rule, the interconnection module switches channels according to the priority of each channel, obtains the first data transmitted by each FC frame disassembly module, and allows a high priority channel to interrupt the transmission of a low priority channel.

[0016] In a possible preferred implementation manner, the first data includes: payload data, a sof start mark, an eof end mark, and a channel number, wherein the payload data is content data.

[0017] In a possible preferred implementation manner, the target data includes: srio_addr, source srio ID, and destination srioID.

[0018] In a possible preferred implementation, the descriptor data acquisition step includes: when a change in the channel number is detected and the eof end marker of the current first data is not received, the current first data channel number corresponding to: source srio ID, destination srio ID, srio_addr and content length are stored as descriptor data in the resume recording unit.

[0019] In addition, corresponding to the system of the first aspect of the present invention, the second aspect of the present invention further provides a method for processing frame switching in the process of converting FC frames to Srio frames, the steps of which include:

[0020] S100 The interconnection module obtains the first data of each channel from each FC frame disassembly module according to a preset rule, and sends the first data to the data processing module;

[0021] S200 The data processing module receives the first data, obtains the content data and the content length; when the sof start mark is received, the target data is retrieved according to the corresponding channel number; when the eof end mark is received, the target data together with the content data is sent to the srio framing unit;

[0022] When the data processing module detects that the channel number has changed and the EOF end mark of the previous frame has not been received, the descriptor data of the interrupted first data is stored; when the transmission is continued, the corresponding descriptor data is fed back according to the channel number to continue the transmission of the remaining content data of the first data, and then sent to the SRI O framing unit together with the descriptor data;

[0023] S300 The srio frame assembly unit integrates the content data of the first data and its target data, or the content data of the continued transmission and its descriptor data into a srio frame for output.

[0024] In a possible preferred implementation, the descriptor data acquisition step includes: when a change in the channel number is detected and the eof end marker of the current first data is not received, the current first data channel number corresponding to: source srio ID, destination srio ID, srio_addr and content length are stored as descriptor data in the resume recording unit.

[0025] In a possible preferred implementation, the preset rule is a polling mechanism rule, and the interconnection module adopts a polling mechanism to sequentially switch channels according to a specified number of beats to obtain the first data transmitted by each FC frame disassembly module.

[0026] In a possible preferred implementation, the preset rule is a priority preemption rule, the interconnection module switches channels according to the priority of each channel, obtains the first data transmitted by each FC frame disassembly module, and allows a high priority channel to interrupt the transmission of a low priority channel.

[0027] The system and method for frame switching in the process of processing FC frame conversion to Srio frame provided by the present invention can support the situation of alternating transmission of multiple FC data streams in the process of processing FC frame conversion to Srio frame, realize accurate transmission of data streams, and support the interlacing of multiple streams and the situation of unlimited frame interruption. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The drawings constituting a part of this application are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0029] Figure 1 A schematic diagram of the system structure of the first embodiment of the present invention;

[0030] Figure 2 This is a schematic diagram of the structure of a data processing module according to the first embodiment of the present invention;

[0031] Figure 3 It is a schematic diagram of the structure of the FC frame and the first data after being disassembled in the first embodiment of the present invention;

[0032] Figure 4 This is a schematic diagram of the structure of the first data content output by the interconnection module to the data processing module under the polling mechanism in the first embodiment of the present invention;

[0033] Figure 5 It is a schematic diagram of the structure of the first data content output by the interconnection module to the data processing module under the priority preemption rule in the first embodiment of the present invention;

[0034] Figure 6 This is a schematic diagram of the srio frame structure in the first embodiment of the present invention;

[0035] Figure 7 Schematic diagram of method steps of the second embodiment of the present invention. DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the technical solution of the present invention, the specific technical solution of the present invention will be clearly and completely described in conjunction with the embodiments below to help those skilled in the art further understand the present invention. Obviously, the embodiments described in this case are only embodiments of a part of the present invention, not all of the embodiments. It should be pointed out that for those of ordinary skill in the art, the embodiments in this application and the features in the embodiments can be combined with each other without departing from the concept of the present invention and without conflicting with each other. Based on the embodiments in the present invention, all other embodiments obtained without creative work by those of ordinary skill in the art should belong to the disclosure and protection scope of the present invention.

[0037] In addition, the terms "first", "second", "S1", "S2", etc. in the specification, claims and drawings of the present invention are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those described herein. At the same time, the terms "including" and "having" and any variations thereof in the present invention are intended to cover non-exclusive inclusions. Unless otherwise clearly specified and limited, the terms "set", "layout", "install", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be a connection between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in this case can be understood based on the specific circumstances and in combination with the prior art. (one)

[0039] See also Figure 1 As shown, an example is given of a scenario where there are multiple FC ports with protocol conversion requirements. In this scenario, the FC frame enters the FC frame disassembly module, which disassembles the FC frame and outputs payload data, sof (start of frame mark), eof (end of frame mark), channel number and other data and descriptor information.

[0040] When multiple data streams output by the FC frame disassembly module are input to the interconnection module, the interconnection module uses a polling mechanism to route the input data, such as switching channels every 32 clock cycles. At this time, the data processing module (input FC data processing and integration output srio frame) faces the following problems:

[0041] After receiving the data stream corresponding to FC frame 1, processing begins. When the eof (end of frame mark) signal of FC frame 1 is not received (the content of FC frame 1 is not completely transmitted), the data transmission related to FC frame 1 is interrupted, and the data stream corresponding to FC frame 2 begins to be received... After completing one round of polling, the second round of polling begins, and the data stream corresponding to FC frame 1 continues to be transmitted. At this time, the data processing module is required to be able to identify broken frames and continue processing.

[0042] In order to adapt to the above processing requirements, such as Figures 1 to 6 As shown, the present invention provides a system for processing frame switching in the process of converting FC frames to Srio frames, which includes:

[0043] The FC frame disassembly module is used to receive the FC frames of each channel and disassemble the first data, wherein Figure 3As shown, the format of the FC frame is illustrated, and the first data after disassembly includes: payload data, sof start mark, eof end mark, and channel number.

[0044] The interconnection module is used to obtain the first data from each FC frame disassembly module according to a preset rule, so as to send the first data to the data processing module.

[0045] In this example, the interconnection module can control frame switching. If the preset rule adopts a polling mechanism, the next channel is switched after receiving the specified number of beats of data. For example, the frame of the next channel is switched after receiving 32 beats of valid data. Figure 4 As shown, an example is given of the first data content output by the interconnection module to the data processing module under the polling mechanism.

[0046] If the preset rule is a priority preemption rule, that is, a high-priority frame interrupts a low-priority frame, then if a high-priority frame is input, the currently transmitted frame will be interrupted immediately and the high-priority frame will be transmitted, thereby obtaining the first data transmitted by each corresponding FC frame disassembly module. Figure 5 As shown, an example is given of the first data content output by the interconnection module to the data processing module under the priority preemption rule. In the example, the larger the priority number, the higher the priority. Theoretically, there is no limit to the number of priority levels that can be supported.

[0047] Among them Figure 2 As shown, the data processing module includes: a frame content FIFO unit, a resume recording unit, a frame information recording unit, and a srio framing unit.

[0048] The frame content FIFO unit is used to obtain and store the payload content data and content length in the first data.

[0049] The frame information recording unit stores a first mapping table for obtaining the channel number of the first data and then looking up the table to obtain the corresponding target data. In this example, the target data includes: srio_addr, source srio ID, and destination srio ID.

[0050] The resume recording unit is used to store the descriptor data of the interrupted first data when the first data of different channels are interrupted by frame insertion, so as to feed back the corresponding descriptor data according to the channel number when resuming transmission to resume the remaining content data of the first data.

[0051] In this example, the step of obtaining the descriptor data includes: when a change in the channel number is detected and the eof end mark of the current first data is not received, the current first data channel number corresponding to: source srio ID, destination srio ID, srio_addr and content length are stored as descriptor data in the resume recording unit.

[0052] The srio framing unit is used to integrate the content data and target data of the first data, or the content data and descriptor data of the continued transmission into, such as Figure 6 The srio frame output is shown.

[0053] The following example illustrates the working process of the data processing module.

[0054] When there is only one FC flow, the payload data of the FC frame is input into the frame content FIFO unit for storage, and the amount of payload data stored in the FIFO (frame content length) is recorded.

[0055] When the frame start mark sof is received, the channel number output by the FC frame disassembly module is input into the first mapping table (hereinafter referred to as Table 1) of the frame information recording unit, and the corresponding srio_addr and source srio ID and destination srio ID are queried.

[0056] Table 1 is used to query the corresponding relationship between the channel number and srio_addr and the source srio ID and the destination srio ID, which can be implemented through ram or cam, and the table content can be configured through the host computer.

[0057] When the frame end flag eof is received, it marks the completion of the complete FC frame transmission. At this time, the frame content, srio_addr, source srio ID, destination srio ID, sof and eof flags, and frame content length are sent to the srio framing module.

[0058] At this time, the srio framing module divides the input data into frame contents and integrates them into srio frames to send out (refer to the applicant's previous case "A large-scale SRIO high-speed information exchange system and its information exchange method" application number: 2022105981605).

[0059] When multiple FC streams are input, and a certain FC frame A is interrupted by another FC frame B before it is completely completed, the input end of the data processing module detects that the channel number has changed.

[0060] Frame A process 1:

[0061] 1. Receive the frame header sof_A of frame A, enter the channel number A of frame A into table 1, and query the corresponding srio_addr_A and source srio ID_A and destination srio ID_A;

[0062] 2. The frame content payload A is input into the frame content FIFO for storage, and the frame content length L_A input into the FIFO is recorded at the same time;

[0063] At this time, frame B is input and frame A is interrupted.

[0064] 3. The module input detects that the input channel number has changed, but the end marker eof_A of frame A has not been received.

[0065] 4. Input the source srio ID_A, destination srio ID_A and srio_addr_new_A corresponding to channel number A into the retransmission record unit, where the source srio ID_A and destination srio ID_A are from Table 1, and srio_addr_new_A=srio_addr_A+L_A;

[0066] 5. Send the frame content payload A, srio_addr_A, source srio ID_A, destination srio ID_A, sof_A (yes, marked 1) and eof_A (no, marked 0), and the length of the cached content of frame A L_A to the srio framing module;

[0067] 6. The srio framing module divides the input data into frame contents and integrates them into srio frames to send out.

[0068] Frame B process:

[0069] 1. Receive the frame header sof_B of frame B, enter the channel number of frame B_B into table 1, and query the corresponding srio_addr_B and source srio ID_B and destination srio ID_B;

[0070] 2. The frame content payload B is input into the frame content FIFO for storage, and the frame content length L_B input into the FIFO is recorded at the same time;

[0071] 3. Receive the end flag of frame B, eof_B, marking the completion of the transmission of the complete FC frame B;

[0072] 4. Send the frame content payload B, srio_addr_B, source srio ID_B, destination srio ID_B, sof_B and eof_B tags, and frame content length L_B to the srio framing module;

[0073] 5. The srio framing module divides the input data into frame contents and integrates them into srio frames to send out.

[0074] Resume frame A, that is, frame A process 2:

[0075] 1. The input end detects that the input channel number has changed (from frame B to frame A), but the start marker sof_A of frame A has not been received.

[0076] 2. Input the channel number of frame A into the retransmission record unit, and query the corresponding srio_addr_new_A and source srio ID_A and destination srio ID_A;

[0077] 3. The frame content A2 of the continued transmission is input into the frame content FIFO for storage, and the frame content length L_A2 of the input FIFO is recorded at the same time;

[0078] 4. Receive the end flag of frame A, eof_A, marking the completion of the transmission of the complete FC frame A;

[0079] 5. Send the frame content_A2, srio_addr_new_A, source srio ID_A, destination srio ID_A, sof_A and eof_A tags, and frame content length L_A2 to the srio framing module;

[0080] 6. The srio framing module divides the input data into frame contents and integrates them into srio frames to send out.

[0081] If frame A is interrupted again during the retransmission process, the content in the retransmission record unit is iteratively updated, wherein the source srio ID_A and the destination srio ID_A retain their original values, and srio_addr_new_A=srio_addr_new_A+L_A2; when retransmission is resumed again, the retransmission record unit is queried to obtain the corresponding value.

[0082] If frame B is interrupted by frame C during transmission, the process is similar to that of frame A in process 1.

[0083] It can be seen that this solution can achieve accurate transmission of data streams when multiple streams are sent in an interleaved manner, and supports the interweaving of multiple streams and the interruption of frames for an unlimited number of times. (two)

[0085] like Figure 7 As shown, corresponding to the system of the first embodiment of the present invention, the present invention also provides a method for processing frame switching in the process of converting FC frames to Srio frames, the steps of which include:

[0086] S100 The interconnection module obtains the first data of each channel from each FC frame disassembly module according to a preset rule, and sends the first data to the data processing module;

[0087] In one possible example, the preset rule is a polling mechanism rule, and the interconnection module adopts a polling mechanism to sequentially switch channels according to a specified number of beats to obtain the first data transmitted by each FC frame disassembly module.

[0088] In another possible example, the preset rule is a priority preemption rule, the interconnection module switches channels according to the priority of each channel, obtains the first data transmitted by each FC frame disassembly module, and allows a high priority to interrupt the transmission of a low priority channel.

[0089] S200 The data processing module receives the first data, obtains the content data and the content length; when the sof start mark is received, the target data is retrieved according to the corresponding channel number; when the eof end mark is received, the target data together with the content data is sent to the srio framing unit;

[0090] When the data processing module detects that the channel number has changed and the EOF end mark of the previous frame has not been received, the descriptor data of the interrupted first data is stored; when the transmission is continued, the corresponding descriptor data is fed back according to the channel number to continue the transmission of the remaining content data of the first data, and then sent to the SRI O framing unit together with the descriptor data;

[0091] Among them, in this example, the step of obtaining the descriptor data includes: when a change in the channel number is detected and the eof end mark of the current first data is not received, the current first data channel number corresponding to: source srio ID, destination srio ID, srio_addr and content length are used as descriptor data and stored in the resume recording unit.

[0092] S300 The srio frame assembly unit integrates the content data of the first data and its target data, or the content data of the continued transmission and its descriptor data into a srio frame for output.

[0093] In summary, the system and method for frame switching during the process of processing FC frames to Srio frames provided by the present invention can support the situation where multiple FC data streams are alternately transmitted during the process of processing FC frames to Srio frames, realize accurate transmission of data streams, and support the interlacing of multiple streams and the situation where frames are interrupted an unlimited number of times.

[0094] The preferred embodiments of the present invention disclosed above are only used to help explain the present invention. The preferred embodiments do not describe all the details in detail, nor do they limit the invention to the specific implementation methods described. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is only limited by the claims and their full scope and equivalents. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

[0095] Those skilled in the art can understand that, in addition to implementing the system, device and its various modules provided by the present invention in a purely computer-readable program code, it is entirely possible to implement the same program in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers and embedded microcontrollers by logically programming the method steps. Therefore, the system, device and its various modules provided by the present invention can be considered as a hardware component, and the modules included therein for implementing various programs can also be regarded as structures within the hardware component; the modules for implementing various functions can also be regarded as both software programs for implementing the method and structures within the hardware component.

[0096] In addition, all or part of the steps in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a program, and the program is stored in a storage medium, including a number of instructions to enable a single-chip microcomputer, a chip or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, RandomAccess Memory), disk or optical disk and other media that can store program codes.

[0097] In addition, various implementation modes of the embodiments of the present invention may be arbitrarily combined, and as long as they do not violate the concept of the embodiments of the present invention, they should also be regarded as the contents disclosed by the embodiments of the present invention.

Claims

1. A system for processing frame switching during the conversion of FC frames to Srio frames, characterized in that include: An FC frame disassembling module, used for receiving the FC frames of each channel and disassembling the first data; An interconnection module, used for acquiring first data from each FC frame disassembly module according to a preset rule, so as to send the first data to the data processing module; The data processing module includes: a frame content FIFO unit, a transmission continuation recording unit, a frame information recording unit, and a srio framing unit. The frame content FIFO unit is used to obtain and store the content data and content length in the first data, The frame information recording unit stores a first mapping table for obtaining the channel number of the first data and then looking up the table to obtain the corresponding target data. The resuming recording unit is used to store the descriptor data of the interrupted first data when the first data of different channels are interrupted by frame insertion; and to feed back the corresponding descriptor data according to the channel number when resuming transmission to resume the transmission of the remaining content data of the first data; The srio frame assembly unit is used to integrate the content data and target data of the first data, or the content data and descriptor data of the continued transmission into a srio frame output.

2. The system according to claim 1, characterized in that The preset rule is a polling mechanism rule. The interconnection module adopts a polling mechanism and switches channels in sequence according to a specified number of beats to obtain the first data transmitted by each FC frame disassembling module.

3. The system according to claim 1, characterized in that The preset rule is a priority preemption rule. The interconnection module switches channels according to the priority of each channel, obtains the first data transmitted by each FC frame disassembly module, and allows a high priority channel to interrupt the transmission of a low priority channel.

4. The system according to claim 1, characterized in that The first data includes: payload data, sof start mark, eof end mark, and channel number, wherein the payload data is content data.

5. The system according to claim 1, characterized in that The target data includes: srio_addr, source srioID, and destination srio ID.

6. The system according to claim 1, characterized in that The descriptor data acquisition step includes: when a change in the channel number is detected and the eof end mark of the current first data is not received, the source srio ID, the destination srio ID, srio_addr and the content length corresponding to the current first data channel number are stored as descriptor data in the resume recording unit.

7. A method for processing frame switching during FC frame conversion to Srio frame, characterized by the steps of include: S100 The interconnection module obtains the first data of each channel from each FC frame disassembly module according to a preset rule, and sends the first data to the data processing module; S200 The data processing module receives the first data, obtains the content data and the content length; when the sof start mark is received, the target data is retrieved according to the corresponding channel number; when the eof end mark is received, the target data together with the content data is sent to the srio framing unit; When the data processing module detects that the channel number has changed and the EOF end mark of the previous frame has not been received, the descriptor data of the interrupted first data is stored; when the transmission is continued, the corresponding descriptor data is fed back according to the channel number to continue the transmission of the remaining content data of the first data, and then sent to the SRI O framing unit together with the descriptor data; S300 The srio frame assembly unit integrates the content data of the first data and its target data, or the content data of the continued transmission and its descriptor data into a srio frame for output.

8. The method according to claim 7, characterized in that The descriptor data acquisition step includes: when a change in the channel number is detected and the eof end mark of the current first data is not received, the source srio ID, the destination srio ID, srio_addr and the content length corresponding to the current first data channel number are stored as descriptor data in the resume recording unit.

9. The method according to claim 7, characterized in that: The preset rule is a polling mechanism rule. The interconnection module adopts a polling mechanism and switches channels in sequence according to a specified number of beats to obtain the first data transmitted by each FC frame disassembling module.

10. The method according to claim 7, characterized in that The preset rule is a priority preemption rule. The interconnection module switches channels according to the priority of each channel, obtains the first data transmitted by each FC frame disassembly module, and allows a high priority channel to interrupt the transmission of a low priority channel.

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