A display panel and display device
By introducing an electronic shielding layer to cover the thin-film transistor channel region and applying voltage in the display panel, the problem of color shift caused by the drift of driving transistor characteristics under high temperature and high humidity conditions is solved, thereby improving the stability and image quality consistency of the display panel.
Patent Information
- Application Number
- CN202310026683.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-01-09
- Publication Date
- 2026-08-25
- Estimated Expiration
- 2043-01-09
AI Technical Summary
The characteristics of the driving transistors in the display panel drift under high temperature and high humidity environments, resulting in color deviation problems.
An electron shielding layer is introduced into the display panel to cover the active channel region of the thin-film transistor. It is electrically connected to the power signal line and initialization signal line through a connection via, and a voltage is applied to neutralize the impurity ions in the thin-film transistor channel, thereby improving the stability of transistor characteristics.
It improves the consistency of display quality in high temperature and high humidity environments, and reduces fluctuations in drive current and color deviation.
Smart Images

Figure CN115811911B_ABST
Abstract
Description
Technical Field
[0001] This disclosure belongs to the field of display technology, specifically relating to a display panel and a display device. Background Technology
[0002] Display panels typically include multiple pixel driving circuits, each containing a driving transistor. The driving transistor provides driving current to the light-emitting unit under the influence of data signals, thus driving the unit to emit light. However, the driving current output by the driving transistor is susceptible to fluctuations due to external factors. Especially when the display panel is used in high-temperature and high-humidity environments for extended periods, this can easily lead to characteristic drift of the driving transistor, resulting in color distortion. Summary of the Invention
[0003] This disclosure aims to at least solve one of the technical problems existing in the prior art, and to provide a display panel and a display device.
[0004] Firstly, the technical solution adopted to solve the technical problem of this disclosure is a display panel, which includes a substrate and a plurality of pixel units disposed on the substrate;
[0005] The pixel unit includes a pixel driving circuit and a light-emitting device electrically connected to the pixel driving circuit; the pixel driving circuit includes a plurality of thin-film transistors; wherein...
[0006] The display panel further includes an electronic shielding layer; the electronic shielding layer is disposed on the side of at least one of the plurality of thin film transistors near the substrate, and the orthographic projection of the channel region of the active layer of the thin film transistor on the substrate at least partially overlaps with the orthographic projection of the electronic shielding layer on the substrate.
[0007] In some embodiments, the plurality of thin-film transistors include driving transistors; the driving transistors are configured to drive the light-emitting device to emit light; the orthographic projection of the channel region of the active layer of the driving transistor onto the substrate at least partially overlaps with the orthographic projection of the electron shielding layer onto the substrate.
[0008] In some embodiments, the display panel further includes a first power signal line; the plurality of thin-film transistors further include at least one light-emitting control transistor, wherein a first electrode of one of the light-emitting control transistors is electrically connected to the first power signal line;
[0009] The electronic shielding layer is electrically connected to the first power signal line through a connection via.
[0010] In some embodiments, the display panel further includes a first initialization signal line; the plurality of thin-film transistors further include a first reset transistor, wherein a first terminal of the first reset transistor is electrically connected to the first initialization signal line, and a second terminal of the first reset transistor is electrically connected to the first terminal of the light-emitting device;
[0011] The electronic shielding layer is electrically connected to the first initialization signal line via a connection via.
[0012] In some embodiments, the plurality of light-emitting devices include red light-emitting devices, green light-emitting devices, and blue light-emitting devices;
[0013] The aspect ratios of the driving transistors in the pixel driving circuit electrically connected to the red light-emitting device, the pixel driving circuit electrically connected to the green light-emitting device, and the pixel driving circuit electrically connected to the blue light-emitting device are all different.
[0014] In some embodiments, the aspect ratio of the driving transistor is in the range of 1:30 to 1:1.
[0015] In some embodiments, the plurality of thin-film transistors include a first reset transistor; the first electrode of the light-emitting device is electrically connected to the second electrode of the first reset transistor;
[0016] The plurality of light-emitting devices include red light-emitting devices, green light-emitting devices, and blue light-emitting devices;
[0017] The first overlapping area of the orthographic projection of the first electrode of the green light-emitting device and the second electrode of the corresponding first reset transistor on the substrate is greater than the second overlapping area of the orthographic projection of the first electrode of the red light-emitting device and the second electrode of the corresponding first reset transistor on the substrate; the first overlapping area of the orthographic projection of the first electrode of the green light-emitting device and the second electrode of the corresponding first reset transistor on the substrate is greater than the third overlapping area of the orthographic projection of the first electrode of the blue light-emitting device and the second electrode of the corresponding first reset transistor on the substrate.
[0018] In some embodiments, the display panel further includes an insulating layer; the plurality of thin-film transistors include a first reset transistor;
[0019] The insulating layer is disposed between the first electrode of the plurality of light-emitting devices and the second electrode of the first reset transistor, and the overlapping area of the first electrode of the light-emitting device and the second electrode of the first reset transistor is the first area;
[0020] The thickness of the insulating layer at least at the location corresponding to the first region is between 1.2 μm and 4 μm.
[0021] In some embodiments, the plurality of light-emitting devices include red light-emitting devices, green light-emitting devices, and blue light-emitting devices; wherein the green light-emitting material in the green light-emitting device includes at least iridium-based materials.
[0022] In some embodiments, the plurality of light-emitting devices include red light-emitting devices, green light-emitting devices, and blue light-emitting devices; wherein the materials of the electron transport layer and hole transport layer in the green light-emitting device include at least aromatic amine materials.
[0023] In some embodiments, the plurality of light-emitting devices include a red light-emitting device, a green light-emitting device, and a blue light-emitting device; wherein the opening ratio of the pixel definition layer in the green light-emitting device is between 2% and 40%.
[0024] Secondly, embodiments of this disclosure also provide a display device, which includes a display panel as described in any of the above embodiments. Attached Figure Description
[0025] Figure 1 A schematic diagram of PBTS drift in existing driving transistors;
[0026] Figure 2 This is a schematic diagram of the efficiency curves for existing red sub-pixel R, green sub-pixel G, and blue sub-pixel B;
[0027] Figure 3 A schematic diagram of a display panel provided in an embodiment of this disclosure;
[0028] Figure 4 A schematic diagram of an exemplary 7T1C pixel driving circuit provided for an embodiment of this disclosure;
[0029] Figure 5 This is a schematic diagram illustrating the film relationship between the electronic shielding layer and the driving transistor provided in an embodiment of the present disclosure.
[0030] Figure 6 This is a schematic diagram of the PBTS characteristic curve of the driving transistor when the orthographic projection of the channel region of the active layer of the driving transistor on the substrate at least partially overlaps with the orthographic projection of the electron shielding layer on the substrate, according to an embodiment of this disclosure. Detailed Implementation
[0031] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. The components of the embodiments of this disclosure described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this disclosure provided in the accompanying drawings is not intended to limit the scope of the claimed disclosure, but merely represents selected embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure.
[0032] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.
[0033] In this disclosure, "multiple or several" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.
[0034] In related technologies, after a low-temperature poly-silicon (LTPS) thin-film transistor (TFT) is driven for a certain period of time in a high-temperature and high-humidity environment, the positive bias temperature stress (PBTS) characteristic curve of the driving transistor will shift to the right, such as... Figure 1As shown, Vg represents voltage, Id (Intensity) represents driving current (intensity), and 0s, 10s, 1270s, and 18000s represent the Id-Vg characteristic curves at different times, i.e., PBTS characteristic curves. As the driving current Id flowing through the Organic Light-Emitting Diode (OLED) increases, in a specific pixel arrangement circuit, such as the GGRB pixel arrangement circuit, each repeating pixel unit contains 0.5 red sub-pixels R and blue sub-pixels B, and 1 green sub-pixel G. For the same characteristic offset of the driving transistor, the driving current Id of the green sub-pixel G is higher than that of the red sub-pixels R and blue sub-pixels B. Furthermore, as... Figure 2 As shown, under normal circumstances, the efficiency of green sub-pixels G is higher than that of red sub-pixels R and blue sub-pixels B, and when the display image quality is distorted, it tends to be green.
[0035] To ensure the stability of the displayed image, this disclosure provides a display panel that improves the stability of the thin-film transistor (TFT) characteristics by optimizing the film structure of the TFT (e.g., by setting an electron shielding layer).
[0036] The display panel specifically includes a substrate and a plurality of pixel units disposed on the substrate; the pixel unit includes a pixel driving circuit and a light-emitting device electrically connected to the pixel driving circuit; the pixel driving circuit includes a plurality of thin-film transistors; wherein, the display panel further includes an electronic shielding layer; the electronic shielding layer is disposed on the side of at least one of the plurality of thin-film transistors near the substrate, and the orthographic projection of the channel region of the active layer of the thin-film transistor on the substrate at least partially overlaps with the orthographic projection of the electronic shielding layer on the substrate.
[0037] It should be noted that due to inherent defects in the TFT material, these defects can amplify under high temperature and humidity conditions. Specifically, when an electrical signal is applied to the TFT, leakage will occur in defective TFTs, and this leakage will be exacerbated under high temperature and humidity. This embodiment of the present disclosure incorporates an electronic shielding layer. This layer can shield electrical signals, and applying voltage to the electronic shielding layer can neutralize charged impurity ions in the TFT channel. This allows the TFT to be powered normally, improving the stability of its characteristics and thus mitigating display retention caused by inherent defects in the TFT material. Furthermore, it ensures consistent display quality even under extreme operating conditions, particularly in high temperature and humidity environments.
[0038] The specific structure of the display panel provided in the embodiments of this disclosure will be described in detail below.
[0039] Figure 3 A schematic diagram of a display panel provided in an embodiment of this disclosure, as shown below. Figure 3As shown, Figure 3 The positional relationships of the structures shown are merely illustrated and should not be construed as limiting the specific structure of the film layer layout. Specifically, the display panel includes a substrate 10 and a plurality of pixel units 20 disposed on the substrate 10, wherein the plurality of pixel units 20 may be arranged in an array. Each pixel unit 20 includes a pixel driving circuit 21 and a light-emitting device 22 electrically connected to the pixel driving circuit 21. The pixel driving circuit 21 is configured to drive the light-emitting device 22 to emit light. The light-emitting device 22 may be a red light-emitting device 22, a green light-emitting device 22, or a blue light-emitting device 22. The pixel driving circuit 21 corresponding to different colored light-emitting devices 22 has the same structure. Each pixel driving circuit 21 includes a plurality of thin-film transistors.
[0040] The pixel driving circuit 21 in this embodiment can be a 7T1C (i.e., seven thin-film transistors and one capacitor) structure, a 7T2C structure, a 6T1C structure, a 6T2C structure, a 5T2C structure, or a 9T2C structure, etc., and this embodiment does not limit it. For ease of understanding, the pixel driving circuit 21 in the following embodiments of this disclosure will be described using a 7T1C structure as an example.
[0041] Figure 4 This is a schematic diagram of an exemplary 7T1C pixel driving circuit provided in an embodiment of this disclosure. Wherein, T1 represents the second reset transistor, T2 represents the potential control transistor, T3 represents the driving transistor, T4 represents the switching transistor, T5 represents the first light-emitting control transistor, T6 represents the second light-emitting control transistor, T7 represents the first reset transistor, and Cst represents the storage capacitor.
[0042] The first terminal of the first light-emitting control transistor T5 is electrically connected to the first power supply signal line VDD; the second terminal of the first light-emitting control transistor T5 is electrically connected to the first terminal of the driving transistor T3; and the gate of the first light-emitting control transistor T5 is electrically connected to the light-emitting control signal line EM.
[0043] The first terminal of the switching transistor T4 is electrically connected to the data line Date; the second terminal of the switching transistor T4 is electrically connected to the second terminal of the first light-emitting control transistor T5; and the gate of the switching transistor T4 is electrically connected to the gate scan line Gate.
[0044] The first terminal of the driving transistor T3 is electrically connected to the second terminal of the first light-emitting control transistor T5; the second terminal of the driving transistor T3 is electrically connected to the first terminal of the second light-emitting control transistor T6; and the gate of the driving transistor T3 is electrically connected to the first plate of the storage capacitor Cst.
[0045] The first terminal of the second light-emitting transistor T6 is electrically connected to the second terminal of the driving transistor T3; the second terminal of the second light-emitting transistor T6 is electrically connected to the first terminal of the OLED light-emitting device; the gate of the second light-emitting transistor T6 is electrically connected to the light-emitting control signal line EM. The OLED light-emitting device can be a red light-emitting device 22, a green light-emitting device 22, or a blue light-emitting device 22.
[0046] The first terminal of the potential control transistor T2 is electrically connected to the second terminal of the driving transistor T3; the second terminal of the potential control transistor T2 is electrically connected to the first plate of the storage capacitor Cst; the gate of the potential control transistor T2 is electrically connected to the gate scan line Gate.
[0047] The first terminal of the second reset transistor T1 is electrically connected to the second terminal of the potential control transistor T2; the second terminal of the second reset transistor T1 is electrically connected to the second initialization signal line Vinit2; and the gate of the second reset transistor T1 is electrically connected to the second reset signal line Reset2.
[0048] The first electrode of the first reset transistor T7 is electrically connected to the first initialization signal line Vinit2; the second electrode of the first reset transistor T7 is electrically connected to the first electrode of the light-emitting device OLED; and the gate of the first reset transistor T7 is electrically connected to the first reset signal line Reset1.
[0049] The first plate of the storage capacitor Cst is electrically connected to the gate of the driving transistor T3; the second plate of the storage capacitor Cst is electrically connected to the first power supply signal line VDD.
[0050] The second electrode of the OLED light-emitting device is electrically connected to the second power signal line VSS.
[0051] Here, the first electrode can represent the source of a transistor, and the second electrode can represent the drain of a transistor. In an OLED, the first electrode can be the anode, and the second electrode can be the cathode.
[0052] The connection relationship and working principle between the second reset transistor T1, the potential control transistor T2, the driving transistor T3, the switching transistor T4, the first light-emitting control transistor T5, the second light-emitting control transistor T6, the first reset transistor T7, and the storage capacitor Cst can be referred to the connection relationship and working principle of the corresponding transistors and capacitors in the pixel circuit in related technologies, and will not be repeated here.
[0053] The aforementioned thin-film transistors can be classified into N-type and P-type according to their characteristics. In this embodiment, the second reset transistor T1 and the potential control transistor T2 are N-type transistors, while the second reset transistor T1, the driving transistor T3, the switching transistor T4, the first light-emitting control transistor T5, and the second light-emitting control transistor T6 are P-type transistors. When a P-type transistor is used, the first electrode is the source of the P-type transistor, and the second electrode is the drain of the P-type transistor. When the gate input is low, the source and drain are turned on. When an N-type transistor is used, the first electrode is the source of the N-type transistor, and the second electrode is the drain of the N-type transistor. When the gate input is high, the source and drain are turned on.
[0054] like Figure 3 As shown, the display panel also includes an electronic shielding layer 30; the electronic shielding layer 30 is disposed on the side of at least one of the plurality of thin film transistors near the substrate 10, and the orthographic projection of the channel region of the active layer of the thin film transistor on the substrate 10 at least partially overlaps with the orthographic projection of the electronic shielding layer 30 on the substrate 10.
[0055] Here, the electron shielding layer 30 can be a metal layer used to shield electrons. For example, the electron shielding layer 30 can be disposed on the side of a thin-film transistor in the pixel driving circuit 21 near the substrate 10, and overlaps with the orthographic projection of the thin-film transistor's channel onto the substrate 10. The electron shielding layer 30 can shield electrical signals. Applying voltage to the electron shielding layer 30 can neutralize charged impurity ions in the thin-film transistor channel, thus allowing the thin-film transistor to be normally powered. This improves the stability of the thin-film transistor's characteristics, thereby reducing display ghosting caused by defects in the thin-film transistor material itself, and further ensuring the consistency of display quality under extreme operating conditions, especially in high-temperature and high-humidity environments.
[0056] In some embodiments, Figure 5 This is a schematic diagram illustrating the film relationship between the electronic shielding layer and the driving transistor provided in an embodiment of this disclosure, as shown below. Figure 5 As shown, the thin-film transistor includes a driving transistor T3, which is configured to drive the light-emitting device 22 to emit light. 41 represents the active layer of the driving transistor T3, 42 represents the gate of the driving transistor T3, 43 represents the first electrode of the driving transistor T3, and 44 represents the second electrode of the driving transistor T3. A gate insulating layer 45 is disposed between the active layer 41 and the gate 42 of the driving transistor T3. A first insulating layer 46 is disposed between the gate 42 and the first electrode 43 and the second electrode 44 of the driving transistor T3. An electron shielding layer 30 is disposed on the side of the driving transistor T3 closest to the substrate 10, and the orthographic projection of the channel region of the active layer 41 of the driving transistor T3 onto the substrate 10 at least partially overlaps with the orthographic projection of the electron shielding layer 30 onto the substrate 10. Figure 6A schematic diagram of the PBTS characteristic curve of the driving transistor provided in this embodiment of the present disclosure when the orthographic projection of the channel region of the active layer of the driving transistor on the substrate at least partially overlaps with the orthographic projection of the electron shielding layer on the substrate is shown below. Figure 6 As shown, with Figure 1 In contrast, this embodiment utilizes the electron shielding layer 30 to conduct away defects in the channel region of the driving transistor T3, thereby stabilizing the PBTS characteristic curve of the driving transistor T3. Specifically, the electron shielding layer 30 can neutralize charged impurity ions in the active layer 41 channel of the driving transistor T3, improving the increase in driving current Id caused by defects, thus optimizing the current stability of the driving transistor T3, improving the PBTS offset of the driving transistor T3, and further ensuring the consistency of display quality of the display product in high temperature and high humidity environments.
[0057] In some embodiments, such as Figure 5 As shown, the display panel also includes a barrier layer 51, which is disposed on the side of the electron shielding layer 30 near the active layer 41 of the driving transistor T3. The barrier layer 51 can prevent defects in the electron shielding layer 30 from entering the pixel driving circuit 21. Here, "defects" can be understood as electrons and holes in the electron shielding layer 30.
[0058] In some embodiments, such as Figure 5 As shown, the display panel also includes a buffer layer 52, which can buffer external forces.
[0059] In some embodiments, the thin-film transistor includes a switching transistor T4, and an electron shielding layer 30 is disposed on the side of the switching transistor T4 near the substrate 10. The orthographic projection of the channel region of the active layer of the switching transistor T4 onto the substrate 10 at least partially overlaps with the orthographic projection of the electron shielding layer 30 onto the substrate 10. Here, the electron shielding layer 30 can neutralize charged impurity ions in the active layer channel of the switching transistor T4, thereby optimizing the leakage current ratio of the switching transistor.
[0060] For other thin-film transistors, namely the second reset transistor T1, the potential control transistor T2, the first light-emitting control transistor T5, the second light-emitting control transistor T6, and the first reset transistor T7, an electron shielding layer 30 can be provided at the projection position of the channel region of any one of the thin-film transistors to neutralize impurities and defects in the active layer channel, thereby improving the stability of the thin-film transistor characteristics.
[0061] In some embodiments, the display panel further includes a first power signal line VDD, and the plurality of thin-film transistors further include at least one light-emitting control transistor, wherein the first electrode of one of the light-emitting control transistors is electrically connected to the first power signal line; the electronic shielding layer 30 is electrically connected to the first power signal line VDD through a connection via. This connection via penetrates the interlayer dielectric layer (ILD) between the electronic shielding layer 30 and the first power signal line VDD.
[0062] like Figure 4 As shown, the pixel driving circuit 21 includes two light-emitting control transistors, denoted as the first light-emitting control transistor T5 and the second light-emitting control transistor T6. Taking the first light-emitting control transistor T5 as an example, the first terminal of the first light-emitting control transistor T5 is electrically connected to the first power signal line VDD. The electronic shielding layer 30 can be electrically connected to the first power signal line VDD through a connecting via. The first power signal line VDD is configured to apply a positive voltage to the electronic shielding layer 30, so that the electronic shielding layer 30 neutralizes the charged impurity ions in the corresponding thin-film transistor (TFT) channel, thereby improving the stability of the corresponding TFT characteristics.
[0063] For example, if the orthographic projection of the electronic shielding layer 30 at least partially overlaps with the channel region of the driving transistor T3, then applying a positive voltage to the electronic shielding layer 30 through the first power signal line VDD can neutralize the channel defects of the driving transistor T3, minimize or even avoid PBTS offset of the driving transistor, thereby improving the display defects caused by PBTS offset.
[0064] In some embodiments, such as Figure 4 As shown, the display panel also includes a first initialization signal line Vinit1; the multiple thin-film transistors also include a first reset transistor T7, the first terminal of the first reset transistor T7 being electrically connected to the first initialization signal line Vinit1, and the second terminal of the first reset transistor T7 being electrically connected to the first terminal of the light-emitting device 22; the electronic shielding layer 30 can be electrically connected to the first initialization signal line Vinit1 through a connection via. This connection via penetrates the interlayer dielectric layer (ILD) between the electronic shielding layer 30 and the first initialization signal line Vinit1. The first initialization signal line Vinit1 is configured to apply a negative voltage to the electronic shielding layer 30, so that the electronic shielding layer 30 neutralizes charged impurity ions in the corresponding thin-film transistor (TFT) channel, thereby improving the stability of the corresponding TFT characteristics.
[0065] For example, if the orthogonal projection of the electronic shielding layer 30 and the channel region of the driving transistor T3 at least partially overlaps, then applying a negative voltage to the electronic shielding layer 30 through the first initialization signal line Vinit1 can neutralize the channel defects of the driving transistor T3, minimize or even avoid PBTS offset of the driving transistor, thereby improving the display defects caused by PBTS offset.
[0066] Of course, the display panel may also include a separate third power signal line, which is directly electrically connected to the electronic shielding layer 30. This third power signal line can be loaded with either a positive or negative voltage. However, in order to reduce wiring complexity, the embodiments of this disclosure make reasonable use of the internal structure of the pixel driving circuit 21. Preferably, the electronic shielding layer 30 is electrically connected to the first power signal line VDD or to the first initialization signal line Vinit1, which can minimize the increase in the size of the display panel caused by adding the electronic shielding layer 30.
[0067] In some embodiments, the plurality of pixel units 20 includes a red pixel unit 20, a green pixel unit 20, and a blue pixel unit 20. The red pixel unit 20 includes a red light-emitting device 22 and a pixel driving circuit 21 electrically connected thereto. The green pixel unit 20 includes a green light-emitting device 22 and a pixel driving circuit 21 electrically connected thereto. The blue pixel unit 20 includes a blue light-emitting device 22 and a pixel driving circuit 21 electrically connected thereto.
[0068] The multiple light-emitting devices 22 include a red light-emitting device 22, a green light-emitting device 22, and a blue light-emitting device 22. The aspect ratios of the driving transistors T3 corresponding to the different light-emitting devices 22 are different. Specifically, the aspect ratios of the driving transistors T3 in the pixel driving circuit 21 electrically connected to the red light-emitting device 22, the green light-emitting device 22, and the blue light-emitting device 22 are all different.
[0069] In this embodiment, the aspect ratio of the driving transistor T3 corresponding to different light-emitting devices 22 can be set according to the photoelectric characteristics of each light-emitting device 22 and the PBTS characteristics of the driving transistor T3. Here, the photoelectric characteristics of the light-emitting device 22 include, for example, current density-efficiency characteristics and voltage-capacitance characteristics. It should be noted that when the material of the light-emitting device 22 is determined, its photoelectric characteristics are fixed. Similarly, when the material and dimensions of the driving transistor T3 are determined, its PBTS characteristics are fixed. For example, given the photoelectric characteristics of the red light-emitting device 22 and the PBTS characteristics of its driving transistor T3, the aspect ratio of the driving transistor T3 can be set to simultaneously satisfy both the photoelectric characteristic requirements of the red light-emitting device 22 and the PBTS characteristic stability requirements of the driving transistor T3.
[0070] The design method of the width-to-length ratio of the driving transistor T3 corresponding to the green light-emitting device 22 and the blue light-emitting device 22 is the same as that of the driving transistor T3 corresponding to the red light-emitting device 22. The repeated parts will not be described again.
[0071] The above-mentioned display problems caused by the driving transistor T3 in extreme environments such as high temperature and high humidity are balanced by differentiating the width-to-length ratio W / L of the driving transistor T3 for the red light-emitting device 22, the green light-emitting device 22 and the blue light-emitting device 22.
[0072] In some embodiments, the aspect ratio of the driving transistor T3 is in the range of 1:30 to 1:1.
[0073] In some embodiments, the plurality of thin-film transistors include a first reset transistor T7; the first electrode of the light-emitting device 22 is electrically connected to the second electrode of the first reset transistor T7. The first electrode of the light-emitting device 22 is the anode of the light-emitting device 22.
[0074] The plurality of light-emitting devices 22 include a red light-emitting device 22, a green light-emitting device 22, and a blue light-emitting device 22; wherein, the first overlapping area of the orthogonal projection of the first electrode of the green light-emitting device 22 and the second electrode of the corresponding first reset transistor T7 on the substrate 10 is greater than the second overlapping area of the orthogonal projection of the first electrode of the red light-emitting device 22 and the second electrode of the corresponding first reset transistor T7 on the substrate 10. The first overlapping area of the orthogonal projection of the first electrode of the green light-emitting device 22 and the second electrode of the corresponding first reset transistor T7 on the substrate 10 is greater than the third overlapping area of the orthogonal projection of the first electrode of the blue light-emitting device 22 and the second electrode of the corresponding first reset transistor T7 on the substrate 10.
[0075] Specifically, the anodes of the light-emitting devices 22 of different colors and the second electrode of the corresponding first reset transistor T7 have orthographic overlap, resulting in a parasitic capacitance in the overlapping portion between the anode and the second electrode of the first reset transistor T7. Figure 4 The parasitic capacitance at point N4 in the pixel driving circuit 21 shown. The first overlapping area is larger than the second overlapping area; the first overlapping area is larger than the third overlapping area. The degree of difference between the overlapping areas corresponding to the red light-emitting device 22, the green light-emitting device 22, and the blue light-emitting device 22 is matched with the optical characteristics of their respective light-emitting devices 22, and the final set overlapping area needs to meet the requirements of the optical characteristics of their respective light-emitting devices 22.
[0076] As described above, given the known material properties of each light-emitting device 22 and the characteristics of the driving transistor T3, the parasitic capacitance at point N4 of the green light-emitting device 22 is increased compared to the parasitic capacitance at point N4 of the red light-emitting device 22 and the blue light-emitting device 22. This increases the current in the driving current Id used to turn on the green light-emitting device 22, reduces the current used for emitting light from the green light-emitting device 22, lowers the proportion of emitting current in the driving current Id, and improves the greenish tint of the display. It should be noted that the driving current Id = the turn-on current of the light-emitting device 22 + the emitting current of the light-emitting device 22.
[0077] In some embodiments, the parasitic capacitance at point N4 can be increased by increasing the thickness of the insulating layer between the first electrode of the light-emitting device 22 and the second electrode of the first reset transistor T7.
[0078] Specifically, the display panel further includes an insulating layer; multiple thin-film transistors include a first reset transistor T7; the insulating layer is disposed between the first electrode of multiple light-emitting devices 22 and the second electrode of the first reset transistor T7, and the overlapping area of the first electrode of the light-emitting device 22 and the second electrode of the first reset transistor T7 is a first region; the thickness of the insulating layer at least at the position corresponding to the first region is between 1.2 μm and 4 μm. Here, the insulating layer can be a planarization layer PLN.
[0079] In one scenario, the thickness of the entire insulating layer can be set to be uniform, ranging from 1.2 μm to 4 μm. This configuration facilitates the fabrication process. In another scenario, the thickness of a portion of the insulating layer can be set to be between 1.2 μm and 4 μm. Here, "partial thickness" refers to, for example, the thickness of the insulating layer corresponding to the location in the first region. This configuration saves space occupied by the remaining portion of the insulating layer compared to setting the thickness of the entire layer.
[0080] Here, the thickness of the insulating layer is set between 1.2μm and 4μm. For light-emitting devices 22 of different colors, compared with the parasitic capacitance at point N4 of the red light-emitting device 22 and the parasitic capacitance at point N4 of the blue light-emitting device 22, increasing the parasitic capacitance at point N4 of the green light-emitting device 22 can improve the greenish tint of the display effect. For example, the parasitic capacitance at point N4 of the green light-emitting device 22 can be increased by increasing the thickness of the insulating layer corresponding to the green light-emitting device 22. In this case, the thickness of the insulating layer corresponding to the green light-emitting device 22 is greater than that corresponding to the red light-emitting device 22, and the thickness of the insulating layer corresponding to the green light-emitting device 22 is greater than that corresponding to the blue light-emitting device 22. Compared with the prior art, this embodiment increases the parasitic capacitance at point N4 by increasing the thickness of the insulating layer corresponding to the green light-emitting device 22, thereby increasing the current in the driving current Id used to turn on the green light-emitting device 22, reducing the current used for emitting light from the green light-emitting device 22, reducing the proportion of the emitting current in the driving current Id, and improving the greenish tint of the display effect.
[0081] In some embodiments, the plurality of light-emitting devices 22 include a red light-emitting device 22, a green light-emitting device 22 and a blue light-emitting device 22; wherein the green light-emitting material in the green light-emitting device 22 includes at least an iridium-based material.
[0082] The multiple pixel units 20 include red pixel units 20, green pixel units 20, and blue pixel units 20. The red pixel unit 20 is also known as the red sub-pixel R, the green pixel unit 20 is also known as the green sub-pixel G, and the blue pixel unit 20 is also known as the blue sub-pixel B. It should be noted that the capacitance C of the sub-pixel is equal to the capacitance C of the light-emitting device 22. OLED +N4 point parasitic capacitance C N4 For example, the capacitance C of the green sub-pixel G. G = Capacitance C of green light-emitting device 22 OLED_G + Parasitic capacitance C at point N4 of green light-emitting device 22 N4_G It should be noted that the capacitance C of the blue sub-pixel B... B The capacitance C is greater than that of the green sub-pixel G. G The capacitance C of the green sub-pixel G G Capacitance C greater than that of the red sub-pixel R R .
[0083] To reduce the driving current Id of the green light-emitting device 22 and increase the charging current, the capacitance C of the green sub-pixel G should be increased. G The parasitic capacitance C at point N4 of the green light-emitting device 22 N4_G In a fixed case, the capacitance C of the green light-emitting device 22 can be increased. OLED_G This increases the capacitance C of the green sub-pixel G.G .
[0084] In this embodiment, the green light-emitting material in the green light-emitting device 22 includes at least an iridium-based material. It should be noted that iridium-based materials are materials with a large capacitance; therefore, using an iridium-based material as the green light-emitting material increases the capacitance C of the green sub-pixel G. G This reduces the driving current Id of the green light-emitting device 22, thus improving the greenish tint of the display.
[0085] In some embodiments, the plurality of light-emitting devices 22 include a red light-emitting device 22, a green light-emitting device 22, and a blue light-emitting device 22; wherein the materials of the electron transport layer and the hole transport layer in the green light-emitting device 22 include at least aromatic amine materials.
[0086] In this embodiment, the electron transport layer and hole transport layer of the green light-emitting device 22 are made of at least aromatic amine materials. It should be noted that aromatic amine materials are materials with large capacitance. Therefore, using aromatic amine materials as the electron transport layer and hole transport layer in the green light-emitting device 22 increases the capacitance C of the green sub-pixel G. G This reduces the driving current Id of the green light-emitting device 22, thus improving the greenish tint of the display.
[0087] In some embodiments, the plurality of light-emitting devices 22 include a red light-emitting device 22, a green light-emitting device 22, and a blue light-emitting device 22; wherein the opening ratio of the pixel definition layer in the green light-emitting device 22 is between 2% and 40%. Specifically, when the materials of the red light-emitting device 22, the green light-emitting device 22, and the blue light-emitting device 22 are all the same, by increasing the pixel opening ratio in the green light-emitting device 22, for example by increasing the opening area of the pixel definition layer in the green light-emitting device 22, so that the opening ratio of the pixel definition layer in the green light-emitting device 22 is between 2% and 40%, the capacitance C of the green sub-pixel G is increased. G The purpose is to reduce the driving current Id of the green light-emitting device 22 and improve the greenish tint of the display.
[0088] The above is a complete description of the display panel provided in the embodiments of this disclosure.
[0089] This disclosure also provides a display device comprising the display panel described in any of the above embodiments. The display device provided in this disclosure has significant advantages for use in products with small to medium-sized display panels, such as mobile phones, tablets, automotive devices, and wearable devices. Because the display device includes a panel, it can achieve the same effects as the aforementioned display panels. For example, by improving the stability of the driving transistor T3 characteristics, differentiating the aspect ratio (W / L) of the driving transistors T3 for R, G, and B sub-pixels, and optimizing the parasitic capacitance of the N4 points of R, G, and B sub-pixels, the display device can ensure consistent image quality under extreme operating conditions, especially in high-temperature and high-humidity environments.
[0090] It is understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of this disclosure, and this disclosure is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this disclosure, and these modifications and improvements are also considered to be within the scope of protection of this disclosure.
Claims
1. A display panel, comprising a substrate and a plurality of pixel units disposed on the substrate; The pixel unit includes a pixel driving circuit and a light-emitting device electrically connected to the pixel driving circuit; The pixel driving circuit includes multiple thin-film transistors; wherein... The display panel further includes an electronic shielding layer; the electronic shielding layer is disposed on the side of at least one of the plurality of thin film transistors near the substrate, and the orthographic projection of the channel region of the active layer of the thin film transistor on the substrate at least partially overlaps with the orthographic projection of the electronic shielding layer on the substrate. The plurality of thin-film transistors includes a first reset transistor; the first electrode of the light-emitting device is electrically connected to the second electrode of the first reset transistor; The plurality of light-emitting devices include red light-emitting devices, green light-emitting devices, and blue light-emitting devices; The first overlapping area of the orthographic projection of the first electrode of the green light-emitting device and the second electrode of the corresponding first reset transistor on the substrate is greater than the second overlapping area of the orthographic projection of the first electrode of the red light-emitting device and the second electrode of the corresponding first reset transistor on the substrate; the first overlapping area of the orthographic projection of the first electrode of the green light-emitting device and the second electrode of the corresponding first reset transistor on the substrate is greater than the third overlapping area of the orthographic projection of the first electrode of the blue light-emitting device and the second electrode of the corresponding first reset transistor on the substrate. The plurality of light-emitting devices include red light-emitting devices, green light-emitting devices and blue light-emitting devices; wherein, the materials of the electron transport layer and hole transport layer in the green light-emitting device include at least aromatic amine materials.
2. The display panel according to claim 1, wherein, The plurality of thin-film transistors include driving transistors; the driving transistors are configured to drive the light-emitting device to emit light; the orthographic projection of the channel region of the active layer of the driving transistor on the substrate at least partially overlaps with the orthographic projection of the electron shielding layer on the substrate.
3. The display panel according to claim 1 or 2, wherein, The display panel further includes a first power signal line; the plurality of thin-film transistors further include at least one light-emitting control transistor, wherein the first electrode of one of the light-emitting control transistors is electrically connected to the first power signal line. The electronic shielding layer is electrically connected to the first power signal line through a connection via.
4. The display panel according to claim 1 or 2, wherein, The display panel further includes a first initialization signal line; the plurality of thin-film transistors further include a first reset transistor, the first terminal of the first reset transistor being electrically connected to the first initialization signal line, and the second terminal of the first reset transistor being electrically connected to the first terminal of the light-emitting device. The electronic shielding layer is electrically connected to the first initialization signal line via a connection via.
5. The display panel according to claim 2, wherein, The plurality of light-emitting devices include red light-emitting devices, green light-emitting devices, and blue light-emitting devices; The aspect ratios of the driving transistors in the pixel driving circuit electrically connected to the red light-emitting device, the pixel driving circuit electrically connected to the green light-emitting device, and the pixel driving circuit electrically connected to the blue light-emitting device are all different.
6. The display panel according to claim 5, wherein, The aspect ratio of the driving transistor is in the range of 1:30 to 1:
1.
7. The display panel according to claim 1, wherein, The display panel further includes an insulating layer; the plurality of thin-film transistors include a first reset transistor; The insulating layer is disposed between the first electrode of the plurality of light-emitting devices and the second electrode of the first reset transistor, and the overlapping area of the first electrode of the light-emitting device and the second electrode of the first reset transistor is the first area; The thickness of the insulating layer at least at the location corresponding to the first region is between 1.2 μm and 4 μm.
8. The display panel according to claim 1, wherein, The plurality of light-emitting devices include red light-emitting devices, green light-emitting devices and blue light-emitting devices; wherein, the green light-emitting material in the green light-emitting device includes at least iridium-based materials.
9. The display panel according to claim 1, wherein, The plurality of light-emitting devices include red light-emitting devices, green light-emitting devices and blue light-emitting devices; wherein the opening ratio of the pixel definition layer in the green light-emitting device is between 2% and 40%.
10. A display device comprising a display panel as described in any one of claims 1 to 9.
Citation Information
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