A low-dropout linear regulator based on fast response to load changes

Abstract

This invention relates to the field of low-dropout linear regulators, providing a low-dropout linear regulator based on rapid response to load changes. The regulator includes a main control circuit, a current bleeder circuit, and a current compensation circuit. The main control circuit includes an amplifier, a first MOSFET, a first resistor, and a second resistor. The source of the first MOSFET is the output terminal of the main control circuit, used to output a stable voltage. The current bleeder circuit is connected to the main control circuit and is used to adjust the voltage at the output terminal of the main control circuit when the load current decreases or when there is reverse current. The current compensation circuit is connected to the main control circuit and is used to adjust the gate voltage of the first MOSFET when the load current increases. This invention achieves stable output voltage by combining the current bleeder circuit, the current compensation circuit, and the main control circuit.

Description

Technical Field

[0001] This invention relates to the field of low-dropout linear regulators, and more particularly to a low-dropout linear regulator based on fast response to load changes. Background Technology

[0002] Low dropout regulators (LDOs) have become an important type of circuit in power management chips due to their advantages such as low output noise, simple circuit structure, small chip area, and low voltage ripple. However, traditional LDO circuits are prone to transient overvoltages or undervoltages during load adjustments and sudden load changes, which can easily lead to overvoltage damage to internal components or undervoltage causing circuit failure. Currently, voltage loop feedback compensation or external high-Q capacitors are commonly used. However, voltage loop compensation has a certain delay and long response time, making it difficult to quickly and efficiently stabilize the output voltage. External high-Q capacitors are relatively expensive and difficult to design. Summary of the Invention

[0003] In view of this, embodiments of the present invention provide a low-dropout linear regulator based on fast response to load changes, so as to improve the speed of response to load changes and reduce design costs.

[0004] This invention provides a low-dropout linear regulator based on fast response to load changes, comprising: a main control circuit, a current discharge circuit, and a current compensation circuit. The main control circuit includes an amplifier, a first MOSFET, a first resistor, and a second resistor. The source of the first MOSFET is the output terminal of the main control circuit, used to output a stable voltage.

[0005] The current discharge circuit is connected to the main control circuit and is used to adjust the voltage at the output terminal of the main control circuit when the load current decreases or the current flows back.

[0006] The current compensation circuit is connected to the main control circuit and is used to adjust the gate voltage of the first MOS transistor when the load current increases.

[0007] In one embodiment, the main control circuit includes a first capacitor and a second capacitor. One end of the first capacitor is grounded, and the other end of the first capacitor is connected to the output terminal of the amplifier and the gate of the first MOS transistor, respectively. One end of the second capacitor is connected to the output terminal of the main control circuit, and the other end of the second capacitor is connected to the inverting input terminal of the amplifier.

[0008] In one embodiment, the current compensation circuit includes a compensation current sampling circuit, which samples the change in the load current and feeds it back to the gate of the first MOS transistor.

[0009] In one embodiment, the compensation current sampling circuit includes: a second MOSFET, a current mirror, a third capacitor, and a third resistor; the gate of the second MOSFET is connected to the main control circuit, the source of the second MOSFET is connected to the current discharge circuit, the drain of the second MOSFET is connected to the current mirror, the current mirror and the drain of the first MOSFET are both connected to the power supply voltage, one end of the third capacitor is connected to the third resistor, and the other end of the third capacitor is connected to the output terminal of the amplifier.

[0010] In one embodiment, the current mirror includes a third MOSFET and a fourth MOSFET. The gate of the third MOSFET is connected to the gate of the fourth MOSFET, the drain of the fourth MOSFET is connected to the drain of the third MOSFET, the source of the third MOSFET is connected to the drain of the second MOSFET, and the source of the fourth MOSFET is grounded through the third resistor. In another embodiment, the current compensation circuit includes a fifth MOSFET, a discharge current sampling circuit, and a low-pass filter circuit. The drain of the fifth MOSFET is connected to the drain of the first MOSFET, the source of the fifth MOSFET is grounded, the gate of the fifth MOSFET is connected to the input terminal of the low-pass filter circuit through the discharge current sampling circuit, and the output terminal of the low-pass filter circuit serves as the output terminal of the current discharge circuit.

[0011] In one embodiment, the discharge current sampling circuit includes a voltage stabilization subunit and a sampling subunit. The voltage stabilization subunit includes a sixth MOS transistor, a fourth capacitor, a fourth resistor, a sixth resistor, and a seventh resistor. The drain of the sixth MOS transistor is connected to the main control circuit, the source of the sixth MOS transistor is connected to the sampling subunit, the gate of the sixth MOS transistor is connected to one end of the fourth resistor through the fourth resistor, the other end of the sixth resistor is connected to the sampling subunit, and the other end of the sixth resistor is also grounded through the seventh resistor. One end of the fourth capacitor is connected between the fourth resistor and the sixth MOS transistor, and the other end of the fourth capacitor is grounded.

[0012] In one embodiment, the sampling sub-unit includes a seventh MOS transistor and an eighth MOS transistor. The source of the seventh MOS transistor is grounded, the drain of the seventh MOS transistor is connected to the voltage stabilization sub-unit, the drain of the seventh MOS transistor is also connected to the gate of the seventh MOS transistor, the gate of the seventh MOS transistor is connected to the gate of the eighth MOS transistor, the source of the eighth MOS transistor is grounded, and the drain of the eighth MOS transistor is connected to the voltage stabilization sub-unit.

[0013] In one embodiment, a ninth MOS transistor is disposed between the discharge current sampling circuit and the low-pass filter circuit. The source of the ninth MOS transistor is connected to the discharge current sampling circuit, the drain of the ninth MOS transistor is connected to the low-pass filter circuit, and the gate of the ninth MOS transistor is grounded.

[0014] In one embodiment, the low-pass filter circuit includes a fifth capacitor and a fifth resistor. One end of the fifth capacitor is connected to the fifth resistor and the discharge current sampling circuit, respectively. The other end of the fifth capacitor is grounded, and the other end of the fifth resistor serves as the output terminal of the low-pass filter circuit.

[0015] This invention provides a low-dropout linear regulator based on rapid load change response, comprising a main control circuit, a current bleeder circuit, and a current compensation circuit. The main control circuit includes an amplifier, a first MOSFET, a first resistor, and a second resistor. The source of the first MOSFET is the output terminal of the main control circuit, used to output a stable voltage. The current bleeder circuit is connected to the main control circuit and is used to adjust the voltage at the output terminal of the main control circuit when the load current decreases or when there is reverse current. The current compensation circuit is connected to the main control circuit and is used to adjust the gate voltage of the first MOSFET when the load current increases. Compared with the prior art, this invention, through the combined effect of the current bleeder circuit, the current compensation circuit, and the main control circuit, ensures the stability of the output voltage when the load changes rapidly, achieving the technical effect of improving the speed of response to load changes while simplifying the circuit and reducing costs. Attached Figure Description

[0016] To more clearly illustrate the technical solution of the present invention, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope of protection of the present invention. In the various drawings, similar components are numbered similarly.

[0017] Figure 1 The diagram shows a circuit diagram of a low-dropout linear regulator based on fast response to load changes provided by an embodiment of the present invention;

[0018] Figure 2 The diagram illustrates the working principle of a low-dropout linear regulator based on fast response to load changes, according to an embodiment of the present invention.

[0019] Explanation of key component symbols:

[0020] 100 - Main control circuit; 200 - Current discharge circuit; 300 - Current compensation circuit; I1 - Amplifier; M1 - First MOSFET; R1 - First resistor; R2 - Second resistor; C1 - First capacitor; C2 - Second capacitor; M2 - Second MOSFET; M3 - Third MOSFET; M4 - Fourth MOSFET; C3 - Third capacitor; R3 - Third resistor; M5 - Fifth MOSFET; M6 - Sixth MOSFET; C4 - Fourth capacitor; R4 - Fourth resistor; R6 - Sixth resistor; R7 - Seventh resistor; M7 - Seventh MOSFET; M8 - Eighth MOSFET; M9 - Ninth MOSFET; C5 - Fifth capacitor; R5 - Fifth resistor. Detailed Implementation

[0021] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0022] The components of the embodiments of the invention described and illustrated herein can typically be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0023] In the following, the terms “comprising,” “having,” and their cognates, which may be used in various embodiments of the invention, are intended only to indicate a particular feature, number, step, operation, element, component, or combination thereof, and should not be construed as excluding, firstly, the presence of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, or adding the possibility of one or more features, numbers, steps, operations, elements, components, or combinations thereof.

[0024] Furthermore, the terms "first," "second," and "third" are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0025] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the various embodiments of the invention pertain. Terms (such as those defined in commonly used dictionaries) shall be interpreted as having the same meaning as in their contextual meaning in the relevant technical field and shall not be interpreted as having an idealized or overly formal meaning, unless clearly defined in the various embodiments of the invention.

[0026] Example 1

[0027] Please refer to Figure 1 , Figure 1 This invention provides a low-dropout linear regulator based on fast response to load changes. Specifically, the low-dropout linear regulator includes a main control circuit 100, a current discharge circuit 200, and a current compensation circuit 300. The main control circuit 100 includes an amplifier I1, a first MOSFET M1, a first resistor R1, and a second resistor R2. Specifically, the source of the first MOSFET M1 is the output terminal of the main control circuit 100, used to output a stable voltage. The current discharge circuit 200 is connected to the main control circuit 100 and is used to adjust the voltage at the output terminal of the main control circuit 100 when the load current decreases or when there is reverse current. The current compensation circuit 300 is connected to the main control circuit 100 and is used to adjust the gate voltage of the first MOSFET M1 when the load current increases.

[0028] In this circuit, the non-inverting input of amplifier I1 in the main control circuit 100 is used to input a reference voltage. The output of amplifier I1 is connected to the gate of the first MOSFET M1. The drain of the first MOSFET M1 is connected to the current compensation circuit 300. The source of the first MOSFET M1 is connected to one end of the second resistor R2. The other end of the second resistor R2 is connected to one end of the first resistor R1. The other end of the first resistor R1 is grounded. The current discharge circuit 200 is connected to the source of the first MOSFET M1 and one end of the second resistor R2. The output of the current discharge circuit 200 serves as the output of the low dropout linear regulator.

[0029] It is understood that the main control circuit 100 is connected to the current discharge circuit 200 to respond to the situation where the load current decreases. Specifically, the main control circuit 100 can be combined with the current discharge circuit 200 to quickly respond to the situation where the load current suddenly decreases or reverse flow occurs, causing the output voltage to surge, thereby making the output voltage of the low dropout linear regulator tend to stabilize.

[0030] The main control circuit 100 is also connected to the current compensation circuit 300 to respond to the situation where the load current increases. When the load current suddenly increases and causes the output voltage to drop, the main control circuit 100 can work with the current compensation circuit 300 to make the output voltage of the low dropout linear regulator tend to stabilize.

[0031] Therefore, in this embodiment, the current discharge circuit 200 and the current compensation circuit 300 can be adjusted in conjunction with the main control circuit 100 to address different changes in the load current.

[0032] Specifically, the non-inverting input of amplifier I1 is used to input a reference voltage VR0, which can be a preset fixed voltage value. The inverting input of amplifier I1 is connected to one end of the first resistor R1. The negative power supply terminal of amplifier I1 is grounded, and the positive power supply terminal of amplifier I1 is connected to the drain of the first MOSFET M1. Both the first resistor R1 and the second resistor R2 serve as voltage dividers. Amplifier I1 mainly functions as a control loop negative feedback. The first MOSFET M1 can be an NMOS (Negative Channel-Metal-Oxide-Semiconductor) transistor or a Native MOSFET, i.e., a power dissipation transistor. By stabilizing the gate voltage V0 of the first MOSFET M1, when the output voltage increases or decreases, the current increases or decreases accordingly through the source negative feedback of the first MOSFET M1.

[0033] In one embodiment, the main control circuit 100 includes a first capacitor and a second capacitor C2. One end of the first capacitor is grounded, and the other end of the first capacitor is connected to the output terminal of the amplifier I1 and the gate of the first MOS transistor M1, respectively. One end of the second capacitor C2 is connected to the output terminal of the main control circuit 100, and the other end of the second capacitor C2 is connected to the inverting input terminal of the amplifier I1.

[0034] Specifically, one end of the first capacitor is connected to the current compensation circuit 300, one end of the second capacitor C2 is connected to the current discharge circuit and one end of the second resistor R2, and the other end of the second capacitor C2 is connected to the first resistor R1 and the second resistor R2, and the second capacitor C2 and the second resistor R2 are connected in parallel. By setting the first capacitor, the gate voltage V0 of the first MOSFET M1 can be stabilized better, and the first capacitor also plays a filtering role. At the same time, by setting the second capacitor C2, the feedback speed of transient load changes can be improved, thereby reducing the response time of load adjustment to a certain extent. This makes it more suitable for some specific applications where the load change range is large and the occurrence time is short, such as in switching, mode switching, and digital isolators.

[0035] In one embodiment, the current compensation circuit 300 includes a compensation current sampling circuit, which samples the change in the load current and feeds it back to the gate of the current compensation transistor.

[0036] Specifically, both the current compensation circuit 300 and the main control circuit 100 use the first MOSFET M1. Therefore, in the current compensation circuit 300, the first MOSFET M1 is used as the current compensation transistor to compensate the load current. Furthermore, the drain of the current compensation transistor is connected to one end of the compensation current sampling circuit, and the other end of the compensation current sampling circuit is connected to the gate of the current compensation transistor.

[0037] Furthermore, the compensation current sampling circuit can not only sample the load current, but also generate a corresponding voltage V3 based on the load current. Therefore, when the load current suddenly increases, the output voltage will suddenly drop, thereby compensating for the transient current drawn by the Miller capacitance of the first MOS transistor M1 through the compensation current sampling circuit, so that the gate voltage V0 of the first MOS transistor M1 is stabilized and raised, thereby realizing the rapid compensation of transient current by the first MOS transistor M1.

[0038] In one embodiment, the compensation current sampling circuit includes: a second MOSFET M2, a current mirror, a third capacitor C3, and a third resistor R3; the gate of the second MOSFET M2 is connected to the main control circuit 100, the source of the second MOSFET M2 is connected to the current discharge circuit 200, the drain of the second MOSFET M2 is connected to the current mirror, and the current mirror and the drain of the first MOSFET M1 are both connected to the power supply voltage VCC, wherein the power supply voltage VCC is typically set to 5V, one end of the third capacitor C3 is connected between the third resistor R3 and the fourth MOSFET M4, and the other end of the third capacitor C3 is connected to the output terminal of the amplifier I1.

[0039] Specifically, the current mirror can typically be implemented using two MOSFETs. In one embodiment, the current mirror includes a third MOSFET M3 and a fourth MOSFET M4. The gate of the third MOSFET M3 is connected to the gate of the fourth MOSFET M4, the drain of the fourth MOSFET M4 is connected to the drain of the third MOSFET M3, the source of the third MOSFET M3 is connected to the drain of the second MOSFET M2, and the source of the fourth MOSFET M4 is grounded through the third resistor R3.

[0040] Specifically, the gate of the third MOS transistor M3 is also connected to the source of the third MOS transistor M3. Exemplarily, the second MOS transistor M2 can be an NMOS transistor, and the third MOS transistor M3 and the fourth MOS transistor M4 can be PMOS (positive-channel metal-oxide-semiconductor) transistors. The second MOS transistor M2, the third MOS transistor M3, and the fourth MOS transistor M4 can sample the load current, and the third resistor R3 can generate a voltage V3 corresponding to the load current. Furthermore, the third capacitor C3 can compensate for the transient current drawn by the Miller capacitance of the first MOS transistor M1, thereby stabilizing and raising the gate voltage V0 of the first MOS transistor M1, enabling the first MOS transistor M1 to quickly compensate for transient current. In addition, the third capacitor C3 in this embodiment also has the function of blocking DC and passing AC, i.e., it represents charging and discharging. If it is DC power, the third capacitor C3 stops charging when fully charged, at which point the third capacitor C3 is energized; while if it is AC power, the third capacitor C3 continuously charges and discharges, thereby completing the transmission of AC signals.

[0041] In one embodiment, the current discharge circuit 200 includes: a fifth MOSFET M5, a discharge current sampling circuit, and a low-pass filter circuit. The drain of the fifth MOSFET M5 is connected to the drain of the first MOSFET M1, the source of the fifth MOSFET M5 is grounded, the gate of the fifth MOSFET M5 is connected to the input terminal of the low-pass filter circuit through the discharge current sampling circuit, and the output terminal of the low-pass filter circuit serves as the output terminal of the current discharge circuit 200.

[0042] Specifically, the fifth MOSFET M5 can be a PMOS transistor. The fifth MOSFET M5 discharges the current from the first MOSFET M1. The discharge current sampling circuit is mainly used to sample the discharge current. The low-pass filter circuit is used to sample the average value of the output voltage and also has a filtering function. The low-pass filter circuit includes a fifth capacitor C5 and a fifth resistor R5. One end of the fifth capacitor C5 is connected to both the fifth resistor R5 and the discharge current sampling circuit, and the other end of the fifth capacitor C5 is grounded. The other end of the fifth resistor R5 serves as the output terminal of the low-pass filter circuit.

[0043] Furthermore, in one embodiment, the discharge current sampling circuit includes a stabilizing voltage subunit and a sampling subunit. The stabilizing voltage subunit is used to provide a stabilizing voltage as the DC operating point, and the sampling subunit is used to sample the compensated load current. The stabilizing voltage subunit includes a sixth MOSFET M6, a fourth capacitor C4, a fourth resistor R4, a sixth resistor R6, and a seventh resistor R7. The drain of the sixth MOSFET M6 is connected to the main control circuit 100, and the source of the sixth MOSFET M6 is connected to the sampling subunit. The gate of the sixth MOSFET M6 is connected to one end of the fourth resistor R4, and the other end of the sixth resistor R6 is connected to the sampling subunit. The other end of the sixth resistor R6 is also grounded through the seventh resistor R7. One end of the fourth capacitor C4 is connected between the fourth resistor R4 and the sixth MOSFET M6, and the other end of the fourth capacitor C4 is grounded.

[0044] The sixth MOSFET M6, the sixth resistor R6, and the seventh resistor R7 work together to generate a control voltage V1, which is slightly lower than the VSG voltage of the first MOSFET M1. The VSG voltage refers to the operating voltage from the gate to the source of the first MOSFET M1. After being filtered by the second resistor R2 and the second capacitor C2, the control voltage V1 generates a new voltage V2. Therefore, under normal load conditions, the first MOSFET M1 is in a state of near-conduction but not conduction. At this time, the current through the first MOSFET M1 is extremely small. Therefore, the new voltage V1 can be controlled by negative feedback through the discharge current sampling circuit, thereby ensuring that the current of the first MOSFET M1 is small and avoiding increased circuit power consumption by the first MOSFET M1.

[0045] When the load current suddenly decreases or the output voltage suddenly rises due to current backflow, if the average value of the output voltage sampled by the fifth capacitor C5 and the fifth resistor R5 in the low-pass filter circuit changes slowly, then the control voltage V1 and the new voltage V2 are in a relatively stable state. However, the rise in output voltage causes the first MOSFET M1 to conduct, resulting in a large discharge current. Therefore, the discharge current sampled by the discharge current sampling circuit will increase accordingly. At this time, the control voltage V1 and the new voltage V2 will also rise slowly. The main control circuit 100 gradually takes over and performs a transient response, gradually reducing the discharge current of the first MOSFET M1, and the output voltage gradually stabilizes to avoid output voltage oscillation.

[0046] Please refer to Figure 2When the load current IDD suddenly increases due to load adjustment and load change, one execution process in this embodiment is as follows: When the load current IDD suddenly increases, the output voltage VDD will be affected by the load current and will undershoot. At this time, the compensation current sampling circuit will generate a corresponding voltage V3 according to the load current. At this time, the voltage V3 will also increase with the sudden increase of the load current. Then, the transient current IC3 drawn by the Miller capacitance of the first MOS transistor M1 will be compensated through the third capacitor C3, so as to stabilize and raise the gate voltage V0 of the first MOS transistor M1, thereby realizing the rapid compensation of transient current by the first MOS transistor M1, and thus enabling the loop to reach a steady state.

[0047] In one embodiment, the sampling sub-unit includes a seventh MOSFET M7 and an eighth MOSFET M8. The source of the seventh MOSFET M7 is grounded, and its drain is connected to the voltage stabilization sub-unit. The drain of the seventh MOSFET M7 is also connected to its gate. The gate of the seventh MOSFET M7 is connected to the gate of the eighth MOSFET M8. The source of the eighth MOSFET M8 is grounded, and its drain is connected to the voltage stabilization sub-unit. Furthermore, a ninth MOSFET M9 is disposed between the discharge current sampling circuit and the low-pass filter circuit. The source of the ninth MOSFET M9 is connected to the discharge current sampling circuit, its drain is connected to the low-pass filter circuit, and its gate is grounded.

[0048] Specifically, the gate of the sixth MOSFET M6 is connected to the source of the ninth MOSFET M9 via the fourth resistor R4. The source of the ninth MOSFET M9 is also connected to the drain of the eighth MOSFET M8 via the sixth resistor R6. One end of the seventh resistor R7 is connected to the gate of the ninth MOSFET M9, and another end of the seventh resistor R7 is connected between the sixth resistor R6 and the drain of the eighth MOSFET M8 via a wire. Therefore, this embodiment can achieve sampling of the discharge current through the sixth MOSFET M6, the seventh MOSFET M7, and the eighth MOSFET M8, and can also achieve control of the new voltage V1 using negative feedback.

[0049] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that, as an alternative implementation, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and combinations of blocks in the block diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0050] In addition, the functional modules or units in the various embodiments of the present invention can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0051] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a smartphone, personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0052] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A low-dropout linear regulator based on fast response to load changes, characterized by, The application relates to a current control circuit, which comprises a main control circuit, a current leakage circuit and a current compensation circuit. The main control circuit comprises an amplifier, a first MOS tube, a first resistor and a second resistor; the source of the first MOS tube is the output end of the main control circuit and is used for outputting a stable voltage; The current leakage circuit is connected with the main control circuit and is used for adjusting the voltage of the output end of the main control circuit when the load current becomes small or current backflow occurs; The current compensation circuit is connected with the main control circuit and is used for adjusting the gate voltage of the first MOS tube when the load current becomes large; The current leakage circuit comprises a fifth MOS tube, a leakage current sampling circuit and a low-pass filter circuit; the drain of the fifth MOS tube is connected with the drain of the first MOS tube; the source of the fifth MOS tube is grounded; the gate of the fifth MOS tube is connected with the input end of the low-pass filter circuit through the leakage current sampling circuit; the output end of the low-pass filter circuit is the output end of the current leakage circuit; the leakage current sampling circuit comprises a stable voltage subunit and a sampling subunit; the sampling subunit further comprises a seventh MOS tube and an eighth MOS tube; the source of the seventh MOS tube is grounded; the drain of the seventh MOS tube is connected with the stable voltage subunit; the drain of the seventh MOS tube is further connected with the gate of the seventh MOS tube; the gate of the seventh MOS tube is connected with the gate of the eighth MOS tube; the source of the eighth MOS tube is grounded; the drain of the eighth MOS tube is connected with the stable voltage subunit.

2. The fast response load change based low dropout linear regulator according to claim 1, wherein, The main control circuit comprises a first capacitor and a second capacitor; one end of the first capacitor is grounded; the other end of the first capacitor is connected with the output end of the amplifier and the gate of the first MOS tube respectively; one end of the second capacitor is connected with the output end of the main control circuit; the other end of the second capacitor is connected with the inverting input end of the amplifier.

3. The fast response load change based low dropout linear regulator according to claim 1, wherein, The current compensation circuit comprises a compensation current sampling circuit; the compensation current sampling circuit is used for sampling the change of the load current and feeding back to the gate of the first MOS tube.

4. The fast response load change based low dropout linear regulator according to claim 3, wherein, The compensation current sampling circuit comprises a second MOS tube, a current mirror, a third capacitor and a third resistor; the gate of the second MOS tube is connected with the main control circuit; the source of the second MOS tube is connected with the current leakage circuit; the drain of the second MOS tube is connected with the current mirror; the current mirror is connected with the drain of the first MOS tube and is connected with a power voltage; one end of the third capacitor is connected with the third resistor; the other end of the third capacitor is connected with the output end of the amplifier.

5. The fast response load change based low dropout linear regulator according to claim 4, wherein, The current mirror comprises a third MOS tube and a fourth MOS tube; the gate of the third MOS tube is connected with the gate of the fourth MOS tube; the drain of the fourth MOS tube is connected with the drain of the third MOS tube; the source of the third MOS tube is connected with the drain of the second MOS tube; the source of the fourth MOS tube is grounded through the third resistor.

6. The fast response load change based low dropout linear regulator according to claim 1, wherein, The stable voltage subunit comprises a sixth MOS tube, a fourth capacitor, a fourth resistor, a sixth resistor and a seventh resistor, the drain of the sixth MOS tube is connected to the main control circuit, the source of the sixth MOS tube is connected to the sampling subunit, the gate of the sixth MOS tube is connected to one end of the sixth resistor through the fourth resistor, the other end of the sixth resistor is connected to the sampling subunit, the other end of the sixth resistor is also connected to the ground through the seventh resistor, one end of the fourth capacitor is connected between the fourth resistor and the sixth MOS tube, and the other end of the fourth capacitor is grounded.

7. The fast response load change based low dropout linear regulator according to claim 1, wherein, A ninth MOS tube is arranged between the bleed current sampling circuit and the low-pass filter circuit, the source of the ninth MOS tube is connected to the bleed current sampling circuit, the drain of the ninth MOS tube is connected to the low-pass filter circuit, and the gate of the ninth MOS tube is grounded.

8. The fast response load change based low dropout linear regulator according to claim 1, wherein, The low-pass filter circuit comprises a fifth capacitor and a fifth resistor, one end of the fifth capacitor is connected to the fifth resistor and the bleed current sampling circuit respectively, the other end of the fifth capacitor is grounded, and the other end of the fifth resistor serves as an output end of the low-pass filter circuit.

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